rggen 0.12.0 → 0.13.0
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- checksums.yaml +4 -4
- data/README.md +13 -2
- data/lib/rggen.rb +0 -1
- data/lib/rggen/default.rb +7 -0
- data/lib/rggen/default_setup_file.rb +1 -2
- data/lib/rggen/version.rb +1 -3
- metadata +25 -81
- data/lib/rggen/built_in.rb +0 -57
- data/lib/rggen/built_in/bit_field/bit_assignment.rb +0 -114
- data/lib/rggen/built_in/bit_field/comment.rb +0 -18
- data/lib/rggen/built_in/bit_field/initial_value.rb +0 -75
- data/lib/rggen/built_in/bit_field/name.rb +0 -41
- data/lib/rggen/built_in/bit_field/reference.rb +0 -139
- data/lib/rggen/built_in/bit_field/sv_rtl_top.rb +0 -89
- data/lib/rggen/built_in/bit_field/type.rb +0 -245
- data/lib/rggen/built_in/bit_field/type/rc_w0c_w1c.erb +0 -15
- data/lib/rggen/built_in/bit_field/type/rc_w0c_w1c.rb +0 -59
- data/lib/rggen/built_in/bit_field/type/reserved.erb +0 -3
- data/lib/rggen/built_in/bit_field/type/reserved.rb +0 -16
- data/lib/rggen/built_in/bit_field/type/ro.erb +0 -6
- data/lib/rggen/built_in/bit_field/type/ro.rb +0 -31
- data/lib/rggen/built_in/bit_field/type/rof.erb +0 -6
- data/lib/rggen/built_in/bit_field/type/rof.rb +0 -17
- data/lib/rggen/built_in/bit_field/type/rs_w0s_w1s.erb +0 -13
- data/lib/rggen/built_in/bit_field/type/rs_w0s_w1s.rb +0 -46
- data/lib/rggen/built_in/bit_field/type/rw_wo.erb +0 -9
- data/lib/rggen/built_in/bit_field/type/rw_wo.rb +0 -30
- data/lib/rggen/built_in/bit_field/type/rwc_rwe_rwl.erb +0 -16
- data/lib/rggen/built_in/bit_field/type/rwc_rwe_rwl.rb +0 -92
- data/lib/rggen/built_in/bit_field/type/w0trg_w1trg.erb +0 -9
- data/lib/rggen/built_in/bit_field/type/w0trg_w1trg.rb +0 -29
- data/lib/rggen/built_in/global/address_width.rb +0 -34
- data/lib/rggen/built_in/global/array_port_format.rb +0 -19
- data/lib/rggen/built_in/global/bus_width.rb +0 -35
- data/lib/rggen/built_in/global/fold_sv_interface_port.rb +0 -24
- data/lib/rggen/built_in/register/markdown.erb +0 -11
- data/lib/rggen/built_in/register/markdown.rb +0 -26
- data/lib/rggen/built_in/register/name.rb +0 -36
- data/lib/rggen/built_in/register/offset_address.rb +0 -106
- data/lib/rggen/built_in/register/size.rb +0 -95
- data/lib/rggen/built_in/register/sv_rtl_top.rb +0 -82
- data/lib/rggen/built_in/register/type.rb +0 -344
- data/lib/rggen/built_in/register/type/default_sv_ral.erb +0 -8
- data/lib/rggen/built_in/register/type/default_sv_rtl.erb +0 -15
- data/lib/rggen/built_in/register/type/external.erb +0 -11
- data/lib/rggen/built_in/register/type/external.rb +0 -128
- data/lib/rggen/built_in/register/type/indirect.rb +0 -327
- data/lib/rggen/built_in/register/type/indirect_sv_ral.erb +0 -13
- data/lib/rggen/built_in/register/type/indirect_sv_rtl.erb +0 -17
- data/lib/rggen/built_in/register_block/byte_size.rb +0 -61
- data/lib/rggen/built_in/register_block/markdown.erb +0 -8
- data/lib/rggen/built_in/register_block/markdown.rb +0 -36
- data/lib/rggen/built_in/register_block/name.rb +0 -38
- data/lib/rggen/built_in/register_block/protocol.rb +0 -100
- data/lib/rggen/built_in/register_block/protocol/apb.erb +0 -10
- data/lib/rggen/built_in/register_block/protocol/apb.rb +0 -89
- data/lib/rggen/built_in/register_block/protocol/axi4lite.erb +0 -11
- data/lib/rggen/built_in/register_block/protocol/axi4lite.rb +0 -125
- data/lib/rggen/built_in/register_block/sv_ral_block_model.erb +0 -11
- data/lib/rggen/built_in/register_block/sv_ral_package.rb +0 -65
- data/lib/rggen/built_in/register_block/sv_rtl_macros.erb +0 -9
- data/lib/rggen/built_in/register_block/sv_rtl_top.rb +0 -86
- data/lib/rggen/built_in/version.rb +0 -7
- data/lib/rggen/setup/default.rb +0 -30
- data/sample/block_0.md +0 -155
- data/sample/block_0.rb +0 -90
- data/sample/block_0.sv +0 -678
- data/sample/block_0.xlsx +0 -0
- data/sample/block_0.yml +0 -99
- data/sample/block_0_ral_pkg.sv +0 -184
- data/sample/block_1.md +0 -39
- data/sample/block_1.rb +0 -22
- data/sample/block_1.sv +0 -136
- data/sample/block_1.xlsx +0 -0
- data/sample/block_1.yml +0 -26
- data/sample/block_1_ral_pkg.sv +0 -68
- data/sample/config.json +0 -5
- data/sample/config.yml +0 -3
@@ -1,19 +0,0 @@
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# frozen_string_literal: true
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RgGen.define_simple_feature(:global, :array_port_format) do
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configuration do
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property :array_port_format, default: :packed
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input_pattern /(packed|unpacked|serialized)/i
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ignore_empty_value false
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build do |value|
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@array_port_format =
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if pattern_matched?
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match_data[1].downcase.to_sym
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else
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error "illegal input value for array port format: #{value.inspect}"
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end
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end
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end
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end
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@@ -1,35 +0,0 @@
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# frozen_string_literal: true
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RgGen.define_simple_feature(:global, :bus_width) do
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configuration do
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property :bus_width, default: 32
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property :byte_width, body: -> { bus_width / 8 }
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build do |value|
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@bus_width =
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begin
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Integer(value)
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rescue ArgumentError, TypeError
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error "cannot convert #{value.inspect} into bus width"
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end
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end
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verify(:feature) do
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error_condition { bus_width < 8 }
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message { "input bus width is less than 8: #{bus_width}" }
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end
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verify(:feature) do
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error_condition { !power_of_2?(bus_width) }
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message { "input bus width is not power of 2: #{bus_width}" }
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end
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printable :bus_width
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private
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def power_of_2?(value)
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value.positive? && (value & value.pred).zero?
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end
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end
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end
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@@ -1,24 +0,0 @@
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# frozen_string_literal: true
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RgGen.define_simple_feature(:global, :fold_sv_interface_port) do
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configuration do
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property :fold_sv_interface_port?, default: true
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input_pattern [
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/true|on|yes/i, /false|off|no/i
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], match_automatically: false
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ignore_empty_value false
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build do |value|
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@fold_sv_interface_port =
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if [true, false].include?(value)
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value
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elsif match_pattern(value)
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[true, false][match_index]
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else
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error "cannot convert #{value.inspect} into boolean"
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end
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end
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end
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end
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@@ -1,26 +0,0 @@
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# frozen_string_literal: true
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RgGen.define_simple_feature(:register, :markdown) do
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markdown do
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export def anchor_id
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[register_block.anchor_id, register.name].join('-')
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end
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main_code :markdown, from_template: true
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private
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def bit_field_table
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column_names = bit_field_printables.first.keys
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rows =
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bit_field_printables
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.map(&:values)
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.map { |row| row.map { |cell| Array(cell).join("\n") } }
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table(column_names, rows)
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end
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def bit_field_printables
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@bit_field_printables ||= register.bit_fields.map(&:printables)
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end
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end
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end
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@@ -1,36 +0,0 @@
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# frozen_string_literal: true
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-
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RgGen.define_simple_feature(:register, :name) do
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register_map do
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property :name
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input_pattern variable_name
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build do |value|
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@name =
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if pattern_matched?
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match_data.to_s
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else
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error "illegal input value for register name: #{value.inspect}"
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end
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end
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verify(:feature) do
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error_condition { !name }
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message { 'no register name is given' }
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end
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verify(:feature) do
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error_condition { duplicated_name? }
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message { "duplicated register name: #{name}" }
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end
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printable :name
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private
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def duplicated_name?
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register_block.registers.any? { |register| register.name == name }
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end
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end
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end
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@@ -1,106 +0,0 @@
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# frozen_string_literal: true
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RgGen.define_simple_feature(:register, :offset_address) do
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register_map do
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property :offset_address
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property :address_range, body: -> { start_address..end_address }
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property :overlap?, forward_to: :overlap_address_range?
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build do |value|
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@offset_address =
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begin
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Integer(value)
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rescue ArgumentError, TypeError
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error "cannot convert #{value.inspect} into offset address"
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end
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end
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verify(:feature) do
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error_condition { !offset_address }
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message { 'no offset address is given' }
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end
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verify(:feature) do
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error_condition { offset_address.negative? }
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message { "offset address is less than 0: #{offset_address}" }
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end
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verify(:feature) do
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error_condition { (offset_address % byte_width).positive? }
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message do
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"offset address is not aligned with bus width(#{bus_width}): "\
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"0x#{offset_address.to_s(16)}"
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end
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end
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verify(:component) do
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error_condition { end_address > register_block.byte_size }
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message do
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'offset address range exceeds byte size of register block' \
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"(#{register_block.byte_size}): " \
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"0x#{start_address.to_s(16)}-0x#{end_address.to_s(16)}"
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end
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end
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verify(:component) do
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error_condition do
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register_block.registers.any? do |register|
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overlap_address_range?(register) &&
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support_unique_range_only?(register)
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end
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end
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message do
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'offset address range overlaps with other offset address range: ' \
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"0x#{start_address.to_s(16)}-0x#{end_address.to_s(16)}"
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end
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end
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-
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printable(:offset_address) do
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[start_address, end_address]
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.map(&method(:printable_address)).join(' - ')
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end
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-
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private
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def bus_width
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configuration.bus_width
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end
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def byte_width
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configuration.byte_width
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end
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-
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def start_address
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offset_address
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end
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def end_address
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start_address + register.byte_size - 1
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end
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def overlap_address_range?(other_register)
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overlap_range?(other_register) && match_access?(other_register)
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end
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def overlap_range?(other_register)
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own = address_range
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other = other_register.address_range
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own.include?(other.first) || other.include?(own.first)
|
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end
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def match_access?(other_register)
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(register.writable? && other_register.writable?) ||
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(register.readable? && other_register.readable?)
|
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end
|
95
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-
|
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def support_unique_range_only?(other_register)
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!(register.settings[:support_overlapped_address] &&
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register.match_type?(other_register))
|
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-
end
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-
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def printable_address(address)
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print_width = (register_block.local_address_width + 3) / 4
|
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format('0x%0*x', print_width, address)
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end
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end
|
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end
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@@ -1,95 +0,0 @@
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# frozen_string_literal: true
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RgGen.define_simple_feature(:register, :size) do
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register_map do
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property :size
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property :width, body: -> { @width ||= calc_width }
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property :byte_width, body: -> { width / 8 }
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property :byte_size, body: -> { @byte_size ||= calc_byte_size }
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property :array?, forward_to: :array_register?
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property :array_size, forward_to: :array_registers
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property :count, body: -> { @count ||= calc_count }
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-
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input_pattern [
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/(#{integer}(:?,#{integer})*)/,
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/\[(#{integer}(:?,#{integer})*)\]/
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], match_automatically: false
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build do |values|
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@size = parse_values(values)
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end
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-
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verify(:feature) do
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error_condition { size && !size.all?(&:positive?) }
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message do
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"non positive value(s) are not allowed for register size: #{size}"
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end
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end
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-
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printable(:array_size) do
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(array_register? || nil) && "[#{array_registers.join(', ')}]"
|
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end
|
32
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-
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private
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-
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35
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def parse_values(values)
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Array(
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values.is_a?(String) && parse_string_values(values) || values
|
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).map(&method(:convert_value))
|
39
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end
|
40
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-
|
41
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def parse_string_values(values)
|
42
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if match_pattern(values)
|
43
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split_match_data(match_data)
|
44
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else
|
45
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error "illegal input value for register size: #{values.inspect}"
|
46
|
-
end
|
47
|
-
end
|
48
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-
|
49
|
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def split_match_data(match_data)
|
50
|
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match_data.captures.first.split(',')
|
51
|
-
end
|
52
|
-
|
53
|
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def convert_value(value)
|
54
|
-
Integer(value)
|
55
|
-
rescue ArgumentError, TypeError
|
56
|
-
error "cannot convert #{value.inspect} into register size"
|
57
|
-
end
|
58
|
-
|
59
|
-
def calc_width
|
60
|
-
bus_width = configuration.bus_width
|
61
|
-
if register.bit_fields.empty?
|
62
|
-
bus_width
|
63
|
-
else
|
64
|
-
((max_msb + bus_width) / bus_width) * bus_width
|
65
|
-
end
|
66
|
-
end
|
67
|
-
|
68
|
-
def max_msb
|
69
|
-
register
|
70
|
-
.bit_fields
|
71
|
-
.map { |bit_field| bit_field.msb((bit_field.sequence_size || 1) - 1) }
|
72
|
-
.max
|
73
|
-
end
|
74
|
-
|
75
|
-
def calc_byte_size
|
76
|
-
if register.settings[:byte_size]
|
77
|
-
instance_exec(®ister.settings[:byte_size])
|
78
|
-
else
|
79
|
-
Array(@size).reduce(1, :*) * byte_width
|
80
|
-
end
|
81
|
-
end
|
82
|
-
|
83
|
-
def array_register?
|
84
|
-
register.settings[:support_array] && !@size.nil? || false
|
85
|
-
end
|
86
|
-
|
87
|
-
def array_registers
|
88
|
-
array_register? && @size || nil
|
89
|
-
end
|
90
|
-
|
91
|
-
def calc_count
|
92
|
-
Array(array_registers).reduce(1, :*)
|
93
|
-
end
|
94
|
-
end
|
95
|
-
end
|
@@ -1,82 +0,0 @@
|
|
1
|
-
# frozen_string_literal: true
|
2
|
-
|
3
|
-
RgGen.define_simple_feature(:register, :sv_rtl_top) do
|
4
|
-
sv_rtl do
|
5
|
-
export :index
|
6
|
-
export :local_index
|
7
|
-
export :loop_variables
|
8
|
-
|
9
|
-
pre_build do
|
10
|
-
@base_index =
|
11
|
-
register_block.registers.map(&:count).inject(0, :+)
|
12
|
-
end
|
13
|
-
|
14
|
-
build do
|
15
|
-
if register.bit_fields?
|
16
|
-
interface :register, :bit_field_if, {
|
17
|
-
name: 'bit_field_if',
|
18
|
-
interface_type: 'rggen_bit_field_if',
|
19
|
-
parameter_values: [register.width]
|
20
|
-
}
|
21
|
-
end
|
22
|
-
end
|
23
|
-
|
24
|
-
main_code :register_block do
|
25
|
-
local_scope("g_#{register.name}") do |scope|
|
26
|
-
scope.top_scope
|
27
|
-
scope.loop_size loop_size
|
28
|
-
scope.variables variables
|
29
|
-
scope.body(&method(:body_code))
|
30
|
-
end
|
31
|
-
end
|
32
|
-
|
33
|
-
def index(offset = nil)
|
34
|
-
operands =
|
35
|
-
register.array? ? [@base_index, offset || local_index] : [@base_index]
|
36
|
-
if operands.all? { |operand| operand.is_a?(Integer) }
|
37
|
-
operands.inject(:+)
|
38
|
-
else
|
39
|
-
operands.join('+')
|
40
|
-
end
|
41
|
-
end
|
42
|
-
|
43
|
-
def local_index
|
44
|
-
(register.array? || nil) &&
|
45
|
-
loop_variables
|
46
|
-
.zip(local_index_coefficients)
|
47
|
-
.map { |v, c| [c, v].compact.join('*') }
|
48
|
-
.join('+')
|
49
|
-
end
|
50
|
-
|
51
|
-
def loop_variables
|
52
|
-
(register.array? || nil) &&
|
53
|
-
register.array_size.map.with_index(1) do |_size, i|
|
54
|
-
create_identifier(loop_index(i))
|
55
|
-
end
|
56
|
-
end
|
57
|
-
|
58
|
-
private
|
59
|
-
|
60
|
-
def local_index_coefficients
|
61
|
-
coefficients = []
|
62
|
-
register.array_size.reverse.inject(1) do |total, size|
|
63
|
-
coefficients.unshift(coefficients.size.zero? ? nil : total)
|
64
|
-
total * size
|
65
|
-
end
|
66
|
-
coefficients
|
67
|
-
end
|
68
|
-
|
69
|
-
def loop_size
|
70
|
-
(register.array? || nil) &&
|
71
|
-
loop_variables.zip(register.array_size).to_h
|
72
|
-
end
|
73
|
-
|
74
|
-
def variables
|
75
|
-
register.declarations(:register, :variable)
|
76
|
-
end
|
77
|
-
|
78
|
-
def body_code(code)
|
79
|
-
register.generate_code(:register, :top_down, code)
|
80
|
-
end
|
81
|
-
end
|
82
|
-
end
|
@@ -1,344 +0,0 @@
|
|
1
|
-
# frozen_string_literal: true
|
2
|
-
|
3
|
-
RgGen.define_list_feature(:register, :type) do
|
4
|
-
register_map do
|
5
|
-
base_feature do
|
6
|
-
define_helpers do
|
7
|
-
def writable?(&block)
|
8
|
-
@writability = block
|
9
|
-
end
|
10
|
-
|
11
|
-
def readable?(&block)
|
12
|
-
@readability = block
|
13
|
-
end
|
14
|
-
|
15
|
-
attr_reader :writability
|
16
|
-
attr_reader :readability
|
17
|
-
|
18
|
-
def no_bit_fields
|
19
|
-
@no_bit_fields = true
|
20
|
-
end
|
21
|
-
|
22
|
-
def need_bit_fields?
|
23
|
-
!@no_bit_fields
|
24
|
-
end
|
25
|
-
|
26
|
-
def settings
|
27
|
-
@settings ||= {}
|
28
|
-
end
|
29
|
-
|
30
|
-
def support_array_register
|
31
|
-
settings[:support_array] = true
|
32
|
-
end
|
33
|
-
|
34
|
-
def byte_size(&block)
|
35
|
-
settings[:byte_size] = block
|
36
|
-
end
|
37
|
-
|
38
|
-
def support_overlapped_address
|
39
|
-
settings[:support_overlapped_address] = true
|
40
|
-
end
|
41
|
-
end
|
42
|
-
|
43
|
-
property :type, body: -> { @type || :default }
|
44
|
-
property :match_type?, body: ->(register) { register.type == type }
|
45
|
-
property :writable?, forward_to: :writability
|
46
|
-
property :readable?, forward_to: :readability
|
47
|
-
property :settings, forward_to_helper: true
|
48
|
-
|
49
|
-
build do |value|
|
50
|
-
@type = value[:type]
|
51
|
-
@options = value[:options]
|
52
|
-
helper.need_bit_fields? || register.need_no_children
|
53
|
-
end
|
54
|
-
|
55
|
-
verify(:component) do
|
56
|
-
error_condition do
|
57
|
-
helper.need_bit_fields? && register.bit_fields.empty?
|
58
|
-
end
|
59
|
-
message { 'no bit fields are given' }
|
60
|
-
end
|
61
|
-
|
62
|
-
private
|
63
|
-
|
64
|
-
attr_reader :options
|
65
|
-
|
66
|
-
def writability
|
67
|
-
if @writability.nil?
|
68
|
-
block = helper.writability || default_writability
|
69
|
-
@writability = instance_exec(&block)
|
70
|
-
end
|
71
|
-
@writability
|
72
|
-
end
|
73
|
-
|
74
|
-
def default_writability
|
75
|
-
-> { register.bit_fields.any?(&:writable?) }
|
76
|
-
end
|
77
|
-
|
78
|
-
def readability
|
79
|
-
if @readability.nil?
|
80
|
-
block = helper.readability || default_readability
|
81
|
-
@readability = instance_exec(&block)
|
82
|
-
end
|
83
|
-
@readability
|
84
|
-
end
|
85
|
-
|
86
|
-
def default_readability
|
87
|
-
lambda do
|
88
|
-
block = ->(bit_field) { bit_field.readable? || bit_field.reserved? }
|
89
|
-
register.bit_fields.any?(&block)
|
90
|
-
end
|
91
|
-
end
|
92
|
-
end
|
93
|
-
|
94
|
-
default_feature do
|
95
|
-
support_array_register
|
96
|
-
|
97
|
-
verify(:feature) do
|
98
|
-
error_condition { @type }
|
99
|
-
message { "unknown register type: #{@type.inspect}" }
|
100
|
-
end
|
101
|
-
end
|
102
|
-
|
103
|
-
factory do
|
104
|
-
convert_value do |value|
|
105
|
-
type, options = split_input_value(value)
|
106
|
-
{ type: find_type(type), options: Array(options) }
|
107
|
-
end
|
108
|
-
|
109
|
-
def select_feature(cell)
|
110
|
-
if cell.empty_value?
|
111
|
-
target_feature
|
112
|
-
else
|
113
|
-
target_features[cell.value[:type]]
|
114
|
-
end
|
115
|
-
end
|
116
|
-
|
117
|
-
private
|
118
|
-
|
119
|
-
def split_input_value(value)
|
120
|
-
if value.is_a?(String)
|
121
|
-
split_string_value(value)
|
122
|
-
else
|
123
|
-
input_value = Array(value)
|
124
|
-
[input_value[0], input_value[1..-1]]
|
125
|
-
end
|
126
|
-
end
|
127
|
-
|
128
|
-
def split_string_value(value)
|
129
|
-
type, options = split_string(value, ':', 2)
|
130
|
-
[type, split_string(options, /[,\n]/, 0)]
|
131
|
-
end
|
132
|
-
|
133
|
-
def split_string(value, separator, limit)
|
134
|
-
value&.split(separator, limit)&.map(&:strip)
|
135
|
-
end
|
136
|
-
|
137
|
-
def find_type(type)
|
138
|
-
types = target_features.keys
|
139
|
-
types.find(&type.to_sym.method(:casecmp?)) || type
|
140
|
-
end
|
141
|
-
end
|
142
|
-
end
|
143
|
-
|
144
|
-
sv_rtl do
|
145
|
-
base_feature do
|
146
|
-
private
|
147
|
-
|
148
|
-
def readable
|
149
|
-
register.readable? && 1 || 0
|
150
|
-
end
|
151
|
-
|
152
|
-
def writable
|
153
|
-
register.writable? && 1 || 0
|
154
|
-
end
|
155
|
-
|
156
|
-
def bus_width
|
157
|
-
configuration.bus_width
|
158
|
-
end
|
159
|
-
|
160
|
-
def address_width
|
161
|
-
register_block.local_address_width
|
162
|
-
end
|
163
|
-
|
164
|
-
def offset_address
|
165
|
-
hex(register.offset_address, address_width)
|
166
|
-
end
|
167
|
-
|
168
|
-
def width
|
169
|
-
register.width
|
170
|
-
end
|
171
|
-
|
172
|
-
def valid_bits
|
173
|
-
bits = register.bit_fields.map(&:bit_map).inject(:|)
|
174
|
-
hex(bits, register.width)
|
175
|
-
end
|
176
|
-
|
177
|
-
def register_index
|
178
|
-
register.local_index || 0
|
179
|
-
end
|
180
|
-
|
181
|
-
def register_if
|
182
|
-
register_block.register_if[register.index]
|
183
|
-
end
|
184
|
-
|
185
|
-
def bit_field_if
|
186
|
-
register.bit_field_if
|
187
|
-
end
|
188
|
-
end
|
189
|
-
|
190
|
-
default_feature do
|
191
|
-
template_path = File.join(__dir__, 'type', 'default_sv_rtl.erb')
|
192
|
-
main_code :register, from_template: template_path
|
193
|
-
end
|
194
|
-
|
195
|
-
factory do
|
196
|
-
def select_feature(_configuration, register)
|
197
|
-
target_features[register.type]
|
198
|
-
end
|
199
|
-
end
|
200
|
-
end
|
201
|
-
|
202
|
-
sv_ral do
|
203
|
-
base_feature do
|
204
|
-
define_helpers do
|
205
|
-
def model_name(&body)
|
206
|
-
@model_name = body if block_given?
|
207
|
-
@model_name
|
208
|
-
end
|
209
|
-
|
210
|
-
def offset_address(&body)
|
211
|
-
@offset_address = body if block_given?
|
212
|
-
@offset_address
|
213
|
-
end
|
214
|
-
|
215
|
-
def unmapped
|
216
|
-
@unmapped = true
|
217
|
-
end
|
218
|
-
|
219
|
-
def unmapped?
|
220
|
-
!@unmapped.nil?
|
221
|
-
end
|
222
|
-
|
223
|
-
def constructor(&body)
|
224
|
-
@constructor = body if block_given?
|
225
|
-
@constructor
|
226
|
-
end
|
227
|
-
end
|
228
|
-
|
229
|
-
export :constructors
|
230
|
-
|
231
|
-
build do
|
232
|
-
variable :register_block, :ral_model, {
|
233
|
-
name: register.name,
|
234
|
-
data_type: model_name,
|
235
|
-
array_size: register.array_size,
|
236
|
-
random: true
|
237
|
-
}
|
238
|
-
end
|
239
|
-
|
240
|
-
def constructors
|
241
|
-
(array_index_list || [nil]).map.with_index do |array_index, i|
|
242
|
-
constructor_code(array_index, i)
|
243
|
-
end
|
244
|
-
end
|
245
|
-
|
246
|
-
private
|
247
|
-
|
248
|
-
def model_name
|
249
|
-
if helper.model_name
|
250
|
-
instance_eval(&helper.model_name)
|
251
|
-
else
|
252
|
-
"#{register.name}_reg_model"
|
253
|
-
end
|
254
|
-
end
|
255
|
-
|
256
|
-
def array_index_list
|
257
|
-
(register.array? || nil) &&
|
258
|
-
begin
|
259
|
-
index_table = register.array_size.map { |size| (0...size).to_a }
|
260
|
-
index_table[0].product(*index_table[1..-1])
|
261
|
-
end
|
262
|
-
end
|
263
|
-
|
264
|
-
def constructor_code(array_index, index)
|
265
|
-
if helper.constructor
|
266
|
-
instance_exec(array_index, index, &helper.constructor)
|
267
|
-
else
|
268
|
-
macro_call(
|
269
|
-
:rggen_ral_create_reg_model, arguments(array_index, index)
|
270
|
-
)
|
271
|
-
end
|
272
|
-
end
|
273
|
-
|
274
|
-
def arguments(array_index, index)
|
275
|
-
[
|
276
|
-
ral_model[array_index], array(array_index), offset_address(index),
|
277
|
-
access_rights, unmapped, hdl_path(array_index)
|
278
|
-
]
|
279
|
-
end
|
280
|
-
|
281
|
-
def offset_address(index = 0)
|
282
|
-
address =
|
283
|
-
if helper.offset_address
|
284
|
-
instance_exec(index, &helper.offset_address)
|
285
|
-
else
|
286
|
-
register.offset_address + register.byte_width * index
|
287
|
-
end
|
288
|
-
hex(address, register_block.local_address_width)
|
289
|
-
end
|
290
|
-
|
291
|
-
def access_rights
|
292
|
-
if register.writable? && register.readable?
|
293
|
-
'RW'
|
294
|
-
elsif register.writable?
|
295
|
-
'WO'
|
296
|
-
else
|
297
|
-
'RO'
|
298
|
-
end
|
299
|
-
end
|
300
|
-
|
301
|
-
def unmapped
|
302
|
-
helper.unmapped? && 1 || 0
|
303
|
-
end
|
304
|
-
|
305
|
-
def hdl_path(array_index)
|
306
|
-
[
|
307
|
-
"g_#{register.name}",
|
308
|
-
*Array(array_index).map { |i| "g[#{i}]" },
|
309
|
-
'u_register'
|
310
|
-
].join('.')
|
311
|
-
end
|
312
|
-
|
313
|
-
def variables
|
314
|
-
register.declarations(:register, :variable)
|
315
|
-
end
|
316
|
-
|
317
|
-
def field_model_constructors
|
318
|
-
register.bit_fields.flat_map(&:constructors)
|
319
|
-
end
|
320
|
-
end
|
321
|
-
|
322
|
-
default_feature do
|
323
|
-
main_code :ral_package do
|
324
|
-
class_definition(model_name) do |sv_class|
|
325
|
-
sv_class.base 'rggen_ral_reg'
|
326
|
-
sv_class.variables variables
|
327
|
-
sv_class.body { model_body }
|
328
|
-
end
|
329
|
-
end
|
330
|
-
|
331
|
-
private
|
332
|
-
|
333
|
-
def model_body
|
334
|
-
process_template(File.join(__dir__, 'type', 'default_sv_ral.erb'))
|
335
|
-
end
|
336
|
-
end
|
337
|
-
|
338
|
-
factory do
|
339
|
-
def select_feature(_configuration, register)
|
340
|
-
target_features[register.type]
|
341
|
-
end
|
342
|
-
end
|
343
|
-
end
|
344
|
-
end
|