libv8 3.3.10.2

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (700) hide show
  1. data/.gitignore +8 -0
  2. data/.gitmodules +3 -0
  3. data/Gemfile +4 -0
  4. data/README.md +44 -0
  5. data/Rakefile +73 -0
  6. data/ext/libv8/extconf.rb +9 -0
  7. data/lib/libv8.rb +15 -0
  8. data/lib/libv8/Makefile +38 -0
  9. data/lib/libv8/detect_cpu.rb +27 -0
  10. data/lib/libv8/fpic-on-linux-amd64.patch +13 -0
  11. data/lib/libv8/scons/CHANGES.txt +5334 -0
  12. data/lib/libv8/scons/LICENSE.txt +20 -0
  13. data/lib/libv8/scons/MANIFEST +199 -0
  14. data/lib/libv8/scons/PKG-INFO +13 -0
  15. data/lib/libv8/scons/README.txt +243 -0
  16. data/lib/libv8/scons/RELEASE.txt +98 -0
  17. data/lib/libv8/scons/engine/SCons/Action.py +1241 -0
  18. data/lib/libv8/scons/engine/SCons/Builder.py +877 -0
  19. data/lib/libv8/scons/engine/SCons/CacheDir.py +216 -0
  20. data/lib/libv8/scons/engine/SCons/Conftest.py +793 -0
  21. data/lib/libv8/scons/engine/SCons/Debug.py +220 -0
  22. data/lib/libv8/scons/engine/SCons/Defaults.py +480 -0
  23. data/lib/libv8/scons/engine/SCons/Environment.py +2318 -0
  24. data/lib/libv8/scons/engine/SCons/Errors.py +205 -0
  25. data/lib/libv8/scons/engine/SCons/Executor.py +633 -0
  26. data/lib/libv8/scons/engine/SCons/Job.py +435 -0
  27. data/lib/libv8/scons/engine/SCons/Memoize.py +244 -0
  28. data/lib/libv8/scons/engine/SCons/Node/Alias.py +152 -0
  29. data/lib/libv8/scons/engine/SCons/Node/FS.py +3142 -0
  30. data/lib/libv8/scons/engine/SCons/Node/Python.py +128 -0
  31. data/lib/libv8/scons/engine/SCons/Node/__init__.py +1328 -0
  32. data/lib/libv8/scons/engine/SCons/Options/BoolOption.py +50 -0
  33. data/lib/libv8/scons/engine/SCons/Options/EnumOption.py +50 -0
  34. data/lib/libv8/scons/engine/SCons/Options/ListOption.py +50 -0
  35. data/lib/libv8/scons/engine/SCons/Options/PackageOption.py +50 -0
  36. data/lib/libv8/scons/engine/SCons/Options/PathOption.py +76 -0
  37. data/lib/libv8/scons/engine/SCons/Options/__init__.py +67 -0
  38. data/lib/libv8/scons/engine/SCons/PathList.py +231 -0
  39. data/lib/libv8/scons/engine/SCons/Platform/__init__.py +241 -0
  40. data/lib/libv8/scons/engine/SCons/Platform/aix.py +69 -0
  41. data/lib/libv8/scons/engine/SCons/Platform/cygwin.py +55 -0
  42. data/lib/libv8/scons/engine/SCons/Platform/darwin.py +46 -0
  43. data/lib/libv8/scons/engine/SCons/Platform/hpux.py +46 -0
  44. data/lib/libv8/scons/engine/SCons/Platform/irix.py +44 -0
  45. data/lib/libv8/scons/engine/SCons/Platform/os2.py +58 -0
  46. data/lib/libv8/scons/engine/SCons/Platform/posix.py +263 -0
  47. data/lib/libv8/scons/engine/SCons/Platform/sunos.py +50 -0
  48. data/lib/libv8/scons/engine/SCons/Platform/win32.py +385 -0
  49. data/lib/libv8/scons/engine/SCons/SConf.py +1030 -0
  50. data/lib/libv8/scons/engine/SCons/SConsign.py +383 -0
  51. data/lib/libv8/scons/engine/SCons/Scanner/C.py +132 -0
  52. data/lib/libv8/scons/engine/SCons/Scanner/D.py +73 -0
  53. data/lib/libv8/scons/engine/SCons/Scanner/Dir.py +109 -0
  54. data/lib/libv8/scons/engine/SCons/Scanner/Fortran.py +316 -0
  55. data/lib/libv8/scons/engine/SCons/Scanner/IDL.py +48 -0
  56. data/lib/libv8/scons/engine/SCons/Scanner/LaTeX.py +384 -0
  57. data/lib/libv8/scons/engine/SCons/Scanner/Prog.py +101 -0
  58. data/lib/libv8/scons/engine/SCons/Scanner/RC.py +55 -0
  59. data/lib/libv8/scons/engine/SCons/Scanner/__init__.py +413 -0
  60. data/lib/libv8/scons/engine/SCons/Script/Interactive.py +384 -0
  61. data/lib/libv8/scons/engine/SCons/Script/Main.py +1334 -0
  62. data/lib/libv8/scons/engine/SCons/Script/SConsOptions.py +939 -0
  63. data/lib/libv8/scons/engine/SCons/Script/SConscript.py +640 -0
  64. data/lib/libv8/scons/engine/SCons/Script/__init__.py +412 -0
  65. data/lib/libv8/scons/engine/SCons/Sig.py +63 -0
  66. data/lib/libv8/scons/engine/SCons/Subst.py +904 -0
  67. data/lib/libv8/scons/engine/SCons/Taskmaster.py +1017 -0
  68. data/lib/libv8/scons/engine/SCons/Tool/386asm.py +61 -0
  69. data/lib/libv8/scons/engine/SCons/Tool/BitKeeper.py +67 -0
  70. data/lib/libv8/scons/engine/SCons/Tool/CVS.py +73 -0
  71. data/lib/libv8/scons/engine/SCons/Tool/FortranCommon.py +246 -0
  72. data/lib/libv8/scons/engine/SCons/Tool/JavaCommon.py +323 -0
  73. data/lib/libv8/scons/engine/SCons/Tool/MSCommon/__init__.py +56 -0
  74. data/lib/libv8/scons/engine/SCons/Tool/MSCommon/arch.py +61 -0
  75. data/lib/libv8/scons/engine/SCons/Tool/MSCommon/common.py +240 -0
  76. data/lib/libv8/scons/engine/SCons/Tool/MSCommon/netframework.py +82 -0
  77. data/lib/libv8/scons/engine/SCons/Tool/MSCommon/sdk.py +391 -0
  78. data/lib/libv8/scons/engine/SCons/Tool/MSCommon/vc.py +456 -0
  79. data/lib/libv8/scons/engine/SCons/Tool/MSCommon/vs.py +499 -0
  80. data/lib/libv8/scons/engine/SCons/Tool/Perforce.py +103 -0
  81. data/lib/libv8/scons/engine/SCons/Tool/PharLapCommon.py +137 -0
  82. data/lib/libv8/scons/engine/SCons/Tool/RCS.py +64 -0
  83. data/lib/libv8/scons/engine/SCons/Tool/SCCS.py +64 -0
  84. data/lib/libv8/scons/engine/SCons/Tool/Subversion.py +71 -0
  85. data/lib/libv8/scons/engine/SCons/Tool/__init__.py +681 -0
  86. data/lib/libv8/scons/engine/SCons/Tool/aixc++.py +82 -0
  87. data/lib/libv8/scons/engine/SCons/Tool/aixcc.py +74 -0
  88. data/lib/libv8/scons/engine/SCons/Tool/aixf77.py +80 -0
  89. data/lib/libv8/scons/engine/SCons/Tool/aixlink.py +76 -0
  90. data/lib/libv8/scons/engine/SCons/Tool/applelink.py +71 -0
  91. data/lib/libv8/scons/engine/SCons/Tool/ar.py +63 -0
  92. data/lib/libv8/scons/engine/SCons/Tool/as.py +78 -0
  93. data/lib/libv8/scons/engine/SCons/Tool/bcc32.py +81 -0
  94. data/lib/libv8/scons/engine/SCons/Tool/c++.py +99 -0
  95. data/lib/libv8/scons/engine/SCons/Tool/cc.py +102 -0
  96. data/lib/libv8/scons/engine/SCons/Tool/cvf.py +58 -0
  97. data/lib/libv8/scons/engine/SCons/Tool/default.py +50 -0
  98. data/lib/libv8/scons/engine/SCons/Tool/dmd.py +223 -0
  99. data/lib/libv8/scons/engine/SCons/Tool/dvi.py +64 -0
  100. data/lib/libv8/scons/engine/SCons/Tool/dvipdf.py +124 -0
  101. data/lib/libv8/scons/engine/SCons/Tool/dvips.py +94 -0
  102. data/lib/libv8/scons/engine/SCons/Tool/f77.py +62 -0
  103. data/lib/libv8/scons/engine/SCons/Tool/f90.py +62 -0
  104. data/lib/libv8/scons/engine/SCons/Tool/f95.py +63 -0
  105. data/lib/libv8/scons/engine/SCons/Tool/filesystem.py +98 -0
  106. data/lib/libv8/scons/engine/SCons/Tool/fortran.py +62 -0
  107. data/lib/libv8/scons/engine/SCons/Tool/g++.py +90 -0
  108. data/lib/libv8/scons/engine/SCons/Tool/g77.py +73 -0
  109. data/lib/libv8/scons/engine/SCons/Tool/gas.py +53 -0
  110. data/lib/libv8/scons/engine/SCons/Tool/gcc.py +80 -0
  111. data/lib/libv8/scons/engine/SCons/Tool/gfortran.py +64 -0
  112. data/lib/libv8/scons/engine/SCons/Tool/gnulink.py +63 -0
  113. data/lib/libv8/scons/engine/SCons/Tool/gs.py +81 -0
  114. data/lib/libv8/scons/engine/SCons/Tool/hpc++.py +84 -0
  115. data/lib/libv8/scons/engine/SCons/Tool/hpcc.py +53 -0
  116. data/lib/libv8/scons/engine/SCons/Tool/hplink.py +77 -0
  117. data/lib/libv8/scons/engine/SCons/Tool/icc.py +59 -0
  118. data/lib/libv8/scons/engine/SCons/Tool/icl.py +52 -0
  119. data/lib/libv8/scons/engine/SCons/Tool/ifl.py +72 -0
  120. data/lib/libv8/scons/engine/SCons/Tool/ifort.py +88 -0
  121. data/lib/libv8/scons/engine/SCons/Tool/ilink.py +59 -0
  122. data/lib/libv8/scons/engine/SCons/Tool/ilink32.py +60 -0
  123. data/lib/libv8/scons/engine/SCons/Tool/install.py +229 -0
  124. data/lib/libv8/scons/engine/SCons/Tool/intelc.py +482 -0
  125. data/lib/libv8/scons/engine/SCons/Tool/ipkg.py +67 -0
  126. data/lib/libv8/scons/engine/SCons/Tool/jar.py +110 -0
  127. data/lib/libv8/scons/engine/SCons/Tool/javac.py +230 -0
  128. data/lib/libv8/scons/engine/SCons/Tool/javah.py +137 -0
  129. data/lib/libv8/scons/engine/SCons/Tool/latex.py +79 -0
  130. data/lib/libv8/scons/engine/SCons/Tool/lex.py +97 -0
  131. data/lib/libv8/scons/engine/SCons/Tool/link.py +121 -0
  132. data/lib/libv8/scons/engine/SCons/Tool/linkloc.py +112 -0
  133. data/lib/libv8/scons/engine/SCons/Tool/m4.py +63 -0
  134. data/lib/libv8/scons/engine/SCons/Tool/masm.py +77 -0
  135. data/lib/libv8/scons/engine/SCons/Tool/midl.py +88 -0
  136. data/lib/libv8/scons/engine/SCons/Tool/mingw.py +158 -0
  137. data/lib/libv8/scons/engine/SCons/Tool/mslib.py +64 -0
  138. data/lib/libv8/scons/engine/SCons/Tool/mslink.py +266 -0
  139. data/lib/libv8/scons/engine/SCons/Tool/mssdk.py +50 -0
  140. data/lib/libv8/scons/engine/SCons/Tool/msvc.py +268 -0
  141. data/lib/libv8/scons/engine/SCons/Tool/msvs.py +1388 -0
  142. data/lib/libv8/scons/engine/SCons/Tool/mwcc.py +207 -0
  143. data/lib/libv8/scons/engine/SCons/Tool/mwld.py +107 -0
  144. data/lib/libv8/scons/engine/SCons/Tool/nasm.py +72 -0
  145. data/lib/libv8/scons/engine/SCons/Tool/packaging/__init__.py +312 -0
  146. data/lib/libv8/scons/engine/SCons/Tool/packaging/ipk.py +185 -0
  147. data/lib/libv8/scons/engine/SCons/Tool/packaging/msi.py +527 -0
  148. data/lib/libv8/scons/engine/SCons/Tool/packaging/rpm.py +365 -0
  149. data/lib/libv8/scons/engine/SCons/Tool/packaging/src_tarbz2.py +43 -0
  150. data/lib/libv8/scons/engine/SCons/Tool/packaging/src_targz.py +43 -0
  151. data/lib/libv8/scons/engine/SCons/Tool/packaging/src_zip.py +43 -0
  152. data/lib/libv8/scons/engine/SCons/Tool/packaging/tarbz2.py +44 -0
  153. data/lib/libv8/scons/engine/SCons/Tool/packaging/targz.py +44 -0
  154. data/lib/libv8/scons/engine/SCons/Tool/packaging/zip.py +44 -0
  155. data/lib/libv8/scons/engine/SCons/Tool/pdf.py +78 -0
  156. data/lib/libv8/scons/engine/SCons/Tool/pdflatex.py +83 -0
  157. data/lib/libv8/scons/engine/SCons/Tool/pdftex.py +108 -0
  158. data/lib/libv8/scons/engine/SCons/Tool/qt.py +336 -0
  159. data/lib/libv8/scons/engine/SCons/Tool/rmic.py +120 -0
  160. data/lib/libv8/scons/engine/SCons/Tool/rpcgen.py +70 -0
  161. data/lib/libv8/scons/engine/SCons/Tool/rpm.py +132 -0
  162. data/lib/libv8/scons/engine/SCons/Tool/sgiar.py +68 -0
  163. data/lib/libv8/scons/engine/SCons/Tool/sgic++.py +58 -0
  164. data/lib/libv8/scons/engine/SCons/Tool/sgicc.py +53 -0
  165. data/lib/libv8/scons/engine/SCons/Tool/sgilink.py +63 -0
  166. data/lib/libv8/scons/engine/SCons/Tool/sunar.py +67 -0
  167. data/lib/libv8/scons/engine/SCons/Tool/sunc++.py +142 -0
  168. data/lib/libv8/scons/engine/SCons/Tool/suncc.py +58 -0
  169. data/lib/libv8/scons/engine/SCons/Tool/sunf77.py +63 -0
  170. data/lib/libv8/scons/engine/SCons/Tool/sunf90.py +64 -0
  171. data/lib/libv8/scons/engine/SCons/Tool/sunf95.py +64 -0
  172. data/lib/libv8/scons/engine/SCons/Tool/sunlink.py +77 -0
  173. data/lib/libv8/scons/engine/SCons/Tool/swig.py +182 -0
  174. data/lib/libv8/scons/engine/SCons/Tool/tar.py +73 -0
  175. data/lib/libv8/scons/engine/SCons/Tool/tex.py +813 -0
  176. data/lib/libv8/scons/engine/SCons/Tool/textfile.py +175 -0
  177. data/lib/libv8/scons/engine/SCons/Tool/tlib.py +53 -0
  178. data/lib/libv8/scons/engine/SCons/Tool/wix.py +99 -0
  179. data/lib/libv8/scons/engine/SCons/Tool/yacc.py +130 -0
  180. data/lib/libv8/scons/engine/SCons/Tool/zip.py +99 -0
  181. data/lib/libv8/scons/engine/SCons/Util.py +1492 -0
  182. data/lib/libv8/scons/engine/SCons/Variables/BoolVariable.py +89 -0
  183. data/lib/libv8/scons/engine/SCons/Variables/EnumVariable.py +103 -0
  184. data/lib/libv8/scons/engine/SCons/Variables/ListVariable.py +135 -0
  185. data/lib/libv8/scons/engine/SCons/Variables/PackageVariable.py +106 -0
  186. data/lib/libv8/scons/engine/SCons/Variables/PathVariable.py +147 -0
  187. data/lib/libv8/scons/engine/SCons/Variables/__init__.py +312 -0
  188. data/lib/libv8/scons/engine/SCons/Warnings.py +246 -0
  189. data/lib/libv8/scons/engine/SCons/__init__.py +49 -0
  190. data/lib/libv8/scons/engine/SCons/compat/__init__.py +237 -0
  191. data/lib/libv8/scons/engine/SCons/compat/_scons_builtins.py +150 -0
  192. data/lib/libv8/scons/engine/SCons/compat/_scons_collections.py +45 -0
  193. data/lib/libv8/scons/engine/SCons/compat/_scons_dbm.py +45 -0
  194. data/lib/libv8/scons/engine/SCons/compat/_scons_hashlib.py +76 -0
  195. data/lib/libv8/scons/engine/SCons/compat/_scons_io.py +45 -0
  196. data/lib/libv8/scons/engine/SCons/compat/_scons_sets.py +563 -0
  197. data/lib/libv8/scons/engine/SCons/compat/_scons_subprocess.py +1281 -0
  198. data/lib/libv8/scons/engine/SCons/cpp.py +589 -0
  199. data/lib/libv8/scons/engine/SCons/dblite.py +251 -0
  200. data/lib/libv8/scons/engine/SCons/exitfuncs.py +77 -0
  201. data/lib/libv8/scons/os_spawnv_fix.diff +83 -0
  202. data/lib/libv8/scons/scons-time.1 +1017 -0
  203. data/lib/libv8/scons/scons.1 +15219 -0
  204. data/lib/libv8/scons/sconsign.1 +208 -0
  205. data/lib/libv8/scons/script/scons +196 -0
  206. data/lib/libv8/scons/script/scons-time +1544 -0
  207. data/lib/libv8/scons/script/scons.bat +31 -0
  208. data/lib/libv8/scons/script/sconsign +513 -0
  209. data/lib/libv8/scons/setup.cfg +6 -0
  210. data/lib/libv8/scons/setup.py +425 -0
  211. data/lib/libv8/v8/.gitignore +35 -0
  212. data/lib/libv8/v8/AUTHORS +44 -0
  213. data/lib/libv8/v8/ChangeLog +2839 -0
  214. data/lib/libv8/v8/LICENSE +52 -0
  215. data/lib/libv8/v8/LICENSE.strongtalk +29 -0
  216. data/lib/libv8/v8/LICENSE.v8 +26 -0
  217. data/lib/libv8/v8/LICENSE.valgrind +45 -0
  218. data/lib/libv8/v8/SConstruct +1478 -0
  219. data/lib/libv8/v8/build/README.txt +49 -0
  220. data/lib/libv8/v8/build/all.gyp +18 -0
  221. data/lib/libv8/v8/build/armu.gypi +32 -0
  222. data/lib/libv8/v8/build/common.gypi +144 -0
  223. data/lib/libv8/v8/build/gyp_v8 +145 -0
  224. data/lib/libv8/v8/include/v8-debug.h +395 -0
  225. data/lib/libv8/v8/include/v8-preparser.h +117 -0
  226. data/lib/libv8/v8/include/v8-profiler.h +505 -0
  227. data/lib/libv8/v8/include/v8-testing.h +104 -0
  228. data/lib/libv8/v8/include/v8.h +4124 -0
  229. data/lib/libv8/v8/include/v8stdint.h +53 -0
  230. data/lib/libv8/v8/preparser/SConscript +38 -0
  231. data/lib/libv8/v8/preparser/preparser-process.cc +379 -0
  232. data/lib/libv8/v8/src/SConscript +368 -0
  233. data/lib/libv8/v8/src/accessors.cc +767 -0
  234. data/lib/libv8/v8/src/accessors.h +123 -0
  235. data/lib/libv8/v8/src/allocation-inl.h +49 -0
  236. data/lib/libv8/v8/src/allocation.cc +122 -0
  237. data/lib/libv8/v8/src/allocation.h +143 -0
  238. data/lib/libv8/v8/src/api.cc +5845 -0
  239. data/lib/libv8/v8/src/api.h +574 -0
  240. data/lib/libv8/v8/src/apinatives.js +110 -0
  241. data/lib/libv8/v8/src/apiutils.h +73 -0
  242. data/lib/libv8/v8/src/arguments.h +118 -0
  243. data/lib/libv8/v8/src/arm/assembler-arm-inl.h +353 -0
  244. data/lib/libv8/v8/src/arm/assembler-arm.cc +2661 -0
  245. data/lib/libv8/v8/src/arm/assembler-arm.h +1375 -0
  246. data/lib/libv8/v8/src/arm/builtins-arm.cc +1658 -0
  247. data/lib/libv8/v8/src/arm/code-stubs-arm.cc +6398 -0
  248. data/lib/libv8/v8/src/arm/code-stubs-arm.h +673 -0
  249. data/lib/libv8/v8/src/arm/codegen-arm.cc +52 -0
  250. data/lib/libv8/v8/src/arm/codegen-arm.h +91 -0
  251. data/lib/libv8/v8/src/arm/constants-arm.cc +152 -0
  252. data/lib/libv8/v8/src/arm/constants-arm.h +775 -0
  253. data/lib/libv8/v8/src/arm/cpu-arm.cc +120 -0
  254. data/lib/libv8/v8/src/arm/debug-arm.cc +317 -0
  255. data/lib/libv8/v8/src/arm/deoptimizer-arm.cc +754 -0
  256. data/lib/libv8/v8/src/arm/disasm-arm.cc +1506 -0
  257. data/lib/libv8/v8/src/arm/frames-arm.cc +45 -0
  258. data/lib/libv8/v8/src/arm/frames-arm.h +168 -0
  259. data/lib/libv8/v8/src/arm/full-codegen-arm.cc +4375 -0
  260. data/lib/libv8/v8/src/arm/ic-arm.cc +1562 -0
  261. data/lib/libv8/v8/src/arm/lithium-arm.cc +2206 -0
  262. data/lib/libv8/v8/src/arm/lithium-arm.h +2348 -0
  263. data/lib/libv8/v8/src/arm/lithium-codegen-arm.cc +4526 -0
  264. data/lib/libv8/v8/src/arm/lithium-codegen-arm.h +403 -0
  265. data/lib/libv8/v8/src/arm/lithium-gap-resolver-arm.cc +305 -0
  266. data/lib/libv8/v8/src/arm/lithium-gap-resolver-arm.h +84 -0
  267. data/lib/libv8/v8/src/arm/macro-assembler-arm.cc +3163 -0
  268. data/lib/libv8/v8/src/arm/macro-assembler-arm.h +1126 -0
  269. data/lib/libv8/v8/src/arm/regexp-macro-assembler-arm.cc +1287 -0
  270. data/lib/libv8/v8/src/arm/regexp-macro-assembler-arm.h +253 -0
  271. data/lib/libv8/v8/src/arm/simulator-arm.cc +3424 -0
  272. data/lib/libv8/v8/src/arm/simulator-arm.h +431 -0
  273. data/lib/libv8/v8/src/arm/stub-cache-arm.cc +4243 -0
  274. data/lib/libv8/v8/src/array.js +1366 -0
  275. data/lib/libv8/v8/src/assembler.cc +1207 -0
  276. data/lib/libv8/v8/src/assembler.h +858 -0
  277. data/lib/libv8/v8/src/ast-inl.h +112 -0
  278. data/lib/libv8/v8/src/ast.cc +1146 -0
  279. data/lib/libv8/v8/src/ast.h +2188 -0
  280. data/lib/libv8/v8/src/atomicops.h +167 -0
  281. data/lib/libv8/v8/src/atomicops_internals_arm_gcc.h +145 -0
  282. data/lib/libv8/v8/src/atomicops_internals_mips_gcc.h +169 -0
  283. data/lib/libv8/v8/src/atomicops_internals_x86_gcc.cc +133 -0
  284. data/lib/libv8/v8/src/atomicops_internals_x86_gcc.h +287 -0
  285. data/lib/libv8/v8/src/atomicops_internals_x86_macosx.h +301 -0
  286. data/lib/libv8/v8/src/atomicops_internals_x86_msvc.h +203 -0
  287. data/lib/libv8/v8/src/bignum-dtoa.cc +655 -0
  288. data/lib/libv8/v8/src/bignum-dtoa.h +81 -0
  289. data/lib/libv8/v8/src/bignum.cc +768 -0
  290. data/lib/libv8/v8/src/bignum.h +140 -0
  291. data/lib/libv8/v8/src/bootstrapper.cc +2184 -0
  292. data/lib/libv8/v8/src/bootstrapper.h +188 -0
  293. data/lib/libv8/v8/src/builtins.cc +1707 -0
  294. data/lib/libv8/v8/src/builtins.h +371 -0
  295. data/lib/libv8/v8/src/bytecodes-irregexp.h +105 -0
  296. data/lib/libv8/v8/src/cached-powers.cc +177 -0
  297. data/lib/libv8/v8/src/cached-powers.h +65 -0
  298. data/lib/libv8/v8/src/char-predicates-inl.h +94 -0
  299. data/lib/libv8/v8/src/char-predicates.h +67 -0
  300. data/lib/libv8/v8/src/checks.cc +110 -0
  301. data/lib/libv8/v8/src/checks.h +296 -0
  302. data/lib/libv8/v8/src/circular-queue-inl.h +53 -0
  303. data/lib/libv8/v8/src/circular-queue.cc +122 -0
  304. data/lib/libv8/v8/src/circular-queue.h +103 -0
  305. data/lib/libv8/v8/src/code-stubs.cc +267 -0
  306. data/lib/libv8/v8/src/code-stubs.h +1011 -0
  307. data/lib/libv8/v8/src/code.h +70 -0
  308. data/lib/libv8/v8/src/codegen.cc +231 -0
  309. data/lib/libv8/v8/src/codegen.h +84 -0
  310. data/lib/libv8/v8/src/compilation-cache.cc +540 -0
  311. data/lib/libv8/v8/src/compilation-cache.h +287 -0
  312. data/lib/libv8/v8/src/compiler.cc +786 -0
  313. data/lib/libv8/v8/src/compiler.h +312 -0
  314. data/lib/libv8/v8/src/contexts.cc +347 -0
  315. data/lib/libv8/v8/src/contexts.h +391 -0
  316. data/lib/libv8/v8/src/conversions-inl.h +106 -0
  317. data/lib/libv8/v8/src/conversions.cc +1131 -0
  318. data/lib/libv8/v8/src/conversions.h +135 -0
  319. data/lib/libv8/v8/src/counters.cc +93 -0
  320. data/lib/libv8/v8/src/counters.h +254 -0
  321. data/lib/libv8/v8/src/cpu-profiler-inl.h +101 -0
  322. data/lib/libv8/v8/src/cpu-profiler.cc +609 -0
  323. data/lib/libv8/v8/src/cpu-profiler.h +302 -0
  324. data/lib/libv8/v8/src/cpu.h +69 -0
  325. data/lib/libv8/v8/src/d8-debug.cc +367 -0
  326. data/lib/libv8/v8/src/d8-debug.h +158 -0
  327. data/lib/libv8/v8/src/d8-posix.cc +695 -0
  328. data/lib/libv8/v8/src/d8-readline.cc +130 -0
  329. data/lib/libv8/v8/src/d8-windows.cc +42 -0
  330. data/lib/libv8/v8/src/d8.cc +803 -0
  331. data/lib/libv8/v8/src/d8.gyp +91 -0
  332. data/lib/libv8/v8/src/d8.h +235 -0
  333. data/lib/libv8/v8/src/d8.js +2798 -0
  334. data/lib/libv8/v8/src/data-flow.cc +66 -0
  335. data/lib/libv8/v8/src/data-flow.h +205 -0
  336. data/lib/libv8/v8/src/date.js +1103 -0
  337. data/lib/libv8/v8/src/dateparser-inl.h +127 -0
  338. data/lib/libv8/v8/src/dateparser.cc +178 -0
  339. data/lib/libv8/v8/src/dateparser.h +266 -0
  340. data/lib/libv8/v8/src/debug-agent.cc +447 -0
  341. data/lib/libv8/v8/src/debug-agent.h +129 -0
  342. data/lib/libv8/v8/src/debug-debugger.js +2569 -0
  343. data/lib/libv8/v8/src/debug.cc +3165 -0
  344. data/lib/libv8/v8/src/debug.h +1057 -0
  345. data/lib/libv8/v8/src/deoptimizer.cc +1256 -0
  346. data/lib/libv8/v8/src/deoptimizer.h +602 -0
  347. data/lib/libv8/v8/src/disasm.h +80 -0
  348. data/lib/libv8/v8/src/disassembler.cc +343 -0
  349. data/lib/libv8/v8/src/disassembler.h +58 -0
  350. data/lib/libv8/v8/src/diy-fp.cc +58 -0
  351. data/lib/libv8/v8/src/diy-fp.h +117 -0
  352. data/lib/libv8/v8/src/double.h +238 -0
  353. data/lib/libv8/v8/src/dtoa.cc +103 -0
  354. data/lib/libv8/v8/src/dtoa.h +85 -0
  355. data/lib/libv8/v8/src/execution.cc +849 -0
  356. data/lib/libv8/v8/src/execution.h +297 -0
  357. data/lib/libv8/v8/src/extensions/experimental/break-iterator.cc +250 -0
  358. data/lib/libv8/v8/src/extensions/experimental/break-iterator.h +89 -0
  359. data/lib/libv8/v8/src/extensions/experimental/collator.cc +218 -0
  360. data/lib/libv8/v8/src/extensions/experimental/collator.h +69 -0
  361. data/lib/libv8/v8/src/extensions/experimental/experimental.gyp +94 -0
  362. data/lib/libv8/v8/src/extensions/experimental/i18n-extension.cc +78 -0
  363. data/lib/libv8/v8/src/extensions/experimental/i18n-extension.h +54 -0
  364. data/lib/libv8/v8/src/extensions/experimental/i18n-locale.cc +112 -0
  365. data/lib/libv8/v8/src/extensions/experimental/i18n-locale.h +60 -0
  366. data/lib/libv8/v8/src/extensions/experimental/i18n-utils.cc +43 -0
  367. data/lib/libv8/v8/src/extensions/experimental/i18n-utils.h +49 -0
  368. data/lib/libv8/v8/src/extensions/experimental/i18n.js +180 -0
  369. data/lib/libv8/v8/src/extensions/experimental/language-matcher.cc +251 -0
  370. data/lib/libv8/v8/src/extensions/experimental/language-matcher.h +95 -0
  371. data/lib/libv8/v8/src/extensions/externalize-string-extension.cc +141 -0
  372. data/lib/libv8/v8/src/extensions/externalize-string-extension.h +50 -0
  373. data/lib/libv8/v8/src/extensions/gc-extension.cc +58 -0
  374. data/lib/libv8/v8/src/extensions/gc-extension.h +49 -0
  375. data/lib/libv8/v8/src/factory.cc +1222 -0
  376. data/lib/libv8/v8/src/factory.h +442 -0
  377. data/lib/libv8/v8/src/fast-dtoa.cc +736 -0
  378. data/lib/libv8/v8/src/fast-dtoa.h +83 -0
  379. data/lib/libv8/v8/src/fixed-dtoa.cc +405 -0
  380. data/lib/libv8/v8/src/fixed-dtoa.h +55 -0
  381. data/lib/libv8/v8/src/flag-definitions.h +560 -0
  382. data/lib/libv8/v8/src/flags.cc +551 -0
  383. data/lib/libv8/v8/src/flags.h +79 -0
  384. data/lib/libv8/v8/src/frames-inl.h +247 -0
  385. data/lib/libv8/v8/src/frames.cc +1243 -0
  386. data/lib/libv8/v8/src/frames.h +870 -0
  387. data/lib/libv8/v8/src/full-codegen.cc +1374 -0
  388. data/lib/libv8/v8/src/full-codegen.h +771 -0
  389. data/lib/libv8/v8/src/func-name-inferrer.cc +92 -0
  390. data/lib/libv8/v8/src/func-name-inferrer.h +111 -0
  391. data/lib/libv8/v8/src/gdb-jit.cc +1555 -0
  392. data/lib/libv8/v8/src/gdb-jit.h +143 -0
  393. data/lib/libv8/v8/src/global-handles.cc +665 -0
  394. data/lib/libv8/v8/src/global-handles.h +284 -0
  395. data/lib/libv8/v8/src/globals.h +325 -0
  396. data/lib/libv8/v8/src/handles-inl.h +177 -0
  397. data/lib/libv8/v8/src/handles.cc +987 -0
  398. data/lib/libv8/v8/src/handles.h +382 -0
  399. data/lib/libv8/v8/src/hashmap.cc +230 -0
  400. data/lib/libv8/v8/src/hashmap.h +123 -0
  401. data/lib/libv8/v8/src/heap-inl.h +704 -0
  402. data/lib/libv8/v8/src/heap-profiler.cc +1173 -0
  403. data/lib/libv8/v8/src/heap-profiler.h +397 -0
  404. data/lib/libv8/v8/src/heap.cc +5930 -0
  405. data/lib/libv8/v8/src/heap.h +2268 -0
  406. data/lib/libv8/v8/src/hydrogen-instructions.cc +1769 -0
  407. data/lib/libv8/v8/src/hydrogen-instructions.h +3971 -0
  408. data/lib/libv8/v8/src/hydrogen.cc +6239 -0
  409. data/lib/libv8/v8/src/hydrogen.h +1202 -0
  410. data/lib/libv8/v8/src/ia32/assembler-ia32-inl.h +446 -0
  411. data/lib/libv8/v8/src/ia32/assembler-ia32.cc +2487 -0
  412. data/lib/libv8/v8/src/ia32/assembler-ia32.h +1144 -0
  413. data/lib/libv8/v8/src/ia32/builtins-ia32.cc +1621 -0
  414. data/lib/libv8/v8/src/ia32/code-stubs-ia32.cc +6198 -0
  415. data/lib/libv8/v8/src/ia32/code-stubs-ia32.h +517 -0
  416. data/lib/libv8/v8/src/ia32/codegen-ia32.cc +265 -0
  417. data/lib/libv8/v8/src/ia32/codegen-ia32.h +79 -0
  418. data/lib/libv8/v8/src/ia32/cpu-ia32.cc +88 -0
  419. data/lib/libv8/v8/src/ia32/debug-ia32.cc +312 -0
  420. data/lib/libv8/v8/src/ia32/deoptimizer-ia32.cc +774 -0
  421. data/lib/libv8/v8/src/ia32/disasm-ia32.cc +1628 -0
  422. data/lib/libv8/v8/src/ia32/frames-ia32.cc +45 -0
  423. data/lib/libv8/v8/src/ia32/frames-ia32.h +142 -0
  424. data/lib/libv8/v8/src/ia32/full-codegen-ia32.cc +4338 -0
  425. data/lib/libv8/v8/src/ia32/ic-ia32.cc +1597 -0
  426. data/lib/libv8/v8/src/ia32/lithium-codegen-ia32.cc +4461 -0
  427. data/lib/libv8/v8/src/ia32/lithium-codegen-ia32.h +375 -0
  428. data/lib/libv8/v8/src/ia32/lithium-gap-resolver-ia32.cc +475 -0
  429. data/lib/libv8/v8/src/ia32/lithium-gap-resolver-ia32.h +110 -0
  430. data/lib/libv8/v8/src/ia32/lithium-ia32.cc +2261 -0
  431. data/lib/libv8/v8/src/ia32/lithium-ia32.h +2396 -0
  432. data/lib/libv8/v8/src/ia32/macro-assembler-ia32.cc +2136 -0
  433. data/lib/libv8/v8/src/ia32/macro-assembler-ia32.h +775 -0
  434. data/lib/libv8/v8/src/ia32/regexp-macro-assembler-ia32.cc +1263 -0
  435. data/lib/libv8/v8/src/ia32/regexp-macro-assembler-ia32.h +216 -0
  436. data/lib/libv8/v8/src/ia32/simulator-ia32.cc +30 -0
  437. data/lib/libv8/v8/src/ia32/simulator-ia32.h +74 -0
  438. data/lib/libv8/v8/src/ia32/stub-cache-ia32.cc +3847 -0
  439. data/lib/libv8/v8/src/ic-inl.h +130 -0
  440. data/lib/libv8/v8/src/ic.cc +2577 -0
  441. data/lib/libv8/v8/src/ic.h +736 -0
  442. data/lib/libv8/v8/src/inspector.cc +63 -0
  443. data/lib/libv8/v8/src/inspector.h +62 -0
  444. data/lib/libv8/v8/src/interpreter-irregexp.cc +659 -0
  445. data/lib/libv8/v8/src/interpreter-irregexp.h +49 -0
  446. data/lib/libv8/v8/src/isolate-inl.h +50 -0
  447. data/lib/libv8/v8/src/isolate.cc +1869 -0
  448. data/lib/libv8/v8/src/isolate.h +1382 -0
  449. data/lib/libv8/v8/src/json-parser.cc +504 -0
  450. data/lib/libv8/v8/src/json-parser.h +161 -0
  451. data/lib/libv8/v8/src/json.js +342 -0
  452. data/lib/libv8/v8/src/jsregexp.cc +5385 -0
  453. data/lib/libv8/v8/src/jsregexp.h +1492 -0
  454. data/lib/libv8/v8/src/list-inl.h +212 -0
  455. data/lib/libv8/v8/src/list.h +174 -0
  456. data/lib/libv8/v8/src/lithium-allocator-inl.h +142 -0
  457. data/lib/libv8/v8/src/lithium-allocator.cc +2123 -0
  458. data/lib/libv8/v8/src/lithium-allocator.h +630 -0
  459. data/lib/libv8/v8/src/lithium.cc +190 -0
  460. data/lib/libv8/v8/src/lithium.h +597 -0
  461. data/lib/libv8/v8/src/liveedit-debugger.js +1082 -0
  462. data/lib/libv8/v8/src/liveedit.cc +1691 -0
  463. data/lib/libv8/v8/src/liveedit.h +180 -0
  464. data/lib/libv8/v8/src/liveobjectlist-inl.h +126 -0
  465. data/lib/libv8/v8/src/liveobjectlist.cc +2589 -0
  466. data/lib/libv8/v8/src/liveobjectlist.h +322 -0
  467. data/lib/libv8/v8/src/log-inl.h +59 -0
  468. data/lib/libv8/v8/src/log-utils.cc +428 -0
  469. data/lib/libv8/v8/src/log-utils.h +231 -0
  470. data/lib/libv8/v8/src/log.cc +1993 -0
  471. data/lib/libv8/v8/src/log.h +476 -0
  472. data/lib/libv8/v8/src/macro-assembler.h +120 -0
  473. data/lib/libv8/v8/src/macros.py +178 -0
  474. data/lib/libv8/v8/src/mark-compact.cc +3143 -0
  475. data/lib/libv8/v8/src/mark-compact.h +506 -0
  476. data/lib/libv8/v8/src/math.js +264 -0
  477. data/lib/libv8/v8/src/messages.cc +179 -0
  478. data/lib/libv8/v8/src/messages.h +113 -0
  479. data/lib/libv8/v8/src/messages.js +1096 -0
  480. data/lib/libv8/v8/src/mips/assembler-mips-inl.h +312 -0
  481. data/lib/libv8/v8/src/mips/assembler-mips.cc +1960 -0
  482. data/lib/libv8/v8/src/mips/assembler-mips.h +1138 -0
  483. data/lib/libv8/v8/src/mips/builtins-mips.cc +1628 -0
  484. data/lib/libv8/v8/src/mips/code-stubs-mips.cc +6656 -0
  485. data/lib/libv8/v8/src/mips/code-stubs-mips.h +682 -0
  486. data/lib/libv8/v8/src/mips/codegen-mips.cc +52 -0
  487. data/lib/libv8/v8/src/mips/codegen-mips.h +98 -0
  488. data/lib/libv8/v8/src/mips/constants-mips.cc +352 -0
  489. data/lib/libv8/v8/src/mips/constants-mips.h +739 -0
  490. data/lib/libv8/v8/src/mips/cpu-mips.cc +96 -0
  491. data/lib/libv8/v8/src/mips/debug-mips.cc +308 -0
  492. data/lib/libv8/v8/src/mips/deoptimizer-mips.cc +91 -0
  493. data/lib/libv8/v8/src/mips/disasm-mips.cc +1050 -0
  494. data/lib/libv8/v8/src/mips/frames-mips.cc +47 -0
  495. data/lib/libv8/v8/src/mips/frames-mips.h +219 -0
  496. data/lib/libv8/v8/src/mips/full-codegen-mips.cc +4388 -0
  497. data/lib/libv8/v8/src/mips/ic-mips.cc +1580 -0
  498. data/lib/libv8/v8/src/mips/lithium-codegen-mips.h +65 -0
  499. data/lib/libv8/v8/src/mips/lithium-mips.h +307 -0
  500. data/lib/libv8/v8/src/mips/macro-assembler-mips.cc +4056 -0
  501. data/lib/libv8/v8/src/mips/macro-assembler-mips.h +1214 -0
  502. data/lib/libv8/v8/src/mips/regexp-macro-assembler-mips.cc +1251 -0
  503. data/lib/libv8/v8/src/mips/regexp-macro-assembler-mips.h +252 -0
  504. data/lib/libv8/v8/src/mips/simulator-mips.cc +2621 -0
  505. data/lib/libv8/v8/src/mips/simulator-mips.h +401 -0
  506. data/lib/libv8/v8/src/mips/stub-cache-mips.cc +4285 -0
  507. data/lib/libv8/v8/src/mirror-debugger.js +2382 -0
  508. data/lib/libv8/v8/src/mksnapshot.cc +328 -0
  509. data/lib/libv8/v8/src/natives.h +64 -0
  510. data/lib/libv8/v8/src/objects-debug.cc +738 -0
  511. data/lib/libv8/v8/src/objects-inl.h +4323 -0
  512. data/lib/libv8/v8/src/objects-printer.cc +829 -0
  513. data/lib/libv8/v8/src/objects-visiting.cc +148 -0
  514. data/lib/libv8/v8/src/objects-visiting.h +424 -0
  515. data/lib/libv8/v8/src/objects.cc +10585 -0
  516. data/lib/libv8/v8/src/objects.h +6838 -0
  517. data/lib/libv8/v8/src/parser.cc +4997 -0
  518. data/lib/libv8/v8/src/parser.h +765 -0
  519. data/lib/libv8/v8/src/platform-cygwin.cc +779 -0
  520. data/lib/libv8/v8/src/platform-freebsd.cc +826 -0
  521. data/lib/libv8/v8/src/platform-linux.cc +1149 -0
  522. data/lib/libv8/v8/src/platform-macos.cc +830 -0
  523. data/lib/libv8/v8/src/platform-nullos.cc +479 -0
  524. data/lib/libv8/v8/src/platform-openbsd.cc +640 -0
  525. data/lib/libv8/v8/src/platform-posix.cc +424 -0
  526. data/lib/libv8/v8/src/platform-solaris.cc +762 -0
  527. data/lib/libv8/v8/src/platform-tls-mac.h +62 -0
  528. data/lib/libv8/v8/src/platform-tls-win32.h +62 -0
  529. data/lib/libv8/v8/src/platform-tls.h +50 -0
  530. data/lib/libv8/v8/src/platform-win32.cc +2021 -0
  531. data/lib/libv8/v8/src/platform.h +667 -0
  532. data/lib/libv8/v8/src/preparse-data-format.h +62 -0
  533. data/lib/libv8/v8/src/preparse-data.cc +183 -0
  534. data/lib/libv8/v8/src/preparse-data.h +225 -0
  535. data/lib/libv8/v8/src/preparser-api.cc +220 -0
  536. data/lib/libv8/v8/src/preparser.cc +1450 -0
  537. data/lib/libv8/v8/src/preparser.h +493 -0
  538. data/lib/libv8/v8/src/prettyprinter.cc +1493 -0
  539. data/lib/libv8/v8/src/prettyprinter.h +223 -0
  540. data/lib/libv8/v8/src/profile-generator-inl.h +128 -0
  541. data/lib/libv8/v8/src/profile-generator.cc +3098 -0
  542. data/lib/libv8/v8/src/profile-generator.h +1126 -0
  543. data/lib/libv8/v8/src/property.cc +105 -0
  544. data/lib/libv8/v8/src/property.h +365 -0
  545. data/lib/libv8/v8/src/proxy.js +83 -0
  546. data/lib/libv8/v8/src/regexp-macro-assembler-irregexp-inl.h +78 -0
  547. data/lib/libv8/v8/src/regexp-macro-assembler-irregexp.cc +471 -0
  548. data/lib/libv8/v8/src/regexp-macro-assembler-irregexp.h +142 -0
  549. data/lib/libv8/v8/src/regexp-macro-assembler-tracer.cc +373 -0
  550. data/lib/libv8/v8/src/regexp-macro-assembler-tracer.h +104 -0
  551. data/lib/libv8/v8/src/regexp-macro-assembler.cc +267 -0
  552. data/lib/libv8/v8/src/regexp-macro-assembler.h +243 -0
  553. data/lib/libv8/v8/src/regexp-stack.cc +111 -0
  554. data/lib/libv8/v8/src/regexp-stack.h +147 -0
  555. data/lib/libv8/v8/src/regexp.js +483 -0
  556. data/lib/libv8/v8/src/rewriter.cc +360 -0
  557. data/lib/libv8/v8/src/rewriter.h +50 -0
  558. data/lib/libv8/v8/src/runtime-profiler.cc +489 -0
  559. data/lib/libv8/v8/src/runtime-profiler.h +201 -0
  560. data/lib/libv8/v8/src/runtime.cc +12227 -0
  561. data/lib/libv8/v8/src/runtime.h +652 -0
  562. data/lib/libv8/v8/src/runtime.js +649 -0
  563. data/lib/libv8/v8/src/safepoint-table.cc +256 -0
  564. data/lib/libv8/v8/src/safepoint-table.h +270 -0
  565. data/lib/libv8/v8/src/scanner-base.cc +952 -0
  566. data/lib/libv8/v8/src/scanner-base.h +670 -0
  567. data/lib/libv8/v8/src/scanner.cc +345 -0
  568. data/lib/libv8/v8/src/scanner.h +146 -0
  569. data/lib/libv8/v8/src/scopeinfo.cc +646 -0
  570. data/lib/libv8/v8/src/scopeinfo.h +254 -0
  571. data/lib/libv8/v8/src/scopes.cc +1150 -0
  572. data/lib/libv8/v8/src/scopes.h +507 -0
  573. data/lib/libv8/v8/src/serialize.cc +1574 -0
  574. data/lib/libv8/v8/src/serialize.h +589 -0
  575. data/lib/libv8/v8/src/shell.h +55 -0
  576. data/lib/libv8/v8/src/simulator.h +43 -0
  577. data/lib/libv8/v8/src/small-pointer-list.h +163 -0
  578. data/lib/libv8/v8/src/smart-pointer.h +109 -0
  579. data/lib/libv8/v8/src/snapshot-common.cc +83 -0
  580. data/lib/libv8/v8/src/snapshot-empty.cc +54 -0
  581. data/lib/libv8/v8/src/snapshot.h +91 -0
  582. data/lib/libv8/v8/src/spaces-inl.h +529 -0
  583. data/lib/libv8/v8/src/spaces.cc +3145 -0
  584. data/lib/libv8/v8/src/spaces.h +2369 -0
  585. data/lib/libv8/v8/src/splay-tree-inl.h +310 -0
  586. data/lib/libv8/v8/src/splay-tree.h +205 -0
  587. data/lib/libv8/v8/src/string-search.cc +41 -0
  588. data/lib/libv8/v8/src/string-search.h +568 -0
  589. data/lib/libv8/v8/src/string-stream.cc +592 -0
  590. data/lib/libv8/v8/src/string-stream.h +191 -0
  591. data/lib/libv8/v8/src/string.js +994 -0
  592. data/lib/libv8/v8/src/strtod.cc +440 -0
  593. data/lib/libv8/v8/src/strtod.h +40 -0
  594. data/lib/libv8/v8/src/stub-cache.cc +1965 -0
  595. data/lib/libv8/v8/src/stub-cache.h +924 -0
  596. data/lib/libv8/v8/src/third_party/valgrind/valgrind.h +3925 -0
  597. data/lib/libv8/v8/src/token.cc +63 -0
  598. data/lib/libv8/v8/src/token.h +288 -0
  599. data/lib/libv8/v8/src/type-info.cc +507 -0
  600. data/lib/libv8/v8/src/type-info.h +272 -0
  601. data/lib/libv8/v8/src/unbound-queue-inl.h +95 -0
  602. data/lib/libv8/v8/src/unbound-queue.h +69 -0
  603. data/lib/libv8/v8/src/unicode-inl.h +238 -0
  604. data/lib/libv8/v8/src/unicode.cc +1624 -0
  605. data/lib/libv8/v8/src/unicode.h +280 -0
  606. data/lib/libv8/v8/src/uri.js +408 -0
  607. data/lib/libv8/v8/src/utils-inl.h +48 -0
  608. data/lib/libv8/v8/src/utils.cc +371 -0
  609. data/lib/libv8/v8/src/utils.h +800 -0
  610. data/lib/libv8/v8/src/v8-counters.cc +62 -0
  611. data/lib/libv8/v8/src/v8-counters.h +314 -0
  612. data/lib/libv8/v8/src/v8.cc +213 -0
  613. data/lib/libv8/v8/src/v8.h +131 -0
  614. data/lib/libv8/v8/src/v8checks.h +64 -0
  615. data/lib/libv8/v8/src/v8dll-main.cc +44 -0
  616. data/lib/libv8/v8/src/v8globals.h +512 -0
  617. data/lib/libv8/v8/src/v8memory.h +82 -0
  618. data/lib/libv8/v8/src/v8natives.js +1310 -0
  619. data/lib/libv8/v8/src/v8preparserdll-main.cc +39 -0
  620. data/lib/libv8/v8/src/v8threads.cc +464 -0
  621. data/lib/libv8/v8/src/v8threads.h +165 -0
  622. data/lib/libv8/v8/src/v8utils.h +319 -0
  623. data/lib/libv8/v8/src/variables.cc +114 -0
  624. data/lib/libv8/v8/src/variables.h +167 -0
  625. data/lib/libv8/v8/src/version.cc +116 -0
  626. data/lib/libv8/v8/src/version.h +68 -0
  627. data/lib/libv8/v8/src/vm-state-inl.h +138 -0
  628. data/lib/libv8/v8/src/vm-state.h +71 -0
  629. data/lib/libv8/v8/src/win32-headers.h +96 -0
  630. data/lib/libv8/v8/src/x64/assembler-x64-inl.h +462 -0
  631. data/lib/libv8/v8/src/x64/assembler-x64.cc +3027 -0
  632. data/lib/libv8/v8/src/x64/assembler-x64.h +1633 -0
  633. data/lib/libv8/v8/src/x64/builtins-x64.cc +1520 -0
  634. data/lib/libv8/v8/src/x64/code-stubs-x64.cc +5132 -0
  635. data/lib/libv8/v8/src/x64/code-stubs-x64.h +514 -0
  636. data/lib/libv8/v8/src/x64/codegen-x64.cc +146 -0
  637. data/lib/libv8/v8/src/x64/codegen-x64.h +76 -0
  638. data/lib/libv8/v8/src/x64/cpu-x64.cc +88 -0
  639. data/lib/libv8/v8/src/x64/debug-x64.cc +319 -0
  640. data/lib/libv8/v8/src/x64/deoptimizer-x64.cc +815 -0
  641. data/lib/libv8/v8/src/x64/disasm-x64.cc +1832 -0
  642. data/lib/libv8/v8/src/x64/frames-x64.cc +45 -0
  643. data/lib/libv8/v8/src/x64/frames-x64.h +130 -0
  644. data/lib/libv8/v8/src/x64/full-codegen-x64.cc +4318 -0
  645. data/lib/libv8/v8/src/x64/ic-x64.cc +1608 -0
  646. data/lib/libv8/v8/src/x64/lithium-codegen-x64.cc +4267 -0
  647. data/lib/libv8/v8/src/x64/lithium-codegen-x64.h +367 -0
  648. data/lib/libv8/v8/src/x64/lithium-gap-resolver-x64.cc +320 -0
  649. data/lib/libv8/v8/src/x64/lithium-gap-resolver-x64.h +74 -0
  650. data/lib/libv8/v8/src/x64/lithium-x64.cc +2202 -0
  651. data/lib/libv8/v8/src/x64/lithium-x64.h +2333 -0
  652. data/lib/libv8/v8/src/x64/macro-assembler-x64.cc +3745 -0
  653. data/lib/libv8/v8/src/x64/macro-assembler-x64.h +1290 -0
  654. data/lib/libv8/v8/src/x64/regexp-macro-assembler-x64.cc +1398 -0
  655. data/lib/libv8/v8/src/x64/regexp-macro-assembler-x64.h +282 -0
  656. data/lib/libv8/v8/src/x64/simulator-x64.cc +27 -0
  657. data/lib/libv8/v8/src/x64/simulator-x64.h +72 -0
  658. data/lib/libv8/v8/src/x64/stub-cache-x64.cc +3610 -0
  659. data/lib/libv8/v8/src/zone-inl.h +140 -0
  660. data/lib/libv8/v8/src/zone.cc +196 -0
  661. data/lib/libv8/v8/src/zone.h +240 -0
  662. data/lib/libv8/v8/tools/codemap.js +265 -0
  663. data/lib/libv8/v8/tools/consarray.js +93 -0
  664. data/lib/libv8/v8/tools/csvparser.js +78 -0
  665. data/lib/libv8/v8/tools/disasm.py +92 -0
  666. data/lib/libv8/v8/tools/freebsd-tick-processor +10 -0
  667. data/lib/libv8/v8/tools/gc-nvp-trace-processor.py +342 -0
  668. data/lib/libv8/v8/tools/gcmole/README +62 -0
  669. data/lib/libv8/v8/tools/gcmole/gccause.lua +60 -0
  670. data/lib/libv8/v8/tools/gcmole/gcmole.cc +1261 -0
  671. data/lib/libv8/v8/tools/gcmole/gcmole.lua +378 -0
  672. data/lib/libv8/v8/tools/generate-ten-powers.scm +286 -0
  673. data/lib/libv8/v8/tools/grokdump.py +841 -0
  674. data/lib/libv8/v8/tools/gyp/v8.gyp +995 -0
  675. data/lib/libv8/v8/tools/js2c.py +364 -0
  676. data/lib/libv8/v8/tools/jsmin.py +280 -0
  677. data/lib/libv8/v8/tools/linux-tick-processor +35 -0
  678. data/lib/libv8/v8/tools/ll_prof.py +942 -0
  679. data/lib/libv8/v8/tools/logreader.js +185 -0
  680. data/lib/libv8/v8/tools/mac-nm +18 -0
  681. data/lib/libv8/v8/tools/mac-tick-processor +6 -0
  682. data/lib/libv8/v8/tools/oom_dump/README +31 -0
  683. data/lib/libv8/v8/tools/oom_dump/SConstruct +42 -0
  684. data/lib/libv8/v8/tools/oom_dump/oom_dump.cc +288 -0
  685. data/lib/libv8/v8/tools/presubmit.py +305 -0
  686. data/lib/libv8/v8/tools/process-heap-prof.py +120 -0
  687. data/lib/libv8/v8/tools/profile.js +751 -0
  688. data/lib/libv8/v8/tools/profile_view.js +219 -0
  689. data/lib/libv8/v8/tools/run-valgrind.py +77 -0
  690. data/lib/libv8/v8/tools/splaytree.js +316 -0
  691. data/lib/libv8/v8/tools/stats-viewer.py +468 -0
  692. data/lib/libv8/v8/tools/test.py +1510 -0
  693. data/lib/libv8/v8/tools/tickprocessor-driver.js +59 -0
  694. data/lib/libv8/v8/tools/tickprocessor.js +877 -0
  695. data/lib/libv8/v8/tools/utils.py +96 -0
  696. data/lib/libv8/v8/tools/visual_studio/README.txt +12 -0
  697. data/lib/libv8/v8/tools/windows-tick-processor.bat +30 -0
  698. data/lib/libv8/version.rb +4 -0
  699. data/libv8.gemspec +31 -0
  700. metadata +800 -0
@@ -0,0 +1,1506 @@
1
+ // Copyright 2011 the V8 project authors. All rights reserved.
2
+ // Redistribution and use in source and binary forms, with or without
3
+ // modification, are permitted provided that the following conditions are
4
+ // met:
5
+ //
6
+ // * Redistributions of source code must retain the above copyright
7
+ // notice, this list of conditions and the following disclaimer.
8
+ // * Redistributions in binary form must reproduce the above
9
+ // copyright notice, this list of conditions and the following
10
+ // disclaimer in the documentation and/or other materials provided
11
+ // with the distribution.
12
+ // * Neither the name of Google Inc. nor the names of its
13
+ // contributors may be used to endorse or promote products derived
14
+ // from this software without specific prior written permission.
15
+ //
16
+ // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17
+ // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18
+ // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19
+ // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20
+ // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21
+ // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22
+ // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
+ // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
+ // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
+ // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26
+ // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
+
28
+ // A Disassembler object is used to disassemble a block of code instruction by
29
+ // instruction. The default implementation of the NameConverter object can be
30
+ // overriden to modify register names or to do symbol lookup on addresses.
31
+ //
32
+ // The example below will disassemble a block of code and print it to stdout.
33
+ //
34
+ // NameConverter converter;
35
+ // Disassembler d(converter);
36
+ // for (byte* pc = begin; pc < end;) {
37
+ // v8::internal::EmbeddedVector<char, 256> buffer;
38
+ // byte* prev_pc = pc;
39
+ // pc += d.InstructionDecode(buffer, pc);
40
+ // printf("%p %08x %s\n",
41
+ // prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer);
42
+ // }
43
+ //
44
+ // The Disassembler class also has a convenience method to disassemble a block
45
+ // of code into a FILE*, meaning that the above functionality could also be
46
+ // achieved by just calling Disassembler::Disassemble(stdout, begin, end);
47
+
48
+
49
+ #include <assert.h>
50
+ #include <stdio.h>
51
+ #include <stdarg.h>
52
+ #include <string.h>
53
+ #ifndef WIN32
54
+ #include <stdint.h>
55
+ #endif
56
+
57
+ #include "v8.h"
58
+
59
+ #if defined(V8_TARGET_ARCH_ARM)
60
+
61
+ #include "constants-arm.h"
62
+ #include "disasm.h"
63
+ #include "macro-assembler.h"
64
+ #include "platform.h"
65
+
66
+
67
+ namespace v8 {
68
+ namespace internal {
69
+
70
+
71
+ //------------------------------------------------------------------------------
72
+
73
+ // Decoder decodes and disassembles instructions into an output buffer.
74
+ // It uses the converter to convert register names and call destinations into
75
+ // more informative description.
76
+ class Decoder {
77
+ public:
78
+ Decoder(const disasm::NameConverter& converter,
79
+ Vector<char> out_buffer)
80
+ : converter_(converter),
81
+ out_buffer_(out_buffer),
82
+ out_buffer_pos_(0) {
83
+ out_buffer_[out_buffer_pos_] = '\0';
84
+ }
85
+
86
+ ~Decoder() {}
87
+
88
+ // Writes one disassembled instruction into 'buffer' (0-terminated).
89
+ // Returns the length of the disassembled machine instruction in bytes.
90
+ int InstructionDecode(byte* instruction);
91
+
92
+ static bool IsConstantPoolAt(byte* instr_ptr);
93
+ static int ConstantPoolSizeAt(byte* instr_ptr);
94
+
95
+ private:
96
+ // Bottleneck functions to print into the out_buffer.
97
+ void PrintChar(const char ch);
98
+ void Print(const char* str);
99
+
100
+ // Printing of common values.
101
+ void PrintRegister(int reg);
102
+ void PrintSRegister(int reg);
103
+ void PrintDRegister(int reg);
104
+ int FormatVFPRegister(Instruction* instr, const char* format);
105
+ void PrintMovwMovt(Instruction* instr);
106
+ int FormatVFPinstruction(Instruction* instr, const char* format);
107
+ void PrintCondition(Instruction* instr);
108
+ void PrintShiftRm(Instruction* instr);
109
+ void PrintShiftImm(Instruction* instr);
110
+ void PrintShiftSat(Instruction* instr);
111
+ void PrintPU(Instruction* instr);
112
+ void PrintSoftwareInterrupt(SoftwareInterruptCodes svc);
113
+
114
+ // Handle formatting of instructions and their options.
115
+ int FormatRegister(Instruction* instr, const char* option);
116
+ int FormatOption(Instruction* instr, const char* option);
117
+ void Format(Instruction* instr, const char* format);
118
+ void Unknown(Instruction* instr);
119
+
120
+ // Each of these functions decodes one particular instruction type, a 3-bit
121
+ // field in the instruction encoding.
122
+ // Types 0 and 1 are combined as they are largely the same except for the way
123
+ // they interpret the shifter operand.
124
+ void DecodeType01(Instruction* instr);
125
+ void DecodeType2(Instruction* instr);
126
+ void DecodeType3(Instruction* instr);
127
+ void DecodeType4(Instruction* instr);
128
+ void DecodeType5(Instruction* instr);
129
+ void DecodeType6(Instruction* instr);
130
+ // Type 7 includes special Debugger instructions.
131
+ int DecodeType7(Instruction* instr);
132
+ // For VFP support.
133
+ void DecodeTypeVFP(Instruction* instr);
134
+ void DecodeType6CoprocessorIns(Instruction* instr);
135
+
136
+ void DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(Instruction* instr);
137
+ void DecodeVCMP(Instruction* instr);
138
+ void DecodeVCVTBetweenDoubleAndSingle(Instruction* instr);
139
+ void DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr);
140
+
141
+ const disasm::NameConverter& converter_;
142
+ Vector<char> out_buffer_;
143
+ int out_buffer_pos_;
144
+
145
+ DISALLOW_COPY_AND_ASSIGN(Decoder);
146
+ };
147
+
148
+
149
+ // Support for assertions in the Decoder formatting functions.
150
+ #define STRING_STARTS_WITH(string, compare_string) \
151
+ (strncmp(string, compare_string, strlen(compare_string)) == 0)
152
+
153
+
154
+ // Append the ch to the output buffer.
155
+ void Decoder::PrintChar(const char ch) {
156
+ out_buffer_[out_buffer_pos_++] = ch;
157
+ }
158
+
159
+
160
+ // Append the str to the output buffer.
161
+ void Decoder::Print(const char* str) {
162
+ char cur = *str++;
163
+ while (cur != '\0' && (out_buffer_pos_ < (out_buffer_.length() - 1))) {
164
+ PrintChar(cur);
165
+ cur = *str++;
166
+ }
167
+ out_buffer_[out_buffer_pos_] = 0;
168
+ }
169
+
170
+
171
+ // These condition names are defined in a way to match the native disassembler
172
+ // formatting. See for example the command "objdump -d <binary file>".
173
+ static const char* cond_names[kNumberOfConditions] = {
174
+ "eq", "ne", "cs" , "cc" , "mi" , "pl" , "vs" , "vc" ,
175
+ "hi", "ls", "ge", "lt", "gt", "le", "", "invalid",
176
+ };
177
+
178
+
179
+ // Print the condition guarding the instruction.
180
+ void Decoder::PrintCondition(Instruction* instr) {
181
+ Print(cond_names[instr->ConditionValue()]);
182
+ }
183
+
184
+
185
+ // Print the register name according to the active name converter.
186
+ void Decoder::PrintRegister(int reg) {
187
+ Print(converter_.NameOfCPURegister(reg));
188
+ }
189
+
190
+ // Print the VFP S register name according to the active name converter.
191
+ void Decoder::PrintSRegister(int reg) {
192
+ Print(VFPRegisters::Name(reg, false));
193
+ }
194
+
195
+ // Print the VFP D register name according to the active name converter.
196
+ void Decoder::PrintDRegister(int reg) {
197
+ Print(VFPRegisters::Name(reg, true));
198
+ }
199
+
200
+
201
+ // These shift names are defined in a way to match the native disassembler
202
+ // formatting. See for example the command "objdump -d <binary file>".
203
+ static const char* shift_names[kNumberOfShifts] = {
204
+ "lsl", "lsr", "asr", "ror"
205
+ };
206
+
207
+
208
+ // Print the register shift operands for the instruction. Generally used for
209
+ // data processing instructions.
210
+ void Decoder::PrintShiftRm(Instruction* instr) {
211
+ ShiftOp shift = instr->ShiftField();
212
+ int shift_index = instr->ShiftValue();
213
+ int shift_amount = instr->ShiftAmountValue();
214
+ int rm = instr->RmValue();
215
+
216
+ PrintRegister(rm);
217
+
218
+ if ((instr->RegShiftValue() == 0) && (shift == LSL) && (shift_amount == 0)) {
219
+ // Special case for using rm only.
220
+ return;
221
+ }
222
+ if (instr->RegShiftValue() == 0) {
223
+ // by immediate
224
+ if ((shift == ROR) && (shift_amount == 0)) {
225
+ Print(", RRX");
226
+ return;
227
+ } else if (((shift == LSR) || (shift == ASR)) && (shift_amount == 0)) {
228
+ shift_amount = 32;
229
+ }
230
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
231
+ ", %s #%d",
232
+ shift_names[shift_index],
233
+ shift_amount);
234
+ } else {
235
+ // by register
236
+ int rs = instr->RsValue();
237
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
238
+ ", %s ", shift_names[shift_index]);
239
+ PrintRegister(rs);
240
+ }
241
+ }
242
+
243
+
244
+ // Print the immediate operand for the instruction. Generally used for data
245
+ // processing instructions.
246
+ void Decoder::PrintShiftImm(Instruction* instr) {
247
+ int rotate = instr->RotateValue() * 2;
248
+ int immed8 = instr->Immed8Value();
249
+ int imm = (immed8 >> rotate) | (immed8 << (32 - rotate));
250
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
251
+ "#%d", imm);
252
+ }
253
+
254
+
255
+ // Print the optional shift and immediate used by saturating instructions.
256
+ void Decoder::PrintShiftSat(Instruction* instr) {
257
+ int shift = instr->Bits(11, 7);
258
+ if (shift > 0) {
259
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
260
+ ", %s #%d",
261
+ shift_names[instr->Bit(6) * 2],
262
+ instr->Bits(11, 7));
263
+ }
264
+ }
265
+
266
+
267
+ // Print PU formatting to reduce complexity of FormatOption.
268
+ void Decoder::PrintPU(Instruction* instr) {
269
+ switch (instr->PUField()) {
270
+ case da_x: {
271
+ Print("da");
272
+ break;
273
+ }
274
+ case ia_x: {
275
+ Print("ia");
276
+ break;
277
+ }
278
+ case db_x: {
279
+ Print("db");
280
+ break;
281
+ }
282
+ case ib_x: {
283
+ Print("ib");
284
+ break;
285
+ }
286
+ default: {
287
+ UNREACHABLE();
288
+ break;
289
+ }
290
+ }
291
+ }
292
+
293
+
294
+ // Print SoftwareInterrupt codes. Factoring this out reduces the complexity of
295
+ // the FormatOption method.
296
+ void Decoder::PrintSoftwareInterrupt(SoftwareInterruptCodes svc) {
297
+ switch (svc) {
298
+ case kCallRtRedirected:
299
+ Print("call rt redirected");
300
+ return;
301
+ case kBreakpoint:
302
+ Print("breakpoint");
303
+ return;
304
+ default:
305
+ if (svc >= kStopCode) {
306
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
307
+ "%d - 0x%x",
308
+ svc & kStopCodeMask,
309
+ svc & kStopCodeMask);
310
+ } else {
311
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
312
+ "%d",
313
+ svc);
314
+ }
315
+ return;
316
+ }
317
+ }
318
+
319
+
320
+ // Handle all register based formatting in this function to reduce the
321
+ // complexity of FormatOption.
322
+ int Decoder::FormatRegister(Instruction* instr, const char* format) {
323
+ ASSERT(format[0] == 'r');
324
+ if (format[1] == 'n') { // 'rn: Rn register
325
+ int reg = instr->RnValue();
326
+ PrintRegister(reg);
327
+ return 2;
328
+ } else if (format[1] == 'd') { // 'rd: Rd register
329
+ int reg = instr->RdValue();
330
+ PrintRegister(reg);
331
+ return 2;
332
+ } else if (format[1] == 's') { // 'rs: Rs register
333
+ int reg = instr->RsValue();
334
+ PrintRegister(reg);
335
+ return 2;
336
+ } else if (format[1] == 'm') { // 'rm: Rm register
337
+ int reg = instr->RmValue();
338
+ PrintRegister(reg);
339
+ return 2;
340
+ } else if (format[1] == 't') { // 'rt: Rt register
341
+ int reg = instr->RtValue();
342
+ PrintRegister(reg);
343
+ return 2;
344
+ } else if (format[1] == 'l') {
345
+ // 'rlist: register list for load and store multiple instructions
346
+ ASSERT(STRING_STARTS_WITH(format, "rlist"));
347
+ int rlist = instr->RlistValue();
348
+ int reg = 0;
349
+ Print("{");
350
+ // Print register list in ascending order, by scanning the bit mask.
351
+ while (rlist != 0) {
352
+ if ((rlist & 1) != 0) {
353
+ PrintRegister(reg);
354
+ if ((rlist >> 1) != 0) {
355
+ Print(", ");
356
+ }
357
+ }
358
+ reg++;
359
+ rlist >>= 1;
360
+ }
361
+ Print("}");
362
+ return 5;
363
+ }
364
+ UNREACHABLE();
365
+ return -1;
366
+ }
367
+
368
+
369
+ // Handle all VFP register based formatting in this function to reduce the
370
+ // complexity of FormatOption.
371
+ int Decoder::FormatVFPRegister(Instruction* instr, const char* format) {
372
+ ASSERT((format[0] == 'S') || (format[0] == 'D'));
373
+
374
+ VFPRegPrecision precision =
375
+ format[0] == 'D' ? kDoublePrecision : kSinglePrecision;
376
+
377
+ int retval = 2;
378
+ int reg = -1;
379
+ if (format[1] == 'n') {
380
+ reg = instr->VFPNRegValue(precision);
381
+ } else if (format[1] == 'm') {
382
+ reg = instr->VFPMRegValue(precision);
383
+ } else if (format[1] == 'd') {
384
+ reg = instr->VFPDRegValue(precision);
385
+ if (format[2] == '+') {
386
+ int immed8 = instr->Immed8Value();
387
+ if (format[0] == 'S') reg += immed8 - 1;
388
+ if (format[0] == 'D') reg += (immed8 / 2 - 1);
389
+ }
390
+ if (format[2] == '+') retval = 3;
391
+ } else {
392
+ UNREACHABLE();
393
+ }
394
+
395
+ if (precision == kSinglePrecision) {
396
+ PrintSRegister(reg);
397
+ } else {
398
+ PrintDRegister(reg);
399
+ }
400
+
401
+ return retval;
402
+ }
403
+
404
+
405
+ int Decoder::FormatVFPinstruction(Instruction* instr, const char* format) {
406
+ Print(format);
407
+ return 0;
408
+ }
409
+
410
+
411
+ // Print the movw or movt instruction.
412
+ void Decoder::PrintMovwMovt(Instruction* instr) {
413
+ int imm = instr->ImmedMovwMovtValue();
414
+ int rd = instr->RdValue();
415
+ PrintRegister(rd);
416
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
417
+ ", #%d", imm);
418
+ }
419
+
420
+
421
+ // FormatOption takes a formatting string and interprets it based on
422
+ // the current instructions. The format string points to the first
423
+ // character of the option string (the option escape has already been
424
+ // consumed by the caller.) FormatOption returns the number of
425
+ // characters that were consumed from the formatting string.
426
+ int Decoder::FormatOption(Instruction* instr, const char* format) {
427
+ switch (format[0]) {
428
+ case 'a': { // 'a: accumulate multiplies
429
+ if (instr->Bit(21) == 0) {
430
+ Print("ul");
431
+ } else {
432
+ Print("la");
433
+ }
434
+ return 1;
435
+ }
436
+ case 'b': { // 'b: byte loads or stores
437
+ if (instr->HasB()) {
438
+ Print("b");
439
+ }
440
+ return 1;
441
+ }
442
+ case 'c': { // 'cond: conditional execution
443
+ ASSERT(STRING_STARTS_WITH(format, "cond"));
444
+ PrintCondition(instr);
445
+ return 4;
446
+ }
447
+ case 'd': { // 'd: vmov double immediate.
448
+ double d = instr->DoubleImmedVmov();
449
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
450
+ "#%g", d);
451
+ return 1;
452
+ }
453
+ case 'f': { // 'f: bitfield instructions - v7 and above.
454
+ uint32_t lsbit = instr->Bits(11, 7);
455
+ uint32_t width = instr->Bits(20, 16) + 1;
456
+ if (instr->Bit(21) == 0) {
457
+ // BFC/BFI:
458
+ // Bits 20-16 represent most-significant bit. Covert to width.
459
+ width -= lsbit;
460
+ ASSERT(width > 0);
461
+ }
462
+ ASSERT((width + lsbit) <= 32);
463
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
464
+ "#%d, #%d", lsbit, width);
465
+ return 1;
466
+ }
467
+ case 'h': { // 'h: halfword operation for extra loads and stores
468
+ if (instr->HasH()) {
469
+ Print("h");
470
+ } else {
471
+ Print("b");
472
+ }
473
+ return 1;
474
+ }
475
+ case 'i': { // 'i: immediate value from adjacent bits.
476
+ // Expects tokens in the form imm%02d@%02d, ie. imm05@07, imm10@16
477
+ int width = (format[3] - '0') * 10 + (format[4] - '0');
478
+ int lsb = (format[6] - '0') * 10 + (format[7] - '0');
479
+
480
+ ASSERT((width >= 1) && (width <= 32));
481
+ ASSERT((lsb >= 0) && (lsb <= 31));
482
+ ASSERT((width + lsb) <= 32);
483
+
484
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
485
+ "%d",
486
+ instr->Bits(width + lsb - 1, lsb));
487
+ return 8;
488
+ }
489
+ case 'l': { // 'l: branch and link
490
+ if (instr->HasLink()) {
491
+ Print("l");
492
+ }
493
+ return 1;
494
+ }
495
+ case 'm': {
496
+ if (format[1] == 'w') {
497
+ // 'mw: movt/movw instructions.
498
+ PrintMovwMovt(instr);
499
+ return 2;
500
+ }
501
+ if (format[1] == 'e') { // 'memop: load/store instructions.
502
+ ASSERT(STRING_STARTS_WITH(format, "memop"));
503
+ if (instr->HasL()) {
504
+ Print("ldr");
505
+ } else {
506
+ if ((instr->Bits(27, 25) == 0) && (instr->Bit(20) == 0) &&
507
+ (instr->Bits(7, 6) == 3) && (instr->Bit(4) == 1)) {
508
+ if (instr->Bit(5) == 1) {
509
+ Print("strd");
510
+ } else {
511
+ Print("ldrd");
512
+ }
513
+ return 5;
514
+ }
515
+ Print("str");
516
+ }
517
+ return 5;
518
+ }
519
+ // 'msg: for simulator break instructions
520
+ ASSERT(STRING_STARTS_WITH(format, "msg"));
521
+ byte* str =
522
+ reinterpret_cast<byte*>(instr->InstructionBits() & 0x0fffffff);
523
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
524
+ "%s", converter_.NameInCode(str));
525
+ return 3;
526
+ }
527
+ case 'o': {
528
+ if ((format[3] == '1') && (format[4] == '2')) {
529
+ // 'off12: 12-bit offset for load and store instructions
530
+ ASSERT(STRING_STARTS_WITH(format, "off12"));
531
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
532
+ "%d", instr->Offset12Value());
533
+ return 5;
534
+ } else if (format[3] == '0') {
535
+ // 'off0to3and8to19 16-bit immediate encoded in bits 19-8 and 3-0.
536
+ ASSERT(STRING_STARTS_WITH(format, "off0to3and8to19"));
537
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
538
+ "%d",
539
+ (instr->Bits(19, 8) << 4) +
540
+ instr->Bits(3, 0));
541
+ return 15;
542
+ }
543
+ // 'off8: 8-bit offset for extra load and store instructions
544
+ ASSERT(STRING_STARTS_WITH(format, "off8"));
545
+ int offs8 = (instr->ImmedHValue() << 4) | instr->ImmedLValue();
546
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
547
+ "%d", offs8);
548
+ return 4;
549
+ }
550
+ case 'p': { // 'pu: P and U bits for load and store instructions
551
+ ASSERT(STRING_STARTS_WITH(format, "pu"));
552
+ PrintPU(instr);
553
+ return 2;
554
+ }
555
+ case 'r': {
556
+ return FormatRegister(instr, format);
557
+ }
558
+ case 's': {
559
+ if (format[1] == 'h') { // 'shift_op or 'shift_rm or 'shift_sat.
560
+ if (format[6] == 'o') { // 'shift_op
561
+ ASSERT(STRING_STARTS_WITH(format, "shift_op"));
562
+ if (instr->TypeValue() == 0) {
563
+ PrintShiftRm(instr);
564
+ } else {
565
+ ASSERT(instr->TypeValue() == 1);
566
+ PrintShiftImm(instr);
567
+ }
568
+ return 8;
569
+ } else if (format[6] == 's') { // 'shift_sat.
570
+ ASSERT(STRING_STARTS_WITH(format, "shift_sat"));
571
+ PrintShiftSat(instr);
572
+ return 9;
573
+ } else { // 'shift_rm
574
+ ASSERT(STRING_STARTS_WITH(format, "shift_rm"));
575
+ PrintShiftRm(instr);
576
+ return 8;
577
+ }
578
+ } else if (format[1] == 'v') { // 'svc
579
+ ASSERT(STRING_STARTS_WITH(format, "svc"));
580
+ PrintSoftwareInterrupt(instr->SvcValue());
581
+ return 3;
582
+ } else if (format[1] == 'i') { // 'sign: signed extra loads and stores
583
+ ASSERT(STRING_STARTS_WITH(format, "sign"));
584
+ if (instr->HasSign()) {
585
+ Print("s");
586
+ }
587
+ return 4;
588
+ }
589
+ // 's: S field of data processing instructions
590
+ if (instr->HasS()) {
591
+ Print("s");
592
+ }
593
+ return 1;
594
+ }
595
+ case 't': { // 'target: target of branch instructions
596
+ ASSERT(STRING_STARTS_WITH(format, "target"));
597
+ int off = (instr->SImmed24Value() << 2) + 8;
598
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
599
+ "%+d -> %s",
600
+ off,
601
+ converter_.NameOfAddress(
602
+ reinterpret_cast<byte*>(instr) + off));
603
+ return 6;
604
+ }
605
+ case 'u': { // 'u: signed or unsigned multiplies
606
+ // The manual gets the meaning of bit 22 backwards in the multiply
607
+ // instruction overview on page A3.16.2. The instructions that
608
+ // exist in u and s variants are the following:
609
+ // smull A4.1.87
610
+ // umull A4.1.129
611
+ // umlal A4.1.128
612
+ // smlal A4.1.76
613
+ // For these 0 means u and 1 means s. As can be seen on their individual
614
+ // pages. The other 18 mul instructions have the bit set or unset in
615
+ // arbitrary ways that are unrelated to the signedness of the instruction.
616
+ // None of these 18 instructions exist in both a 'u' and an 's' variant.
617
+
618
+ if (instr->Bit(22) == 0) {
619
+ Print("u");
620
+ } else {
621
+ Print("s");
622
+ }
623
+ return 1;
624
+ }
625
+ case 'v': {
626
+ return FormatVFPinstruction(instr, format);
627
+ }
628
+ case 'S':
629
+ case 'D': {
630
+ return FormatVFPRegister(instr, format);
631
+ }
632
+ case 'w': { // 'w: W field of load and store instructions
633
+ if (instr->HasW()) {
634
+ Print("!");
635
+ }
636
+ return 1;
637
+ }
638
+ default: {
639
+ UNREACHABLE();
640
+ break;
641
+ }
642
+ }
643
+ UNREACHABLE();
644
+ return -1;
645
+ }
646
+
647
+
648
+ // Format takes a formatting string for a whole instruction and prints it into
649
+ // the output buffer. All escaped options are handed to FormatOption to be
650
+ // parsed further.
651
+ void Decoder::Format(Instruction* instr, const char* format) {
652
+ char cur = *format++;
653
+ while ((cur != 0) && (out_buffer_pos_ < (out_buffer_.length() - 1))) {
654
+ if (cur == '\'') { // Single quote is used as the formatting escape.
655
+ format += FormatOption(instr, format);
656
+ } else {
657
+ out_buffer_[out_buffer_pos_++] = cur;
658
+ }
659
+ cur = *format++;
660
+ }
661
+ out_buffer_[out_buffer_pos_] = '\0';
662
+ }
663
+
664
+
665
+ // For currently unimplemented decodings the disassembler calls Unknown(instr)
666
+ // which will just print "unknown" of the instruction bits.
667
+ void Decoder::Unknown(Instruction* instr) {
668
+ Format(instr, "unknown");
669
+ }
670
+
671
+
672
+ void Decoder::DecodeType01(Instruction* instr) {
673
+ int type = instr->TypeValue();
674
+ if ((type == 0) && instr->IsSpecialType0()) {
675
+ // multiply instruction or extra loads and stores
676
+ if (instr->Bits(7, 4) == 9) {
677
+ if (instr->Bit(24) == 0) {
678
+ // multiply instructions
679
+ if (instr->Bit(23) == 0) {
680
+ if (instr->Bit(21) == 0) {
681
+ // The MUL instruction description (A 4.1.33) refers to Rd as being
682
+ // the destination for the operation, but it confusingly uses the
683
+ // Rn field to encode it.
684
+ Format(instr, "mul'cond's 'rn, 'rm, 'rs");
685
+ } else {
686
+ // The MLA instruction description (A 4.1.28) refers to the order
687
+ // of registers as "Rd, Rm, Rs, Rn". But confusingly it uses the
688
+ // Rn field to encode the Rd register and the Rd field to encode
689
+ // the Rn register.
690
+ Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
691
+ }
692
+ } else {
693
+ // The signed/long multiply instructions use the terms RdHi and RdLo
694
+ // when referring to the target registers. They are mapped to the Rn
695
+ // and Rd fields as follows:
696
+ // RdLo == Rd field
697
+ // RdHi == Rn field
698
+ // The order of registers is: <RdLo>, <RdHi>, <Rm>, <Rs>
699
+ Format(instr, "'um'al'cond's 'rd, 'rn, 'rm, 'rs");
700
+ }
701
+ } else {
702
+ Unknown(instr); // not used by V8
703
+ }
704
+ } else if ((instr->Bit(20) == 0) && ((instr->Bits(7, 4) & 0xd) == 0xd)) {
705
+ // ldrd, strd
706
+ switch (instr->PUField()) {
707
+ case da_x: {
708
+ if (instr->Bit(22) == 0) {
709
+ Format(instr, "'memop'cond's 'rd, ['rn], -'rm");
710
+ } else {
711
+ Format(instr, "'memop'cond's 'rd, ['rn], #-'off8");
712
+ }
713
+ break;
714
+ }
715
+ case ia_x: {
716
+ if (instr->Bit(22) == 0) {
717
+ Format(instr, "'memop'cond's 'rd, ['rn], +'rm");
718
+ } else {
719
+ Format(instr, "'memop'cond's 'rd, ['rn], #+'off8");
720
+ }
721
+ break;
722
+ }
723
+ case db_x: {
724
+ if (instr->Bit(22) == 0) {
725
+ Format(instr, "'memop'cond's 'rd, ['rn, -'rm]'w");
726
+ } else {
727
+ Format(instr, "'memop'cond's 'rd, ['rn, #-'off8]'w");
728
+ }
729
+ break;
730
+ }
731
+ case ib_x: {
732
+ if (instr->Bit(22) == 0) {
733
+ Format(instr, "'memop'cond's 'rd, ['rn, +'rm]'w");
734
+ } else {
735
+ Format(instr, "'memop'cond's 'rd, ['rn, #+'off8]'w");
736
+ }
737
+ break;
738
+ }
739
+ default: {
740
+ // The PU field is a 2-bit field.
741
+ UNREACHABLE();
742
+ break;
743
+ }
744
+ }
745
+ } else {
746
+ // extra load/store instructions
747
+ switch (instr->PUField()) {
748
+ case da_x: {
749
+ if (instr->Bit(22) == 0) {
750
+ Format(instr, "'memop'cond'sign'h 'rd, ['rn], -'rm");
751
+ } else {
752
+ Format(instr, "'memop'cond'sign'h 'rd, ['rn], #-'off8");
753
+ }
754
+ break;
755
+ }
756
+ case ia_x: {
757
+ if (instr->Bit(22) == 0) {
758
+ Format(instr, "'memop'cond'sign'h 'rd, ['rn], +'rm");
759
+ } else {
760
+ Format(instr, "'memop'cond'sign'h 'rd, ['rn], #+'off8");
761
+ }
762
+ break;
763
+ }
764
+ case db_x: {
765
+ if (instr->Bit(22) == 0) {
766
+ Format(instr, "'memop'cond'sign'h 'rd, ['rn, -'rm]'w");
767
+ } else {
768
+ Format(instr, "'memop'cond'sign'h 'rd, ['rn, #-'off8]'w");
769
+ }
770
+ break;
771
+ }
772
+ case ib_x: {
773
+ if (instr->Bit(22) == 0) {
774
+ Format(instr, "'memop'cond'sign'h 'rd, ['rn, +'rm]'w");
775
+ } else {
776
+ Format(instr, "'memop'cond'sign'h 'rd, ['rn, #+'off8]'w");
777
+ }
778
+ break;
779
+ }
780
+ default: {
781
+ // The PU field is a 2-bit field.
782
+ UNREACHABLE();
783
+ break;
784
+ }
785
+ }
786
+ return;
787
+ }
788
+ } else if ((type == 0) && instr->IsMiscType0()) {
789
+ if (instr->Bits(22, 21) == 1) {
790
+ switch (instr->BitField(7, 4)) {
791
+ case BX:
792
+ Format(instr, "bx'cond 'rm");
793
+ break;
794
+ case BLX:
795
+ Format(instr, "blx'cond 'rm");
796
+ break;
797
+ case BKPT:
798
+ Format(instr, "bkpt 'off0to3and8to19");
799
+ break;
800
+ default:
801
+ Unknown(instr); // not used by V8
802
+ break;
803
+ }
804
+ } else if (instr->Bits(22, 21) == 3) {
805
+ switch (instr->BitField(7, 4)) {
806
+ case CLZ:
807
+ Format(instr, "clz'cond 'rd, 'rm");
808
+ break;
809
+ default:
810
+ Unknown(instr); // not used by V8
811
+ break;
812
+ }
813
+ } else {
814
+ Unknown(instr); // not used by V8
815
+ }
816
+ } else {
817
+ switch (instr->OpcodeField()) {
818
+ case AND: {
819
+ Format(instr, "and'cond's 'rd, 'rn, 'shift_op");
820
+ break;
821
+ }
822
+ case EOR: {
823
+ Format(instr, "eor'cond's 'rd, 'rn, 'shift_op");
824
+ break;
825
+ }
826
+ case SUB: {
827
+ Format(instr, "sub'cond's 'rd, 'rn, 'shift_op");
828
+ break;
829
+ }
830
+ case RSB: {
831
+ Format(instr, "rsb'cond's 'rd, 'rn, 'shift_op");
832
+ break;
833
+ }
834
+ case ADD: {
835
+ Format(instr, "add'cond's 'rd, 'rn, 'shift_op");
836
+ break;
837
+ }
838
+ case ADC: {
839
+ Format(instr, "adc'cond's 'rd, 'rn, 'shift_op");
840
+ break;
841
+ }
842
+ case SBC: {
843
+ Format(instr, "sbc'cond's 'rd, 'rn, 'shift_op");
844
+ break;
845
+ }
846
+ case RSC: {
847
+ Format(instr, "rsc'cond's 'rd, 'rn, 'shift_op");
848
+ break;
849
+ }
850
+ case TST: {
851
+ if (instr->HasS()) {
852
+ Format(instr, "tst'cond 'rn, 'shift_op");
853
+ } else {
854
+ Format(instr, "movw'cond 'mw");
855
+ }
856
+ break;
857
+ }
858
+ case TEQ: {
859
+ if (instr->HasS()) {
860
+ Format(instr, "teq'cond 'rn, 'shift_op");
861
+ } else {
862
+ // Other instructions matching this pattern are handled in the
863
+ // miscellaneous instructions part above.
864
+ UNREACHABLE();
865
+ }
866
+ break;
867
+ }
868
+ case CMP: {
869
+ if (instr->HasS()) {
870
+ Format(instr, "cmp'cond 'rn, 'shift_op");
871
+ } else {
872
+ Format(instr, "movt'cond 'mw");
873
+ }
874
+ break;
875
+ }
876
+ case CMN: {
877
+ if (instr->HasS()) {
878
+ Format(instr, "cmn'cond 'rn, 'shift_op");
879
+ } else {
880
+ // Other instructions matching this pattern are handled in the
881
+ // miscellaneous instructions part above.
882
+ UNREACHABLE();
883
+ }
884
+ break;
885
+ }
886
+ case ORR: {
887
+ Format(instr, "orr'cond's 'rd, 'rn, 'shift_op");
888
+ break;
889
+ }
890
+ case MOV: {
891
+ Format(instr, "mov'cond's 'rd, 'shift_op");
892
+ break;
893
+ }
894
+ case BIC: {
895
+ Format(instr, "bic'cond's 'rd, 'rn, 'shift_op");
896
+ break;
897
+ }
898
+ case MVN: {
899
+ Format(instr, "mvn'cond's 'rd, 'shift_op");
900
+ break;
901
+ }
902
+ default: {
903
+ // The Opcode field is a 4-bit field.
904
+ UNREACHABLE();
905
+ break;
906
+ }
907
+ }
908
+ }
909
+ }
910
+
911
+
912
+ void Decoder::DecodeType2(Instruction* instr) {
913
+ switch (instr->PUField()) {
914
+ case da_x: {
915
+ if (instr->HasW()) {
916
+ Unknown(instr); // not used in V8
917
+ return;
918
+ }
919
+ Format(instr, "'memop'cond'b 'rd, ['rn], #-'off12");
920
+ break;
921
+ }
922
+ case ia_x: {
923
+ if (instr->HasW()) {
924
+ Unknown(instr); // not used in V8
925
+ return;
926
+ }
927
+ Format(instr, "'memop'cond'b 'rd, ['rn], #+'off12");
928
+ break;
929
+ }
930
+ case db_x: {
931
+ Format(instr, "'memop'cond'b 'rd, ['rn, #-'off12]'w");
932
+ break;
933
+ }
934
+ case ib_x: {
935
+ Format(instr, "'memop'cond'b 'rd, ['rn, #+'off12]'w");
936
+ break;
937
+ }
938
+ default: {
939
+ // The PU field is a 2-bit field.
940
+ UNREACHABLE();
941
+ break;
942
+ }
943
+ }
944
+ }
945
+
946
+
947
+ void Decoder::DecodeType3(Instruction* instr) {
948
+ switch (instr->PUField()) {
949
+ case da_x: {
950
+ ASSERT(!instr->HasW());
951
+ Format(instr, "'memop'cond'b 'rd, ['rn], -'shift_rm");
952
+ break;
953
+ }
954
+ case ia_x: {
955
+ if (instr->HasW()) {
956
+ ASSERT(instr->Bits(5, 4) == 0x1);
957
+ if (instr->Bit(22) == 0x1) {
958
+ Format(instr, "usat 'rd, #'imm05@16, 'rm'shift_sat");
959
+ } else {
960
+ UNREACHABLE(); // SSAT.
961
+ }
962
+ } else {
963
+ Format(instr, "'memop'cond'b 'rd, ['rn], +'shift_rm");
964
+ }
965
+ break;
966
+ }
967
+ case db_x: {
968
+ Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w");
969
+ break;
970
+ }
971
+ case ib_x: {
972
+ if (instr->HasW() && (instr->Bits(6, 4) == 0x5)) {
973
+ uint32_t widthminus1 = static_cast<uint32_t>(instr->Bits(20, 16));
974
+ uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7));
975
+ uint32_t msbit = widthminus1 + lsbit;
976
+ if (msbit <= 31) {
977
+ if (instr->Bit(22)) {
978
+ Format(instr, "ubfx'cond 'rd, 'rm, 'f");
979
+ } else {
980
+ Format(instr, "sbfx'cond 'rd, 'rm, 'f");
981
+ }
982
+ } else {
983
+ UNREACHABLE();
984
+ }
985
+ } else if (!instr->HasW() && (instr->Bits(6, 4) == 0x1)) {
986
+ uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7));
987
+ uint32_t msbit = static_cast<uint32_t>(instr->Bits(20, 16));
988
+ if (msbit >= lsbit) {
989
+ if (instr->RmValue() == 15) {
990
+ Format(instr, "bfc'cond 'rd, 'f");
991
+ } else {
992
+ Format(instr, "bfi'cond 'rd, 'rm, 'f");
993
+ }
994
+ } else {
995
+ UNREACHABLE();
996
+ }
997
+ } else {
998
+ Format(instr, "'memop'cond'b 'rd, ['rn, +'shift_rm]'w");
999
+ }
1000
+ break;
1001
+ }
1002
+ default: {
1003
+ // The PU field is a 2-bit field.
1004
+ UNREACHABLE();
1005
+ break;
1006
+ }
1007
+ }
1008
+ }
1009
+
1010
+
1011
+ void Decoder::DecodeType4(Instruction* instr) {
1012
+ if (instr->Bit(22) != 0) {
1013
+ // Privileged mode currently not supported.
1014
+ Unknown(instr);
1015
+ } else {
1016
+ if (instr->HasL()) {
1017
+ Format(instr, "ldm'cond'pu 'rn'w, 'rlist");
1018
+ } else {
1019
+ Format(instr, "stm'cond'pu 'rn'w, 'rlist");
1020
+ }
1021
+ }
1022
+ }
1023
+
1024
+
1025
+ void Decoder::DecodeType5(Instruction* instr) {
1026
+ Format(instr, "b'l'cond 'target");
1027
+ }
1028
+
1029
+
1030
+ void Decoder::DecodeType6(Instruction* instr) {
1031
+ DecodeType6CoprocessorIns(instr);
1032
+ }
1033
+
1034
+
1035
+ int Decoder::DecodeType7(Instruction* instr) {
1036
+ if (instr->Bit(24) == 1) {
1037
+ if (instr->SvcValue() >= kStopCode) {
1038
+ Format(instr, "stop'cond 'svc");
1039
+ // Also print the stop message. Its address is encoded
1040
+ // in the following 4 bytes.
1041
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
1042
+ "\n %p %08x stop message: %s",
1043
+ reinterpret_cast<int32_t*>(instr
1044
+ + Instruction::kInstrSize),
1045
+ *reinterpret_cast<char**>(instr
1046
+ + Instruction::kInstrSize),
1047
+ *reinterpret_cast<char**>(instr
1048
+ + Instruction::kInstrSize));
1049
+ // We have decoded 2 * Instruction::kInstrSize bytes.
1050
+ return 2 * Instruction::kInstrSize;
1051
+ } else {
1052
+ Format(instr, "svc'cond 'svc");
1053
+ }
1054
+ } else {
1055
+ DecodeTypeVFP(instr);
1056
+ }
1057
+ return Instruction::kInstrSize;
1058
+ }
1059
+
1060
+
1061
+ // void Decoder::DecodeTypeVFP(Instruction* instr)
1062
+ // vmov: Sn = Rt
1063
+ // vmov: Rt = Sn
1064
+ // vcvt: Dd = Sm
1065
+ // vcvt: Sd = Dm
1066
+ // Dd = vabs(Dm)
1067
+ // Dd = vneg(Dm)
1068
+ // Dd = vadd(Dn, Dm)
1069
+ // Dd = vsub(Dn, Dm)
1070
+ // Dd = vmul(Dn, Dm)
1071
+ // Dd = vdiv(Dn, Dm)
1072
+ // vcmp(Dd, Dm)
1073
+ // vmrs
1074
+ // vmsr
1075
+ // Dd = vsqrt(Dm)
1076
+ void Decoder::DecodeTypeVFP(Instruction* instr) {
1077
+ ASSERT((instr->TypeValue() == 7) && (instr->Bit(24) == 0x0) );
1078
+ ASSERT(instr->Bits(11, 9) == 0x5);
1079
+
1080
+ if (instr->Bit(4) == 0) {
1081
+ if (instr->Opc1Value() == 0x7) {
1082
+ // Other data processing instructions
1083
+ if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x1)) {
1084
+ // vmov register to register.
1085
+ if (instr->SzValue() == 0x1) {
1086
+ Format(instr, "vmov.f64'cond 'Dd, 'Dm");
1087
+ } else {
1088
+ Format(instr, "vmov.f32'cond 'Sd, 'Sm");
1089
+ }
1090
+ } else if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x3)) {
1091
+ // vabs
1092
+ Format(instr, "vabs.f64'cond 'Dd, 'Dm");
1093
+ } else if ((instr->Opc2Value() == 0x1) && (instr->Opc3Value() == 0x1)) {
1094
+ // vneg
1095
+ Format(instr, "vneg.f64'cond 'Dd, 'Dm");
1096
+ } else if ((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3)) {
1097
+ DecodeVCVTBetweenDoubleAndSingle(instr);
1098
+ } else if ((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) {
1099
+ DecodeVCVTBetweenFloatingPointAndInteger(instr);
1100
+ } else if (((instr->Opc2Value() >> 1) == 0x6) &&
1101
+ (instr->Opc3Value() & 0x1)) {
1102
+ DecodeVCVTBetweenFloatingPointAndInteger(instr);
1103
+ } else if (((instr->Opc2Value() == 0x4) || (instr->Opc2Value() == 0x5)) &&
1104
+ (instr->Opc3Value() & 0x1)) {
1105
+ DecodeVCMP(instr);
1106
+ } else if (((instr->Opc2Value() == 0x1)) && (instr->Opc3Value() == 0x3)) {
1107
+ Format(instr, "vsqrt.f64'cond 'Dd, 'Dm");
1108
+ } else if (instr->Opc3Value() == 0x0) {
1109
+ if (instr->SzValue() == 0x1) {
1110
+ Format(instr, "vmov.f64'cond 'Dd, 'd");
1111
+ } else {
1112
+ Unknown(instr); // Not used by V8.
1113
+ }
1114
+ } else {
1115
+ Unknown(instr); // Not used by V8.
1116
+ }
1117
+ } else if (instr->Opc1Value() == 0x3) {
1118
+ if (instr->SzValue() == 0x1) {
1119
+ if (instr->Opc3Value() & 0x1) {
1120
+ Format(instr, "vsub.f64'cond 'Dd, 'Dn, 'Dm");
1121
+ } else {
1122
+ Format(instr, "vadd.f64'cond 'Dd, 'Dn, 'Dm");
1123
+ }
1124
+ } else {
1125
+ Unknown(instr); // Not used by V8.
1126
+ }
1127
+ } else if ((instr->Opc1Value() == 0x2) && !(instr->Opc3Value() & 0x1)) {
1128
+ if (instr->SzValue() == 0x1) {
1129
+ Format(instr, "vmul.f64'cond 'Dd, 'Dn, 'Dm");
1130
+ } else {
1131
+ Unknown(instr); // Not used by V8.
1132
+ }
1133
+ } else if ((instr->Opc1Value() == 0x4) && !(instr->Opc3Value() & 0x1)) {
1134
+ if (instr->SzValue() == 0x1) {
1135
+ Format(instr, "vdiv.f64'cond 'Dd, 'Dn, 'Dm");
1136
+ } else {
1137
+ Unknown(instr); // Not used by V8.
1138
+ }
1139
+ } else {
1140
+ Unknown(instr); // Not used by V8.
1141
+ }
1142
+ } else {
1143
+ if ((instr->VCValue() == 0x0) &&
1144
+ (instr->VAValue() == 0x0)) {
1145
+ DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(instr);
1146
+ } else if ((instr->VCValue() == 0x0) &&
1147
+ (instr->VAValue() == 0x7) &&
1148
+ (instr->Bits(19, 16) == 0x1)) {
1149
+ if (instr->VLValue() == 0) {
1150
+ if (instr->Bits(15, 12) == 0xF) {
1151
+ Format(instr, "vmsr'cond FPSCR, APSR");
1152
+ } else {
1153
+ Format(instr, "vmsr'cond FPSCR, 'rt");
1154
+ }
1155
+ } else {
1156
+ if (instr->Bits(15, 12) == 0xF) {
1157
+ Format(instr, "vmrs'cond APSR, FPSCR");
1158
+ } else {
1159
+ Format(instr, "vmrs'cond 'rt, FPSCR");
1160
+ }
1161
+ }
1162
+ }
1163
+ }
1164
+ }
1165
+
1166
+
1167
+ void Decoder::DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(
1168
+ Instruction* instr) {
1169
+ ASSERT((instr->Bit(4) == 1) && (instr->VCValue() == 0x0) &&
1170
+ (instr->VAValue() == 0x0));
1171
+
1172
+ bool to_arm_register = (instr->VLValue() == 0x1);
1173
+
1174
+ if (to_arm_register) {
1175
+ Format(instr, "vmov'cond 'rt, 'Sn");
1176
+ } else {
1177
+ Format(instr, "vmov'cond 'Sn, 'rt");
1178
+ }
1179
+ }
1180
+
1181
+
1182
+ void Decoder::DecodeVCMP(Instruction* instr) {
1183
+ ASSERT((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1184
+ ASSERT(((instr->Opc2Value() == 0x4) || (instr->Opc2Value() == 0x5)) &&
1185
+ (instr->Opc3Value() & 0x1));
1186
+
1187
+ // Comparison.
1188
+ bool dp_operation = (instr->SzValue() == 1);
1189
+ bool raise_exception_for_qnan = (instr->Bit(7) == 0x1);
1190
+
1191
+ if (dp_operation && !raise_exception_for_qnan) {
1192
+ if (instr->Opc2Value() == 0x4) {
1193
+ Format(instr, "vcmp.f64'cond 'Dd, 'Dm");
1194
+ } else if (instr->Opc2Value() == 0x5) {
1195
+ Format(instr, "vcmp.f64'cond 'Dd, #0.0");
1196
+ } else {
1197
+ Unknown(instr); // invalid
1198
+ }
1199
+ } else {
1200
+ Unknown(instr); // Not used by V8.
1201
+ }
1202
+ }
1203
+
1204
+
1205
+ void Decoder::DecodeVCVTBetweenDoubleAndSingle(Instruction* instr) {
1206
+ ASSERT((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1207
+ ASSERT((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3));
1208
+
1209
+ bool double_to_single = (instr->SzValue() == 1);
1210
+
1211
+ if (double_to_single) {
1212
+ Format(instr, "vcvt.f32.f64'cond 'Sd, 'Dm");
1213
+ } else {
1214
+ Format(instr, "vcvt.f64.f32'cond 'Dd, 'Sm");
1215
+ }
1216
+ }
1217
+
1218
+
1219
+ void Decoder::DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr) {
1220
+ ASSERT((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1221
+ ASSERT(((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) ||
1222
+ (((instr->Opc2Value() >> 1) == 0x6) && (instr->Opc3Value() & 0x1)));
1223
+
1224
+ bool to_integer = (instr->Bit(18) == 1);
1225
+ bool dp_operation = (instr->SzValue() == 1);
1226
+ if (to_integer) {
1227
+ bool unsigned_integer = (instr->Bit(16) == 0);
1228
+
1229
+ if (dp_operation) {
1230
+ if (unsigned_integer) {
1231
+ Format(instr, "vcvt.u32.f64'cond 'Sd, 'Dm");
1232
+ } else {
1233
+ Format(instr, "vcvt.s32.f64'cond 'Sd, 'Dm");
1234
+ }
1235
+ } else {
1236
+ if (unsigned_integer) {
1237
+ Format(instr, "vcvt.u32.f32'cond 'Sd, 'Sm");
1238
+ } else {
1239
+ Format(instr, "vcvt.s32.f32'cond 'Sd, 'Sm");
1240
+ }
1241
+ }
1242
+ } else {
1243
+ bool unsigned_integer = (instr->Bit(7) == 0);
1244
+
1245
+ if (dp_operation) {
1246
+ if (unsigned_integer) {
1247
+ Format(instr, "vcvt.f64.u32'cond 'Dd, 'Sm");
1248
+ } else {
1249
+ Format(instr, "vcvt.f64.s32'cond 'Dd, 'Sm");
1250
+ }
1251
+ } else {
1252
+ if (unsigned_integer) {
1253
+ Format(instr, "vcvt.f32.u32'cond 'Sd, 'Sm");
1254
+ } else {
1255
+ Format(instr, "vcvt.f32.s32'cond 'Sd, 'Sm");
1256
+ }
1257
+ }
1258
+ }
1259
+ }
1260
+
1261
+
1262
+ // Decode Type 6 coprocessor instructions.
1263
+ // Dm = vmov(Rt, Rt2)
1264
+ // <Rt, Rt2> = vmov(Dm)
1265
+ // Ddst = MEM(Rbase + 4*offset).
1266
+ // MEM(Rbase + 4*offset) = Dsrc.
1267
+ void Decoder::DecodeType6CoprocessorIns(Instruction* instr) {
1268
+ ASSERT(instr->TypeValue() == 6);
1269
+
1270
+ if (instr->CoprocessorValue() == 0xA) {
1271
+ switch (instr->OpcodeValue()) {
1272
+ case 0x8:
1273
+ case 0xA:
1274
+ if (instr->HasL()) {
1275
+ Format(instr, "vldr'cond 'Sd, ['rn - 4*'imm08@00]");
1276
+ } else {
1277
+ Format(instr, "vstr'cond 'Sd, ['rn - 4*'imm08@00]");
1278
+ }
1279
+ break;
1280
+ case 0xC:
1281
+ case 0xE:
1282
+ if (instr->HasL()) {
1283
+ Format(instr, "vldr'cond 'Sd, ['rn + 4*'imm08@00]");
1284
+ } else {
1285
+ Format(instr, "vstr'cond 'Sd, ['rn + 4*'imm08@00]");
1286
+ }
1287
+ break;
1288
+ case 0x4:
1289
+ case 0x5:
1290
+ case 0x6:
1291
+ case 0x7:
1292
+ case 0x9:
1293
+ case 0xB: {
1294
+ bool to_vfp_register = (instr->VLValue() == 0x1);
1295
+ if (to_vfp_register) {
1296
+ Format(instr, "vldm'cond'pu 'rn'w, {'Sd-'Sd+}");
1297
+ } else {
1298
+ Format(instr, "vstm'cond'pu 'rn'w, {'Sd-'Sd+}");
1299
+ }
1300
+ break;
1301
+ }
1302
+ default:
1303
+ Unknown(instr); // Not used by V8.
1304
+ }
1305
+ } else if (instr->CoprocessorValue() == 0xB) {
1306
+ switch (instr->OpcodeValue()) {
1307
+ case 0x2:
1308
+ // Load and store double to two GP registers
1309
+ if (instr->Bits(7, 4) != 0x1) {
1310
+ Unknown(instr); // Not used by V8.
1311
+ } else if (instr->HasL()) {
1312
+ Format(instr, "vmov'cond 'rt, 'rn, 'Dm");
1313
+ } else {
1314
+ Format(instr, "vmov'cond 'Dm, 'rt, 'rn");
1315
+ }
1316
+ break;
1317
+ case 0x8:
1318
+ if (instr->HasL()) {
1319
+ Format(instr, "vldr'cond 'Dd, ['rn - 4*'imm08@00]");
1320
+ } else {
1321
+ Format(instr, "vstr'cond 'Dd, ['rn - 4*'imm08@00]");
1322
+ }
1323
+ break;
1324
+ case 0xC:
1325
+ if (instr->HasL()) {
1326
+ Format(instr, "vldr'cond 'Dd, ['rn + 4*'imm08@00]");
1327
+ } else {
1328
+ Format(instr, "vstr'cond 'Dd, ['rn + 4*'imm08@00]");
1329
+ }
1330
+ break;
1331
+ case 0x4:
1332
+ case 0x5:
1333
+ case 0x9: {
1334
+ bool to_vfp_register = (instr->VLValue() == 0x1);
1335
+ if (to_vfp_register) {
1336
+ Format(instr, "vldm'cond'pu 'rn'w, {'Dd-'Dd+}");
1337
+ } else {
1338
+ Format(instr, "vstm'cond'pu 'rn'w, {'Dd-'Dd+}");
1339
+ }
1340
+ break;
1341
+ }
1342
+ default:
1343
+ Unknown(instr); // Not used by V8.
1344
+ }
1345
+ } else {
1346
+ Unknown(instr); // Not used by V8.
1347
+ }
1348
+ }
1349
+
1350
+
1351
+ bool Decoder::IsConstantPoolAt(byte* instr_ptr) {
1352
+ int instruction_bits = *(reinterpret_cast<int*>(instr_ptr));
1353
+ return (instruction_bits & kConstantPoolMarkerMask) == kConstantPoolMarker;
1354
+ }
1355
+
1356
+
1357
+ int Decoder::ConstantPoolSizeAt(byte* instr_ptr) {
1358
+ if (IsConstantPoolAt(instr_ptr)) {
1359
+ int instruction_bits = *(reinterpret_cast<int*>(instr_ptr));
1360
+ return instruction_bits & kConstantPoolLengthMask;
1361
+ } else {
1362
+ return -1;
1363
+ }
1364
+ }
1365
+
1366
+
1367
+ // Disassemble the instruction at *instr_ptr into the output buffer.
1368
+ int Decoder::InstructionDecode(byte* instr_ptr) {
1369
+ Instruction* instr = Instruction::At(instr_ptr);
1370
+ // Print raw instruction bytes.
1371
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
1372
+ "%08x ",
1373
+ instr->InstructionBits());
1374
+ if (instr->ConditionField() == kSpecialCondition) {
1375
+ Unknown(instr);
1376
+ return Instruction::kInstrSize;
1377
+ }
1378
+ int instruction_bits = *(reinterpret_cast<int*>(instr_ptr));
1379
+ if ((instruction_bits & kConstantPoolMarkerMask) == kConstantPoolMarker) {
1380
+ out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_,
1381
+ "constant pool begin (length %d)",
1382
+ instruction_bits &
1383
+ kConstantPoolLengthMask);
1384
+ return Instruction::kInstrSize;
1385
+ }
1386
+ switch (instr->TypeValue()) {
1387
+ case 0:
1388
+ case 1: {
1389
+ DecodeType01(instr);
1390
+ break;
1391
+ }
1392
+ case 2: {
1393
+ DecodeType2(instr);
1394
+ break;
1395
+ }
1396
+ case 3: {
1397
+ DecodeType3(instr);
1398
+ break;
1399
+ }
1400
+ case 4: {
1401
+ DecodeType4(instr);
1402
+ break;
1403
+ }
1404
+ case 5: {
1405
+ DecodeType5(instr);
1406
+ break;
1407
+ }
1408
+ case 6: {
1409
+ DecodeType6(instr);
1410
+ break;
1411
+ }
1412
+ case 7: {
1413
+ return DecodeType7(instr);
1414
+ }
1415
+ default: {
1416
+ // The type field is 3-bits in the ARM encoding.
1417
+ UNREACHABLE();
1418
+ break;
1419
+ }
1420
+ }
1421
+ return Instruction::kInstrSize;
1422
+ }
1423
+
1424
+
1425
+ } } // namespace v8::internal
1426
+
1427
+
1428
+
1429
+ //------------------------------------------------------------------------------
1430
+
1431
+ namespace disasm {
1432
+
1433
+
1434
+ const char* NameConverter::NameOfAddress(byte* addr) const {
1435
+ v8::internal::OS::SNPrintF(tmp_buffer_, "%p", addr);
1436
+ return tmp_buffer_.start();
1437
+ }
1438
+
1439
+
1440
+ const char* NameConverter::NameOfConstant(byte* addr) const {
1441
+ return NameOfAddress(addr);
1442
+ }
1443
+
1444
+
1445
+ const char* NameConverter::NameOfCPURegister(int reg) const {
1446
+ return v8::internal::Registers::Name(reg);
1447
+ }
1448
+
1449
+
1450
+ const char* NameConverter::NameOfByteCPURegister(int reg) const {
1451
+ UNREACHABLE(); // ARM does not have the concept of a byte register
1452
+ return "nobytereg";
1453
+ }
1454
+
1455
+
1456
+ const char* NameConverter::NameOfXMMRegister(int reg) const {
1457
+ UNREACHABLE(); // ARM does not have any XMM registers
1458
+ return "noxmmreg";
1459
+ }
1460
+
1461
+
1462
+ const char* NameConverter::NameInCode(byte* addr) const {
1463
+ // The default name converter is called for unknown code. So we will not try
1464
+ // to access any memory.
1465
+ return "";
1466
+ }
1467
+
1468
+
1469
+ //------------------------------------------------------------------------------
1470
+
1471
+ Disassembler::Disassembler(const NameConverter& converter)
1472
+ : converter_(converter) {}
1473
+
1474
+
1475
+ Disassembler::~Disassembler() {}
1476
+
1477
+
1478
+ int Disassembler::InstructionDecode(v8::internal::Vector<char> buffer,
1479
+ byte* instruction) {
1480
+ v8::internal::Decoder d(converter_, buffer);
1481
+ return d.InstructionDecode(instruction);
1482
+ }
1483
+
1484
+
1485
+ int Disassembler::ConstantPoolSizeAt(byte* instruction) {
1486
+ return v8::internal::Decoder::ConstantPoolSizeAt(instruction);
1487
+ }
1488
+
1489
+
1490
+ void Disassembler::Disassemble(FILE* f, byte* begin, byte* end) {
1491
+ NameConverter converter;
1492
+ Disassembler d(converter);
1493
+ for (byte* pc = begin; pc < end;) {
1494
+ v8::internal::EmbeddedVector<char, 128> buffer;
1495
+ buffer[0] = '\0';
1496
+ byte* prev_pc = pc;
1497
+ pc += d.InstructionDecode(buffer, pc);
1498
+ fprintf(f, "%p %08x %s\n",
1499
+ prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
1500
+ }
1501
+ }
1502
+
1503
+
1504
+ } // namespace disasm
1505
+
1506
+ #endif // V8_TARGET_ARCH_ARM