html-to-markdown 2.28.0 → 2.28.2

data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_size.x86-64.mca

@@ -0,0 +1,63 @@
+Iterations:        100
+Instructions:      1200
+Total Cycles:      439
+Total uOps:        1400
+
+Dispatch Width:    4
+uOps Per Cycle:    3.19
+IPC:               2.73
+Block RThroughput: 3.5
+
+
+Instruction Info:
+[1]: #uOps
+[2]: Latency
+[3]: RThroughput
+[4]: MayLoad
+[5]: MayStore
+[6]: HasSideEffects (U)
+
+[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+ 1      1     0.33                        mov	rdx, rsi
+ 1      1     0.50                        lea	ecx, [rsi + rdi]
+ 1      1     0.33                        mov	eax, edx
+ 1      1     0.33                        and	eax, 1
+ 1      1     0.33                        add	rax, rdi
+ 1      0     0.25                        xor	esi, esi
+ 1      1     0.33                        sub	rdx, 4
+ 2      2     0.67                        cmovb	rax, rsi
+ 1      1     0.50                        shr	rdx
+ 1      1     0.33                        test	cl, 1
+ 2      2     0.67                        cmovne	rax, rsi
+ 1      1     1.00                  U     ret
+
+
+Resources:
+[0]   - SBDivider
+[1]   - SBFPDivider
+[2]   - SBPort0
+[3]   - SBPort1
+[4]   - SBPort4
+[5]   - SBPort5
+[6.0] - SBPort23
+[6.1] - SBPort23
+
+
+Resource pressure per iteration:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  
+ -      -     4.33   4.33    -     4.34    -      -     
+
+Resource pressure by instruction:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+ -      -     0.02   0.32    -     0.66    -      -     mov	rdx, rsi
+ -      -     0.32   0.68    -      -      -      -     lea	ecx, [rsi + rdi]
+ -      -     0.66    -      -     0.34    -      -     mov	eax, edx
+ -      -     0.02   0.33    -     0.65    -      -     and	eax, 1
+ -      -      -     0.99    -     0.01    -      -     add	rax, rdi
+ -      -      -      -      -      -      -      -     xor	esi, esi
+ -      -     0.65    -      -     0.35    -      -     sub	rdx, 4
+ -      -     1.00   1.00    -      -      -      -     cmovb	rax, rsi
+ -      -     0.66    -      -     0.34    -      -     shr	rdx
+ -      -      -     0.01    -     0.99    -      -     test	cl, 1
+ -      -     1.00   1.00    -      -      -      -     cmovne	rax, rsi
+ -      -      -      -      -     1.00    -      -     ret

data/rust-vendor/zerocopy/benches/ref_from_suffix_static_size.rs

@@ -0,0 +1,10 @@
+#[path = "formats/coco_static_size.rs"]
+mod format;
+
+#[unsafe(no_mangle)]
+fn bench_ref_from_suffix_static_size(source: &[u8]) -> Option<&format::LocoPacket> {
+    match zerocopy::FromBytes::ref_from_suffix(source) {
+        Ok((_rest, packet)) => Some(packet),
+        _ => None,
+    }
+}

data/rust-vendor/zerocopy/benches/ref_from_suffix_static_size.x86-64

@@ -0,0 +1,13 @@
+bench_ref_from_suffix_static_size:
+	lea eax, [rsi + rdi]
+	cmp rsi, 6
+	setb cl
+	or cl, al
+	test cl, 1
+	je .LBB5_2
+	xor eax, eax
+	ret
+.LBB5_2:
+	lea rax, [rdi + rsi]
+	add rax, -6
+	ret

data/rust-vendor/zerocopy/benches/ref_from_suffix_static_size.x86-64.mca

@@ -0,0 +1,61 @@
+Iterations:        100
+Instructions:      1100
+Total Cycles:      338
+Total uOps:        1100
+
+Dispatch Width:    4
+uOps Per Cycle:    3.25
+IPC:               3.25
+Block RThroughput: 3.0
+
+
+Instruction Info:
+[1]: #uOps
+[2]: Latency
+[3]: RThroughput
+[4]: MayLoad
+[5]: MayStore
+[6]: HasSideEffects (U)
+
+[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+ 1      1     0.50                        lea	eax, [rsi + rdi]
+ 1      1     0.33                        cmp	rsi, 6
+ 1      1     0.50                        setb	cl
+ 1      1     0.33                        or	cl, al
+ 1      1     0.33                        test	cl, 1
+ 1      1     1.00                        je	.LBB5_2
+ 1      0     0.25                        xor	eax, eax
+ 1      1     1.00                  U     ret
+ 1      1     0.50                        lea	rax, [rdi + rsi]
+ 1      1     0.33                        add	rax, -6
+ 1      1     1.00                  U     ret
+
+
+Resources:
+[0]   - SBDivider
+[1]   - SBFPDivider
+[2]   - SBPort0
+[3]   - SBPort1
+[4]   - SBPort4
+[5]   - SBPort5
+[6.0] - SBPort23
+[6.1] - SBPort23
+
+
+Resource pressure per iteration:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  
+ -      -     3.32   3.33    -     3.35    -      -     
+
+Resource pressure by instruction:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+ -      -     0.97   0.03    -      -      -      -     lea	eax, [rsi + rdi]
+ -      -     0.33   0.32    -     0.35    -      -     cmp	rsi, 6
+ -      -     1.00    -      -      -      -      -     setb	cl
+ -      -      -     1.00    -      -      -      -     or	cl, al
+ -      -      -     1.00    -      -      -      -     test	cl, 1
+ -      -      -      -      -     1.00    -      -     je	.LBB5_2
+ -      -      -      -      -      -      -      -     xor	eax, eax
+ -      -      -      -      -     1.00    -      -     ret
+ -      -     0.34   0.66    -      -      -      -     lea	rax, [rdi + rsi]
+ -      -     0.68   0.32    -      -      -      -     add	rax, -6
+ -      -      -      -      -     1.00    -      -     ret

data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_padding.rs

@@ -0,0 +1,13 @@
+#[path = "formats/coco_dynamic_padding.rs"]
+mod format;
+
+#[unsafe(no_mangle)]
+fn bench_ref_from_suffix_with_elems_dynamic_padding(
+    source: &[u8],
+    count: usize,
+) -> Option<&format::LocoPacket> {
+    match zerocopy::FromBytes::ref_from_suffix_with_elems(source, count) {
+        Ok((_rest, packet)) => Some(packet),
+        _ => None,
+    }
+}

data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_padding.x86-64

@@ -0,0 +1,34 @@
+bench_ref_from_suffix_with_elems_dynamic_padding:
+	mov rcx, rdx
+	mov edx, 3
+	mov rax, rcx
+	mul rdx
+	jo .LBB5_1
+	cmp rax, -10
+	ja .LBB5_1
+	lea rdx, [rax + 9]
+	not eax
+	and eax, 3
+	add rax, rdx
+	jae .LBB5_4
+.LBB5_1:
+	xor r8d, r8d
+	mov edx, 1
+	mov rax, r8
+	ret
+.LBB5_4:
+	lea r9d, [rsi + rdi]
+	xor edx, edx
+	mov r8d, 0
+	test r9b, 3
+	je .LBB5_5
+	mov rax, r8
+	ret
+.LBB5_5:
+	sub rsi, rax
+	jb .LBB5_1
+	add rdi, rsi
+	mov rdx, rcx
+	mov r8, rdi
+	mov rax, r8
+	ret

data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_padding.x86-64.mca

@@ -0,0 +1,99 @@
+Iterations:        100
+Instructions:      3000
+Total Cycles:      973
+Total uOps:        3100
+
+Dispatch Width:    4
+uOps Per Cycle:    3.19
+IPC:               3.08
+Block RThroughput: 8.0
+
+
+Instruction Info:
+[1]: #uOps
+[2]: Latency
+[3]: RThroughput
+[4]: MayLoad
+[5]: MayStore
+[6]: HasSideEffects (U)
+
+[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+ 1      1     0.33                        mov	rcx, rdx
+ 1      1     0.33                        mov	edx, 3
+ 1      1     0.33                        mov	rax, rcx
+ 2      4     1.00                        mul	rdx
+ 1      1     1.00                        jo	.LBB5_1
+ 1      1     0.33                        cmp	rax, -10
+ 1      1     1.00                        ja	.LBB5_1
+ 1      1     0.50                        lea	rdx, [rax + 9]
+ 1      1     0.33                        not	eax
+ 1      1     0.33                        and	eax, 3
+ 1      1     0.33                        add	rax, rdx
+ 1      1     1.00                        jae	.LBB5_4
+ 1      0     0.25                        xor	r8d, r8d
+ 1      1     0.33                        mov	edx, 1
+ 1      1     0.33                        mov	rax, r8
+ 1      1     1.00                  U     ret
+ 1      1     0.50                        lea	r9d, [rsi + rdi]
+ 1      0     0.25                        xor	edx, edx
+ 1      1     0.33                        mov	r8d, 0
+ 1      1     0.33                        test	r9b, 3
+ 1      1     1.00                        je	.LBB5_5
+ 1      1     0.33                        mov	rax, r8
+ 1      1     1.00                  U     ret
+ 1      1     0.33                        sub	rsi, rax
+ 1      1     1.00                        jb	.LBB5_1
+ 1      1     0.33                        add	rdi, rsi
+ 1      1     0.33                        mov	rdx, rcx
+ 1      1     0.33                        mov	r8, rdi
+ 1      1     0.33                        mov	rax, r8
+ 1      1     1.00                  U     ret
+
+
+Resources:
+[0]   - SBDivider
+[1]   - SBFPDivider
+[2]   - SBPort0
+[3]   - SBPort1
+[4]   - SBPort4
+[5]   - SBPort5
+[6.0] - SBPort23
+[6.1] - SBPort23
+
+
+Resource pressure per iteration:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  
+ -      -     9.66   9.66    -     9.68    -      -     
+
+Resource pressure by instruction:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+ -      -      -     0.99    -     0.01    -      -     mov	rcx, rdx
+ -      -     0.66   0.34    -      -      -      -     mov	edx, 3
+ -      -     0.34   0.66    -      -      -      -     mov	rax, rcx
+ -      -     1.00   1.00    -      -      -      -     mul	rdx
+ -      -      -      -      -     1.00    -      -     jo	.LBB5_1
+ -      -     1.00    -      -      -      -      -     cmp	rax, -10
+ -      -      -      -      -     1.00    -      -     ja	.LBB5_1
+ -      -      -     1.00    -      -      -      -     lea	rdx, [rax + 9]
+ -      -     1.00    -      -      -      -      -     not	eax
+ -      -     1.00    -      -      -      -      -     and	eax, 3
+ -      -     1.00    -      -      -      -      -     add	rax, rdx
+ -      -      -      -      -     1.00    -      -     jae	.LBB5_4
+ -      -      -      -      -      -      -      -     xor	r8d, r8d
+ -      -     0.33   0.33    -     0.34    -      -     mov	edx, 1
+ -      -     0.33    -      -     0.67    -      -     mov	rax, r8
+ -      -      -      -      -     1.00    -      -     ret
+ -      -     0.33   0.67    -      -      -      -     lea	r9d, [rsi + rdi]
+ -      -      -      -      -      -      -      -     xor	edx, edx
+ -      -     0.67   0.33    -      -      -      -     mov	r8d, 0
+ -      -     0.33   0.34    -     0.33    -      -     test	r9b, 3
+ -      -      -      -      -     1.00    -      -     je	.LBB5_5
+ -      -     0.66   0.01    -     0.33    -      -     mov	rax, r8
+ -      -      -      -      -     1.00    -      -     ret
+ -      -     0.33   0.67    -      -      -      -     sub	rsi, rax
+ -      -      -      -      -     1.00    -      -     jb	.LBB5_1
+ -      -      -     1.00    -      -      -      -     add	rdi, rsi
+ -      -     0.01   0.99    -      -      -      -     mov	rdx, rcx
+ -      -      -     1.00    -      -      -      -     mov	r8, rdi
+ -      -     0.67   0.33    -      -      -      -     mov	rax, r8
+ -      -      -      -      -     1.00    -      -     ret

data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_size.rs

@@ -0,0 +1,13 @@
+#[path = "formats/coco_dynamic_size.rs"]
+mod format;
+
+#[unsafe(no_mangle)]
+fn bench_ref_from_suffix_with_elems_dynamic_size(
+    source: &[u8],
+    count: usize,
+) -> Option<&format::LocoPacket> {
+    match zerocopy::FromBytes::ref_from_suffix_with_elems(source, count) {
+        Ok((_rest, packet)) => Some(packet),
+        _ => None,
+    }
+}

data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_size.x86-64

@@ -0,0 +1,23 @@
+bench_ref_from_suffix_with_elems_dynamic_size:
+	movabs rax, 9223372036854775805
+	cmp rdx, rax
+	ja .LBB5_1
+	lea r8d, [rsi + rdi]
+	xor ecx, ecx
+	mov eax, 0
+	test r8b, 1
+	jne .LBB5_5
+	lea rax, [2*rdx + 4]
+	sub rsi, rax
+	jae .LBB5_4
+.LBB5_1:
+	xor eax, eax
+	mov edx, 1
+	ret
+.LBB5_4:
+	add rdi, rsi
+	mov rcx, rdx
+	mov rax, rdi
+.LBB5_5:
+	mov rdx, rcx
+	ret

data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_size.x86-64.mca

@@ -0,0 +1,77 @@
+Iterations:        100
+Instructions:      1900
+Total Cycles:      571
+Total uOps:        1900
+
+Dispatch Width:    4
+uOps Per Cycle:    3.33
+IPC:               3.33
+Block RThroughput: 5.0
+
+
+Instruction Info:
+[1]: #uOps
+[2]: Latency
+[3]: RThroughput
+[4]: MayLoad
+[5]: MayStore
+[6]: HasSideEffects (U)
+
+[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+ 1      1     0.33                        movabs	rax, 9223372036854775805
+ 1      1     0.33                        cmp	rdx, rax
+ 1      1     1.00                        ja	.LBB5_1
+ 1      1     0.50                        lea	r8d, [rsi + rdi]
+ 1      0     0.25                        xor	ecx, ecx
+ 1      1     0.33                        mov	eax, 0
+ 1      1     0.33                        test	r8b, 1
+ 1      1     1.00                        jne	.LBB5_5
+ 1      1     0.50                        lea	rax, [2*rdx + 4]
+ 1      1     0.33                        sub	rsi, rax
+ 1      1     1.00                        jae	.LBB5_4
+ 1      0     0.25                        xor	eax, eax
+ 1      1     0.33                        mov	edx, 1
+ 1      1     1.00                  U     ret
+ 1      1     0.33                        add	rdi, rsi
+ 1      1     0.33                        mov	rcx, rdx
+ 1      1     0.33                        mov	rax, rdi
+ 1      1     0.33                        mov	rdx, rcx
+ 1      1     1.00                  U     ret
+
+
+Resources:
+[0]   - SBDivider
+[1]   - SBFPDivider
+[2]   - SBPort0
+[3]   - SBPort1
+[4]   - SBPort4
+[5]   - SBPort5
+[6.0] - SBPort23
+[6.1] - SBPort23
+
+
+Resource pressure per iteration:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  
+ -      -     5.66   5.66    -     5.68    -      -     
+
+Resource pressure by instruction:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+ -      -     0.66   0.33    -     0.01    -      -     movabs	rax, 9223372036854775805
+ -      -     0.01   0.99    -      -      -      -     cmp	rdx, rax
+ -      -      -      -      -     1.00    -      -     ja	.LBB5_1
+ -      -     0.99   0.01    -      -      -      -     lea	r8d, [rsi + rdi]
+ -      -      -      -      -      -      -      -     xor	ecx, ecx
+ -      -     0.33   0.33    -     0.34    -      -     mov	eax, 0
+ -      -     0.33   0.34    -     0.33    -      -     test	r8b, 1
+ -      -      -      -      -     1.00    -      -     jne	.LBB5_5
+ -      -     0.34   0.66    -      -      -      -     lea	rax, [2*rdx + 4]
+ -      -      -     1.00    -      -      -      -     sub	rsi, rax
+ -      -      -      -      -     1.00    -      -     jae	.LBB5_4
+ -      -      -      -      -      -      -      -     xor	eax, eax
+ -      -     1.00    -      -      -      -      -     mov	edx, 1
+ -      -      -      -      -     1.00    -      -     ret
+ -      -      -     1.00    -      -      -      -     add	rdi, rsi
+ -      -     1.00    -      -      -      -      -     mov	rcx, rdx
+ -      -     0.32   0.68    -      -      -      -     mov	rax, rdi
+ -      -     0.68   0.32    -      -      -      -     mov	rdx, rcx
+ -      -      -      -      -     1.00    -      -     ret

data/rust-vendor/zerocopy/benches/transmute.rs

@@ -0,0 +1,16 @@
+use zerocopy::Unalign;
+use zerocopy_derive::*;
+
+#[path = "formats/coco_static_size.rs"]
+mod format;
+
+#[derive(IntoBytes, KnownLayout, Immutable)]
+#[repr(C)]
+struct MinimalViableSource {
+    bytes: [u8; 6],
+}
+
+#[unsafe(no_mangle)]
+fn bench_transmute(source: MinimalViableSource) -> Unalign<format::LocoPacket> {
+    zerocopy::transmute!(source)
+}

data/rust-vendor/zerocopy/benches/transmute.x86-64

@@ -0,0 +1,3 @@
+bench_transmute:
+	mov rax, rdi
+	ret

data/rust-vendor/zerocopy/benches/transmute.x86-64.mca

@@ -0,0 +1,43 @@
+Iterations:        100
+Instructions:      200
+Total Cycles:      104
+Total uOps:        200
+
+Dispatch Width:    4
+uOps Per Cycle:    1.92
+IPC:               1.92
+Block RThroughput: 1.0
+
+
+Instruction Info:
+[1]: #uOps
+[2]: Latency
+[3]: RThroughput
+[4]: MayLoad
+[5]: MayStore
+[6]: HasSideEffects (U)
+
+[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+ 1      1     0.33                        mov	rax, rdi
+ 1      1     1.00                  U     ret
+
+
+Resources:
+[0]   - SBDivider
+[1]   - SBFPDivider
+[2]   - SBPort0
+[3]   - SBPort1
+[4]   - SBPort4
+[5]   - SBPort5
+[6.0] - SBPort23
+[6.1] - SBPort23
+
+
+Resource pressure per iteration:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  
+ -      -     0.49   0.50    -     1.01    -      -     
+
+Resource pressure by instruction:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+ -      -     0.49   0.50    -     0.01    -      -     mov	rax, rdi
+ -      -      -      -      -     1.00    -      -     ret

data/rust-vendor/zerocopy/benches/transmute_ref_dynamic_size.rs

@@ -0,0 +1,16 @@
+use zerocopy_derive::*;
+
+#[path = "formats/coco_dynamic_size.rs"]
+mod format;
+
+#[derive(IntoBytes, KnownLayout, Immutable)]
+#[repr(C, align(2))]
+struct MinimalViableSource {
+    header: [u8; 6],
+    trailer: [[u8; 2]],
+}
+
+#[unsafe(no_mangle)]
+fn bench_transmute_ref_dynamic_size(source: &MinimalViableSource) -> &format::LocoPacket {
+    zerocopy::transmute_ref!(source)
+}

data/rust-vendor/zerocopy/benches/transmute_ref_dynamic_size.x86-64

@@ -0,0 +1,4 @@
+bench_transmute_ref_dynamic_size:
+	mov rax, rdi
+	lea rdx, [rsi + 1]
+	ret

data/rust-vendor/zerocopy/benches/transmute_ref_dynamic_size.x86-64.mca

@@ -0,0 +1,45 @@
+Iterations:        100
+Instructions:      300
+Total Cycles:      104
+Total uOps:        300
+
+Dispatch Width:    4
+uOps Per Cycle:    2.88
+IPC:               2.88
+Block RThroughput: 1.0
+
+
+Instruction Info:
+[1]: #uOps
+[2]: Latency
+[3]: RThroughput
+[4]: MayLoad
+[5]: MayStore
+[6]: HasSideEffects (U)
+
+[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+ 1      1     0.33                        mov	rax, rdi
+ 1      1     0.50                        lea	rdx, [rsi + 1]
+ 1      1     1.00                  U     ret
+
+
+Resources:
+[0]   - SBDivider
+[1]   - SBFPDivider
+[2]   - SBPort0
+[3]   - SBPort1
+[4]   - SBPort4
+[5]   - SBPort5
+[6.0] - SBPort23
+[6.1] - SBPort23
+
+
+Resource pressure per iteration:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  
+ -      -     0.99   1.00    -     1.01    -      -     
+
+Resource pressure by instruction:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+ -      -     0.99    -      -     0.01    -      -     mov	rax, rdi
+ -      -      -     1.00    -      -      -      -     lea	rdx, [rsi + 1]
+ -      -      -      -      -     1.00    -      -     ret

data/rust-vendor/zerocopy/benches/transmute_ref_static_size.rs

@@ -0,0 +1,15 @@
+use zerocopy_derive::*;
+
+#[path = "formats/coco_static_size.rs"]
+mod format;
+
+#[derive(IntoBytes, KnownLayout, Immutable)]
+#[repr(C, align(2))]
+struct MinimalViableSource {
+    bytes: [u8; 6],
+}
+
+#[unsafe(no_mangle)]
+fn bench_transmute_ref_static_size(source: &MinimalViableSource) -> &format::LocoPacket {
+    zerocopy::transmute_ref!(source)
+}

data/rust-vendor/zerocopy/benches/transmute_ref_static_size.x86-64

@@ -0,0 +1,3 @@
+bench_transmute_ref_static_size:
+	mov rax, rdi
+	ret

data/rust-vendor/zerocopy/benches/transmute_ref_static_size.x86-64.mca

@@ -0,0 +1,43 @@
+Iterations:        100
+Instructions:      200
+Total Cycles:      104
+Total uOps:        200
+
+Dispatch Width:    4
+uOps Per Cycle:    1.92
+IPC:               1.92
+Block RThroughput: 1.0
+
+
+Instruction Info:
+[1]: #uOps
+[2]: Latency
+[3]: RThroughput
+[4]: MayLoad
+[5]: MayStore
+[6]: HasSideEffects (U)
+
+[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+ 1      1     0.33                        mov	rax, rdi
+ 1      1     1.00                  U     ret
+
+
+Resources:
+[0]   - SBDivider
+[1]   - SBFPDivider
+[2]   - SBPort0
+[3]   - SBPort1
+[4]   - SBPort4
+[5]   - SBPort5
+[6.0] - SBPort23
+[6.1] - SBPort23
+
+
+Resource pressure per iteration:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  
+ -      -     0.49   0.50    -     1.01    -      -     
+
+Resource pressure by instruction:
+[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+ -      -     0.49   0.50    -     0.01    -      -     mov	rax, rdi
+ -      -      -      -      -     1.00    -      -     ret

data/rust-vendor/zerocopy/benches/try_read_from_bytes.rs

@@ -0,0 +1,7 @@
+#[path = "formats/coco_static_size.rs"]
+mod format;
+
+#[unsafe(no_mangle)]
+fn bench_try_read_from_bytes_static_size(source: &[u8]) -> Option<format::CocoPacket> {
+    zerocopy::TryFromBytes::try_read_from_bytes(source).ok()
+}

data/rust-vendor/zerocopy/benches/try_read_from_bytes.x86-64

@@ -0,0 +1,23 @@
+bench_try_read_from_bytes_static_size:
+	mov ax, -16191
+	cmp rsi, 6
+	jne .LBB5_1
+	mov ecx, dword ptr [rdi]
+	movzx edx, cx
+	cmp edx, 49344
+	jne .LBB5_4
+	movzx eax, word ptr [rdi + 4]
+	shl rax, 32
+	or rcx, rax
+	shr rcx, 16
+	mov ax, -16192
+.LBB5_4:
+	shl rcx, 16
+	movzx eax, ax
+	or rax, rcx
+	ret
+.LBB5_1:
+	shl rcx, 16
+	movzx eax, ax
+	or rax, rcx
+	ret