html-to-markdown 2.28.0 → 2.28.2

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (196) hide show
  1. checksums.yaml +4 -4
  2. data/Gemfile.lock +6 -6
  3. data/README.md +5 -1
  4. data/ext/html-to-markdown-rb/native/Cargo.lock +1694 -0
  5. data/ext/html-to-markdown-rb/native/Cargo.toml +1 -1
  6. data/lib/html_to_markdown/version.rb +1 -1
  7. data/rust-vendor/html-to-markdown-rs/Cargo.toml +1 -1
  8. data/rust-vendor/html-to-markdown-rs/src/converter/text_node.rs +1 -0
  9. data/rust-vendor/html-to-markdown-rs/src/converter/utility/content.rs +17 -0
  10. data/rust-vendor/html-to-markdown-rs/src/converter/visitor_hooks.rs +8 -5
  11. data/rust-vendor/html-to-markdown-rs/tests/test_issue_218.rs +56 -0
  12. data/rust-vendor/libc/.cargo-checksum.json +1 -1
  13. data/rust-vendor/libc/.cargo_vcs_info.json +1 -1
  14. data/rust-vendor/libc/CHANGELOG.md +19 -0
  15. data/rust-vendor/libc/Cargo.lock +1 -1
  16. data/rust-vendor/libc/Cargo.toml +1 -1
  17. data/rust-vendor/libc/Cargo.toml.orig +1 -1
  18. data/rust-vendor/libc/build.rs +3 -3
  19. data/rust-vendor/libc/src/fuchsia/mod.rs +2 -0
  20. data/rust-vendor/libc/src/hermit.rs +1 -0
  21. data/rust-vendor/libc/src/lib.rs +1 -0
  22. data/rust-vendor/libc/src/new/linux_uapi/linux/mod.rs +1 -0
  23. data/rust-vendor/libc/src/new/linux_uapi/linux/pidfd.rs +59 -0
  24. data/rust-vendor/libc/src/new/mod.rs +3 -0
  25. data/rust-vendor/libc/src/new/netbsd/sys/file.rs +16 -0
  26. data/rust-vendor/libc/src/new/netbsd/sys/mod.rs +2 -0
  27. data/rust-vendor/libc/src/new/netbsd/sys/socket.rs +44 -0
  28. data/rust-vendor/libc/src/new/qurt/mod.rs +2 -0
  29. data/rust-vendor/libc/src/solid/mod.rs +1 -0
  30. data/rust-vendor/libc/src/switch.rs +1 -0
  31. data/rust-vendor/libc/src/teeos/mod.rs +2 -0
  32. data/rust-vendor/libc/src/trusty.rs +1 -0
  33. data/rust-vendor/libc/src/unix/bsd/apple/b64/mod.rs +1 -0
  34. data/rust-vendor/libc/src/unix/bsd/netbsdlike/netbsd/mod.rs +31 -0
  35. data/rust-vendor/libc/src/unix/bsd/netbsdlike/openbsd/mod.rs +92 -0
  36. data/rust-vendor/libc/src/unix/hurd/mod.rs +1 -0
  37. data/rust-vendor/libc/src/unix/linux_like/linux/gnu/mod.rs +1 -0
  38. data/rust-vendor/libc/src/unix/linux_like/linux/mod.rs +22 -46
  39. data/rust-vendor/libc/src/unix/mod.rs +2 -0
  40. data/rust-vendor/libc/src/unix/newlib/espidf/mod.rs +2 -0
  41. data/rust-vendor/libc/src/unix/redox/mod.rs +2 -2
  42. data/rust-vendor/libc/src/vxworks/mod.rs +46 -0
  43. data/rust-vendor/libc/src/wasi/mod.rs +2 -0
  44. data/rust-vendor/libc/src/windows/mod.rs +2 -0
  45. data/rust-vendor/uuid/.cargo-checksum.json +1 -1
  46. data/rust-vendor/uuid/.cargo_vcs_info.json +1 -1
  47. data/rust-vendor/uuid/Cargo.lock +71 -137
  48. data/rust-vendor/uuid/Cargo.toml +4 -4
  49. data/rust-vendor/uuid/Cargo.toml.orig +4 -4
  50. data/rust-vendor/uuid/README.md +3 -3
  51. data/rust-vendor/uuid/src/lib.rs +4 -4
  52. data/rust-vendor/zerocopy/.cargo-checksum.json +1 -1
  53. data/rust-vendor/zerocopy/.cargo_vcs_info.json +1 -1
  54. data/rust-vendor/zerocopy/Cargo.lock +3 -3
  55. data/rust-vendor/zerocopy/Cargo.toml +178 -4
  56. data/rust-vendor/zerocopy/Cargo.toml.orig +5 -5
  57. data/rust-vendor/zerocopy/benches/formats/coco_dynamic_padding.rs +24 -0
  58. data/rust-vendor/zerocopy/benches/formats/coco_dynamic_size.rs +23 -0
  59. data/rust-vendor/zerocopy/benches/formats/coco_static_size.rs +23 -0
  60. data/rust-vendor/zerocopy/benches/read_from_bytes.rs +7 -0
  61. data/rust-vendor/zerocopy/benches/read_from_bytes.x86-64 +15 -0
  62. data/rust-vendor/zerocopy/benches/read_from_bytes.x86-64.mca +65 -0
  63. data/rust-vendor/zerocopy/benches/read_from_prefix.rs +10 -0
  64. data/rust-vendor/zerocopy/benches/read_from_prefix.x86-64 +14 -0
  65. data/rust-vendor/zerocopy/benches/read_from_prefix.x86-64.mca +63 -0
  66. data/rust-vendor/zerocopy/benches/read_from_suffix.rs +10 -0
  67. data/rust-vendor/zerocopy/benches/read_from_suffix.x86-64 +15 -0
  68. data/rust-vendor/zerocopy/benches/read_from_suffix.x86-64.mca +65 -0
  69. data/rust-vendor/zerocopy/benches/ref_from_bytes_dynamic_padding.rs +7 -0
  70. data/rust-vendor/zerocopy/benches/ref_from_bytes_dynamic_padding.x86-64 +22 -0
  71. data/rust-vendor/zerocopy/benches/ref_from_bytes_dynamic_padding.x86-64.mca +77 -0
  72. data/rust-vendor/zerocopy/benches/ref_from_bytes_dynamic_size.rs +7 -0
  73. data/rust-vendor/zerocopy/benches/ref_from_bytes_dynamic_size.x86-64 +20 -0
  74. data/rust-vendor/zerocopy/benches/ref_from_bytes_dynamic_size.x86-64.mca +75 -0
  75. data/rust-vendor/zerocopy/benches/ref_from_bytes_static_size.rs +7 -0
  76. data/rust-vendor/zerocopy/benches/ref_from_bytes_static_size.x86-64 +8 -0
  77. data/rust-vendor/zerocopy/benches/ref_from_bytes_static_size.x86-64.mca +53 -0
  78. data/rust-vendor/zerocopy/benches/ref_from_bytes_with_elems_dynamic_padding.rs +10 -0
  79. data/rust-vendor/zerocopy/benches/ref_from_bytes_with_elems_dynamic_padding.x86-64 +30 -0
  80. data/rust-vendor/zerocopy/benches/ref_from_bytes_with_elems_dynamic_padding.x86-64.mca +95 -0
  81. data/rust-vendor/zerocopy/benches/ref_from_bytes_with_elems_dynamic_size.rs +10 -0
  82. data/rust-vendor/zerocopy/benches/ref_from_bytes_with_elems_dynamic_size.x86-64 +16 -0
  83. data/rust-vendor/zerocopy/benches/ref_from_bytes_with_elems_dynamic_size.x86-64.mca +65 -0
  84. data/rust-vendor/zerocopy/benches/ref_from_prefix_dynamic_padding.rs +10 -0
  85. data/rust-vendor/zerocopy/benches/ref_from_prefix_dynamic_padding.x86-64 +22 -0
  86. data/rust-vendor/zerocopy/benches/ref_from_prefix_dynamic_padding.x86-64.mca +77 -0
  87. data/rust-vendor/zerocopy/benches/ref_from_prefix_dynamic_size.rs +10 -0
  88. data/rust-vendor/zerocopy/benches/ref_from_prefix_dynamic_size.x86-64 +17 -0
  89. data/rust-vendor/zerocopy/benches/ref_from_prefix_dynamic_size.x86-64.mca +67 -0
  90. data/rust-vendor/zerocopy/benches/ref_from_prefix_static_size.rs +10 -0
  91. data/rust-vendor/zerocopy/benches/ref_from_prefix_static_size.x86-64 +8 -0
  92. data/rust-vendor/zerocopy/benches/ref_from_prefix_static_size.x86-64.mca +53 -0
  93. data/rust-vendor/zerocopy/benches/ref_from_prefix_with_elems_dynamic_padding.rs +13 -0
  94. data/rust-vendor/zerocopy/benches/ref_from_prefix_with_elems_dynamic_padding.x86-64 +35 -0
  95. data/rust-vendor/zerocopy/benches/ref_from_prefix_with_elems_dynamic_padding.x86-64.mca +101 -0
  96. data/rust-vendor/zerocopy/benches/ref_from_prefix_with_elems_dynamic_size.rs +13 -0
  97. data/rust-vendor/zerocopy/benches/ref_from_prefix_with_elems_dynamic_size.x86-64 +22 -0
  98. data/rust-vendor/zerocopy/benches/ref_from_prefix_with_elems_dynamic_size.x86-64.mca +77 -0
  99. data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_padding.rs +10 -0
  100. data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_padding.x86-64 +23 -0
  101. data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_padding.x86-64.mca +79 -0
  102. data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_size.rs +10 -0
  103. data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_size.x86-64 +13 -0
  104. data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_size.x86-64.mca +63 -0
  105. data/rust-vendor/zerocopy/benches/ref_from_suffix_static_size.rs +10 -0
  106. data/rust-vendor/zerocopy/benches/ref_from_suffix_static_size.x86-64 +13 -0
  107. data/rust-vendor/zerocopy/benches/ref_from_suffix_static_size.x86-64.mca +61 -0
  108. data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_padding.rs +13 -0
  109. data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_padding.x86-64 +34 -0
  110. data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_padding.x86-64.mca +99 -0
  111. data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_size.rs +13 -0
  112. data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_size.x86-64 +23 -0
  113. data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_size.x86-64.mca +77 -0
  114. data/rust-vendor/zerocopy/benches/transmute.rs +16 -0
  115. data/rust-vendor/zerocopy/benches/transmute.x86-64 +3 -0
  116. data/rust-vendor/zerocopy/benches/transmute.x86-64.mca +43 -0
  117. data/rust-vendor/zerocopy/benches/transmute_ref_dynamic_size.rs +16 -0
  118. data/rust-vendor/zerocopy/benches/transmute_ref_dynamic_size.x86-64 +4 -0
  119. data/rust-vendor/zerocopy/benches/transmute_ref_dynamic_size.x86-64.mca +45 -0
  120. data/rust-vendor/zerocopy/benches/transmute_ref_static_size.rs +15 -0
  121. data/rust-vendor/zerocopy/benches/transmute_ref_static_size.x86-64 +3 -0
  122. data/rust-vendor/zerocopy/benches/transmute_ref_static_size.x86-64.mca +43 -0
  123. data/rust-vendor/zerocopy/benches/try_read_from_bytes.rs +7 -0
  124. data/rust-vendor/zerocopy/benches/try_read_from_bytes.x86-64 +23 -0
  125. data/rust-vendor/zerocopy/benches/try_read_from_bytes.x86-64.mca +79 -0
  126. data/rust-vendor/zerocopy/benches/try_read_from_prefix.rs +10 -0
  127. data/rust-vendor/zerocopy/benches/try_read_from_prefix.x86-64 +16 -0
  128. data/rust-vendor/zerocopy/benches/try_read_from_prefix.x86-64.mca +67 -0
  129. data/rust-vendor/zerocopy/benches/try_read_from_suffix.rs +10 -0
  130. data/rust-vendor/zerocopy/benches/try_read_from_suffix.x86-64 +18 -0
  131. data/rust-vendor/zerocopy/benches/try_read_from_suffix.x86-64.mca +71 -0
  132. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_dynamic_padding.rs +7 -0
  133. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_dynamic_padding.x86-64 +24 -0
  134. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_dynamic_padding.x86-64.mca +81 -0
  135. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_dynamic_size.rs +7 -0
  136. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_dynamic_size.x86-64 +22 -0
  137. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_dynamic_size.x86-64.mca +79 -0
  138. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_static_size.rs +7 -0
  139. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_static_size.x86-64 +13 -0
  140. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_static_size.x86-64.mca +59 -0
  141. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_with_elems_dynamic_padding.rs +10 -0
  142. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_with_elems_dynamic_padding.x86-64 +36 -0
  143. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_with_elems_dynamic_padding.x86-64.mca +105 -0
  144. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_with_elems_dynamic_size.rs +10 -0
  145. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_with_elems_dynamic_size.x86-64 +18 -0
  146. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_with_elems_dynamic_size.x86-64.mca +69 -0
  147. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_dynamic_padding.rs +10 -0
  148. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_dynamic_padding.x86-64 +29 -0
  149. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_dynamic_padding.x86-64.mca +91 -0
  150. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_dynamic_size.rs +10 -0
  151. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_dynamic_size.x86-64 +22 -0
  152. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_dynamic_size.x86-64.mca +77 -0
  153. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_static_size.rs +10 -0
  154. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_static_size.x86-64 +15 -0
  155. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_static_size.x86-64.mca +63 -0
  156. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_with_elems_dynamic_padding.rs +13 -0
  157. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_with_elems_dynamic_padding.x86-64 +35 -0
  158. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_with_elems_dynamic_padding.x86-64.mca +101 -0
  159. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_with_elems_dynamic_size.rs +13 -0
  160. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_with_elems_dynamic_size.x86-64 +26 -0
  161. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_with_elems_dynamic_size.x86-64.mca +83 -0
  162. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_dynamic_padding.rs +10 -0
  163. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_dynamic_padding.x86-64 +26 -0
  164. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_dynamic_padding.x86-64.mca +85 -0
  165. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_dynamic_size.rs +10 -0
  166. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_dynamic_size.x86-64 +18 -0
  167. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_dynamic_size.x86-64.mca +71 -0
  168. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_static_size.rs +10 -0
  169. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_static_size.x86-64 +16 -0
  170. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_static_size.x86-64.mca +67 -0
  171. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_with_elems_dynamic_padding.rs +13 -0
  172. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_with_elems_dynamic_padding.x86-64 +39 -0
  173. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_with_elems_dynamic_padding.x86-64.mca +109 -0
  174. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_with_elems_dynamic_size.rs +13 -0
  175. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_with_elems_dynamic_size.x86-64 +28 -0
  176. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_with_elems_dynamic_size.x86-64.mca +87 -0
  177. data/rust-vendor/zerocopy/benches/try_transmute.rs +16 -0
  178. data/rust-vendor/zerocopy/benches/try_transmute.x86-64 +9 -0
  179. data/rust-vendor/zerocopy/benches/try_transmute.x86-64.mca +55 -0
  180. data/rust-vendor/zerocopy/benches/try_transmute_ref_dynamic_size.rs +18 -0
  181. data/rust-vendor/zerocopy/benches/try_transmute_ref_dynamic_size.x86-64 +6 -0
  182. data/rust-vendor/zerocopy/benches/try_transmute_ref_dynamic_size.x86-64.mca +49 -0
  183. data/rust-vendor/zerocopy/benches/try_transmute_ref_static_size.rs +17 -0
  184. data/rust-vendor/zerocopy/benches/try_transmute_ref_static_size.x86-64 +5 -0
  185. data/rust-vendor/zerocopy/benches/try_transmute_ref_static_size.x86-64.mca +47 -0
  186. data/rust-vendor/zerocopy/rustdoc/style.css +55 -0
  187. data/rust-vendor/zerocopy/src/lib.rs +331 -0
  188. data/rust-vendor/zerocopy/src/macros.rs +48 -1
  189. data/rust-vendor/zerocopy/src/util/macros.rs +199 -0
  190. data/rust-vendor/zerocopy/tests/codegen.rs +111 -0
  191. data/rust-vendor/zerocopy-derive/.cargo-checksum.json +1 -1
  192. data/rust-vendor/zerocopy-derive/.cargo_vcs_info.json +1 -1
  193. data/rust-vendor/zerocopy-derive/Cargo.lock +1 -1
  194. data/rust-vendor/zerocopy-derive/Cargo.toml +1 -1
  195. data/rust-vendor/zerocopy-derive/Cargo.toml.orig +1 -1
  196. metadata +138 -2
@@ -0,0 +1,77 @@
1
+ Iterations: 100
2
+ Instructions: 1900
3
+ Total Cycles: 608
4
+ Total uOps: 2000
5
+
6
+ Dispatch Width: 4
7
+ uOps Per Cycle: 3.29
8
+ IPC: 3.13
9
+ Block RThroughput: 5.0
10
+
11
+
12
+ Instruction Info:
13
+ [1]: #uOps
14
+ [2]: Latency
15
+ [3]: RThroughput
16
+ [4]: MayLoad
17
+ [5]: MayStore
18
+ [6]: HasSideEffects (U)
19
+
20
+ [1] [2] [3] [4] [5] [6] Instructions:
21
+ 1 0 0.25 xor edx, edx
22
+ 1 1 0.33 mov eax, 0
23
+ 1 1 0.33 test dil, 3
24
+ 1 1 1.00 je .LBB5_1
25
+ 1 1 1.00 U ret
26
+ 1 1 0.33 movabs rax, 9223372036854775804
27
+ 1 1 0.33 and rsi, rax
28
+ 1 1 0.33 cmp rsi, 9
29
+ 1 1 1.00 jae .LBB5_3
30
+ 1 1 0.33 mov edx, 1
31
+ 1 0 0.25 xor eax, eax
32
+ 1 1 1.00 U ret
33
+ 1 1 0.33 add rsi, -9
34
+ 1 1 0.33 movabs rcx, -6148914691236517205
35
+ 1 1 0.33 mov rax, rsi
36
+ 2 4 1.00 mul rcx
37
+ 1 1 0.50 shr rdx
38
+ 1 1 0.33 mov rax, rdi
39
+ 1 1 1.00 U ret
40
+
41
+
42
+ Resources:
43
+ [0] - SBDivider
44
+ [1] - SBFPDivider
45
+ [2] - SBPort0
46
+ [3] - SBPort1
47
+ [4] - SBPort4
48
+ [5] - SBPort5
49
+ [6.0] - SBPort23
50
+ [6.1] - SBPort23
51
+
52
+
53
+ Resource pressure per iteration:
54
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1]
55
+ - - 6.00 6.00 - 6.00 - -
56
+
57
+ Resource pressure by instruction:
58
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
59
+ - - - - - - - - xor edx, edx
60
+ - - 0.01 0.98 - 0.01 - - mov eax, 0
61
+ - - 0.98 0.01 - 0.01 - - test dil, 3
62
+ - - - - - 1.00 - - je .LBB5_1
63
+ - - - - - 1.00 - - ret
64
+ - - 0.01 0.99 - - - - movabs rax, 9223372036854775804
65
+ - - - 1.00 - - - - and rsi, rax
66
+ - - - 1.00 - - - - cmp rsi, 9
67
+ - - - - - 1.00 - - jae .LBB5_3
68
+ - - 1.00 - - - - - mov edx, 1
69
+ - - - - - - - - xor eax, eax
70
+ - - - - - 1.00 - - ret
71
+ - - 0.02 0.02 - 0.96 - - add rsi, -9
72
+ - - 0.99 0.01 - - - - movabs rcx, -6148914691236517205
73
+ - - 0.01 0.99 - - - - mov rax, rsi
74
+ - - 1.00 1.00 - - - - mul rcx
75
+ - - 1.00 - - - - - shr rdx
76
+ - - 0.98 - - 0.02 - - mov rax, rdi
77
+ - - - - - 1.00 - - ret
@@ -0,0 +1,10 @@
1
+ #[path = "formats/coco_dynamic_size.rs"]
2
+ mod format;
3
+
4
+ #[unsafe(no_mangle)]
5
+ fn bench_ref_from_prefix_dynamic_size(source: &[u8]) -> Option<&format::LocoPacket> {
6
+ match zerocopy::FromBytes::ref_from_prefix(source) {
7
+ Ok((packet, _rest)) => Some(packet),
8
+ _ => None,
9
+ }
10
+ }
@@ -0,0 +1,17 @@
1
+ bench_ref_from_prefix_dynamic_size:
2
+ xor edx, edx
3
+ mov eax, 0
4
+ test dil, 1
5
+ jne .LBB5_4
6
+ cmp rsi, 4
7
+ jae .LBB5_3
8
+ mov edx, 1
9
+ xor eax, eax
10
+ ret
11
+ .LBB5_3:
12
+ add rsi, -4
13
+ shr rsi
14
+ mov rdx, rsi
15
+ mov rax, rdi
16
+ .LBB5_4:
17
+ ret
@@ -0,0 +1,67 @@
1
+ Iterations: 100
2
+ Instructions: 1400
3
+ Total Cycles: 405
4
+ Total uOps: 1400
5
+
6
+ Dispatch Width: 4
7
+ uOps Per Cycle: 3.46
8
+ IPC: 3.46
9
+ Block RThroughput: 4.0
10
+
11
+
12
+ Instruction Info:
13
+ [1]: #uOps
14
+ [2]: Latency
15
+ [3]: RThroughput
16
+ [4]: MayLoad
17
+ [5]: MayStore
18
+ [6]: HasSideEffects (U)
19
+
20
+ [1] [2] [3] [4] [5] [6] Instructions:
21
+ 1 0 0.25 xor edx, edx
22
+ 1 1 0.33 mov eax, 0
23
+ 1 1 0.33 test dil, 1
24
+ 1 1 1.00 jne .LBB5_4
25
+ 1 1 0.33 cmp rsi, 4
26
+ 1 1 1.00 jae .LBB5_3
27
+ 1 1 0.33 mov edx, 1
28
+ 1 0 0.25 xor eax, eax
29
+ 1 1 1.00 U ret
30
+ 1 1 0.33 add rsi, -4
31
+ 1 1 0.50 shr rsi
32
+ 1 1 0.33 mov rdx, rsi
33
+ 1 1 0.33 mov rax, rdi
34
+ 1 1 1.00 U ret
35
+
36
+
37
+ Resources:
38
+ [0] - SBDivider
39
+ [1] - SBFPDivider
40
+ [2] - SBPort0
41
+ [3] - SBPort1
42
+ [4] - SBPort4
43
+ [5] - SBPort5
44
+ [6.0] - SBPort23
45
+ [6.1] - SBPort23
46
+
47
+
48
+ Resource pressure per iteration:
49
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1]
50
+ - - 3.99 3.99 - 4.02 - -
51
+
52
+ Resource pressure by instruction:
53
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
54
+ - - - - - - - - xor edx, edx
55
+ - - 0.01 0.98 - 0.01 - - mov eax, 0
56
+ - - 0.98 0.02 - - - - test dil, 1
57
+ - - - - - 1.00 - - jne .LBB5_4
58
+ - - 0.02 0.98 - - - - cmp rsi, 4
59
+ - - - - - 1.00 - - jae .LBB5_3
60
+ - - 0.98 0.01 - 0.01 - - mov edx, 1
61
+ - - - - - - - - xor eax, eax
62
+ - - - - - 1.00 - - ret
63
+ - - 0.01 0.99 - - - - add rsi, -4
64
+ - - 1.00 - - - - - shr rsi
65
+ - - - 1.00 - - - - mov rdx, rsi
66
+ - - 0.99 0.01 - - - - mov rax, rdi
67
+ - - - - - 1.00 - - ret
@@ -0,0 +1,10 @@
1
+ #[path = "formats/coco_static_size.rs"]
2
+ mod format;
3
+
4
+ #[unsafe(no_mangle)]
5
+ fn bench_ref_from_prefix_static_size(source: &[u8]) -> Option<&format::LocoPacket> {
6
+ match zerocopy::FromBytes::ref_from_prefix(source) {
7
+ Ok((packet, _rest)) => Some(packet),
8
+ _ => None,
9
+ }
10
+ }
@@ -0,0 +1,8 @@
1
+ bench_ref_from_prefix_static_size:
2
+ xor eax, eax
3
+ cmp rsi, 6
4
+ mov rcx, rdi
5
+ cmovb rcx, rax
6
+ test dil, 1
7
+ cmove rax, rcx
8
+ ret
@@ -0,0 +1,53 @@
1
+ Iterations: 100
2
+ Instructions: 700
3
+ Total Cycles: 274
4
+ Total uOps: 900
5
+
6
+ Dispatch Width: 4
7
+ uOps Per Cycle: 3.28
8
+ IPC: 2.55
9
+ Block RThroughput: 2.3
10
+
11
+
12
+ Instruction Info:
13
+ [1]: #uOps
14
+ [2]: Latency
15
+ [3]: RThroughput
16
+ [4]: MayLoad
17
+ [5]: MayStore
18
+ [6]: HasSideEffects (U)
19
+
20
+ [1] [2] [3] [4] [5] [6] Instructions:
21
+ 1 0 0.25 xor eax, eax
22
+ 1 1 0.33 cmp rsi, 6
23
+ 1 1 0.33 mov rcx, rdi
24
+ 2 2 0.67 cmovb rcx, rax
25
+ 1 1 0.33 test dil, 1
26
+ 2 2 0.67 cmove rax, rcx
27
+ 1 1 1.00 U ret
28
+
29
+
30
+ Resources:
31
+ [0] - SBDivider
32
+ [1] - SBFPDivider
33
+ [2] - SBPort0
34
+ [3] - SBPort1
35
+ [4] - SBPort4
36
+ [5] - SBPort5
37
+ [6.0] - SBPort23
38
+ [6.1] - SBPort23
39
+
40
+
41
+ Resource pressure per iteration:
42
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1]
43
+ - - 2.66 2.67 - 2.67 - -
44
+
45
+ Resource pressure by instruction:
46
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
47
+ - - - - - - - - xor eax, eax
48
+ - - - 0.01 - 0.99 - - cmp rsi, 6
49
+ - - 0.01 0.67 - 0.32 - - mov rcx, rdi
50
+ - - 1.00 0.99 - 0.01 - - cmovb rcx, rax
51
+ - - 0.66 0.01 - 0.33 - - test dil, 1
52
+ - - 0.99 0.99 - 0.02 - - cmove rax, rcx
53
+ - - - - - 1.00 - - ret
@@ -0,0 +1,13 @@
1
+ #[path = "formats/coco_dynamic_padding.rs"]
2
+ mod format;
3
+
4
+ #[unsafe(no_mangle)]
5
+ fn bench_ref_from_prefix_with_elems_dynamic_padding(
6
+ source: &[u8],
7
+ count: usize,
8
+ ) -> Option<&format::LocoPacket> {
9
+ match zerocopy::FromBytes::ref_from_prefix_with_elems(source, count) {
10
+ Ok((packet, _rest)) => Some(packet),
11
+ _ => None,
12
+ }
13
+ }
@@ -0,0 +1,35 @@
1
+ bench_ref_from_prefix_with_elems_dynamic_padding:
2
+ mov rcx, rdx
3
+ mov edx, 3
4
+ mov rax, rcx
5
+ mul rdx
6
+ mov edx, 1
7
+ jo .LBB5_5
8
+ cmp rax, -10
9
+ ja .LBB5_5
10
+ lea r8, [rax + 9]
11
+ not eax
12
+ and eax, 3
13
+ add rax, r8
14
+ jae .LBB5_3
15
+ .LBB5_5:
16
+ xor r8d, r8d
17
+ mov rax, r8
18
+ ret
19
+ .LBB5_3:
20
+ xor edx, edx
21
+ mov r8d, 0
22
+ test dil, 3
23
+ je .LBB5_4
24
+ mov rax, r8
25
+ ret
26
+ .LBB5_4:
27
+ xor edx, edx
28
+ cmp rax, rsi
29
+ mov eax, 1
30
+ cmova rcx, rax
31
+ cmova rdi, rdx
32
+ mov rdx, rcx
33
+ mov r8, rdi
34
+ mov rax, r8
35
+ ret
@@ -0,0 +1,101 @@
1
+ Iterations: 100
2
+ Instructions: 3100
3
+ Total Cycles: 1110
4
+ Total uOps: 3600
5
+
6
+ Dispatch Width: 4
7
+ uOps Per Cycle: 3.24
8
+ IPC: 2.79
9
+ Block RThroughput: 9.0
10
+
11
+
12
+ Instruction Info:
13
+ [1]: #uOps
14
+ [2]: Latency
15
+ [3]: RThroughput
16
+ [4]: MayLoad
17
+ [5]: MayStore
18
+ [6]: HasSideEffects (U)
19
+
20
+ [1] [2] [3] [4] [5] [6] Instructions:
21
+ 1 1 0.33 mov rcx, rdx
22
+ 1 1 0.33 mov edx, 3
23
+ 1 1 0.33 mov rax, rcx
24
+ 2 4 1.00 mul rdx
25
+ 1 1 0.33 mov edx, 1
26
+ 1 1 1.00 jo .LBB5_5
27
+ 1 1 0.33 cmp rax, -10
28
+ 1 1 1.00 ja .LBB5_5
29
+ 1 1 0.50 lea r8, [rax + 9]
30
+ 1 1 0.33 not eax
31
+ 1 1 0.33 and eax, 3
32
+ 1 1 0.33 add rax, r8
33
+ 1 1 1.00 jae .LBB5_3
34
+ 1 0 0.25 xor r8d, r8d
35
+ 1 1 0.33 mov rax, r8
36
+ 1 1 1.00 U ret
37
+ 1 0 0.25 xor edx, edx
38
+ 1 1 0.33 mov r8d, 0
39
+ 1 1 0.33 test dil, 3
40
+ 1 1 1.00 je .LBB5_4
41
+ 1 1 0.33 mov rax, r8
42
+ 1 1 1.00 U ret
43
+ 1 0 0.25 xor edx, edx
44
+ 1 1 0.33 cmp rax, rsi
45
+ 1 1 0.33 mov eax, 1
46
+ 3 3 1.00 cmova rcx, rax
47
+ 3 3 1.00 cmova rdi, rdx
48
+ 1 1 0.33 mov rdx, rcx
49
+ 1 1 0.33 mov r8, rdi
50
+ 1 1 0.33 mov rax, r8
51
+ 1 1 1.00 U ret
52
+
53
+
54
+ Resources:
55
+ [0] - SBDivider
56
+ [1] - SBFPDivider
57
+ [2] - SBPort0
58
+ [3] - SBPort1
59
+ [4] - SBPort4
60
+ [5] - SBPort5
61
+ [6.0] - SBPort23
62
+ [6.1] - SBPort23
63
+
64
+
65
+ Resource pressure per iteration:
66
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1]
67
+ - - 11.01 10.98 - 11.01 - -
68
+
69
+ Resource pressure by instruction:
70
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
71
+ - - 0.48 0.50 - 0.02 - - mov rcx, rdx
72
+ - - 0.02 0.98 - - - - mov edx, 3
73
+ - - 0.51 0.48 - 0.01 - - mov rax, rcx
74
+ - - 1.00 1.00 - - - - mul rdx
75
+ - - 0.49 0.50 - 0.01 - - mov edx, 1
76
+ - - - - - 1.00 - - jo .LBB5_5
77
+ - - 0.98 0.02 - - - - cmp rax, -10
78
+ - - - - - 1.00 - - ja .LBB5_5
79
+ - - 0.02 0.98 - - - - lea r8, [rax + 9]
80
+ - - 0.98 0.02 - - - - not eax
81
+ - - 0.99 0.01 - - - - and eax, 3
82
+ - - 0.98 0.01 - 0.01 - - add rax, r8
83
+ - - - - - 1.00 - - jae .LBB5_3
84
+ - - - - - - - - xor r8d, r8d
85
+ - - 0.01 0.98 - 0.01 - - mov rax, r8
86
+ - - - - - 1.00 - - ret
87
+ - - - - - - - - xor edx, edx
88
+ - - 0.48 0.52 - - - - mov r8d, 0
89
+ - - 0.02 0.97 - 0.01 - - test dil, 3
90
+ - - - - - 1.00 - - je .LBB5_4
91
+ - - 0.49 0.50 - 0.01 - - mov rax, r8
92
+ - - - - - 1.00 - - ret
93
+ - - - - - - - - xor edx, edx
94
+ - - 0.51 0.49 - - - - cmp rax, rsi
95
+ - - - 1.00 - - - - mov eax, 1
96
+ - - 1.04 0.97 - 0.99 - - cmova rcx, rax
97
+ - - 0.98 0.53 - 1.49 - - cmova rdi, rdx
98
+ - - 0.50 0.50 - - - - mov rdx, rcx
99
+ - - 0.51 0.01 - 0.48 - - mov r8, rdi
100
+ - - 0.02 0.01 - 0.97 - - mov rax, r8
101
+ - - - - - 1.00 - - ret
@@ -0,0 +1,13 @@
1
+ #[path = "formats/coco_dynamic_size.rs"]
2
+ mod format;
3
+
4
+ #[unsafe(no_mangle)]
5
+ fn bench_ref_from_prefix_with_elems_dynamic_size(
6
+ source: &[u8],
7
+ count: usize,
8
+ ) -> Option<&format::LocoPacket> {
9
+ match zerocopy::FromBytes::ref_from_prefix_with_elems(source, count) {
10
+ Ok((packet, _rest)) => Some(packet),
11
+ _ => None,
12
+ }
13
+ }
@@ -0,0 +1,22 @@
1
+ bench_ref_from_prefix_with_elems_dynamic_size:
2
+ movabs rax, 9223372036854775805
3
+ cmp rdx, rax
4
+ ja .LBB5_1
5
+ mov rcx, rdx
6
+ xor edx, edx
7
+ mov eax, 0
8
+ test dil, 1
9
+ jne .LBB5_4
10
+ lea rax, [2*rcx + 4]
11
+ xor r8d, r8d
12
+ cmp rax, rsi
13
+ mov edx, 1
14
+ cmovbe rdx, rcx
15
+ cmova rdi, r8
16
+ mov rax, rdi
17
+ .LBB5_4:
18
+ ret
19
+ .LBB5_1:
20
+ mov edx, 1
21
+ xor eax, eax
22
+ ret
@@ -0,0 +1,77 @@
1
+ Iterations: 100
2
+ Instructions: 1900
3
+ Total Cycles: 672
4
+ Total uOps: 2300
5
+
6
+ Dispatch Width: 4
7
+ uOps Per Cycle: 3.42
8
+ IPC: 2.83
9
+ Block RThroughput: 5.8
10
+
11
+
12
+ Instruction Info:
13
+ [1]: #uOps
14
+ [2]: Latency
15
+ [3]: RThroughput
16
+ [4]: MayLoad
17
+ [5]: MayStore
18
+ [6]: HasSideEffects (U)
19
+
20
+ [1] [2] [3] [4] [5] [6] Instructions:
21
+ 1 1 0.33 movabs rax, 9223372036854775805
22
+ 1 1 0.33 cmp rdx, rax
23
+ 1 1 1.00 ja .LBB5_1
24
+ 1 1 0.33 mov rcx, rdx
25
+ 1 0 0.25 xor edx, edx
26
+ 1 1 0.33 mov eax, 0
27
+ 1 1 0.33 test dil, 1
28
+ 1 1 1.00 jne .LBB5_4
29
+ 1 1 0.50 lea rax, [2*rcx + 4]
30
+ 1 0 0.25 xor r8d, r8d
31
+ 1 1 0.33 cmp rax, rsi
32
+ 1 1 0.33 mov edx, 1
33
+ 3 3 1.00 cmovbe rdx, rcx
34
+ 3 3 1.00 cmova rdi, r8
35
+ 1 1 0.33 mov rax, rdi
36
+ 1 1 1.00 U ret
37
+ 1 1 0.33 mov edx, 1
38
+ 1 0 0.25 xor eax, eax
39
+ 1 1 1.00 U ret
40
+
41
+
42
+ Resources:
43
+ [0] - SBDivider
44
+ [1] - SBFPDivider
45
+ [2] - SBPort0
46
+ [3] - SBPort1
47
+ [4] - SBPort4
48
+ [5] - SBPort5
49
+ [6.0] - SBPort23
50
+ [6.1] - SBPort23
51
+
52
+
53
+ Resource pressure per iteration:
54
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1]
55
+ - - 6.66 6.66 - 6.68 - -
56
+
57
+ Resource pressure by instruction:
58
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
59
+ - - - 0.99 - 0.01 - - movabs rax, 9223372036854775805
60
+ - - 0.37 0.63 - - - - cmp rdx, rax
61
+ - - - - - 1.00 - - ja .LBB5_1
62
+ - - 0.63 0.37 - - - - mov rcx, rdx
63
+ - - - - - - - - xor edx, edx
64
+ - - 0.01 0.98 - 0.01 - - mov eax, 0
65
+ - - 0.98 0.02 - - - - test dil, 1
66
+ - - - - - 1.00 - - jne .LBB5_4
67
+ - - 0.01 0.99 - - - - lea rax, [2*rcx + 4]
68
+ - - - - - - - - xor r8d, r8d
69
+ - - 1.00 - - - - - cmp rax, rsi
70
+ - - - 0.67 - 0.33 - - mov edx, 1
71
+ - - 0.73 0.98 - 1.29 - - cmovbe rdx, rcx
72
+ - - 1.60 0.36 - 1.04 - - cmova rdi, r8
73
+ - - 0.99 0.01 - - - - mov rax, rdi
74
+ - - - - - 1.00 - - ret
75
+ - - 0.34 0.66 - - - - mov edx, 1
76
+ - - - - - - - - xor eax, eax
77
+ - - - - - 1.00 - - ret
@@ -0,0 +1,10 @@
1
+ #[path = "formats/coco_dynamic_padding.rs"]
2
+ mod format;
3
+
4
+ #[unsafe(no_mangle)]
5
+ fn bench_ref_from_suffix_dynamic_padding(source: &[u8]) -> Option<&format::LocoPacket> {
6
+ match zerocopy::FromBytes::ref_from_suffix(source) {
7
+ Ok((_rest, packet)) => Some(packet),
8
+ _ => None,
9
+ }
10
+ }
@@ -0,0 +1,23 @@
1
+ bench_ref_from_suffix_dynamic_padding:
2
+ lea eax, [rsi + rdi]
3
+ test al, 3
4
+ jne .LBB5_1
5
+ movabs rax, 9223372036854775804
6
+ and rax, rsi
7
+ cmp rax, 9
8
+ jae .LBB5_3
9
+ .LBB5_1:
10
+ xor eax, eax
11
+ ret
12
+ .LBB5_3:
13
+ add rax, -9
14
+ movabs rcx, -6148914691236517205
15
+ mul rcx
16
+ shr rdx
17
+ lea rax, [rdx + 2*rdx]
18
+ sub rsi, rax
19
+ or rax, -4
20
+ add rsi, rdi
21
+ add rax, rsi
22
+ add rax, -8
23
+ ret
@@ -0,0 +1,79 @@
1
+ Iterations: 100
2
+ Instructions: 2000
3
+ Total Cycles: 682
4
+ Total uOps: 2100
5
+
6
+ Dispatch Width: 4
7
+ uOps Per Cycle: 3.08
8
+ IPC: 2.93
9
+ Block RThroughput: 5.3
10
+
11
+
12
+ Instruction Info:
13
+ [1]: #uOps
14
+ [2]: Latency
15
+ [3]: RThroughput
16
+ [4]: MayLoad
17
+ [5]: MayStore
18
+ [6]: HasSideEffects (U)
19
+
20
+ [1] [2] [3] [4] [5] [6] Instructions:
21
+ 1 1 0.50 lea eax, [rsi + rdi]
22
+ 1 1 0.33 test al, 3
23
+ 1 1 1.00 jne .LBB5_1
24
+ 1 1 0.33 movabs rax, 9223372036854775804
25
+ 1 1 0.33 and rax, rsi
26
+ 1 1 0.33 cmp rax, 9
27
+ 1 1 1.00 jae .LBB5_3
28
+ 1 0 0.25 xor eax, eax
29
+ 1 1 1.00 U ret
30
+ 1 1 0.33 add rax, -9
31
+ 1 1 0.33 movabs rcx, -6148914691236517205
32
+ 2 4 1.00 mul rcx
33
+ 1 1 0.50 shr rdx
34
+ 1 1 0.50 lea rax, [rdx + 2*rdx]
35
+ 1 1 0.33 sub rsi, rax
36
+ 1 1 0.33 or rax, -4
37
+ 1 1 0.33 add rsi, rdi
38
+ 1 1 0.33 add rax, rsi
39
+ 1 1 0.33 add rax, -8
40
+ 1 1 1.00 U ret
41
+
42
+
43
+ Resources:
44
+ [0] - SBDivider
45
+ [1] - SBFPDivider
46
+ [2] - SBPort0
47
+ [3] - SBPort1
48
+ [4] - SBPort4
49
+ [5] - SBPort5
50
+ [6.0] - SBPort23
51
+ [6.1] - SBPort23
52
+
53
+
54
+ Resource pressure per iteration:
55
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1]
56
+ - - 6.65 6.67 - 6.68 - -
57
+
58
+ Resource pressure by instruction:
59
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
60
+ - - 0.90 0.10 - - - - lea eax, [rsi + rdi]
61
+ - - 0.93 - - 0.07 - - test al, 3
62
+ - - - - - 1.00 - - jne .LBB5_1
63
+ - - 0.51 0.47 - 0.02 - - movabs rax, 9223372036854775804
64
+ - - - - - 1.00 - - and rax, rsi
65
+ - - - 0.09 - 0.91 - - cmp rax, 9
66
+ - - - - - 1.00 - - jae .LBB5_3
67
+ - - - - - - - - xor eax, eax
68
+ - - - - - 1.00 - - ret
69
+ - - 0.43 0.47 - 0.10 - - add rax, -9
70
+ - - 0.42 0.39 - 0.19 - - movabs rcx, -6148914691236517205
71
+ - - 1.00 1.00 - - - - mul rcx
72
+ - - 0.69 - - 0.31 - - shr rdx
73
+ - - 0.54 0.46 - - - - lea rax, [rdx + 2*rdx]
74
+ - - 0.07 0.91 - 0.02 - - sub rsi, rax
75
+ - - 0.91 0.05 - 0.04 - - or rax, -4
76
+ - - 0.08 0.90 - 0.02 - - add rsi, rdi
77
+ - - 0.09 0.91 - - - - add rax, rsi
78
+ - - 0.08 0.92 - - - - add rax, -8
79
+ - - - - - 1.00 - - ret
@@ -0,0 +1,10 @@
1
+ #[path = "formats/coco_dynamic_size.rs"]
2
+ mod format;
3
+
4
+ #[unsafe(no_mangle)]
5
+ fn bench_ref_from_suffix_dynamic_size(source: &[u8]) -> Option<&format::LocoPacket> {
6
+ match zerocopy::FromBytes::ref_from_suffix(source) {
7
+ Ok((_rest, packet)) => Some(packet),
8
+ _ => None,
9
+ }
10
+ }
@@ -0,0 +1,13 @@
1
+ bench_ref_from_suffix_dynamic_size:
2
+ mov rdx, rsi
3
+ lea ecx, [rsi + rdi]
4
+ mov eax, edx
5
+ and eax, 1
6
+ add rax, rdi
7
+ xor esi, esi
8
+ sub rdx, 4
9
+ cmovb rax, rsi
10
+ shr rdx
11
+ test cl, 1
12
+ cmovne rax, rsi
13
+ ret