html-to-markdown 2.28.0 → 2.28.2

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (196) hide show
  1. checksums.yaml +4 -4
  2. data/Gemfile.lock +6 -6
  3. data/README.md +5 -1
  4. data/ext/html-to-markdown-rb/native/Cargo.lock +1694 -0
  5. data/ext/html-to-markdown-rb/native/Cargo.toml +1 -1
  6. data/lib/html_to_markdown/version.rb +1 -1
  7. data/rust-vendor/html-to-markdown-rs/Cargo.toml +1 -1
  8. data/rust-vendor/html-to-markdown-rs/src/converter/text_node.rs +1 -0
  9. data/rust-vendor/html-to-markdown-rs/src/converter/utility/content.rs +17 -0
  10. data/rust-vendor/html-to-markdown-rs/src/converter/visitor_hooks.rs +8 -5
  11. data/rust-vendor/html-to-markdown-rs/tests/test_issue_218.rs +56 -0
  12. data/rust-vendor/libc/.cargo-checksum.json +1 -1
  13. data/rust-vendor/libc/.cargo_vcs_info.json +1 -1
  14. data/rust-vendor/libc/CHANGELOG.md +19 -0
  15. data/rust-vendor/libc/Cargo.lock +1 -1
  16. data/rust-vendor/libc/Cargo.toml +1 -1
  17. data/rust-vendor/libc/Cargo.toml.orig +1 -1
  18. data/rust-vendor/libc/build.rs +3 -3
  19. data/rust-vendor/libc/src/fuchsia/mod.rs +2 -0
  20. data/rust-vendor/libc/src/hermit.rs +1 -0
  21. data/rust-vendor/libc/src/lib.rs +1 -0
  22. data/rust-vendor/libc/src/new/linux_uapi/linux/mod.rs +1 -0
  23. data/rust-vendor/libc/src/new/linux_uapi/linux/pidfd.rs +59 -0
  24. data/rust-vendor/libc/src/new/mod.rs +3 -0
  25. data/rust-vendor/libc/src/new/netbsd/sys/file.rs +16 -0
  26. data/rust-vendor/libc/src/new/netbsd/sys/mod.rs +2 -0
  27. data/rust-vendor/libc/src/new/netbsd/sys/socket.rs +44 -0
  28. data/rust-vendor/libc/src/new/qurt/mod.rs +2 -0
  29. data/rust-vendor/libc/src/solid/mod.rs +1 -0
  30. data/rust-vendor/libc/src/switch.rs +1 -0
  31. data/rust-vendor/libc/src/teeos/mod.rs +2 -0
  32. data/rust-vendor/libc/src/trusty.rs +1 -0
  33. data/rust-vendor/libc/src/unix/bsd/apple/b64/mod.rs +1 -0
  34. data/rust-vendor/libc/src/unix/bsd/netbsdlike/netbsd/mod.rs +31 -0
  35. data/rust-vendor/libc/src/unix/bsd/netbsdlike/openbsd/mod.rs +92 -0
  36. data/rust-vendor/libc/src/unix/hurd/mod.rs +1 -0
  37. data/rust-vendor/libc/src/unix/linux_like/linux/gnu/mod.rs +1 -0
  38. data/rust-vendor/libc/src/unix/linux_like/linux/mod.rs +22 -46
  39. data/rust-vendor/libc/src/unix/mod.rs +2 -0
  40. data/rust-vendor/libc/src/unix/newlib/espidf/mod.rs +2 -0
  41. data/rust-vendor/libc/src/unix/redox/mod.rs +2 -2
  42. data/rust-vendor/libc/src/vxworks/mod.rs +46 -0
  43. data/rust-vendor/libc/src/wasi/mod.rs +2 -0
  44. data/rust-vendor/libc/src/windows/mod.rs +2 -0
  45. data/rust-vendor/uuid/.cargo-checksum.json +1 -1
  46. data/rust-vendor/uuid/.cargo_vcs_info.json +1 -1
  47. data/rust-vendor/uuid/Cargo.lock +71 -137
  48. data/rust-vendor/uuid/Cargo.toml +4 -4
  49. data/rust-vendor/uuid/Cargo.toml.orig +4 -4
  50. data/rust-vendor/uuid/README.md +3 -3
  51. data/rust-vendor/uuid/src/lib.rs +4 -4
  52. data/rust-vendor/zerocopy/.cargo-checksum.json +1 -1
  53. data/rust-vendor/zerocopy/.cargo_vcs_info.json +1 -1
  54. data/rust-vendor/zerocopy/Cargo.lock +3 -3
  55. data/rust-vendor/zerocopy/Cargo.toml +178 -4
  56. data/rust-vendor/zerocopy/Cargo.toml.orig +5 -5
  57. data/rust-vendor/zerocopy/benches/formats/coco_dynamic_padding.rs +24 -0
  58. data/rust-vendor/zerocopy/benches/formats/coco_dynamic_size.rs +23 -0
  59. data/rust-vendor/zerocopy/benches/formats/coco_static_size.rs +23 -0
  60. data/rust-vendor/zerocopy/benches/read_from_bytes.rs +7 -0
  61. data/rust-vendor/zerocopy/benches/read_from_bytes.x86-64 +15 -0
  62. data/rust-vendor/zerocopy/benches/read_from_bytes.x86-64.mca +65 -0
  63. data/rust-vendor/zerocopy/benches/read_from_prefix.rs +10 -0
  64. data/rust-vendor/zerocopy/benches/read_from_prefix.x86-64 +14 -0
  65. data/rust-vendor/zerocopy/benches/read_from_prefix.x86-64.mca +63 -0
  66. data/rust-vendor/zerocopy/benches/read_from_suffix.rs +10 -0
  67. data/rust-vendor/zerocopy/benches/read_from_suffix.x86-64 +15 -0
  68. data/rust-vendor/zerocopy/benches/read_from_suffix.x86-64.mca +65 -0
  69. data/rust-vendor/zerocopy/benches/ref_from_bytes_dynamic_padding.rs +7 -0
  70. data/rust-vendor/zerocopy/benches/ref_from_bytes_dynamic_padding.x86-64 +22 -0
  71. data/rust-vendor/zerocopy/benches/ref_from_bytes_dynamic_padding.x86-64.mca +77 -0
  72. data/rust-vendor/zerocopy/benches/ref_from_bytes_dynamic_size.rs +7 -0
  73. data/rust-vendor/zerocopy/benches/ref_from_bytes_dynamic_size.x86-64 +20 -0
  74. data/rust-vendor/zerocopy/benches/ref_from_bytes_dynamic_size.x86-64.mca +75 -0
  75. data/rust-vendor/zerocopy/benches/ref_from_bytes_static_size.rs +7 -0
  76. data/rust-vendor/zerocopy/benches/ref_from_bytes_static_size.x86-64 +8 -0
  77. data/rust-vendor/zerocopy/benches/ref_from_bytes_static_size.x86-64.mca +53 -0
  78. data/rust-vendor/zerocopy/benches/ref_from_bytes_with_elems_dynamic_padding.rs +10 -0
  79. data/rust-vendor/zerocopy/benches/ref_from_bytes_with_elems_dynamic_padding.x86-64 +30 -0
  80. data/rust-vendor/zerocopy/benches/ref_from_bytes_with_elems_dynamic_padding.x86-64.mca +95 -0
  81. data/rust-vendor/zerocopy/benches/ref_from_bytes_with_elems_dynamic_size.rs +10 -0
  82. data/rust-vendor/zerocopy/benches/ref_from_bytes_with_elems_dynamic_size.x86-64 +16 -0
  83. data/rust-vendor/zerocopy/benches/ref_from_bytes_with_elems_dynamic_size.x86-64.mca +65 -0
  84. data/rust-vendor/zerocopy/benches/ref_from_prefix_dynamic_padding.rs +10 -0
  85. data/rust-vendor/zerocopy/benches/ref_from_prefix_dynamic_padding.x86-64 +22 -0
  86. data/rust-vendor/zerocopy/benches/ref_from_prefix_dynamic_padding.x86-64.mca +77 -0
  87. data/rust-vendor/zerocopy/benches/ref_from_prefix_dynamic_size.rs +10 -0
  88. data/rust-vendor/zerocopy/benches/ref_from_prefix_dynamic_size.x86-64 +17 -0
  89. data/rust-vendor/zerocopy/benches/ref_from_prefix_dynamic_size.x86-64.mca +67 -0
  90. data/rust-vendor/zerocopy/benches/ref_from_prefix_static_size.rs +10 -0
  91. data/rust-vendor/zerocopy/benches/ref_from_prefix_static_size.x86-64 +8 -0
  92. data/rust-vendor/zerocopy/benches/ref_from_prefix_static_size.x86-64.mca +53 -0
  93. data/rust-vendor/zerocopy/benches/ref_from_prefix_with_elems_dynamic_padding.rs +13 -0
  94. data/rust-vendor/zerocopy/benches/ref_from_prefix_with_elems_dynamic_padding.x86-64 +35 -0
  95. data/rust-vendor/zerocopy/benches/ref_from_prefix_with_elems_dynamic_padding.x86-64.mca +101 -0
  96. data/rust-vendor/zerocopy/benches/ref_from_prefix_with_elems_dynamic_size.rs +13 -0
  97. data/rust-vendor/zerocopy/benches/ref_from_prefix_with_elems_dynamic_size.x86-64 +22 -0
  98. data/rust-vendor/zerocopy/benches/ref_from_prefix_with_elems_dynamic_size.x86-64.mca +77 -0
  99. data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_padding.rs +10 -0
  100. data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_padding.x86-64 +23 -0
  101. data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_padding.x86-64.mca +79 -0
  102. data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_size.rs +10 -0
  103. data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_size.x86-64 +13 -0
  104. data/rust-vendor/zerocopy/benches/ref_from_suffix_dynamic_size.x86-64.mca +63 -0
  105. data/rust-vendor/zerocopy/benches/ref_from_suffix_static_size.rs +10 -0
  106. data/rust-vendor/zerocopy/benches/ref_from_suffix_static_size.x86-64 +13 -0
  107. data/rust-vendor/zerocopy/benches/ref_from_suffix_static_size.x86-64.mca +61 -0
  108. data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_padding.rs +13 -0
  109. data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_padding.x86-64 +34 -0
  110. data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_padding.x86-64.mca +99 -0
  111. data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_size.rs +13 -0
  112. data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_size.x86-64 +23 -0
  113. data/rust-vendor/zerocopy/benches/ref_from_suffix_with_elems_dynamic_size.x86-64.mca +77 -0
  114. data/rust-vendor/zerocopy/benches/transmute.rs +16 -0
  115. data/rust-vendor/zerocopy/benches/transmute.x86-64 +3 -0
  116. data/rust-vendor/zerocopy/benches/transmute.x86-64.mca +43 -0
  117. data/rust-vendor/zerocopy/benches/transmute_ref_dynamic_size.rs +16 -0
  118. data/rust-vendor/zerocopy/benches/transmute_ref_dynamic_size.x86-64 +4 -0
  119. data/rust-vendor/zerocopy/benches/transmute_ref_dynamic_size.x86-64.mca +45 -0
  120. data/rust-vendor/zerocopy/benches/transmute_ref_static_size.rs +15 -0
  121. data/rust-vendor/zerocopy/benches/transmute_ref_static_size.x86-64 +3 -0
  122. data/rust-vendor/zerocopy/benches/transmute_ref_static_size.x86-64.mca +43 -0
  123. data/rust-vendor/zerocopy/benches/try_read_from_bytes.rs +7 -0
  124. data/rust-vendor/zerocopy/benches/try_read_from_bytes.x86-64 +23 -0
  125. data/rust-vendor/zerocopy/benches/try_read_from_bytes.x86-64.mca +79 -0
  126. data/rust-vendor/zerocopy/benches/try_read_from_prefix.rs +10 -0
  127. data/rust-vendor/zerocopy/benches/try_read_from_prefix.x86-64 +16 -0
  128. data/rust-vendor/zerocopy/benches/try_read_from_prefix.x86-64.mca +67 -0
  129. data/rust-vendor/zerocopy/benches/try_read_from_suffix.rs +10 -0
  130. data/rust-vendor/zerocopy/benches/try_read_from_suffix.x86-64 +18 -0
  131. data/rust-vendor/zerocopy/benches/try_read_from_suffix.x86-64.mca +71 -0
  132. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_dynamic_padding.rs +7 -0
  133. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_dynamic_padding.x86-64 +24 -0
  134. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_dynamic_padding.x86-64.mca +81 -0
  135. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_dynamic_size.rs +7 -0
  136. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_dynamic_size.x86-64 +22 -0
  137. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_dynamic_size.x86-64.mca +79 -0
  138. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_static_size.rs +7 -0
  139. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_static_size.x86-64 +13 -0
  140. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_static_size.x86-64.mca +59 -0
  141. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_with_elems_dynamic_padding.rs +10 -0
  142. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_with_elems_dynamic_padding.x86-64 +36 -0
  143. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_with_elems_dynamic_padding.x86-64.mca +105 -0
  144. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_with_elems_dynamic_size.rs +10 -0
  145. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_with_elems_dynamic_size.x86-64 +18 -0
  146. data/rust-vendor/zerocopy/benches/try_ref_from_bytes_with_elems_dynamic_size.x86-64.mca +69 -0
  147. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_dynamic_padding.rs +10 -0
  148. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_dynamic_padding.x86-64 +29 -0
  149. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_dynamic_padding.x86-64.mca +91 -0
  150. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_dynamic_size.rs +10 -0
  151. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_dynamic_size.x86-64 +22 -0
  152. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_dynamic_size.x86-64.mca +77 -0
  153. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_static_size.rs +10 -0
  154. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_static_size.x86-64 +15 -0
  155. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_static_size.x86-64.mca +63 -0
  156. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_with_elems_dynamic_padding.rs +13 -0
  157. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_with_elems_dynamic_padding.x86-64 +35 -0
  158. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_with_elems_dynamic_padding.x86-64.mca +101 -0
  159. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_with_elems_dynamic_size.rs +13 -0
  160. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_with_elems_dynamic_size.x86-64 +26 -0
  161. data/rust-vendor/zerocopy/benches/try_ref_from_prefix_with_elems_dynamic_size.x86-64.mca +83 -0
  162. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_dynamic_padding.rs +10 -0
  163. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_dynamic_padding.x86-64 +26 -0
  164. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_dynamic_padding.x86-64.mca +85 -0
  165. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_dynamic_size.rs +10 -0
  166. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_dynamic_size.x86-64 +18 -0
  167. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_dynamic_size.x86-64.mca +71 -0
  168. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_static_size.rs +10 -0
  169. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_static_size.x86-64 +16 -0
  170. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_static_size.x86-64.mca +67 -0
  171. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_with_elems_dynamic_padding.rs +13 -0
  172. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_with_elems_dynamic_padding.x86-64 +39 -0
  173. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_with_elems_dynamic_padding.x86-64.mca +109 -0
  174. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_with_elems_dynamic_size.rs +13 -0
  175. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_with_elems_dynamic_size.x86-64 +28 -0
  176. data/rust-vendor/zerocopy/benches/try_ref_from_suffix_with_elems_dynamic_size.x86-64.mca +87 -0
  177. data/rust-vendor/zerocopy/benches/try_transmute.rs +16 -0
  178. data/rust-vendor/zerocopy/benches/try_transmute.x86-64 +9 -0
  179. data/rust-vendor/zerocopy/benches/try_transmute.x86-64.mca +55 -0
  180. data/rust-vendor/zerocopy/benches/try_transmute_ref_dynamic_size.rs +18 -0
  181. data/rust-vendor/zerocopy/benches/try_transmute_ref_dynamic_size.x86-64 +6 -0
  182. data/rust-vendor/zerocopy/benches/try_transmute_ref_dynamic_size.x86-64.mca +49 -0
  183. data/rust-vendor/zerocopy/benches/try_transmute_ref_static_size.rs +17 -0
  184. data/rust-vendor/zerocopy/benches/try_transmute_ref_static_size.x86-64 +5 -0
  185. data/rust-vendor/zerocopy/benches/try_transmute_ref_static_size.x86-64.mca +47 -0
  186. data/rust-vendor/zerocopy/rustdoc/style.css +55 -0
  187. data/rust-vendor/zerocopy/src/lib.rs +331 -0
  188. data/rust-vendor/zerocopy/src/macros.rs +48 -1
  189. data/rust-vendor/zerocopy/src/util/macros.rs +199 -0
  190. data/rust-vendor/zerocopy/tests/codegen.rs +111 -0
  191. data/rust-vendor/zerocopy-derive/.cargo-checksum.json +1 -1
  192. data/rust-vendor/zerocopy-derive/.cargo_vcs_info.json +1 -1
  193. data/rust-vendor/zerocopy-derive/Cargo.lock +1 -1
  194. data/rust-vendor/zerocopy-derive/Cargo.toml +1 -1
  195. data/rust-vendor/zerocopy-derive/Cargo.toml.orig +1 -1
  196. metadata +138 -2
@@ -0,0 +1,105 @@
1
+ Iterations: 100
2
+ Instructions: 3300
3
+ Total Cycles: 1082
4
+ Total uOps: 3600
5
+
6
+ Dispatch Width: 4
7
+ uOps Per Cycle: 3.33
8
+ IPC: 3.05
9
+ Block RThroughput: 9.0
10
+
11
+
12
+ Instruction Info:
13
+ [1]: #uOps
14
+ [2]: Latency
15
+ [3]: RThroughput
16
+ [4]: MayLoad
17
+ [5]: MayStore
18
+ [6]: HasSideEffects (U)
19
+
20
+ [1] [2] [3] [4] [5] [6] Instructions:
21
+ 1 1 0.33 mov rcx, rdx
22
+ 1 1 0.33 mov edx, 3
23
+ 1 1 0.33 mov rax, rcx
24
+ 2 4 1.00 mul rdx
25
+ 1 1 1.00 jo .LBB5_8
26
+ 1 1 0.33 mov rdx, rax
27
+ 1 1 0.33 cmp rax, -10
28
+ 1 1 1.00 ja .LBB5_8
29
+ 1 1 0.33 mov eax, edx
30
+ 1 1 0.33 not eax
31
+ 1 1 0.33 and eax, 3
32
+ 1 1 0.50 lea r8, [rax + rdx]
33
+ 1 1 0.33 add r8, 9
34
+ 1 0 0.25 xor eax, eax
35
+ 1 1 0.33 cmp rsi, r8
36
+ 1 1 1.00 jne .LBB5_6
37
+ 1 1 0.33 mov r9d, edi
38
+ 1 1 0.33 and r9d, 3
39
+ 1 1 1.00 jne .LBB5_6
40
+ 1 1 0.33 add rdx, 9
41
+ 1 1 0.33 cmp r8, rdx
42
+ 1 1 1.00 jb .LBB5_6
43
+ 1 5 0.50 * movzx edx, word ptr [rdi]
44
+ 1 1 0.33 cmp dx, -16192
45
+ 2 2 0.67 cmove rsi, rcx
46
+ 1 0 0.25 xor eax, eax
47
+ 1 1 0.33 cmp edx, 49344
48
+ 2 2 0.67 cmove rax, rdi
49
+ 1 1 0.33 mov rdx, rsi
50
+ 1 1 1.00 U ret
51
+ 1 0 0.25 xor eax, eax
52
+ 1 1 0.33 mov rdx, rsi
53
+ 1 1 1.00 U ret
54
+
55
+
56
+ Resources:
57
+ [0] - SBDivider
58
+ [1] - SBFPDivider
59
+ [2] - SBPort0
60
+ [3] - SBPort1
61
+ [4] - SBPort4
62
+ [5] - SBPort5
63
+ [6.0] - SBPort23
64
+ [6.1] - SBPort23
65
+
66
+
67
+ Resource pressure per iteration:
68
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1]
69
+ - - 10.64 10.65 - 10.71 0.50 0.50
70
+
71
+ Resource pressure by instruction:
72
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
73
+ - - 0.25 0.73 - 0.02 - - mov rcx, rdx
74
+ - - 0.74 0.03 - 0.23 - - mov edx, 3
75
+ - - 0.60 0.40 - - - - mov rax, rcx
76
+ - - 1.00 1.00 - - - - mul rdx
77
+ - - - - - 1.00 - - jo .LBB5_8
78
+ - - 0.11 0.89 - - - - mov rdx, rax
79
+ - - 0.99 0.01 - - - - cmp rax, -10
80
+ - - - - - 1.00 - - ja .LBB5_8
81
+ - - 0.01 0.89 - 0.10 - - mov eax, edx
82
+ - - 0.11 0.89 - - - - not eax
83
+ - - 0.01 0.88 - 0.11 - - and eax, 3
84
+ - - 0.01 0.99 - - - - lea r8, [rax + rdx]
85
+ - - 0.01 0.99 - - - - add r8, 9
86
+ - - - - - - - - xor eax, eax
87
+ - - - 0.99 - 0.01 - - cmp rsi, r8
88
+ - - - - - 1.00 - - jne .LBB5_6
89
+ - - 0.42 - - 0.58 - - mov r9d, edi
90
+ - - 0.53 0.01 - 0.46 - - and r9d, 3
91
+ - - - - - 1.00 - - jne .LBB5_6
92
+ - - 0.99 0.01 - - - - add rdx, 9
93
+ - - 0.99 0.01 - - - - cmp r8, rdx
94
+ - - - - - 1.00 - - jb .LBB5_6
95
+ - - - - - - 0.50 0.50 movzx edx, word ptr [rdi]
96
+ - - 0.45 0.01 - 0.54 - - cmp dx, -16192
97
+ - - 1.00 0.35 - 0.65 - - cmove rsi, rcx
98
+ - - - - - - - - xor eax, eax
99
+ - - 0.75 0.02 - 0.23 - - cmp edx, 49344
100
+ - - 1.00 0.68 - 0.32 - - cmove rax, rdi
101
+ - - 0.12 0.54 - 0.34 - - mov rdx, rsi
102
+ - - - - - 1.00 - - ret
103
+ - - - - - - - - xor eax, eax
104
+ - - 0.55 0.33 - 0.12 - - mov rdx, rsi
105
+ - - - - - 1.00 - - ret
@@ -0,0 +1,10 @@
1
+ #[path = "formats/coco_dynamic_size.rs"]
2
+ mod format;
3
+
4
+ #[unsafe(no_mangle)]
5
+ fn bench_try_ref_from_bytes_with_elems_dynamic_size(
6
+ source: &[u8],
7
+ count: usize,
8
+ ) -> Option<&format::CocoPacket> {
9
+ zerocopy::TryFromBytes::try_ref_from_bytes_with_elems(source, count).ok()
10
+ }
@@ -0,0 +1,18 @@
1
+ bench_try_ref_from_bytes_with_elems_dynamic_size:
2
+ movabs rax, 9223372036854775805
3
+ cmp rdx, rax
4
+ seta cl
5
+ mov rax, rdi
6
+ or dil, cl
7
+ test dil, 1
8
+ jne .LBB5_3
9
+ lea rcx, [2*rdx + 4]
10
+ cmp rsi, rcx
11
+ jne .LBB5_3
12
+ cmp word ptr [rax], -16192
13
+ je .LBB5_4
14
+ .LBB5_3:
15
+ xor eax, eax
16
+ mov rdx, rsi
17
+ .LBB5_4:
18
+ ret
@@ -0,0 +1,69 @@
1
+ Iterations: 100
2
+ Instructions: 1500
3
+ Total Cycles: 507
4
+ Total uOps: 1700
5
+
6
+ Dispatch Width: 4
7
+ uOps Per Cycle: 3.35
8
+ IPC: 2.96
9
+ Block RThroughput: 4.3
10
+
11
+
12
+ Instruction Info:
13
+ [1]: #uOps
14
+ [2]: Latency
15
+ [3]: RThroughput
16
+ [4]: MayLoad
17
+ [5]: MayStore
18
+ [6]: HasSideEffects (U)
19
+
20
+ [1] [2] [3] [4] [5] [6] Instructions:
21
+ 1 1 0.33 movabs rax, 9223372036854775805
22
+ 1 1 0.33 cmp rdx, rax
23
+ 2 2 1.00 seta cl
24
+ 1 1 0.33 mov rax, rdi
25
+ 1 1 0.33 or dil, cl
26
+ 1 1 0.33 test dil, 1
27
+ 1 1 1.00 jne .LBB5_3
28
+ 1 1 0.50 lea rcx, [2*rdx + 4]
29
+ 1 1 0.33 cmp rsi, rcx
30
+ 1 1 1.00 jne .LBB5_3
31
+ 2 6 0.50 * cmp word ptr [rax], -16192
32
+ 1 1 1.00 je .LBB5_4
33
+ 1 0 0.25 xor eax, eax
34
+ 1 1 0.33 mov rdx, rsi
35
+ 1 1 1.00 U ret
36
+
37
+
38
+ Resources:
39
+ [0] - SBDivider
40
+ [1] - SBFPDivider
41
+ [2] - SBPort0
42
+ [3] - SBPort1
43
+ [4] - SBPort4
44
+ [5] - SBPort5
45
+ [6.0] - SBPort23
46
+ [6.1] - SBPort23
47
+
48
+
49
+ Resource pressure per iteration:
50
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1]
51
+ - - 4.98 4.99 - 5.03 0.50 0.50
52
+
53
+ Resource pressure by instruction:
54
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
55
+ - - - 0.99 - 0.01 - - movabs rax, 9223372036854775805
56
+ - - 0.50 0.50 - - - - cmp rdx, rax
57
+ - - 1.96 - - 0.04 - - seta cl
58
+ - - 0.01 0.99 - - - - mov rax, rdi
59
+ - - 1.00 - - - - - or dil, cl
60
+ - - 0.99 0.01 - - - - test dil, 1
61
+ - - - - - 1.00 - - jne .LBB5_3
62
+ - - 0.01 0.99 - - - - lea rcx, [2*rdx + 4]
63
+ - - 0.02 0.49 - 0.49 - - cmp rsi, rcx
64
+ - - - - - 1.00 - - jne .LBB5_3
65
+ - - - 0.51 - 0.49 0.50 0.50 cmp word ptr [rax], -16192
66
+ - - - - - 1.00 - - je .LBB5_4
67
+ - - - - - - - - xor eax, eax
68
+ - - 0.49 0.51 - - - - mov rdx, rsi
69
+ - - - - - 1.00 - - ret
@@ -0,0 +1,10 @@
1
+ #[path = "formats/coco_dynamic_padding.rs"]
2
+ mod format;
3
+
4
+ #[unsafe(no_mangle)]
5
+ fn bench_try_ref_from_prefix_dynamic_padding(source: &[u8]) -> Option<&format::CocoPacket> {
6
+ match zerocopy::TryFromBytes::try_ref_from_prefix(source) {
7
+ Ok((packet, _rest)) => Some(packet),
8
+ _ => None,
9
+ }
10
+ }
@@ -0,0 +1,29 @@
1
+ bench_try_ref_from_prefix_dynamic_padding:
2
+ xor edx, edx
3
+ mov eax, 0
4
+ test dil, 3
5
+ je .LBB5_1
6
+ ret
7
+ .LBB5_1:
8
+ movabs rax, 9223372036854775804
9
+ and rsi, rax
10
+ cmp rsi, 9
11
+ jae .LBB5_3
12
+ mov edx, 1
13
+ xor eax, eax
14
+ ret
15
+ .LBB5_3:
16
+ add rsi, -9
17
+ movabs rcx, -6148914691236517205
18
+ mov rax, rsi
19
+ mul rcx
20
+ mov rax, rdx
21
+ shr rax
22
+ movzx ecx, word ptr [rdi]
23
+ cmp cx, -16192
24
+ mov edx, 2
25
+ cmove rdx, rax
26
+ xor eax, eax
27
+ cmp ecx, 49344
28
+ cmove rax, rdi
29
+ ret
@@ -0,0 +1,91 @@
1
+ Iterations: 100
2
+ Instructions: 2600
3
+ Total Cycles: 843
4
+ Total uOps: 2900
5
+
6
+ Dispatch Width: 4
7
+ uOps Per Cycle: 3.44
8
+ IPC: 3.08
9
+ Block RThroughput: 7.3
10
+
11
+
12
+ Instruction Info:
13
+ [1]: #uOps
14
+ [2]: Latency
15
+ [3]: RThroughput
16
+ [4]: MayLoad
17
+ [5]: MayStore
18
+ [6]: HasSideEffects (U)
19
+
20
+ [1] [2] [3] [4] [5] [6] Instructions:
21
+ 1 0 0.25 xor edx, edx
22
+ 1 1 0.33 mov eax, 0
23
+ 1 1 0.33 test dil, 3
24
+ 1 1 1.00 je .LBB5_1
25
+ 1 1 1.00 U ret
26
+ 1 1 0.33 movabs rax, 9223372036854775804
27
+ 1 1 0.33 and rsi, rax
28
+ 1 1 0.33 cmp rsi, 9
29
+ 1 1 1.00 jae .LBB5_3
30
+ 1 1 0.33 mov edx, 1
31
+ 1 0 0.25 xor eax, eax
32
+ 1 1 1.00 U ret
33
+ 1 1 0.33 add rsi, -9
34
+ 1 1 0.33 movabs rcx, -6148914691236517205
35
+ 1 1 0.33 mov rax, rsi
36
+ 2 4 1.00 mul rcx
37
+ 1 1 0.33 mov rax, rdx
38
+ 1 1 0.50 shr rax
39
+ 1 5 0.50 * movzx ecx, word ptr [rdi]
40
+ 1 1 0.33 cmp cx, -16192
41
+ 1 1 0.33 mov edx, 2
42
+ 2 2 0.67 cmove rdx, rax
43
+ 1 0 0.25 xor eax, eax
44
+ 1 1 0.33 cmp ecx, 49344
45
+ 2 2 0.67 cmove rax, rdi
46
+ 1 1 1.00 U ret
47
+
48
+
49
+ Resources:
50
+ [0] - SBDivider
51
+ [1] - SBFPDivider
52
+ [2] - SBPort0
53
+ [3] - SBPort1
54
+ [4] - SBPort4
55
+ [5] - SBPort5
56
+ [6.0] - SBPort23
57
+ [6.1] - SBPort23
58
+
59
+
60
+ Resource pressure per iteration:
61
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1]
62
+ - - 8.33 8.33 - 8.34 0.50 0.50
63
+
64
+ Resource pressure by instruction:
65
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
66
+ - - - - - - - - xor edx, edx
67
+ - - 0.32 0.34 - 0.34 - - mov eax, 0
68
+ - - 0.34 0.33 - 0.33 - - test dil, 3
69
+ - - - - - 1.00 - - je .LBB5_1
70
+ - - - - - 1.00 - - ret
71
+ - - 0.35 0.65 - - - - movabs rax, 9223372036854775804
72
+ - - 0.96 0.03 - 0.01 - - and rsi, rax
73
+ - - 0.01 0.97 - 0.02 - - cmp rsi, 9
74
+ - - - - - 1.00 - - jae .LBB5_3
75
+ - - 0.67 0.01 - 0.32 - - mov edx, 1
76
+ - - - - - - - - xor eax, eax
77
+ - - - - - 1.00 - - ret
78
+ - - 0.02 0.34 - 0.64 - - add rsi, -9
79
+ - - 0.33 0.66 - 0.01 - - movabs rcx, -6148914691236517205
80
+ - - 0.66 0.34 - - - - mov rax, rsi
81
+ - - 1.00 1.00 - - - - mul rcx
82
+ - - 0.01 0.99 - - - - mov rax, rdx
83
+ - - 0.99 - - 0.01 - - shr rax
84
+ - - - - - - 0.50 0.50 movzx ecx, word ptr [rdi]
85
+ - - 0.33 0.03 - 0.64 - - cmp cx, -16192
86
+ - - 0.01 0.31 - 0.68 - - mov edx, 2
87
+ - - 1.00 1.00 - - - - cmove rdx, rax
88
+ - - - - - - - - xor eax, eax
89
+ - - 0.33 0.33 - 0.34 - - cmp ecx, 49344
90
+ - - 1.00 1.00 - - - - cmove rax, rdi
91
+ - - - - - 1.00 - - ret
@@ -0,0 +1,10 @@
1
+ #[path = "formats/coco_dynamic_size.rs"]
2
+ mod format;
3
+
4
+ #[unsafe(no_mangle)]
5
+ fn bench_try_ref_from_prefix_dynamic_size(source: &[u8]) -> Option<&format::CocoPacket> {
6
+ match zerocopy::TryFromBytes::try_ref_from_prefix(source) {
7
+ Ok((packet, _rest)) => Some(packet),
8
+ _ => None,
9
+ }
10
+ }
@@ -0,0 +1,22 @@
1
+ bench_try_ref_from_prefix_dynamic_size:
2
+ xor edx, edx
3
+ mov eax, 0
4
+ test dil, 1
5
+ jne .LBB5_4
6
+ cmp rsi, 4
7
+ jae .LBB5_3
8
+ mov edx, 1
9
+ xor eax, eax
10
+ ret
11
+ .LBB5_3:
12
+ add rsi, -4
13
+ shr rsi
14
+ movzx ecx, word ptr [rdi]
15
+ cmp ecx, 49344
16
+ mov edx, 2
17
+ cmove rdx, rsi
18
+ xor eax, eax
19
+ cmp cx, -16192
20
+ cmove rax, rdi
21
+ .LBB5_4:
22
+ ret
@@ -0,0 +1,77 @@
1
+ Iterations: 100
2
+ Instructions: 1900
3
+ Total Cycles: 573
4
+ Total uOps: 2100
5
+
6
+ Dispatch Width: 4
7
+ uOps Per Cycle: 3.66
8
+ IPC: 3.32
9
+ Block RThroughput: 5.3
10
+
11
+
12
+ Instruction Info:
13
+ [1]: #uOps
14
+ [2]: Latency
15
+ [3]: RThroughput
16
+ [4]: MayLoad
17
+ [5]: MayStore
18
+ [6]: HasSideEffects (U)
19
+
20
+ [1] [2] [3] [4] [5] [6] Instructions:
21
+ 1 0 0.25 xor edx, edx
22
+ 1 1 0.33 mov eax, 0
23
+ 1 1 0.33 test dil, 1
24
+ 1 1 1.00 jne .LBB5_4
25
+ 1 1 0.33 cmp rsi, 4
26
+ 1 1 1.00 jae .LBB5_3
27
+ 1 1 0.33 mov edx, 1
28
+ 1 0 0.25 xor eax, eax
29
+ 1 1 1.00 U ret
30
+ 1 1 0.33 add rsi, -4
31
+ 1 1 0.50 shr rsi
32
+ 1 5 0.50 * movzx ecx, word ptr [rdi]
33
+ 1 1 0.33 cmp ecx, 49344
34
+ 1 1 0.33 mov edx, 2
35
+ 2 2 0.67 cmove rdx, rsi
36
+ 1 0 0.25 xor eax, eax
37
+ 1 1 0.33 cmp cx, -16192
38
+ 2 2 0.67 cmove rax, rdi
39
+ 1 1 1.00 U ret
40
+
41
+
42
+ Resources:
43
+ [0] - SBDivider
44
+ [1] - SBFPDivider
45
+ [2] - SBPort0
46
+ [3] - SBPort1
47
+ [4] - SBPort4
48
+ [5] - SBPort5
49
+ [6.0] - SBPort23
50
+ [6.1] - SBPort23
51
+
52
+
53
+ Resource pressure per iteration:
54
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1]
55
+ - - 5.66 5.67 - 5.67 0.50 0.50
56
+
57
+ Resource pressure by instruction:
58
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
59
+ - - - - - - - - xor edx, edx
60
+ - - 0.30 0.37 - 0.33 - - mov eax, 0
61
+ - - 0.35 0.32 - 0.33 - - test dil, 1
62
+ - - - - - 1.00 - - jne .LBB5_4
63
+ - - 0.32 0.33 - 0.35 - - cmp rsi, 4
64
+ - - - - - 1.00 - - jae .LBB5_3
65
+ - - 0.33 0.35 - 0.32 - - mov edx, 1
66
+ - - - - - - - - xor eax, eax
67
+ - - - - - 1.00 - - ret
68
+ - - 0.34 0.64 - 0.02 - - add rsi, -4
69
+ - - 1.00 - - - - - shr rsi
70
+ - - - - - - 0.50 0.50 movzx ecx, word ptr [rdi]
71
+ - - 0.60 0.40 - - - - cmp ecx, 49344
72
+ - - 0.05 0.95 - - - - mov edx, 2
73
+ - - 1.00 1.00 - - - - cmove rdx, rsi
74
+ - - - - - - - - xor eax, eax
75
+ - - 0.37 0.31 - 0.32 - - cmp cx, -16192
76
+ - - 1.00 1.00 - - - - cmove rax, rdi
77
+ - - - - - 1.00 - - ret
@@ -0,0 +1,10 @@
1
+ #[path = "formats/coco_static_size.rs"]
2
+ mod format;
3
+
4
+ #[unsafe(no_mangle)]
5
+ fn bench_try_ref_from_prefix_static_size(source: &[u8]) -> Option<&format::CocoPacket> {
6
+ match zerocopy::TryFromBytes::try_ref_from_prefix(source) {
7
+ Ok((packet, _rest)) => Some(packet),
8
+ _ => None,
9
+ }
10
+ }
@@ -0,0 +1,15 @@
1
+ bench_try_ref_from_prefix_static_size:
2
+ cmp rsi, 6
3
+ setb al
4
+ or al, dil
5
+ test al, 1
6
+ jne .LBB5_2
7
+ movzx eax, word ptr [rdi]
8
+ cmp eax, 49344
9
+ mov eax, 2
10
+ cmove rax, rdi
11
+ je .LBB5_3
12
+ .LBB5_2:
13
+ xor eax, eax
14
+ .LBB5_3:
15
+ ret
@@ -0,0 +1,63 @@
1
+ Iterations: 100
2
+ Instructions: 1200
3
+ Total Cycles: 374
4
+ Total uOps: 1300
5
+
6
+ Dispatch Width: 4
7
+ uOps Per Cycle: 3.48
8
+ IPC: 3.21
9
+ Block RThroughput: 3.3
10
+
11
+
12
+ Instruction Info:
13
+ [1]: #uOps
14
+ [2]: Latency
15
+ [3]: RThroughput
16
+ [4]: MayLoad
17
+ [5]: MayStore
18
+ [6]: HasSideEffects (U)
19
+
20
+ [1] [2] [3] [4] [5] [6] Instructions:
21
+ 1 1 0.33 cmp rsi, 6
22
+ 1 1 0.50 setb al
23
+ 1 1 0.33 or al, dil
24
+ 1 1 0.33 test al, 1
25
+ 1 1 1.00 jne .LBB5_2
26
+ 1 5 0.50 * movzx eax, word ptr [rdi]
27
+ 1 1 0.33 cmp eax, 49344
28
+ 1 1 0.33 mov eax, 2
29
+ 2 2 0.67 cmove rax, rdi
30
+ 1 1 1.00 je .LBB5_3
31
+ 1 0 0.25 xor eax, eax
32
+ 1 1 1.00 U ret
33
+
34
+
35
+ Resources:
36
+ [0] - SBDivider
37
+ [1] - SBFPDivider
38
+ [2] - SBPort0
39
+ [3] - SBPort1
40
+ [4] - SBPort4
41
+ [5] - SBPort5
42
+ [6.0] - SBPort23
43
+ [6.1] - SBPort23
44
+
45
+
46
+ Resource pressure per iteration:
47
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1]
48
+ - - 3.66 3.65 - 3.69 0.50 0.50
49
+
50
+ Resource pressure by instruction:
51
+ [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
52
+ - - 0.35 0.64 - 0.01 - - cmp rsi, 6
53
+ - - 1.00 - - - - - setb al
54
+ - - 0.02 0.66 - 0.32 - - or al, dil
55
+ - - 0.03 0.65 - 0.32 - - test al, 1
56
+ - - - - - 1.00 - - jne .LBB5_2
57
+ - - - - - - 0.50 0.50 movzx eax, word ptr [rdi]
58
+ - - 0.92 0.07 - 0.01 - - cmp eax, 49344
59
+ - - 0.37 0.63 - - - - mov eax, 2
60
+ - - 0.97 1.00 - 0.03 - - cmove rax, rdi
61
+ - - - - - 1.00 - - je .LBB5_3
62
+ - - - - - - - - xor eax, eax
63
+ - - - - - 1.00 - - ret
@@ -0,0 +1,13 @@
1
+ #[path = "formats/coco_dynamic_padding.rs"]
2
+ mod format;
3
+
4
+ #[unsafe(no_mangle)]
5
+ fn bench_try_ref_from_prefix_with_elems_dynamic_padding(
6
+ source: &[u8],
7
+ count: usize,
8
+ ) -> Option<&format::CocoPacket> {
9
+ match zerocopy::TryFromBytes::try_ref_from_prefix_with_elems(source, count) {
10
+ Ok((packet, _rest)) => Some(packet),
11
+ _ => None,
12
+ }
13
+ }
@@ -0,0 +1,35 @@
1
+ bench_try_ref_from_prefix_with_elems_dynamic_padding:
2
+ mov rcx, rdx
3
+ mov edx, 3
4
+ mov rax, rcx
5
+ mul rdx
6
+ jo .LBB5_1
7
+ cmp rax, -10
8
+ ja .LBB5_1
9
+ lea rdx, [rax + 9]
10
+ not eax
11
+ and eax, 3
12
+ add rax, rdx
13
+ jae .LBB5_4
14
+ .LBB5_1:
15
+ xor eax, eax
16
+ mov edx, 1
17
+ ret
18
+ .LBB5_4:
19
+ mov r8, rax
20
+ xor edx, edx
21
+ mov eax, 0
22
+ test dil, 3
23
+ je .LBB5_5
24
+ ret
25
+ .LBB5_5:
26
+ cmp r8, rsi
27
+ ja .LBB5_1
28
+ movzx esi, word ptr [rdi]
29
+ cmp si, -16192
30
+ mov edx, 2
31
+ cmove rdx, rcx
32
+ xor eax, eax
33
+ cmp esi, 49344
34
+ cmove rax, rdi
35
+ ret