badline 0.12.1 → 0.13.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (505) hide show
  1. checksums.yaml +4 -4
  2. data/CHANGELOG.md +17 -0
  3. data/CLAUDE.md +59 -31
  4. data/README.md +1 -1
  5. data/doc/library.md +9 -9
  6. data/doc/pinned-behaviour.md +105 -105
  7. data/doc/snapshots.md +1 -4
  8. data/lib/badline/audio/bare_player.rb +3 -3
  9. data/lib/badline/audio/cli.rb +6 -6
  10. data/lib/badline/audio/jukebox.rb +2 -2
  11. data/lib/badline/audio/machine_player.rb +2 -2
  12. data/lib/badline/{media → audio}/queue.rb +1 -1
  13. data/lib/badline/audio/queued_tune.rb +6 -6
  14. data/lib/badline/audio/renderer.rb +5 -5
  15. data/lib/badline/audio/stereo.rb +1 -1
  16. data/lib/badline/c128/{bus_state.rb → bus/saved_state.rb} +1 -1
  17. data/lib/badline/c128/bus.rb +18 -17
  18. data/lib/badline/c128/color_lines.rb +2 -2
  19. data/lib/badline/c128/cpu.rb +1 -1
  20. data/lib/badline/c128/drives.rb +10 -11
  21. data/lib/badline/c128/fast_serial.rb +5 -5
  22. data/lib/badline/c128/mmu_pages.rb +1 -1
  23. data/lib/badline/c128/modes.rb +2 -2
  24. data/lib/badline/c128/saved_state.rb +21 -47
  25. data/lib/badline/c128/z80.rb +2 -2
  26. data/lib/badline/c128.rb +14 -9
  27. data/lib/badline/{computer → c64}/attachments.rb +4 -6
  28. data/lib/badline/c64/banked_ram/banking.rb +32 -0
  29. data/lib/badline/c64/banked_ram/plus256k.rb +56 -0
  30. data/lib/badline/c64/banked_ram/plus60k.rb +45 -0
  31. data/lib/badline/c64/banked_ram/unexpanded.rb +30 -0
  32. data/lib/badline/c64/banked_ram.rb +23 -0
  33. data/lib/badline/c64/bus/extra_sids.rb +32 -0
  34. data/lib/badline/c64/bus/fittings.rb +40 -0
  35. data/lib/badline/c64/bus/pla.rb +149 -0
  36. data/lib/badline/c64/bus/roms.rb +41 -0
  37. data/lib/badline/c64/bus/saved_state.rb +68 -0
  38. data/lib/badline/c64/bus/sid_slots.rb +44 -0
  39. data/lib/badline/c64/bus.rb +218 -0
  40. data/lib/badline/c64/cartridge/action_replay.rb +128 -0
  41. data/lib/badline/c64/cartridge/atomic_power.rb +26 -0
  42. data/lib/badline/c64/cartridge/bank.rb +83 -0
  43. data/lib/badline/c64/cartridge/comal80.rb +52 -0
  44. data/lib/badline/c64/cartridge/dinamic.rb +36 -0
  45. data/lib/badline/c64/cartridge/easy_flash.rb +147 -0
  46. data/lib/badline/c64/cartridge/epyx_fastload.rb +81 -0
  47. data/lib/badline/c64/cartridge/final_cartridge3.rb +91 -0
  48. data/lib/badline/c64/cartridge/flash/saved_state.rb +40 -0
  49. data/lib/badline/c64/cartridge/flash.rb +279 -0
  50. data/lib/badline/c64/cartridge/freezer.rb +35 -0
  51. data/lib/badline/c64/cartridge/fun_play.rb +40 -0
  52. data/lib/badline/c64/cartridge/g_mod2.rb +76 -0
  53. data/lib/badline/c64/cartridge/game_system.rb +42 -0
  54. data/lib/badline/c64/cartridge/geo_ram.rb +81 -0
  55. data/lib/badline/c64/cartridge/kcs_power.rb +77 -0
  56. data/lib/badline/c64/cartridge/mach5.rb +34 -0
  57. data/lib/badline/c64/cartridge/magic_desk.rb +32 -0
  58. data/lib/badline/c64/cartridge/ocean.rb +37 -0
  59. data/lib/badline/c64/cartridge/pagefox.rb +70 -0
  60. data/lib/badline/c64/cartridge/retro_replay/saved_state.rb +47 -0
  61. data/lib/badline/c64/cartridge/retro_replay.rb +286 -0
  62. data/lib/badline/c64/cartridge/rex_utility.rb +31 -0
  63. data/lib/badline/c64/cartridge/rgcd.rb +60 -0
  64. data/lib/badline/c64/cartridge/saved_state.rb +63 -0
  65. data/lib/badline/c64/cartridge/simons_basic.rb +37 -0
  66. data/lib/badline/c64/cartridge/standard.rb +17 -0
  67. data/lib/badline/c64/cartridge/super_games.rb +50 -0
  68. data/lib/badline/c64/cartridge/westermann.rb +32 -0
  69. data/lib/badline/c64/cartridge/zaxxon.rb +68 -0
  70. data/lib/badline/c64/cartridge.rb +258 -0
  71. data/lib/badline/c64/color_memory.rb +27 -0
  72. data/lib/badline/{computer → c64}/common.rb +2 -2
  73. data/lib/badline/{computer → c64}/kernal_traps.rb +18 -18
  74. data/lib/badline/c64/reu/dma/saved_state.rb +52 -0
  75. data/lib/badline/c64/reu/dma.rb +275 -0
  76. data/lib/badline/c64/reu/ram.rb +109 -0
  77. data/lib/badline/c64/reu/saved_state.rb +55 -0
  78. data/lib/badline/c64/reu/trigger.rb +34 -0
  79. data/lib/badline/c64/reu.rb +291 -0
  80. data/lib/badline/{computer → c64}/saved_state.rb +13 -18
  81. data/lib/badline/{computer → c64}/true_drives.rb +11 -11
  82. data/lib/badline/{computer.rb → c64.rb} +18 -13
  83. data/lib/badline/chips/cia/fast_forward.rb +62 -0
  84. data/lib/badline/chips/cia/interrupt_register.rb +145 -0
  85. data/lib/badline/chips/cia/saved_state.rb +49 -0
  86. data/lib/badline/chips/cia/serial/saved_state.rb +45 -0
  87. data/lib/badline/chips/cia/serial.rb +250 -0
  88. data/lib/badline/chips/cia/time_of_day.rb +232 -0
  89. data/lib/badline/chips/cia/timer.rb +208 -0
  90. data/lib/badline/chips/cia.rb +281 -0
  91. data/lib/badline/chips/cpu/addressing.rb +133 -0
  92. data/lib/badline/chips/cpu/boundary.rb +56 -0
  93. data/lib/badline/chips/cpu/core.rb +167 -0
  94. data/lib/badline/chips/cpu/instruction.rb +338 -0
  95. data/lib/badline/chips/cpu/instruction_set/arithmetic.rb +118 -0
  96. data/lib/badline/chips/cpu/instruction_set/bitwise.rb +130 -0
  97. data/lib/badline/chips/cpu/instruction_set/branch.rb +83 -0
  98. data/lib/badline/chips/cpu/instruction_set/flag.rb +67 -0
  99. data/lib/badline/chips/cpu/instruction_set/illegal.rb +274 -0
  100. data/lib/badline/chips/cpu/instruction_set/inc_dec.rb +73 -0
  101. data/lib/badline/chips/cpu/instruction_set/stack.rb +56 -0
  102. data/lib/badline/chips/cpu/instruction_set/transfer.rb +141 -0
  103. data/lib/badline/chips/cpu/instruction_set.rb +59 -0
  104. data/lib/badline/chips/cpu/interrupts.rb +108 -0
  105. data/lib/badline/chips/cpu/microcode.rb +179 -0
  106. data/lib/badline/chips/cpu/operations.rb +90 -0
  107. data/lib/badline/chips/cpu/port.rb +116 -0
  108. data/lib/badline/chips/cpu/saved_state.rb +117 -0
  109. data/lib/badline/chips/cpu/stack_operations.rb +84 -0
  110. data/lib/badline/chips/cpu/traps.rb +23 -0
  111. data/lib/badline/chips/cpu.rb +12 -0
  112. data/lib/badline/chips/sid/catch_up.rb +122 -0
  113. data/lib/badline/chips/sid/decimator.rb +66 -0
  114. data/lib/badline/chips/sid/envelope/saved_state.rb +70 -0
  115. data/lib/badline/chips/sid/envelope.rb +241 -0
  116. data/lib/badline/chips/sid/filter/saved_state.rb +42 -0
  117. data/lib/badline/chips/sid/filter.rb +241 -0
  118. data/lib/badline/chips/sid/saved_state.rb +52 -0
  119. data/lib/badline/chips/sid/voice.rb +79 -0
  120. data/lib/badline/chips/sid/waveform/combined.rb +128 -0
  121. data/lib/badline/chips/sid/waveform/fast_forward.rb +107 -0
  122. data/lib/badline/chips/sid/waveform/noise_writeback.rb +124 -0
  123. data/lib/badline/chips/sid/waveform/saved_state.rb +68 -0
  124. data/lib/badline/chips/sid/waveform.rb +307 -0
  125. data/lib/badline/chips/sid.rb +265 -0
  126. data/lib/badline/{c128 → chips}/vdc/memory.rb +1 -1
  127. data/lib/badline/{c128 → chips}/vdc/painter.rb +1 -1
  128. data/lib/badline/{c128 → chips}/vdc/raster.rb +1 -1
  129. data/lib/badline/chips/vdc/saved_state.rb +36 -0
  130. data/lib/badline/{c128 → chips}/vdc/window.rb +1 -1
  131. data/lib/badline/{c128 → chips}/vdc.rb +7 -31
  132. data/lib/badline/chips/via/control_lines.rb +124 -0
  133. data/lib/badline/chips/via/fast_forward.rb +55 -0
  134. data/lib/badline/chips/via/interrupt_register.rb +69 -0
  135. data/lib/badline/chips/via/saved_state.rb +44 -0
  136. data/lib/badline/chips/via/shift_register.rb +182 -0
  137. data/lib/badline/chips/via/timer1.rb +133 -0
  138. data/lib/badline/chips/via/timer2.rb +135 -0
  139. data/lib/badline/chips/via.rb +268 -0
  140. data/lib/badline/chips/vic/bank.rb +135 -0
  141. data/lib/badline/chips/vic/border_mask.rb +88 -0
  142. data/lib/badline/chips/vic/collisions.rb +117 -0
  143. data/lib/badline/chips/vic/color_patches.rb +49 -0
  144. data/lib/badline/chips/vic/display_state.rb +187 -0
  145. data/lib/badline/chips/vic/graphics_mode.rb +166 -0
  146. data/lib/badline/chips/vic/graphics_shifter/saved_state.rb +40 -0
  147. data/lib/badline/chips/vic/graphics_shifter.rb +187 -0
  148. data/lib/badline/chips/vic/register_log.rb +83 -0
  149. data/lib/badline/chips/vic/registers.rb +197 -0
  150. data/lib/badline/chips/vic/saved_state.rb +82 -0
  151. data/lib/badline/chips/vic/sequencer/saved_state.rb +91 -0
  152. data/lib/badline/chips/vic/sequencer.rb +277 -0
  153. data/lib/badline/chips/vic/sequencer_output.rb +118 -0
  154. data/lib/badline/chips/vic/sprite/internal_bus.rb +70 -0
  155. data/lib/badline/chips/vic/sprite/saved_state.rb +66 -0
  156. data/lib/badline/chips/vic/sprite/shifter.rb +148 -0
  157. data/lib/badline/chips/vic/sprite/timing.rb +58 -0
  158. data/lib/badline/chips/vic/sprite.rb +339 -0
  159. data/lib/badline/chips/vic/sprites/saved_state.rb +59 -0
  160. data/lib/badline/chips/vic/sprites.rb +284 -0
  161. data/lib/badline/chips/vic.rb +783 -0
  162. data/lib/badline/chips/vic_i/painter/saved_state.rb +40 -0
  163. data/lib/badline/{vic20/vic → chips/vic_i}/painter.rb +6 -30
  164. data/lib/badline/{vic20/vic → chips/vic_i}/saved_state.rb +2 -2
  165. data/lib/badline/chips/vic_i/sound/output.rb +85 -0
  166. data/lib/badline/chips/vic_i/sound.rb +235 -0
  167. data/lib/badline/{vic20/vic → chips/vic_i}/text_window.rb +2 -2
  168. data/lib/badline/{vic20/vic.rb → chips/vic_i.rb} +5 -5
  169. data/lib/badline/chips/z80/arithmetic.rb +119 -0
  170. data/lib/badline/chips/z80/bit_page.rb +57 -0
  171. data/lib/badline/chips/z80/block_io.rb +60 -0
  172. data/lib/badline/chips/z80/block_transfers.rb +61 -0
  173. data/lib/badline/chips/z80/bus_cycles.rb +113 -0
  174. data/lib/badline/chips/z80/core.rb +115 -0
  175. data/lib/badline/chips/z80/exchanges.rb +52 -0
  176. data/lib/badline/chips/z80/extended_page.rb +91 -0
  177. data/lib/badline/chips/z80/flags.rb +39 -0
  178. data/lib/badline/chips/z80/interrupt_acceptance.rb +48 -0
  179. data/lib/badline/chips/z80/jumps.rb +84 -0
  180. data/lib/badline/chips/z80/loads.rb +100 -0
  181. data/lib/badline/chips/z80/main_page.rb +136 -0
  182. data/lib/badline/chips/z80/registers.rb +122 -0
  183. data/lib/badline/chips/z80/saved_state.rb +71 -0
  184. data/lib/badline/chips/z80/shifts.rb +66 -0
  185. data/lib/badline/chips/z80.rb +13 -0
  186. data/lib/badline/core.rb +26 -28
  187. data/lib/badline/drives/datasette/saved_state.rb +37 -0
  188. data/lib/badline/drives/datasette.rb +140 -0
  189. data/lib/badline/drives/engine/core.rb +149 -0
  190. data/lib/badline/drives/engine/fast_serial.rb +75 -0
  191. data/lib/badline/drives/engine/idle.rb +127 -0
  192. data/lib/badline/drives/engine/idle_cpu.rb +30 -0
  193. data/lib/badline/drives/engine/orbit.rb +81 -0
  194. data/lib/badline/drives/engine/serial_lines.rb +75 -0
  195. data/lib/badline/drives/engine/sleep.rb +114 -0
  196. data/lib/badline/drives/engine/vias.rb +86 -0
  197. data/lib/badline/drives/engine/watch.rb +152 -0
  198. data/lib/badline/drives/engine.rb +11 -0
  199. data/lib/badline/drives/model1541/bus.rb +88 -0
  200. data/lib/badline/drives/model1541/byte_ready.rb +50 -0
  201. data/lib/badline/drives/model1541/cpu.rb +13 -0
  202. data/lib/badline/drives/model1541/disk/saved_state.rb +88 -0
  203. data/lib/badline/drives/model1541/disk.rb +317 -0
  204. data/lib/badline/drives/model1541/disk_via.rb +38 -0
  205. data/lib/badline/drives/model1541/gcr.rb +59 -0
  206. data/lib/badline/drives/model1541/mechanism/saved_state.rb +72 -0
  207. data/lib/badline/drives/model1541/mechanism.rb +315 -0
  208. data/lib/badline/drives/model1541/rotation.rb +123 -0
  209. data/lib/badline/drives/model1541/saved_state.rb +44 -0
  210. data/lib/badline/drives/model1541/sector_reader.rb +78 -0
  211. data/lib/badline/drives/model1541/serial_port.rb +20 -0
  212. data/lib/badline/drives/model1541/track.rb +100 -0
  213. data/lib/badline/drives/model1541.rb +81 -0
  214. data/lib/badline/drives/model1571/bus.rb +113 -0
  215. data/lib/badline/drives/model1571/cpu.rb +13 -0
  216. data/lib/badline/drives/model1571/saved_state.rb +47 -0
  217. data/lib/badline/drives/model1571/serial_port.rb +39 -0
  218. data/lib/badline/drives/model1571/serial_via.rb +27 -0
  219. data/lib/badline/drives/model1571/wd1770.rb +122 -0
  220. data/lib/badline/drives/model1571.rb +142 -0
  221. data/lib/badline/drives/model1581/bus.rb +139 -0
  222. data/lib/badline/drives/model1581/cpu.rb +13 -0
  223. data/lib/badline/drives/model1581/disk/saved_state.rb +89 -0
  224. data/lib/badline/drives/model1581/disk.rb +137 -0
  225. data/lib/badline/drives/model1581/mechanism.rb +119 -0
  226. data/lib/badline/drives/model1581/saved_state.rb +42 -0
  227. data/lib/badline/drives/model1581/serial_port.rb +54 -0
  228. data/lib/badline/drives/model1581/slot.rb +79 -0
  229. data/lib/badline/drives/model1581/track.rb +102 -0
  230. data/lib/badline/drives/model1581/track_bytes.rb +77 -0
  231. data/lib/badline/drives/model1581/wd1772/registers.rb +91 -0
  232. data/lib/badline/drives/model1581/wd1772/saved_state.rb +68 -0
  233. data/lib/badline/drives/model1581/wd1772/sector_writes.rb +75 -0
  234. data/lib/badline/drives/model1581/wd1772/sectors.rb +152 -0
  235. data/lib/badline/drives/model1581/wd1772/stepping.rb +111 -0
  236. data/lib/badline/drives/model1581/wd1772/tracks.rb +127 -0
  237. data/lib/badline/drives/model1581/wd1772/turn.rb +75 -0
  238. data/lib/badline/drives/model1581/wd1772.rb +218 -0
  239. data/lib/badline/drives/model1581.rb +206 -0
  240. data/lib/badline/drives/serial_bus.rb +161 -0
  241. data/lib/badline/frontend/boot.rb +3 -3
  242. data/lib/badline/frontend/machine_window.rb +3 -1
  243. data/lib/badline/frontend/player/filter_view.rb +1 -1
  244. data/lib/badline/frontend/player/player_controller.rb +2 -2
  245. data/lib/badline/frontend/player/player_screen.rb +1 -0
  246. data/lib/badline/frontend/player/theme.rb +7 -7
  247. data/lib/badline/frontend/timeline.rb +3 -3
  248. data/lib/badline/input/control_ports.rb +78 -0
  249. data/lib/badline/input/joystick.rb +27 -0
  250. data/lib/badline/input/keyboard.rb +114 -0
  251. data/lib/badline/input.rb +3 -0
  252. data/lib/badline/kernal_trap/{drive → dos}/block_commands.rb +1 -1
  253. data/lib/badline/kernal_trap/dos/channel.rb +183 -0
  254. data/lib/badline/kernal_trap/{drive → dos}/channels.rb +1 -1
  255. data/lib/badline/kernal_trap/{drive → dos}/memory.rb +1 -1
  256. data/lib/badline/kernal_trap/{drive → dos}/parameters.rb +1 -1
  257. data/lib/badline/kernal_trap/{drive → dos}/status.rb +1 -1
  258. data/lib/badline/kernal_trap/{drive → dos}/write_file.rb +1 -1
  259. data/lib/badline/kernal_trap/{drive → dos}/writes.rb +1 -1
  260. data/lib/badline/kernal_trap/{drive.rb → dos.rb} +11 -10
  261. data/lib/badline/kernal_trap/load.rb +5 -5
  262. data/lib/badline/kernal_trap/save.rb +4 -4
  263. data/lib/badline/kernal_trap/serial.rb +7 -7
  264. data/lib/badline/kernal_trap.rb +1 -2
  265. data/lib/badline/machine/clocking.rb +1 -1
  266. data/lib/badline/machine.rb +5 -5
  267. data/lib/badline/media/true_drive.rb +1 -1
  268. data/lib/badline/media/tune.rb +2 -2
  269. data/lib/badline/media.rb +3 -3
  270. data/lib/badline/model.rb +1 -1
  271. data/lib/badline/roms/README +6 -6
  272. data/lib/badline/sdl.rb +1 -0
  273. data/lib/badline/{storage/sid_file.rb → sid_tune/file.rb} +3 -3
  274. data/lib/badline/{storage → sid_tune}/hvsc.rb +7 -7
  275. data/lib/badline/{storage → sid_tune}/song_lengths.rb +2 -2
  276. data/lib/badline/{storage → sid_tune}/stil/credit.rb +1 -1
  277. data/lib/badline/{storage → sid_tune}/stil.rb +3 -3
  278. data/lib/badline/sid_tune.rb +6 -0
  279. data/lib/badline/snapshot/c128_setup.rb +43 -0
  280. data/lib/badline/snapshot/c64_setup.rb +79 -0
  281. data/lib/badline/snapshot/image.rb +5 -25
  282. data/lib/badline/snapshot/machine_state.rb +1 -1
  283. data/lib/badline/snapshot/setup.rb +22 -66
  284. data/lib/badline/snapshot/state.rb +8 -18
  285. data/lib/badline/snapshot/storage_setup.rb +68 -0
  286. data/lib/badline/snapshot/vic20_setup.rb +37 -0
  287. data/lib/badline/snapshot/vice/c64_mem.rb +1 -1
  288. data/lib/badline/snapshot/vice/restore.rb +1 -1
  289. data/lib/badline/snapshot/vice/reu1764.rb +1 -1
  290. data/lib/badline/snapshot/vice/reu_fields.rb +40 -0
  291. data/lib/badline/snapshot/vice.rb +7 -5
  292. data/lib/badline/snapshot.rb +3 -4
  293. data/lib/badline/storage/d64_image.rb +0 -2
  294. data/lib/badline/storage/d71_image.rb +0 -2
  295. data/lib/badline/storage/d81_image.rb +0 -2
  296. data/lib/badline/storage/disk_image.rb +3 -6
  297. data/lib/badline/storage/g64_image.rb +2 -2
  298. data/lib/badline/storage/host_directory.rb +0 -5
  299. data/lib/badline/storage/t64.rb +2 -8
  300. data/lib/badline/storage/unavailable.rb +1 -1
  301. data/lib/badline/storage.rb +0 -37
  302. data/lib/badline/support/c128_checkpoint.rb +39 -0
  303. data/lib/badline/support/checkpoint.rb +108 -0
  304. data/lib/badline/support/vic20_checkpoint.rb +38 -0
  305. data/lib/badline/support.rb +5 -0
  306. data/lib/badline/version.rb +1 -1
  307. data/lib/badline/vic20/attachments.rb +5 -5
  308. data/lib/badline/vic20/bus/saved_state.rb +35 -0
  309. data/lib/badline/vic20/bus.rb +3 -25
  310. data/lib/badline/vic20/cpu.rb +1 -1
  311. data/lib/badline/vic20/port_wiring.rb +4 -4
  312. data/lib/badline/vic20/saved_state.rb +16 -30
  313. data/lib/badline/vic20/user_via_ports.rb +2 -2
  314. data/lib/badline/vic20.rb +19 -14
  315. metadata +245 -221
  316. data/lib/badline/address_bus/extra_sids.rb +0 -30
  317. data/lib/badline/address_bus/fittings.rb +0 -38
  318. data/lib/badline/address_bus/pla.rb +0 -147
  319. data/lib/badline/address_bus/roms.rb +0 -39
  320. data/lib/badline/address_bus/saved_state.rb +0 -66
  321. data/lib/badline/address_bus/sid_slots.rb +0 -42
  322. data/lib/badline/address_bus.rb +0 -216
  323. data/lib/badline/cartridge/action_replay.rb +0 -126
  324. data/lib/badline/cartridge/atomic_power.rb +0 -24
  325. data/lib/badline/cartridge/bank.rb +0 -81
  326. data/lib/badline/cartridge/comal80.rb +0 -50
  327. data/lib/badline/cartridge/dinamic.rb +0 -34
  328. data/lib/badline/cartridge/easy_flash.rb +0 -145
  329. data/lib/badline/cartridge/epyx_fastload.rb +0 -79
  330. data/lib/badline/cartridge/final_cartridge3.rb +0 -89
  331. data/lib/badline/cartridge/flash.rb +0 -306
  332. data/lib/badline/cartridge/freezer.rb +0 -33
  333. data/lib/badline/cartridge/fun_play.rb +0 -38
  334. data/lib/badline/cartridge/g_mod2.rb +0 -74
  335. data/lib/badline/cartridge/game_system.rb +0 -40
  336. data/lib/badline/cartridge/geo_ram.rb +0 -79
  337. data/lib/badline/cartridge/kcs_power.rb +0 -75
  338. data/lib/badline/cartridge/mach5.rb +0 -32
  339. data/lib/badline/cartridge/magic_desk.rb +0 -30
  340. data/lib/badline/cartridge/ocean.rb +0 -35
  341. data/lib/badline/cartridge/pagefox.rb +0 -68
  342. data/lib/badline/cartridge/retro_replay.rb +0 -320
  343. data/lib/badline/cartridge/rex_utility.rb +0 -29
  344. data/lib/badline/cartridge/rgcd.rb +0 -58
  345. data/lib/badline/cartridge/simons_basic.rb +0 -35
  346. data/lib/badline/cartridge/standard.rb +0 -15
  347. data/lib/badline/cartridge/super_games.rb +0 -48
  348. data/lib/badline/cartridge/westermann.rb +0 -30
  349. data/lib/badline/cartridge/zaxxon.rb +0 -66
  350. data/lib/badline/cartridge.rb +0 -303
  351. data/lib/badline/checkpoint.rb +0 -98
  352. data/lib/badline/cia/fast_forward.rb +0 -60
  353. data/lib/badline/cia/interrupt_register.rb +0 -143
  354. data/lib/badline/cia/serial.rb +0 -275
  355. data/lib/badline/cia/state.rb +0 -47
  356. data/lib/badline/cia/timer.rb +0 -206
  357. data/lib/badline/cia.rb +0 -279
  358. data/lib/badline/color_memory.rb +0 -25
  359. data/lib/badline/control_ports.rb +0 -76
  360. data/lib/badline/cpu/addressing.rb +0 -131
  361. data/lib/badline/cpu/boundary.rb +0 -54
  362. data/lib/badline/cpu/core.rb +0 -165
  363. data/lib/badline/cpu/microcode.rb +0 -177
  364. data/lib/badline/cpu/operations.rb +0 -88
  365. data/lib/badline/cpu/saved_state.rb +0 -115
  366. data/lib/badline/cpu/stack_operations.rb +0 -82
  367. data/lib/badline/cpu.rb +0 -10
  368. data/lib/badline/cpu_port.rb +0 -112
  369. data/lib/badline/datasette.rb +0 -161
  370. data/lib/badline/drive/core.rb +0 -147
  371. data/lib/badline/drive/fast_serial.rb +0 -73
  372. data/lib/badline/drive/idle.rb +0 -125
  373. data/lib/badline/drive/idle_cpu.rb +0 -28
  374. data/lib/badline/drive/orbit.rb +0 -79
  375. data/lib/badline/drive/serial_lines.rb +0 -73
  376. data/lib/badline/drive/sleep.rb +0 -112
  377. data/lib/badline/drive/vias.rb +0 -84
  378. data/lib/badline/drive/watch.rb +0 -150
  379. data/lib/badline/drive.rb +0 -11
  380. data/lib/badline/drive1541/bus.rb +0 -86
  381. data/lib/badline/drive1541/byte_ready.rb +0 -48
  382. data/lib/badline/drive1541/cpu.rb +0 -11
  383. data/lib/badline/drive1541/disk.rb +0 -315
  384. data/lib/badline/drive1541/disk_state.rb +0 -86
  385. data/lib/badline/drive1541/disk_via.rb +0 -36
  386. data/lib/badline/drive1541/gcr.rb +0 -57
  387. data/lib/badline/drive1541/mechanism.rb +0 -313
  388. data/lib/badline/drive1541/mechanism_state.rb +0 -68
  389. data/lib/badline/drive1541/rotation.rb +0 -121
  390. data/lib/badline/drive1541/sector_reader.rb +0 -76
  391. data/lib/badline/drive1541/serial_port.rb +0 -18
  392. data/lib/badline/drive1541/track.rb +0 -98
  393. data/lib/badline/drive1541.rb +0 -111
  394. data/lib/badline/drive1571/bus.rb +0 -111
  395. data/lib/badline/drive1571/cpu.rb +0 -11
  396. data/lib/badline/drive1571/serial_port.rb +0 -37
  397. data/lib/badline/drive1571/serial_via.rb +0 -25
  398. data/lib/badline/drive1571/wd1770.rb +0 -120
  399. data/lib/badline/drive1571.rb +0 -175
  400. data/lib/badline/drive1581/bus.rb +0 -137
  401. data/lib/badline/drive1581/cpu.rb +0 -11
  402. data/lib/badline/drive1581/disk.rb +0 -135
  403. data/lib/badline/drive1581/disk_state.rb +0 -87
  404. data/lib/badline/drive1581/mechanism.rb +0 -117
  405. data/lib/badline/drive1581/serial_port.rb +0 -52
  406. data/lib/badline/drive1581/slot.rb +0 -78
  407. data/lib/badline/drive1581/track.rb +0 -100
  408. data/lib/badline/drive1581/track_bytes.rb +0 -75
  409. data/lib/badline/drive1581/wd1772/registers.rb +0 -89
  410. data/lib/badline/drive1581/wd1772/sector_writes.rb +0 -73
  411. data/lib/badline/drive1581/wd1772/sectors.rb +0 -150
  412. data/lib/badline/drive1581/wd1772/state.rb +0 -66
  413. data/lib/badline/drive1581/wd1772/stepping.rb +0 -109
  414. data/lib/badline/drive1581/wd1772/tracks.rb +0 -125
  415. data/lib/badline/drive1581/wd1772/turn.rb +0 -73
  416. data/lib/badline/drive1581/wd1772.rb +0 -216
  417. data/lib/badline/drive1581.rb +0 -233
  418. data/lib/badline/iec_bus.rb +0 -159
  419. data/lib/badline/instruction.rb +0 -334
  420. data/lib/badline/instruction_set/arithmetic.rb +0 -114
  421. data/lib/badline/instruction_set/bitwise.rb +0 -126
  422. data/lib/badline/instruction_set/branch.rb +0 -79
  423. data/lib/badline/instruction_set/flag.rb +0 -63
  424. data/lib/badline/instruction_set/illegal.rb +0 -270
  425. data/lib/badline/instruction_set/inc_dec.rb +0 -69
  426. data/lib/badline/instruction_set/stack.rb +0 -52
  427. data/lib/badline/instruction_set/transfer.rb +0 -137
  428. data/lib/badline/instruction_set.rb +0 -55
  429. data/lib/badline/interrupts.rb +0 -104
  430. data/lib/badline/joystick.rb +0 -25
  431. data/lib/badline/kernal_trap/channel.rb +0 -181
  432. data/lib/badline/keyboard.rb +0 -112
  433. data/lib/badline/ram_expansion/banking.rb +0 -30
  434. data/lib/badline/ram_expansion/plus256k.rb +0 -54
  435. data/lib/badline/ram_expansion/plus60k.rb +0 -43
  436. data/lib/badline/ram_expansion/unexpanded.rb +0 -28
  437. data/lib/badline/ram_expansion.rb +0 -21
  438. data/lib/badline/reu/dma/saved_state.rb +0 -50
  439. data/lib/badline/reu/dma.rb +0 -273
  440. data/lib/badline/reu/ram.rb +0 -107
  441. data/lib/badline/reu/saved_state.rb +0 -80
  442. data/lib/badline/reu/trigger.rb +0 -32
  443. data/lib/badline/reu.rb +0 -289
  444. data/lib/badline/sid/catch_up.rb +0 -120
  445. data/lib/badline/sid/decimator.rb +0 -64
  446. data/lib/badline/sid/envelope/state.rb +0 -68
  447. data/lib/badline/sid/envelope.rb +0 -239
  448. data/lib/badline/sid/filter.rb +0 -263
  449. data/lib/badline/sid/voice.rb +0 -77
  450. data/lib/badline/sid/waveform/combined.rb +0 -126
  451. data/lib/badline/sid/waveform/fast_forward.rb +0 -105
  452. data/lib/badline/sid/waveform/noise_writeback.rb +0 -122
  453. data/lib/badline/sid/waveform/state.rb +0 -66
  454. data/lib/badline/sid/waveform.rb +0 -305
  455. data/lib/badline/sid.rb +0 -303
  456. data/lib/badline/time_of_day.rb +0 -228
  457. data/lib/badline/traps.rb +0 -19
  458. data/lib/badline/via/control_lines.rb +0 -122
  459. data/lib/badline/via/fast_forward.rb +0 -53
  460. data/lib/badline/via/interrupt_register.rb +0 -67
  461. data/lib/badline/via/shift_register.rb +0 -180
  462. data/lib/badline/via/state.rb +0 -42
  463. data/lib/badline/via/timer1.rb +0 -131
  464. data/lib/badline/via/timer2.rb +0 -133
  465. data/lib/badline/via.rb +0 -266
  466. data/lib/badline/vic/bank.rb +0 -133
  467. data/lib/badline/vic/border_mask.rb +0 -86
  468. data/lib/badline/vic/collisions.rb +0 -115
  469. data/lib/badline/vic/color_patches.rb +0 -47
  470. data/lib/badline/vic/display_state.rb +0 -185
  471. data/lib/badline/vic/graphics_mode.rb +0 -164
  472. data/lib/badline/vic/graphics_shifter.rb +0 -207
  473. data/lib/badline/vic/register_log.rb +0 -81
  474. data/lib/badline/vic/registers.rb +0 -195
  475. data/lib/badline/vic/sequencer.rb +0 -275
  476. data/lib/badline/vic/sequencer_output.rb +0 -116
  477. data/lib/badline/vic/sequencer_state.rb +0 -89
  478. data/lib/badline/vic/sprite/internal_bus.rb +0 -68
  479. data/lib/badline/vic/sprite/saved_state.rb +0 -64
  480. data/lib/badline/vic/sprite/shifter.rb +0 -146
  481. data/lib/badline/vic/sprite/timing.rb +0 -56
  482. data/lib/badline/vic/sprite.rb +0 -337
  483. data/lib/badline/vic/sprites.rb +0 -282
  484. data/lib/badline/vic/sprites_state.rb +0 -57
  485. data/lib/badline/vic.rb +0 -853
  486. data/lib/badline/vic20/sound/output.rb +0 -83
  487. data/lib/badline/vic20/sound.rb +0 -233
  488. data/lib/badline/z80/arithmetic.rb +0 -117
  489. data/lib/badline/z80/bit_page.rb +0 -55
  490. data/lib/badline/z80/block_io.rb +0 -58
  491. data/lib/badline/z80/block_transfers.rb +0 -59
  492. data/lib/badline/z80/bus_cycles.rb +0 -111
  493. data/lib/badline/z80/core.rb +0 -113
  494. data/lib/badline/z80/exchanges.rb +0 -50
  495. data/lib/badline/z80/extended_page.rb +0 -89
  496. data/lib/badline/z80/flags.rb +0 -37
  497. data/lib/badline/z80/interrupt_acceptance.rb +0 -46
  498. data/lib/badline/z80/jumps.rb +0 -82
  499. data/lib/badline/z80/loads.rb +0 -98
  500. data/lib/badline/z80/main_page.rb +0 -134
  501. data/lib/badline/z80/registers.rb +0 -120
  502. data/lib/badline/z80/saved_state.rb +0 -69
  503. data/lib/badline/z80/shifts.rb +0 -64
  504. data/lib/badline/z80.rb +0 -11
  505. /data/lib/badline/snapshot/{fields.rb → vice/fields.rb} +0 -0
@@ -1,79 +0,0 @@
1
- # frozen_string_literal: true
2
-
3
- module Badline
4
- module Drive
5
- # Sleeping through the DOS's timer interrupts, exactly, once they come
6
- # round.
7
- #
8
- # VIA 2's timer 1 interrupts the idle loop for the job loop, which
9
- # finds no job, restarts the timer and returns into the pass it cut
10
- # into, 14,998 cycles and more apart. The interrupts land at a
11
- # different point in the pass each time, until, six of them on, the
12
- # whole drive is back where it was: an orbit of 90,044 cycles.
13
- #
14
- # Each place the drive falls asleep (see Idle) is an anchor, and the
15
- # drive keeps everything it holds at each one: RAM, the counters of
16
- # the timers that are armed or that it read or wrote since, and the
17
- # rest as Idle compares a pass. It keeps them only while it keeps to
18
- # itself, with Bus#guard! checking that it doesn't read the serial
19
- # bus, write VIA 1, turn the motor on or change the LED. ATN moving,
20
- # or a reader settling the drive, forgets them.
21
- #
22
- # Coming to an anchor it kept before closes an orbit, which runs the
23
- # same way again from here for as long as ATN holds still, so the
24
- # drive sleeps on without waking for its counters. Waking counts off
25
- # the whole orbits it owes in bulk, moving on only the counters it
26
- # never touched, and runs the rest as Idle does.
27
- module Orbit
28
- # How many anchors the drive keeps while it looks for an orbit.
29
- ANCHORS = 32
30
-
31
- private
32
-
33
- def init_orbits
34
- @anchors = {}
35
- @orbit_cycles = nil
36
- @orbit_instructions = 0
37
- @bus.guard!
38
- end
39
-
40
- # The drive falls asleep at an anchor. One it came to before closes
41
- # an orbit: everything from there to here runs the same way again.
42
- def anchor
43
- forget_orbits if @bus.tainted || @anchors.size >= ANCHORS
44
- key = anchor_state
45
- if (seen = @anchors[key])
46
- @orbit_cycles = @cycles - seen[0]
47
- @orbit_instructions = @cpu.instructions - seen[1]
48
- else
49
- @anchors[key] = [@cycles, @cpu.instructions]
50
- end
51
- end
52
-
53
- def forget_orbits
54
- @anchors.clear
55
- @orbit_cycles = nil
56
- @bus.guard!
57
- end
58
-
59
- # Runs whole orbits, which bring the drive back to the anchor it
60
- # sleeps at but for the counters it never touched. Returns the
61
- # cycles.
62
- def skip_orbits(orbits)
63
- cycles = orbits * @orbit_cycles
64
- touched = @bus.touched_timers
65
- @cpu.fast_forward(cycles, orbits * @orbit_instructions)
66
- skip_chip_orbits(cycles, touched)
67
- @cycles += cycles
68
- cycles
69
- end
70
-
71
- # Everything the drive holds at an anchor, but for the counters of
72
- # the unarmed timers it hasn't touched since it was last tainted.
73
- def anchor_state
74
- touched = @bus.touched_timers
75
- [*idle_state, *counter_state(touched), @bus.ram.snapshot]
76
- end
77
- end
78
- end
79
- end
@@ -1,73 +0,0 @@
1
- # frozen_string_literal: true
2
-
3
- module Badline
4
- module Drive
5
- # What VIA 1's port B reads from the serial bus. DATA IN (PB0), CLK IN
6
- # (PB2) and ATN IN (PB7) come through inverters, so a released line
7
- # reads 0 and a pulled one 1. The jumpers on PB5 and PB6 pull a line
8
- # low when closed, and both closed make device 8.
9
- #
10
- # The drive sees the host's side of the bus a host cycle late. The
11
- # host's CIA changes its pins at the end of the cycle that writes them,
12
- # and the drive's VIA samples its own late in each of its cycles, so a
13
- # drive cycle that runs alongside the write reads the lines from
14
- # before it. The drive runs after the host in each host cycle (see
15
- # Computer#cycle!), so the port reads the host's lines as latch_host
16
- # took them at the end of the last one. Fast loaders that time their
17
- # transfer from an ATN edge, as VICE's drive tests do, depend on it.
18
- #
19
- # A model's serial port includes it, with its own port A.
20
- module SerialLines
21
- DATA_IN = 0x01
22
- CLK_IN = 0x04
23
- ATN_IN = 0x80
24
- SERIAL_INPUTS = DATA_IN | CLK_IN | ATN_IN
25
- JUMPERS = 0b0110_0000
26
-
27
- attr_reader :bus
28
-
29
- def bus=(bus)
30
- @bus = bus
31
- latch_host
32
- end
33
-
34
- # Takes the host's lines as the machine last pushed them into the bus,
35
- # for the drive cycles of the next host cycle.
36
- def latch_host
37
- @host = @bus.host_lines
38
- end
39
-
40
- # The host's lines as last latched. The jumpers and the bus are the
41
- # drive's wiring.
42
- def save_state(out)
43
- out.int(@host)
44
- end
45
-
46
- def load_state(input)
47
- @host = input.int
48
- end
49
-
50
- # Whether the host has moved ATN since the last latch_host.
51
- def atn_moved? = (@bus.host_lines ^ @host).anybits?(IECBus::HOST_ATN_OUT)
52
-
53
- def atn_low? = @bus.atn_low?(@host)
54
-
55
- def read_b(_lines)
56
- low = @bus.low_lines(@host)
57
- value = @port_b
58
- value |= DATA_IN if low.anybits?(IECBus::DATA)
59
- value |= CLK_IN if low.anybits?(IECBus::CLK)
60
- value |= ATN_IN if low.anybits?(IECBus::ATN)
61
- value
62
- end
63
-
64
- private
65
-
66
- def init_serial_lines(device, bus)
67
- @port_b = (0xff & ~(SERIAL_INPUTS | JUMPERS)) | (((device - 8) & 0x03) << 5)
68
- @host = 0
69
- self.bus = bus
70
- end
71
- end
72
- end
73
- end
@@ -1,112 +0,0 @@
1
- # frozen_string_literal: true
2
-
3
- module Badline
4
- module Drive
5
- # The drive asleep, as Idle and Orbit let it: host_cycle! counts the
6
- # host cycles that go by, and waking turns them into drive cycles
7
- # through the phase accumulator and runs them. Whole orbits and whole
8
- # passes go in bulk, and the rest cycle by cycle, which may find the
9
- # idle loop and put the drive back to sleep.
10
- #
11
- # The drive looks at ATN only when the machine may have moved it, as
12
- # it pushes its lines into the bus (IECBus#host_lines=).
13
- module Sleep
14
- # Whether the drive is skipping its idle loop right now.
15
- def asleep? = @asleep
16
-
17
- # Brings the drive up to the present, cycle for cycle, and drops the
18
- # pass it was recording and the orbits it found, since whoever called
19
- # may change it. Every reader of the drive's parts calls this.
20
- def settle!
21
- if @asleep
22
- wake!
23
- @serial_port.latch_host
24
- @asleep = false
25
- @orbit_cycles = nil
26
- end
27
- stop_recording if @recording
28
- forget_orbits
29
- end
30
-
31
- private
32
-
33
- def init_sleep
34
- @asleep = false
35
- @host_still = false
36
- @owed = 0
37
- @budget = 0
38
- @slept = 0
39
- @wake_at = 0
40
- end
41
-
42
- # A host cycle asleep that may wake the drive. The next ones need no
43
- # look at ATN until the machine pushes its lines again.
44
- def doze
45
- @host_still = true
46
- if @serial_port.atn_moved?
47
- settle!
48
- elsif @slept == @wake_at
49
- wake!
50
- @serial_port.latch_host
51
- plan_wake if @asleep
52
- end
53
- end
54
-
55
- # Asleep, host_cycle! counts host cycles, and leaves it to wake! to
56
- # turn them into drive cycles through the phase accumulator. This sets
57
- # the host cycle that brings the drive cycles owed up to the budget.
58
- # On an orbit the drive sleeps until something outside wakes it:
59
- # @slept counts from 1, so it never comes to 0.
60
- def plan_wake
61
- @slept = 0
62
- return @wake_at = 0 if @orbit_cycles
63
-
64
- needed = ((@budget - @owed) * @host_clock_hz) - @phase
65
- @wake_at = needed.positive? ? (needed + @clock_hz - 1) / @clock_hz : 1
66
- end
67
-
68
- # Runs the cycles owed.
69
- def wake!
70
- phase = @phase + (@slept * @clock_hz)
71
- @phase = phase % @host_clock_hz
72
- owed = @owed + (phase / @host_clock_hz)
73
- @owed = 0
74
- @slept = 0
75
- catch_up(owed)
76
- end
77
-
78
- # Runs +owed+ drive cycles: whole orbits and whole passes in bulk,
79
- # passes only up to the budget, and the rest cycle by cycle, which
80
- # may put the drive back to sleep.
81
- def catch_up(owed)
82
- while owed.positive?
83
- if @asleep
84
- if @orbit_cycles && owed >= @orbit_cycles
85
- owed -= skip_orbits(owed / @orbit_cycles)
86
- next
87
- end
88
- @orbit_cycles = nil
89
- passes = [owed, @budget].min / @pass_cycles
90
- if passes.positive?
91
- owed -= skip_passes(passes)
92
- next
93
- end
94
- @asleep = false
95
- end
96
- run_cycle
97
- owed -= 1
98
- end
99
- end
100
-
101
- # Runs whole passes, moving the counters on. Returns the cycles.
102
- def skip_passes(passes)
103
- cycles = passes * @pass_cycles
104
- @cpu.fast_forward(cycles, passes * @pass_instructions)
105
- fast_forward_chips(cycles)
106
- @cycles += cycles
107
- @budget -= cycles
108
- cycles
109
- end
110
- end
111
- end
112
- end
@@ -1,84 +0,0 @@
1
- # frozen_string_literal: true
2
-
3
- module Badline
4
- module Drive
5
- # The two VIAs the 1541 and the 1571 share: VIA 1 facing the serial
6
- # bus, its CA1 on ATN, and VIA 2 running the GCR Mechanism. A model
7
- # includes it beside Core, and it answers Core's, Idle's and Orbit's
8
- # questions about the chips: what they hold, how long their counters
9
- # leave them quiet, and how to run them a stretch at once. A model with
10
- # more chips on its bus runs them in fast_forward_more.
11
- module VIAs
12
- def via1
13
- settle!
14
- @via1
15
- end
16
-
17
- def via2
18
- settle!
19
- @via2
20
- end
21
-
22
- # Puts in a Disk from the .d64, .g64, .d71 or .g71 image at +path+
23
- # (Drive1541::Disk.open), write-protected with `read_only`.
24
- def insert_image(path, read_only: false)
25
- insert(Drive1541::Disk.open(path, read_only:))
26
- end
27
-
28
- # VIA 1's port B as it drives the serial bus. It holds still while the
29
- # drive sleeps, so reading it leaves the drive asleep.
30
- def serial_output = @via1.port_b_output
31
-
32
- # The serial bus's RESET line reaches the CPU and both VIAs. RAM keeps
33
- # its contents.
34
- def reset!
35
- settle!
36
- @via1.reset!
37
- @via2.reset!
38
- @cpu.reset!
39
- end
40
-
41
- private
42
-
43
- # ATN reaches VIA 1's CA1 as the serial port latched it.
44
- def hear_atn
45
- @via1.ca1 = @serial_port.atn_low?
46
- end
47
-
48
- # Whether the drive is doing anything a pass of the idle loop can't
49
- # repeat: the motor on, or a VIA pulling IRQ.
50
- def busy_for_pass? = @mechanism.motor_on? || @via1.irq? || @via2.irq?
51
-
52
- def quiet_cycles
53
- [@via1.quiet_cycles, @via2.quiet_cycles].min
54
- end
55
-
56
- def idle_state
57
- mechanism = @mechanism
58
- [*@cpu.idle_state, *@via1.idle_state, *@via2.idle_state, @bus.data, mechanism.so_pending,
59
- *mechanism.idle_state, mechanism.read_a(0xff), mechanism.read_b(0xff)]
60
- end
61
-
62
- # The counters an orbit has to bring back (VIA#counter_state).
63
- def counter_state(touched)
64
- [*@via1.counter_state(touched & 0x03), *@via2.counter_state(touched >> 2)]
65
- end
66
-
67
- def fast_forward_chips(cycles)
68
- @via1.fast_forward(cycles)
69
- @via2.fast_forward(cycles)
70
- fast_forward_more(cycles)
71
- end
72
-
73
- def skip_chip_orbits(cycles, touched)
74
- @via1.skip_orbits(cycles, touched & 0x03)
75
- @via2.skip_orbits(cycles, touched >> 2)
76
- fast_forward_more(cycles)
77
- end
78
-
79
- # Runs the model's chips beyond the VIAs +cycles+ quiet cycles at once
80
- # (see quiet_cycles). The 1541 has none.
81
- def fast_forward_more(_cycles) = nil
82
- end
83
- end
84
- end
@@ -1,150 +0,0 @@
1
- # frozen_string_literal: true
2
-
3
- module Badline
4
- module Drive
5
- # A drive bus's eye on what the CPU reaches, for Idle and Orbit. While
6
- # Idle records a pass of the DOS's idle loop, the bus watches it (see
7
- # watch!). While Idle looks for an orbit, the bus guards the drive
8
- # (see guard!). The bus calls watch_read and watch_write with the
9
- # address folded into $0000-$1FFF, RAM and the two VIAs at $1800 and
10
- # $1C00, while @watching.
11
- module Watch
12
- # VIA registers, as bits by offset, whose access makes a watched
13
- # stretch volatile: reads of either VIA's counters and shift register
14
- # and of VIA 1's port B, and writes to VIA 2's timers, shift register
15
- # and ACR. Any write to VIA 1 does too (watch_write).
16
- VOLATILE_VIA1_READS = 0x0731
17
- VOLATILE_VIA2_READS = 0x0730
18
- VOLATILE_VIA2_WRITES = 0x0ff0
19
-
20
- # The timer each VIA register reaches, by offset, as bits: 1 for
21
- # timer 1 and 2 for timer 2.
22
- TIMER_REGISTERS = [0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 0, 0, 0, 0, 0, 0].freeze
23
-
24
- # Whether a watched stretch did something that makes it unrepeatable.
25
- attr_reader :volatile
26
-
27
- # The RAM a watched stretch read or wrote, as each address's value
28
- # from before the first access.
29
- attr_reader :touched
30
-
31
- # Whether the drive did something since guard! that reached outside
32
- # it, or took something in from outside.
33
- attr_reader :tainted
34
-
35
- # The timers the drive read or wrote since guard!, as bits: VIA 1's
36
- # timer 1 and timer 2 in bits 0 and 1, and VIA 2's in bits 2 and 3.
37
- attr_reader :touched_timers
38
-
39
- # Starts watching: see volatile and touched. The bus stops watching
40
- # once the stretch turns volatile.
41
- def watch!
42
- @recording = true
43
- @volatile = false
44
- @touched = {}
45
- watching!
46
- end
47
-
48
- def unwatch!
49
- @recording = false
50
- watching!
51
- end
52
-
53
- # Starts guarding: see tainted and touched_timers. Reading VIA 1's
54
- # port B, which reads the serial bus, taints the drive, and so do
55
- # any write to VIA 1, whose port B drives the serial bus, a write to
56
- # VIA 2's shift register or ACR, and VIA 2 turning the motor on or
57
- # changing the LED. The bus stops guarding once the drive is tainted.
58
- def guard!
59
- @guarding = true
60
- @tainted = false
61
- @touched_timers = 0
62
- @led = @via2.port_b_output & Drive1541::Mechanism::LED
63
- watching!
64
- end
65
-
66
- private
67
-
68
- def init_watch
69
- @recording = @guarding = @watching = false
70
- @volatile = @tainted = false
71
- @touched = {}
72
- @touched_timers = 0
73
- @led = 0
74
- end
75
-
76
- def watching!
77
- @watching = @recording || @guarding
78
- end
79
-
80
- # An access to a chip beyond the VIAs, as the 1571's CIA and floppy
81
- # controller are: it makes the stretch volatile and taints the
82
- # drive.
83
- def watch_chip
84
- volatile! if @recording
85
- taint! if @guarding
86
- end
87
-
88
- def touch(addr)
89
- @touched[addr] = @ram.peek(addr) unless @touched.key?(addr)
90
- end
91
-
92
- def watch_read(addr)
93
- if addr < 0x0800
94
- touch(addr) if @recording
95
- elsif addr >= 0x1800
96
- via1 = addr < 0x1c00
97
- watch(via1 ? VOLATILE_VIA1_READS : VOLATILE_VIA2_READS, addr) if @recording
98
- guard_read(via1, addr & 0x0f) if @guarding
99
- end
100
- end
101
-
102
- def watch_write(addr)
103
- if addr >= 0x1c00
104
- watch_via2_write(addr) if @recording
105
- guard_via2_write(addr & 0x0f) if @guarding
106
- elsif addr >= 0x1800
107
- volatile! if @recording
108
- taint! if @guarding
109
- end
110
- end
111
-
112
- # Any write to VIA 1 makes the stretch volatile (watch_write), and so
113
- # does a write to VIA 2 that leaves the motor on.
114
- def watch_via2_write(addr)
115
- watch(VOLATILE_VIA2_WRITES, addr)
116
- volatile! if @recording && @via2.port_b_output.anybits?(Drive1541::Mechanism::MOTOR)
117
- end
118
-
119
- def watch(volatile, addr)
120
- volatile! if volatile.anybits?(1 << (addr & 0x0f))
121
- end
122
-
123
- def volatile!
124
- @volatile = true
125
- @recording = false
126
- watching!
127
- end
128
-
129
- def guard_read(via1, offset)
130
- return taint! if via1 && offset.zero?
131
-
132
- @touched_timers |= via1 ? TIMER_REGISTERS[offset] : TIMER_REGISTERS[offset] << 2
133
- end
134
-
135
- def guard_via2_write(offset)
136
- return taint! if offset.between?(0x0a, 0x0b)
137
-
138
- @touched_timers |= TIMER_REGISTERS[offset] << 2
139
- lines = @via2.port_b_output
140
- taint! if lines.anybits?(Drive1541::Mechanism::MOTOR) || (lines & Drive1541::Mechanism::LED) != @led
141
- end
142
-
143
- def taint!
144
- @tainted = true
145
- @guarding = false
146
- watching!
147
- end
148
- end
149
- end
150
- end
data/lib/badline/drive.rb DELETED
@@ -1,11 +0,0 @@
1
- # frozen_string_literal: true
2
-
3
- require "badline/drive/sleep"
4
- require "badline/drive/idle"
5
- require "badline/drive/orbit"
6
- require "badline/drive/core"
7
- require "badline/drive/vias"
8
- require "badline/drive/fast_serial"
9
- require "badline/drive/idle_cpu"
10
- require "badline/drive/watch"
11
- require "badline/drive/serial_lines"
@@ -1,86 +0,0 @@
1
- # frozen_string_literal: true
2
-
3
- module Badline
4
- class Drive1541
5
- # The drive CPU's bus. The decoder looks at A15, A12, A11 and A10 only:
6
- #
7
- # $0000-$07FF - 2 KB of RAM
8
- # $0800-$17FF - nothing: open bus
9
- # $1800-$1BFF - VIA 1, its sixteen registers mirrored
10
- # $1C00-$1FFF - VIA 2, its sixteen registers mirrored
11
- # $2000-$7FFF - $0000-$1FFF again, since A13 and A14 aren't decoded
12
- # $8000-$BFFF - the ROM again, since A14 isn't decoded
13
- # $C000-$FFFF - the DOS ROM
14
- #
15
- # Writes to the ROM and to open bus go nowhere. A read from open bus
16
- # finds the last byte on the data bus, which for LDA abs or LDA (zp),Y
17
- # is the address's high byte, and for an indexed read that crosses a
18
- # page is what its dummy read found. VICE-testprogs drive/openbus pins
19
- # both on a real 1541.
20
- #
21
- # While Idle records a pass of the DOS's idle loop, the bus watches it,
22
- # and while Idle looks for an orbit, it guards the drive (see
23
- # Drive::Watch).
24
- class Bus
25
- include Addressable
26
- include Drive::Watch
27
-
28
- attr_reader :ram, :rom, :via1, :via2, :data
29
-
30
- def initialize(rom:, via1:, via2:)
31
- addressable_at(0, length: 2**16)
32
- @ram = Memory.new([], length: 0x0800, start: 0)
33
- @rom = rom
34
- @via1 = via1
35
- @via2 = via2
36
- @data = 0
37
- init_watch
38
- end
39
-
40
- # The last byte on the data bus and the RAM. What a watched stretch
41
- # touched is Idle's, and a restored bus isn't watching.
42
- def save_state(out)
43
- out.int(@data)
44
- @ram.save_state(out)
45
- end
46
-
47
- def load_state(input)
48
- @data = input.int
49
- @ram.load_state(input)
50
- @watching = false
51
- end
52
-
53
- def peek(addr)
54
- return @data = @rom.peek(addr | 0x4000) if addr >= 0x8000
55
-
56
- addr &= 0x1fff
57
- watch_read(addr) if @watching
58
- @data = if addr < 0x0800
59
- @ram.peek(addr)
60
- elsif addr < 0x1800
61
- @data
62
- elsif addr < 0x1c00
63
- @via1.peek(addr)
64
- else
65
- @via2.peek(addr)
66
- end
67
- end
68
-
69
- def poke(addr, value)
70
- @data = value
71
- return if addr >= 0x8000
72
-
73
- addr &= 0x1fff
74
- if addr < 0x0800
75
- touch(addr) if @recording
76
- @ram.poke(addr, value)
77
- elsif addr >= 0x1c00
78
- @via2.poke(addr, value)
79
- elsif addr >= 0x1800
80
- @via1.poke(addr, value)
81
- end
82
- watch_write(addr) if @watching
83
- end
84
- end
85
- end
86
- end
@@ -1,48 +0,0 @@
1
- # frozen_string_literal: true
2
-
3
- module Badline
4
- class Drive1541
5
- # The Mechanism's BYTE READY line: to VIA 2's CA1, to the CPU's SO pin
6
- # through SOE, and on the 1571 to a latch VIA 1's PA7 reads.
7
- module ByteReady
8
- # VIA 2, which DiskVIA plugs in.
9
- attr_writer :via
10
-
11
- # Whether BYTE READY reached SO for the CPU to sample on the drive's
12
- # next cycle.
13
- attr_accessor :so_pending
14
-
15
- # Whether SO is pending, which the drive's cycle samples and clears.
16
- def take_so
17
- so = @so_pending
18
- @so_pending = false
19
- so
20
- end
21
-
22
- # The read electronics signal a whole GCR byte. BYTE READY pulls VIA
23
- # 2's CA1 low, a falling edge that sets its flag and, with latching
24
- # on, latches port A. It reaches the CPU's SO pin while VIA 2's CA2
25
- # (SOE) is high, which lets the DOS spin on BVC for each byte. The CPU
26
- # samples SO on the next cycle.
27
- def byte_ready!
28
- @byte_latched = true
29
- @via.ca1 = false
30
- @so_pending = true if @via.ca2_output
31
- end
32
-
33
- # BYTE READY lets go of CA1 with the next bit.
34
- def byte_ready_ended!
35
- @via.ca1 = true
36
- end
37
-
38
- # Whether BYTE READY has come since the CPU last read VIA 2, as the
39
- # 1571 latches it for VIA 1's PA7.
40
- def byte_latched? = @byte_latched
41
-
42
- # A read of VIA 2 clears the 1571's BYTE READY latch.
43
- def release_byte_latch
44
- @byte_latched = false
45
- end
46
- end
47
- end
48
- end
@@ -1,11 +0,0 @@
1
- # frozen_string_literal: true
2
-
3
- module Badline
4
- class Drive1541
5
- # The drive's 6502, on the drive's Bus.
6
- class CPU
7
- include Badline::CPU::Core
8
- include Drive::IdleCPU
9
- end
10
- end
11
- end