smallworld-re 1.0.3__py3-none-any.whl → 2.0.0__py3-none-any.whl

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (306) hide show
  1. smallworld/analyses/__init__.py +8 -0
  2. smallworld/analyses/analysis.py +8 -67
  3. smallworld/analyses/code_coverage.py +1 -2
  4. smallworld/analyses/colorizer.py +301 -534
  5. smallworld/analyses/colorizer_def_use.py +217 -0
  6. smallworld/analyses/colorizer_summary.py +173 -83
  7. smallworld/analyses/field_detection/field_analysis.py +7 -8
  8. smallworld/analyses/field_detection/hints.py +1 -1
  9. smallworld/analyses/field_detection/malloc.py +2 -2
  10. smallworld/analyses/trace_execution.py +160 -0
  11. smallworld/analyses/trace_execution_types.py +42 -0
  12. smallworld/analyses/unstable/angr/divergence.py +1 -2
  13. smallworld/analyses/unstable/angr/model.py +5 -6
  14. smallworld/analyses/unstable/angr_nwbt.py +3 -4
  15. smallworld/analyses/unstable/code_coverage.py +2 -3
  16. smallworld/analyses/unstable/code_reachable.py +2 -3
  17. smallworld/analyses/unstable/control_flow_tracer.py +2 -3
  18. smallworld/analyses/unstable/pointer_finder.py +2 -3
  19. smallworld/analyses/unstable/utils/tui.py +71 -0
  20. smallworld/emulators/__init__.py +3 -1
  21. smallworld/emulators/angr/angr.py +30 -9
  22. smallworld/emulators/angr/machdefs/__init__.py +2 -0
  23. smallworld/emulators/angr/machdefs/aarch64.py +1 -1
  24. smallworld/emulators/angr/machdefs/amd64.py +0 -4
  25. smallworld/emulators/angr/machdefs/arm.py +0 -2
  26. smallworld/emulators/angr/machdefs/i386.py +0 -2
  27. smallworld/emulators/angr/machdefs/loongarch.py +340 -0
  28. smallworld/emulators/angr/machdefs/machdef.py +1 -8
  29. smallworld/emulators/angr/machdefs/mips.py +0 -2
  30. smallworld/emulators/angr/machdefs/mips64.py +0 -2
  31. smallworld/emulators/angr/machdefs/ppc.py +1 -2
  32. smallworld/emulators/angr/machdefs/riscv.py +8 -10
  33. smallworld/emulators/angr/machdefs/xtensa.py +7 -4
  34. smallworld/emulators/emulator.py +22 -0
  35. smallworld/emulators/ghidra/__init__.py +37 -0
  36. smallworld/emulators/ghidra/ghidra.py +513 -0
  37. smallworld/emulators/ghidra/machdefs/__init__.py +31 -0
  38. smallworld/emulators/ghidra/machdefs/aarch64.py +289 -0
  39. smallworld/emulators/ghidra/machdefs/amd64.py +185 -0
  40. smallworld/emulators/ghidra/machdefs/arm.py +370 -0
  41. smallworld/emulators/ghidra/machdefs/i386.py +109 -0
  42. smallworld/emulators/ghidra/machdefs/loongarch.py +162 -0
  43. smallworld/emulators/ghidra/machdefs/machdef.py +81 -0
  44. smallworld/emulators/ghidra/machdefs/mips.py +163 -0
  45. smallworld/emulators/ghidra/machdefs/mips64.py +186 -0
  46. smallworld/emulators/ghidra/machdefs/ppc.py +98 -0
  47. smallworld/emulators/ghidra/machdefs/riscv.py +208 -0
  48. smallworld/emulators/ghidra/machdefs/xtensa.py +21 -0
  49. smallworld/emulators/ghidra/typing.py +28 -0
  50. smallworld/emulators/hookable.py +18 -4
  51. smallworld/emulators/panda/machdefs/__init__.py +2 -2
  52. smallworld/emulators/panda/machdefs/aarch64.py +186 -11
  53. smallworld/emulators/panda/machdefs/amd64.py +103 -11
  54. smallworld/emulators/panda/machdefs/arm.py +216 -20
  55. smallworld/emulators/panda/machdefs/i386.py +30 -7
  56. smallworld/emulators/panda/machdefs/machdef.py +9 -16
  57. smallworld/emulators/panda/machdefs/mips.py +49 -5
  58. smallworld/emulators/panda/machdefs/mips64.py +57 -5
  59. smallworld/emulators/panda/machdefs/ppc.py +38 -13
  60. smallworld/emulators/panda/panda.py +146 -44
  61. smallworld/emulators/unicorn/__init__.py +2 -0
  62. smallworld/emulators/unicorn/machdefs/aarch64.py +253 -264
  63. smallworld/emulators/unicorn/machdefs/amd64.py +254 -259
  64. smallworld/emulators/unicorn/machdefs/arm.py +200 -212
  65. smallworld/emulators/unicorn/machdefs/i386.py +84 -90
  66. smallworld/emulators/unicorn/machdefs/machdef.py +2 -23
  67. smallworld/emulators/unicorn/machdefs/mips.py +127 -135
  68. smallworld/emulators/unicorn/unicorn.py +52 -13
  69. smallworld/helpers.py +4 -19
  70. smallworld/hinting/hinting.py +22 -192
  71. smallworld/hinting/hints.py +50 -18
  72. smallworld/instructions/bsid.py +8 -8
  73. smallworld/logging.py +4 -2
  74. smallworld/platforms/__init__.py +12 -0
  75. smallworld/platforms/defs/__init__.py +36 -0
  76. smallworld/platforms/defs/aarch64.py +450 -0
  77. smallworld/platforms/defs/amd64.py +463 -0
  78. smallworld/platforms/defs/arm.py +519 -0
  79. smallworld/platforms/defs/i386.py +258 -0
  80. smallworld/platforms/defs/loongarch.py +270 -0
  81. smallworld/platforms/defs/mips.py +321 -0
  82. smallworld/platforms/defs/mips64.py +313 -0
  83. smallworld/platforms/defs/platformdef.py +97 -0
  84. smallworld/platforms/defs/powerpc.py +259 -0
  85. smallworld/platforms/defs/riscv.py +257 -0
  86. smallworld/platforms/defs/xtensa.py +96 -0
  87. smallworld/{platforms.py → platforms/platforms.py} +3 -0
  88. smallworld/state/cpus/__init__.py +2 -0
  89. smallworld/state/cpus/aarch64.py +0 -9
  90. smallworld/state/cpus/amd64.py +6 -28
  91. smallworld/state/cpus/arm.py +0 -11
  92. smallworld/state/cpus/cpu.py +0 -11
  93. smallworld/state/cpus/i386.py +0 -7
  94. smallworld/state/cpus/loongarch.py +299 -0
  95. smallworld/state/cpus/mips.py +4 -47
  96. smallworld/state/cpus/mips64.py +18 -58
  97. smallworld/state/cpus/powerpc.py +2 -9
  98. smallworld/state/cpus/riscv.py +1 -11
  99. smallworld/state/cpus/xtensa.py +0 -5
  100. smallworld/state/memory/code.py +38 -2
  101. smallworld/state/memory/elf/__init__.py +5 -1
  102. smallworld/state/memory/elf/coredump/__init__.py +3 -0
  103. smallworld/state/memory/elf/coredump/coredump.py +46 -0
  104. smallworld/state/memory/elf/coredump/prstatus/__init__.py +27 -0
  105. smallworld/state/memory/elf/coredump/prstatus/aarch64.py +46 -0
  106. smallworld/state/memory/elf/coredump/prstatus/amd64.py +40 -0
  107. smallworld/state/memory/elf/coredump/prstatus/arm.py +53 -0
  108. smallworld/state/memory/elf/coredump/prstatus/i386.py +30 -0
  109. smallworld/state/memory/elf/coredump/prstatus/mips.py +55 -0
  110. smallworld/state/memory/elf/coredump/prstatus/mips64.py +57 -0
  111. smallworld/state/memory/elf/coredump/prstatus/ppc.py +82 -0
  112. smallworld/state/memory/elf/coredump/prstatus/prstatus.py +129 -0
  113. smallworld/state/memory/elf/elf.py +211 -57
  114. smallworld/state/memory/elf/register_state.py +36 -0
  115. smallworld/state/memory/elf/rela/__init__.py +2 -0
  116. smallworld/state/memory/elf/rela/aarch64.py +3 -1
  117. smallworld/state/memory/elf/rela/amd64.py +4 -2
  118. smallworld/state/memory/elf/rela/arm.py +4 -2
  119. smallworld/state/memory/elf/rela/i386.py +4 -2
  120. smallworld/state/memory/elf/rela/loongarch.py +32 -0
  121. smallworld/state/memory/elf/rela/mips.py +39 -18
  122. smallworld/state/memory/elf/rela/ppc.py +31 -14
  123. smallworld/state/memory/elf/structs.py +3 -0
  124. smallworld/state/memory/heap.py +2 -2
  125. smallworld/state/memory/memory.py +18 -0
  126. smallworld/state/memory/pe/__init__.py +3 -0
  127. smallworld/state/memory/pe/pe.py +361 -0
  128. smallworld/state/memory/pe/structs.py +60 -0
  129. smallworld/state/memory/stack/__init__.py +2 -0
  130. smallworld/state/memory/stack/loongarch.py +26 -0
  131. smallworld/state/models/__init__.py +29 -2
  132. smallworld/state/models/aarch64/__init__.py +1 -0
  133. smallworld/state/models/aarch64/systemv/__init__.py +6 -0
  134. smallworld/state/models/aarch64/systemv/c99/__init__.py +12 -0
  135. smallworld/state/models/aarch64/systemv/c99/signal.py +16 -0
  136. smallworld/state/models/aarch64/systemv/c99/stdio.py +265 -0
  137. smallworld/state/models/aarch64/systemv/c99/stdlib.py +169 -0
  138. smallworld/state/models/aarch64/systemv/c99/string.py +139 -0
  139. smallworld/state/models/aarch64/systemv/c99/time.py +61 -0
  140. smallworld/state/models/aarch64/systemv/posix/__init__.py +6 -0
  141. smallworld/state/models/aarch64/systemv/posix/libgen.py +16 -0
  142. smallworld/state/models/aarch64/systemv/posix/signal.py +157 -0
  143. smallworld/state/models/aarch64/systemv/systemv.py +80 -0
  144. smallworld/state/models/amd64/__init__.py +1 -0
  145. smallworld/state/models/amd64/systemv/__init__.py +6 -0
  146. smallworld/state/models/amd64/systemv/c99/__init__.py +12 -0
  147. smallworld/state/models/amd64/systemv/c99/signal.py +16 -0
  148. smallworld/state/models/amd64/systemv/c99/stdio.py +265 -0
  149. smallworld/state/models/amd64/systemv/c99/stdlib.py +169 -0
  150. smallworld/state/models/amd64/systemv/c99/string.py +139 -0
  151. smallworld/state/models/amd64/systemv/c99/time.py +61 -0
  152. smallworld/state/models/amd64/systemv/posix/__init__.py +6 -0
  153. smallworld/state/models/amd64/systemv/posix/libgen.py +16 -0
  154. smallworld/state/models/amd64/systemv/posix/signal.py +157 -0
  155. smallworld/state/models/amd64/systemv/systemv.py +78 -0
  156. smallworld/state/models/armel/__init__.py +1 -0
  157. smallworld/state/models/armel/systemv/__init__.py +6 -0
  158. smallworld/state/models/armel/systemv/c99/__init__.py +12 -0
  159. smallworld/state/models/armel/systemv/c99/signal.py +16 -0
  160. smallworld/state/models/armel/systemv/c99/stdio.py +265 -0
  161. smallworld/state/models/armel/systemv/c99/stdlib.py +169 -0
  162. smallworld/state/models/armel/systemv/c99/string.py +139 -0
  163. smallworld/state/models/armel/systemv/c99/time.py +61 -0
  164. smallworld/state/models/armel/systemv/posix/__init__.py +6 -0
  165. smallworld/state/models/armel/systemv/posix/libgen.py +16 -0
  166. smallworld/state/models/armel/systemv/posix/signal.py +157 -0
  167. smallworld/state/models/armel/systemv/systemv.py +82 -0
  168. smallworld/state/models/armhf/__init__.py +1 -0
  169. smallworld/state/models/armhf/systemv/__init__.py +6 -0
  170. smallworld/state/models/armhf/systemv/c99/__init__.py +12 -0
  171. smallworld/state/models/armhf/systemv/c99/signal.py +16 -0
  172. smallworld/state/models/armhf/systemv/c99/stdio.py +265 -0
  173. smallworld/state/models/armhf/systemv/c99/stdlib.py +169 -0
  174. smallworld/state/models/armhf/systemv/c99/string.py +139 -0
  175. smallworld/state/models/armhf/systemv/c99/time.py +61 -0
  176. smallworld/state/models/armhf/systemv/posix/__init__.py +6 -0
  177. smallworld/state/models/armhf/systemv/posix/libgen.py +16 -0
  178. smallworld/state/models/armhf/systemv/posix/signal.py +157 -0
  179. smallworld/state/models/armhf/systemv/systemv.py +77 -0
  180. smallworld/state/models/c99/__init__.py +12 -0
  181. smallworld/state/models/c99/fmt_print.py +915 -0
  182. smallworld/state/models/c99/fmt_scan.py +864 -0
  183. smallworld/state/models/c99/math.py +362 -0
  184. smallworld/state/models/c99/signal.py +71 -0
  185. smallworld/state/models/c99/stdio.py +1305 -0
  186. smallworld/state/models/c99/stdlib.py +595 -0
  187. smallworld/state/models/c99/string.py +674 -0
  188. smallworld/state/models/c99/time.py +340 -0
  189. smallworld/state/models/c99/utils.py +89 -0
  190. smallworld/state/models/cstd.py +759 -0
  191. smallworld/state/models/errno.py +581 -0
  192. smallworld/state/models/filedesc.py +515 -0
  193. smallworld/state/models/i386/__init__.py +1 -0
  194. smallworld/state/models/i386/systemv/__init__.py +6 -0
  195. smallworld/state/models/i386/systemv/c99/__init__.py +12 -0
  196. smallworld/state/models/i386/systemv/c99/signal.py +16 -0
  197. smallworld/state/models/i386/systemv/c99/stdio.py +265 -0
  198. smallworld/state/models/i386/systemv/c99/stdlib.py +169 -0
  199. smallworld/state/models/i386/systemv/c99/string.py +139 -0
  200. smallworld/state/models/i386/systemv/c99/time.py +61 -0
  201. smallworld/state/models/i386/systemv/posix/__init__.py +6 -0
  202. smallworld/state/models/i386/systemv/posix/libgen.py +16 -0
  203. smallworld/state/models/i386/systemv/posix/signal.py +157 -0
  204. smallworld/state/models/i386/systemv/systemv.py +71 -0
  205. smallworld/state/models/loongarch64/__init__.py +1 -0
  206. smallworld/state/models/loongarch64/systemv/__init__.py +6 -0
  207. smallworld/state/models/loongarch64/systemv/c99/__init__.py +12 -0
  208. smallworld/state/models/loongarch64/systemv/c99/signal.py +16 -0
  209. smallworld/state/models/loongarch64/systemv/c99/stdio.py +265 -0
  210. smallworld/state/models/loongarch64/systemv/c99/stdlib.py +169 -0
  211. smallworld/state/models/loongarch64/systemv/c99/string.py +139 -0
  212. smallworld/state/models/loongarch64/systemv/c99/time.py +61 -0
  213. smallworld/state/models/loongarch64/systemv/posix/__init__.py +6 -0
  214. smallworld/state/models/loongarch64/systemv/posix/libgen.py +16 -0
  215. smallworld/state/models/loongarch64/systemv/posix/signal.py +157 -0
  216. smallworld/state/models/loongarch64/systemv/systemv.py +83 -0
  217. smallworld/state/models/mips/__init__.py +1 -0
  218. smallworld/state/models/mips/systemv/__init__.py +6 -0
  219. smallworld/state/models/mips/systemv/c99/__init__.py +12 -0
  220. smallworld/state/models/mips/systemv/c99/signal.py +16 -0
  221. smallworld/state/models/mips/systemv/c99/stdio.py +265 -0
  222. smallworld/state/models/mips/systemv/c99/stdlib.py +169 -0
  223. smallworld/state/models/mips/systemv/c99/string.py +139 -0
  224. smallworld/state/models/mips/systemv/c99/time.py +61 -0
  225. smallworld/state/models/mips/systemv/posix/__init__.py +6 -0
  226. smallworld/state/models/mips/systemv/posix/libgen.py +16 -0
  227. smallworld/state/models/mips/systemv/posix/signal.py +157 -0
  228. smallworld/state/models/mips/systemv/systemv.py +78 -0
  229. smallworld/state/models/mips64/__init__.py +1 -0
  230. smallworld/state/models/mips64/systemv/__init__.py +6 -0
  231. smallworld/state/models/mips64/systemv/c99/__init__.py +12 -0
  232. smallworld/state/models/mips64/systemv/c99/signal.py +16 -0
  233. smallworld/state/models/mips64/systemv/c99/stdio.py +265 -0
  234. smallworld/state/models/mips64/systemv/c99/stdlib.py +169 -0
  235. smallworld/state/models/mips64/systemv/c99/string.py +139 -0
  236. smallworld/state/models/mips64/systemv/c99/time.py +61 -0
  237. smallworld/state/models/mips64/systemv/posix/__init__.py +6 -0
  238. smallworld/state/models/mips64/systemv/posix/libgen.py +16 -0
  239. smallworld/state/models/mips64/systemv/posix/signal.py +157 -0
  240. smallworld/state/models/mips64/systemv/systemv.py +98 -0
  241. smallworld/state/models/mips64el/__init__.py +1 -0
  242. smallworld/state/models/mips64el/systemv/__init__.py +6 -0
  243. smallworld/state/models/mips64el/systemv/c99/__init__.py +12 -0
  244. smallworld/state/models/mips64el/systemv/c99/signal.py +16 -0
  245. smallworld/state/models/mips64el/systemv/c99/stdio.py +265 -0
  246. smallworld/state/models/mips64el/systemv/c99/stdlib.py +169 -0
  247. smallworld/state/models/mips64el/systemv/c99/string.py +139 -0
  248. smallworld/state/models/mips64el/systemv/c99/time.py +61 -0
  249. smallworld/state/models/mips64el/systemv/posix/__init__.py +6 -0
  250. smallworld/state/models/mips64el/systemv/posix/libgen.py +16 -0
  251. smallworld/state/models/mips64el/systemv/posix/signal.py +157 -0
  252. smallworld/state/models/mips64el/systemv/systemv.py +96 -0
  253. smallworld/state/models/mipsel/__init__.py +1 -0
  254. smallworld/state/models/mipsel/systemv/__init__.py +6 -0
  255. smallworld/state/models/mipsel/systemv/c99/__init__.py +12 -0
  256. smallworld/state/models/mipsel/systemv/c99/signal.py +16 -0
  257. smallworld/state/models/mipsel/systemv/c99/stdio.py +265 -0
  258. smallworld/state/models/mipsel/systemv/c99/stdlib.py +169 -0
  259. smallworld/state/models/mipsel/systemv/c99/string.py +139 -0
  260. smallworld/state/models/mipsel/systemv/c99/time.py +61 -0
  261. smallworld/state/models/mipsel/systemv/posix/__init__.py +6 -0
  262. smallworld/state/models/mipsel/systemv/posix/libgen.py +16 -0
  263. smallworld/state/models/mipsel/systemv/posix/signal.py +157 -0
  264. smallworld/state/models/mipsel/systemv/systemv.py +78 -0
  265. smallworld/state/models/model.py +27 -2
  266. smallworld/state/models/posix/__init__.py +6 -0
  267. smallworld/state/models/posix/libgen.py +123 -0
  268. smallworld/state/models/posix/signal.py +690 -0
  269. smallworld/state/models/powerpc/__init__.py +1 -0
  270. smallworld/state/models/powerpc/systemv/__init__.py +6 -0
  271. smallworld/state/models/powerpc/systemv/c99/__init__.py +12 -0
  272. smallworld/state/models/powerpc/systemv/c99/signal.py +16 -0
  273. smallworld/state/models/powerpc/systemv/c99/stdio.py +265 -0
  274. smallworld/state/models/powerpc/systemv/c99/stdlib.py +169 -0
  275. smallworld/state/models/powerpc/systemv/c99/string.py +139 -0
  276. smallworld/state/models/powerpc/systemv/c99/time.py +61 -0
  277. smallworld/state/models/powerpc/systemv/posix/__init__.py +6 -0
  278. smallworld/state/models/powerpc/systemv/posix/libgen.py +16 -0
  279. smallworld/state/models/powerpc/systemv/posix/signal.py +157 -0
  280. smallworld/state/models/powerpc/systemv/systemv.py +93 -0
  281. smallworld/state/models/riscv64/__init__.py +1 -0
  282. smallworld/state/models/riscv64/systemv/__init__.py +6 -0
  283. smallworld/state/models/riscv64/systemv/c99/__init__.py +12 -0
  284. smallworld/state/models/riscv64/systemv/c99/signal.py +16 -0
  285. smallworld/state/models/riscv64/systemv/c99/stdio.py +265 -0
  286. smallworld/state/models/riscv64/systemv/c99/stdlib.py +169 -0
  287. smallworld/state/models/riscv64/systemv/c99/string.py +139 -0
  288. smallworld/state/models/riscv64/systemv/c99/time.py +61 -0
  289. smallworld/state/models/riscv64/systemv/posix/__init__.py +6 -0
  290. smallworld/state/models/riscv64/systemv/posix/libgen.py +16 -0
  291. smallworld/state/models/riscv64/systemv/posix/signal.py +157 -0
  292. smallworld/state/models/riscv64/systemv/systemv.py +85 -0
  293. smallworld/state/state.py +65 -24
  294. smallworld/state/unstable/elf.py +16 -31
  295. smallworld/utils.py +6 -1
  296. {smallworld_re-1.0.3.dist-info → smallworld_re-2.0.0.dist-info}/METADATA +74 -42
  297. smallworld_re-2.0.0.dist-info/RECORD +374 -0
  298. {smallworld_re-1.0.3.dist-info → smallworld_re-2.0.0.dist-info}/WHEEL +1 -1
  299. smallworld/state/models/x86/__init__.py +0 -2
  300. smallworld/state/models/x86/microsoftcdecl.py +0 -35
  301. smallworld/state/models/x86/systemv.py +0 -240
  302. smallworld_re-1.0.3.dist-info/RECORD +0 -166
  303. /smallworld/state/models/{posix.py → _posix.py} +0 -0
  304. {smallworld_re-1.0.3.dist-info → smallworld_re-2.0.0.dist-info}/entry_points.txt +0 -0
  305. {smallworld_re-1.0.3.dist-info → smallworld_re-2.0.0.dist-info}/licenses/LICENSE.txt +0 -0
  306. {smallworld_re-1.0.3.dist-info → smallworld_re-2.0.0.dist-info}/top_level.txt +0 -0
smallworld/emulators/unicorn/machdefs/aarch64.py CHANGED
@@ -1,4 +1,3 @@
1
- import capstone
2
1
  import unicorn
3
2
 
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3
  from ....platforms import Architecture, Byteorder
@@ -12,299 +11,289 @@ class AArch64MachineDef(UnicornMachineDef):
12
11
  uc_arch = unicorn.UC_ARCH_ARM64
13
12
  uc_mode = unicorn.UC_MODE_ARM
14
13
 
15
- cs_arch = capstone.CS_ARCH_ARM64
16
- cs_mode = capstone.CS_MODE_ARM
17
-
18
- pc_reg = "pc"
19
-
20
14
  _registers = {
21
15
  # *** General Purpose Registers ***
22
- "x0": (unicorn.arm64_const.UC_ARM64_REG_X0, "x0", 8, 0),
23
- "w0": (unicorn.arm64_const.UC_ARM64_REG_W0, "x0", 4, 0),
24
- "x1": (unicorn.arm64_const.UC_ARM64_REG_X1, "x1", 8, 0),
25
- "w1": (unicorn.arm64_const.UC_ARM64_REG_W1, "x1", 4, 0),
26
- "x2": (unicorn.arm64_const.UC_ARM64_REG_X2, "x2", 8, 0),
27
- "w2": (unicorn.arm64_const.UC_ARM64_REG_W2, "x2", 4, 0),
28
- "x3": (unicorn.arm64_const.UC_ARM64_REG_X3, "x3", 8, 0),
29
- "w3": (unicorn.arm64_const.UC_ARM64_REG_W3, "x3", 4, 0),
30
- "x4": (unicorn.arm64_const.UC_ARM64_REG_X4, "x4", 8, 0),
31
- "w4": (unicorn.arm64_const.UC_ARM64_REG_W4, "x4", 4, 0),
32
- "x5": (unicorn.arm64_const.UC_ARM64_REG_X5, "x5", 8, 0),
33
- "w5": (unicorn.arm64_const.UC_ARM64_REG_W5, "x5", 4, 0),
34
- "x6": (unicorn.arm64_const.UC_ARM64_REG_X6, "x6", 8, 0),
35
- "w6": (unicorn.arm64_const.UC_ARM64_REG_W6, "x6", 4, 0),
36
- "x7": (unicorn.arm64_const.UC_ARM64_REG_X7, "x7", 8, 0),
37
- "w7": (unicorn.arm64_const.UC_ARM64_REG_W7, "x7", 4, 0),
38
- "x8": (unicorn.arm64_const.UC_ARM64_REG_X8, "x8", 8, 0),
39
- "w8": (unicorn.arm64_const.UC_ARM64_REG_W8, "x8", 4, 0),
40
- "x9": (unicorn.arm64_const.UC_ARM64_REG_X9, "x9", 8, 0),
41
- "w9": (unicorn.arm64_const.UC_ARM64_REG_W9, "x9", 4, 0),
42
- "x10": (unicorn.arm64_const.UC_ARM64_REG_X10, "x10", 8, 0),
43
- "w10": (unicorn.arm64_const.UC_ARM64_REG_W10, "x10", 4, 0),
44
- "x11": (unicorn.arm64_const.UC_ARM64_REG_X11, "x11", 8, 0),
45
- "w11": (unicorn.arm64_const.UC_ARM64_REG_W11, "x11", 4, 0),
46
- "x12": (unicorn.arm64_const.UC_ARM64_REG_X12, "x12", 8, 0),
47
- "w12": (unicorn.arm64_const.UC_ARM64_REG_W12, "x12", 4, 0),
48
- "x13": (unicorn.arm64_const.UC_ARM64_REG_X13, "x13", 8, 0),
49
- "w13": (unicorn.arm64_const.UC_ARM64_REG_W13, "x13", 4, 0),
50
- "x14": (unicorn.arm64_const.UC_ARM64_REG_X14, "x14", 8, 0),
51
- "w14": (unicorn.arm64_const.UC_ARM64_REG_W14, "x14", 4, 0),
52
- "x15": (unicorn.arm64_const.UC_ARM64_REG_X15, "x15", 8, 0),
53
- "w15": (unicorn.arm64_const.UC_ARM64_REG_W15, "x15", 4, 0),
54
- "x16": (unicorn.arm64_const.UC_ARM64_REG_X16, "x16", 8, 0),
55
- "w16": (unicorn.arm64_const.UC_ARM64_REG_W16, "x16", 4, 0),
56
- "x17": (unicorn.arm64_const.UC_ARM64_REG_X17, "x17", 8, 0),
57
- "w17": (unicorn.arm64_const.UC_ARM64_REG_W17, "x17", 4, 0),
58
- "x18": (unicorn.arm64_const.UC_ARM64_REG_X18, "x18", 8, 0),
59
- "w18": (unicorn.arm64_const.UC_ARM64_REG_W18, "x18", 4, 0),
60
- "x19": (unicorn.arm64_const.UC_ARM64_REG_X19, "x19", 8, 0),
61
- "w19": (unicorn.arm64_const.UC_ARM64_REG_W19, "x19", 4, 0),
62
- "x20": (unicorn.arm64_const.UC_ARM64_REG_X20, "x20", 8, 0),
63
- "w20": (unicorn.arm64_const.UC_ARM64_REG_W20, "x20", 4, 0),
64
- "x21": (unicorn.arm64_const.UC_ARM64_REG_X21, "x21", 8, 0),
65
- "w21": (unicorn.arm64_const.UC_ARM64_REG_W21, "x21", 4, 0),
66
- "x22": (unicorn.arm64_const.UC_ARM64_REG_X22, "x22", 8, 0),
67
- "w22": (unicorn.arm64_const.UC_ARM64_REG_W22, "x22", 4, 0),
68
- "x23": (unicorn.arm64_const.UC_ARM64_REG_X23, "x23", 8, 0),
69
- "w23": (unicorn.arm64_const.UC_ARM64_REG_W23, "x23", 4, 0),
70
- "x24": (unicorn.arm64_const.UC_ARM64_REG_X24, "x24", 8, 0),
71
- "w24": (unicorn.arm64_const.UC_ARM64_REG_W24, "x24", 4, 0),
72
- "x25": (unicorn.arm64_const.UC_ARM64_REG_X25, "x25", 8, 0),
73
- "w25": (unicorn.arm64_const.UC_ARM64_REG_W25, "x25", 4, 0),
74
- "x26": (unicorn.arm64_const.UC_ARM64_REG_X26, "x26", 8, 0),
75
- "w26": (unicorn.arm64_const.UC_ARM64_REG_W26, "x26", 4, 0),
76
- "x27": (unicorn.arm64_const.UC_ARM64_REG_X27, "x27", 8, 0),
77
- "w27": (unicorn.arm64_const.UC_ARM64_REG_W27, "x27", 4, 0),
78
- "x28": (unicorn.arm64_const.UC_ARM64_REG_X28, "x28", 8, 0),
79
- "w28": (unicorn.arm64_const.UC_ARM64_REG_W28, "x28", 4, 0),
80
- "x29": (unicorn.arm64_const.UC_ARM64_REG_X29, "x29", 8, 0),
81
- "w29": (unicorn.arm64_const.UC_ARM64_REG_W29, "x29", 4, 0),
82
- "x30": (unicorn.arm64_const.UC_ARM64_REG_X30, "x30", 8, 0),
83
- "w30": (unicorn.arm64_const.UC_ARM64_REG_W30, "x30", 4, 0),
16
+ "x0": unicorn.arm64_const.UC_ARM64_REG_X0,
17
+ "w0": unicorn.arm64_const.UC_ARM64_REG_W0,
18
+ "x1": unicorn.arm64_const.UC_ARM64_REG_X1,
19
+ "w1": unicorn.arm64_const.UC_ARM64_REG_W1,
20
+ "x2": unicorn.arm64_const.UC_ARM64_REG_X2,
21
+ "w2": unicorn.arm64_const.UC_ARM64_REG_W2,
22
+ "x3": unicorn.arm64_const.UC_ARM64_REG_X3,
23
+ "w3": unicorn.arm64_const.UC_ARM64_REG_W3,
24
+ "x4": unicorn.arm64_const.UC_ARM64_REG_X4,
25
+ "w4": unicorn.arm64_const.UC_ARM64_REG_W4,
26
+ "x5": unicorn.arm64_const.UC_ARM64_REG_X5,
27
+ "w5": unicorn.arm64_const.UC_ARM64_REG_W5,
28
+ "x6": unicorn.arm64_const.UC_ARM64_REG_X6,
29
+ "w6": unicorn.arm64_const.UC_ARM64_REG_W6,
30
+ "x7": unicorn.arm64_const.UC_ARM64_REG_X7,
31
+ "w7": unicorn.arm64_const.UC_ARM64_REG_W7,
32
+ "x8": unicorn.arm64_const.UC_ARM64_REG_X8,
33
+ "w8": unicorn.arm64_const.UC_ARM64_REG_W8,
34
+ "x9": unicorn.arm64_const.UC_ARM64_REG_X9,
35
+ "w9": unicorn.arm64_const.UC_ARM64_REG_W9,
36
+ "x10": unicorn.arm64_const.UC_ARM64_REG_X10,
37
+ "w10": unicorn.arm64_const.UC_ARM64_REG_W10,
38
+ "x11": unicorn.arm64_const.UC_ARM64_REG_X11,
39
+ "w11": unicorn.arm64_const.UC_ARM64_REG_W11,
40
+ "x12": unicorn.arm64_const.UC_ARM64_REG_X12,
41
+ "w12": unicorn.arm64_const.UC_ARM64_REG_W12,
42
+ "x13": unicorn.arm64_const.UC_ARM64_REG_X13,
43
+ "w13": unicorn.arm64_const.UC_ARM64_REG_W13,
44
+ "x14": unicorn.arm64_const.UC_ARM64_REG_X14,
45
+ "w14": unicorn.arm64_const.UC_ARM64_REG_W14,
46
+ "x15": unicorn.arm64_const.UC_ARM64_REG_X15,
47
+ "w15": unicorn.arm64_const.UC_ARM64_REG_W15,
48
+ "x16": unicorn.arm64_const.UC_ARM64_REG_X16,
49
+ "w16": unicorn.arm64_const.UC_ARM64_REG_W16,
50
+ "x17": unicorn.arm64_const.UC_ARM64_REG_X17,
51
+ "w17": unicorn.arm64_const.UC_ARM64_REG_W17,
52
+ "x18": unicorn.arm64_const.UC_ARM64_REG_X18,
53
+ "w18": unicorn.arm64_const.UC_ARM64_REG_W18,
54
+ "x19": unicorn.arm64_const.UC_ARM64_REG_X19,
55
+ "w19": unicorn.arm64_const.UC_ARM64_REG_W19,
56
+ "x20": unicorn.arm64_const.UC_ARM64_REG_X20,
57
+ "w20": unicorn.arm64_const.UC_ARM64_REG_W20,
58
+ "x21": unicorn.arm64_const.UC_ARM64_REG_X21,
59
+ "w21": unicorn.arm64_const.UC_ARM64_REG_W21,
60
+ "x22": unicorn.arm64_const.UC_ARM64_REG_X22,
61
+ "w22": unicorn.arm64_const.UC_ARM64_REG_W22,
62
+ "x23": unicorn.arm64_const.UC_ARM64_REG_X23,
63
+ "w23": unicorn.arm64_const.UC_ARM64_REG_W23,
64
+ "x24": unicorn.arm64_const.UC_ARM64_REG_X24,
65
+ "w24": unicorn.arm64_const.UC_ARM64_REG_W24,
66
+ "x25": unicorn.arm64_const.UC_ARM64_REG_X25,
67
+ "w25": unicorn.arm64_const.UC_ARM64_REG_W25,
68
+ "x26": unicorn.arm64_const.UC_ARM64_REG_X26,
69
+ "w26": unicorn.arm64_const.UC_ARM64_REG_W26,
70
+ "x27": unicorn.arm64_const.UC_ARM64_REG_X27,
71
+ "w27": unicorn.arm64_const.UC_ARM64_REG_W27,
72
+ "x28": unicorn.arm64_const.UC_ARM64_REG_X28,
73
+ "w28": unicorn.arm64_const.UC_ARM64_REG_W28,
74
+ "x29": unicorn.arm64_const.UC_ARM64_REG_X29,
75
+ "w29": unicorn.arm64_const.UC_ARM64_REG_W29,
76
+ "x30": unicorn.arm64_const.UC_ARM64_REG_X30,
77
+ "w30": unicorn.arm64_const.UC_ARM64_REG_W30,
84
78
  # *** Program Counter ***
85
- "pc": (unicorn.arm64_const.UC_ARM64_REG_PC, "pc", 8, 0),
79
+ "pc": unicorn.arm64_const.UC_ARM64_REG_PC,
86
80
  # *** Stack Pointer ***
87
- "sp": (unicorn.arm64_const.UC_ARM64_REG_SP, "sp", 8, 0),
88
- "wsp": (unicorn.arm64_const.UC_ARM64_REG_WSP, "wsp", 4, 0),
81
+ "sp": unicorn.arm64_const.UC_ARM64_REG_SP,
82
+ "wsp": unicorn.arm64_const.UC_ARM64_REG_WSP,
89
83
  # *** Frame Pointer ***
90
- "fp": (unicorn.arm64_const.UC_ARM64_REG_FP, "x29", 8, 0),
84
+ "fp": unicorn.arm64_const.UC_ARM64_REG_FP,
91
85
  # *** Link Register ***
92
- "lr": (unicorn.arm64_const.UC_ARM64_REG_LR, "x30", 8, 0),
86
+ "lr": unicorn.arm64_const.UC_ARM64_REG_LR,
93
87
  # *** Zero Register ***
94
- "xzr": (unicorn.arm64_const.UC_ARM64_REG_INVALID, "xzr", 8, 0),
95
- "wzr": (unicorn.arm64_const.UC_ARM64_REG_INVALID, "wzr", 4, 0),
88
+ "xzr": unicorn.arm64_const.UC_ARM64_REG_INVALID,
89
+ "wzr": unicorn.arm64_const.UC_ARM64_REG_INVALID,
96
90
  # *** System Control Registers ***
97
91
  # NOTE: "_elX" indicates that only exception level X or greater can access this register.
98
92
  # NOTE: This list is far from complete; it only covers what Unicorn supports
99
93
  # Condition Code Register
100
- "fpcr": (unicorn.arm64_const.UC_ARM64_REG_FPCR, "fpcr", 8, 0),
94
+ "fpcr": unicorn.arm64_const.UC_ARM64_REG_FPCR,
101
95
  # Floating Point Status Register
102
- "fpsr": (unicorn.arm64_const.UC_ARM64_REG_FPSR, "fpsr", 8, 0),
96
+ "fpsr": unicorn.arm64_const.UC_ARM64_REG_FPSR,
103
97
  # Banked stack pointers for exception handlers
104
- "sp_el0": (unicorn.arm64_const.UC_ARM64_REG_SP_EL0, "sp_el0", 8, 0),
105
- "sp_el1": (unicorn.arm64_const.UC_ARM64_REG_SP_EL1, "sp_el1", 8, 0),
106
- "sp_el2": (unicorn.arm64_const.UC_ARM64_REG_SP_EL2, "sp_el2", 8, 0),
107
- "sp_el3": (unicorn.arm64_const.UC_ARM64_REG_SP_EL3, "sp_el3", 8, 0),
98
+ "sp_el0": unicorn.arm64_const.UC_ARM64_REG_SP_EL0,
99
+ "sp_el1": unicorn.arm64_const.UC_ARM64_REG_SP_EL1,
100
+ "sp_el2": unicorn.arm64_const.UC_ARM64_REG_SP_EL2,
101
+ "sp_el3": unicorn.arm64_const.UC_ARM64_REG_SP_EL3,
108
102
  # Banked link registers for exception handlers
109
103
  # NOTE: Unicorn thinks there's an elr_el0; according to docs, it doesn't exist
110
- "elr_el1": (unicorn.arm64_const.UC_ARM64_REG_ELR_EL1, "elr_el1", 8, 0),
111
- "elr_el2": (unicorn.arm64_const.UC_ARM64_REG_ELR_EL2, "elr_el2", 8, 0),
112
- "elr_el3": (unicorn.arm64_const.UC_ARM64_REG_ELR_EL3, "elr_el3", 8, 0),
104
+ "elr_el1": unicorn.arm64_const.UC_ARM64_REG_ELR_EL1,
105
+ "elr_el2": unicorn.arm64_const.UC_ARM64_REG_ELR_EL2,
106
+ "elr_el3": unicorn.arm64_const.UC_ARM64_REG_ELR_EL3,
113
107
  # Banked exception syndrome registers for exception handlers
114
108
  # NOTE: Unicorn thinks there's a far_el0; according to docs, it doesn't exist
115
- "far_el1": (unicorn.arm64_const.UC_ARM64_REG_FAR_EL1, "far_el1", 8, 0),
116
- "far_el2": (unicorn.arm64_const.UC_ARM64_REG_FAR_EL2, "far_el2", 8, 0),
117
- "far_el3": (unicorn.arm64_const.UC_ARM64_REG_FAR_EL3, "far_el3", 8, 0),
109
+ "far_el1": unicorn.arm64_const.UC_ARM64_REG_FAR_EL1,
110
+ "far_el2": unicorn.arm64_const.UC_ARM64_REG_FAR_EL2,
111
+ "far_el3": unicorn.arm64_const.UC_ARM64_REG_FAR_EL3,
118
112
  # Banked vector base address registers for exception handlers
119
113
  # NOTE: vbar_el0 and vbar_el1 are aliases for each other.
120
114
  # Since vbar_el0 doesn't exist in angr, vbar_el1 has to be the "real" copy.
121
- "vbar_el1": (unicorn.arm64_const.UC_ARM64_REG_VBAR_EL1, "vbar_el1", 8, 0),
122
- "vbar_el0": (unicorn.arm64_const.UC_ARM64_REG_VBAR_EL0, "vbar_el1", 8, 0),
123
- "vbar_el2": (unicorn.arm64_const.UC_ARM64_REG_VBAR_EL2, "vbar_el2", 8, 0),
124
- "vbar_el3": (unicorn.arm64_const.UC_ARM64_REG_VBAR_EL3, "vbar_el3", 8, 0),
115
+ "vbar_el1": unicorn.arm64_const.UC_ARM64_REG_VBAR_EL1,
116
+ "vbar_el0": unicorn.arm64_const.UC_ARM64_REG_VBAR_EL0,
117
+ "vbar_el2": unicorn.arm64_const.UC_ARM64_REG_VBAR_EL2,
118
+ "vbar_el3": unicorn.arm64_const.UC_ARM64_REG_VBAR_EL3,
125
119
  # Coprocessor access control register
126
- "cpacr_el1": (unicorn.arm64_const.UC_ARM64_REG_CPACR_EL1, "cpacr_el1", 8, 0),
120
+ "cpacr_el1": unicorn.arm64_const.UC_ARM64_REG_CPACR_EL1,
127
121
  # Memory Attribute Indirection Register
128
- "mair_el1": (unicorn.arm64_const.UC_ARM64_REG_MAIR_EL1, "mair_el1", 8, 0),
122
+ "mair_el1": unicorn.arm64_const.UC_ARM64_REG_MAIR_EL1,
129
123
  # Physical Address Register
130
- "par_el1": (unicorn.arm64_const.UC_ARM64_REG_PAR_EL1, "par_el1", 8, 0),
124
+ "par_el1": unicorn.arm64_const.UC_ARM64_REG_PAR_EL1,
131
125
  # Translation Table Zero Base Register
132
- "ttbr0_el1": (unicorn.arm64_const.UC_ARM64_REG_TTBR0_EL1, "ttbr0_el1", 8, 0),
126
+ "ttbr0_el1": unicorn.arm64_const.UC_ARM64_REG_TTBR0_EL1,
133
127
  # Translation Table One Base Register
134
- "ttbr1_el1": (unicorn.arm64_const.UC_ARM64_REG_TTBR1_EL1, "ttbr1_el1", 8, 0),
128
+ "ttbr1_el1": unicorn.arm64_const.UC_ARM64_REG_TTBR1_EL1,
135
129
  # Thread ID Register
136
130
  # NOTE: According to docs, there should be an el2 and el3 copy, too.
137
- "tpidr_el0": (unicorn.arm64_const.UC_ARM64_REG_TPIDR_EL0, "tpidr_el0", 8, 0),
138
- "tpidr_el1": (unicorn.arm64_const.UC_ARM64_REG_TPIDR_EL1, "tpidr_el1", 8, 0),
131
+ "tpidr_el0": unicorn.arm64_const.UC_ARM64_REG_TPIDR_EL0,
132
+ "tpidr_el1": unicorn.arm64_const.UC_ARM64_REG_TPIDR_EL1,
139
133
  # Userspace-visible Thread ID register
140
- "tpidrro_el0": (
141
- unicorn.arm64_const.UC_ARM64_REG_TPIDRRO_EL0,
142
- "tpidrro_el0",
143
- 8,
144
- 0,
145
- ),
134
+ "tpidrro_el0": unicorn.arm64_const.UC_ARM64_REG_TPIDRRO_EL0,
146
135
  # *** Floating Point Registers ***
147
136
  # Scalar Floating Point Registers
148
- "q0": (unicorn.arm64_const.UC_ARM64_REG_Q0, "q0", 16, 0),
149
- "d0": (unicorn.arm64_const.UC_ARM64_REG_D0, "q0", 8, 0),
150
- "s0": (unicorn.arm64_const.UC_ARM64_REG_S0, "q0", 4, 0),
151
- "h0": (unicorn.arm64_const.UC_ARM64_REG_H0, "q0", 2, 0),
152
- "b0": (unicorn.arm64_const.UC_ARM64_REG_B0, "q0", 1, 0),
153
- "q1": (unicorn.arm64_const.UC_ARM64_REG_Q1, "q1", 16, 0),
154
- "d1": (unicorn.arm64_const.UC_ARM64_REG_D1, "q1", 8, 0),
155
- "s1": (unicorn.arm64_const.UC_ARM64_REG_S1, "q1", 4, 0),
156
- "h1": (unicorn.arm64_const.UC_ARM64_REG_H1, "q1", 2, 0),
157
- "b1": (unicorn.arm64_const.UC_ARM64_REG_B1, "q1", 1, 0),
158
- "q2": (unicorn.arm64_const.UC_ARM64_REG_Q2, "q2", 16, 0),
159
- "d2": (unicorn.arm64_const.UC_ARM64_REG_D2, "q2", 8, 0),
160
- "s2": (unicorn.arm64_const.UC_ARM64_REG_S2, "q2", 4, 0),
161
- "h2": (unicorn.arm64_const.UC_ARM64_REG_H2, "q2", 2, 0),
162
- "b2": (unicorn.arm64_const.UC_ARM64_REG_B2, "q2", 1, 0),
163
- "q3": (unicorn.arm64_const.UC_ARM64_REG_Q3, "q3", 16, 0),
164
- "d3": (unicorn.arm64_const.UC_ARM64_REG_D3, "q3", 8, 0),
165
- "s3": (unicorn.arm64_const.UC_ARM64_REG_S3, "q3", 4, 0),
166
- "h3": (unicorn.arm64_const.UC_ARM64_REG_H3, "q3", 2, 0),
167
- "b3": (unicorn.arm64_const.UC_ARM64_REG_B3, "q3", 1, 0),
168
- "q4": (unicorn.arm64_const.UC_ARM64_REG_Q4, "q4", 16, 0),
169
- "d4": (unicorn.arm64_const.UC_ARM64_REG_D4, "q4", 8, 0),
170
- "s4": (unicorn.arm64_const.UC_ARM64_REG_S4, "q4", 4, 0),
171
- "h4": (unicorn.arm64_const.UC_ARM64_REG_H4, "q4", 2, 0),
172
- "b4": (unicorn.arm64_const.UC_ARM64_REG_B4, "q4", 1, 0),
173
- "q5": (unicorn.arm64_const.UC_ARM64_REG_Q5, "q5", 16, 0),
174
- "d5": (unicorn.arm64_const.UC_ARM64_REG_D5, "q5", 8, 0),
175
- "s5": (unicorn.arm64_const.UC_ARM64_REG_S5, "q5", 4, 0),
176
- "h5": (unicorn.arm64_const.UC_ARM64_REG_H5, "q5", 2, 0),
177
- "b5": (unicorn.arm64_const.UC_ARM64_REG_B5, "q5", 1, 0),
178
- "q6": (unicorn.arm64_const.UC_ARM64_REG_Q6, "q6", 16, 0),
179
- "d6": (unicorn.arm64_const.UC_ARM64_REG_D6, "q6", 8, 0),
180
- "s6": (unicorn.arm64_const.UC_ARM64_REG_S6, "q6", 4, 0),
181
- "h6": (unicorn.arm64_const.UC_ARM64_REG_H6, "q6", 2, 0),
182
- "b6": (unicorn.arm64_const.UC_ARM64_REG_B6, "q6", 1, 0),
183
- "q7": (unicorn.arm64_const.UC_ARM64_REG_Q7, "q7", 16, 0),
184
- "d7": (unicorn.arm64_const.UC_ARM64_REG_D7, "q7", 8, 0),
185
- "s7": (unicorn.arm64_const.UC_ARM64_REG_S7, "q7", 4, 0),
186
- "h7": (unicorn.arm64_const.UC_ARM64_REG_H7, "q7", 2, 0),
187
- "b7": (unicorn.arm64_const.UC_ARM64_REG_B7, "q7", 1, 0),
188
- "q8": (unicorn.arm64_const.UC_ARM64_REG_Q8, "q8", 16, 0),
189
- "d8": (unicorn.arm64_const.UC_ARM64_REG_D8, "q8", 8, 0),
190
- "s8": (unicorn.arm64_const.UC_ARM64_REG_S8, "q8", 4, 0),
191
- "h8": (unicorn.arm64_const.UC_ARM64_REG_H8, "q8", 2, 0),
192
- "b8": (unicorn.arm64_const.UC_ARM64_REG_B8, "q8", 1, 0),
193
- "q9": (unicorn.arm64_const.UC_ARM64_REG_Q9, "q9", 16, 0),
194
- "d9": (unicorn.arm64_const.UC_ARM64_REG_D9, "q9", 8, 0),
195
- "s9": (unicorn.arm64_const.UC_ARM64_REG_S9, "q9", 4, 0),
196
- "h9": (unicorn.arm64_const.UC_ARM64_REG_H9, "q9", 2, 0),
197
- "b9": (unicorn.arm64_const.UC_ARM64_REG_B9, "q9", 1, 0),
198
- "q10": (unicorn.arm64_const.UC_ARM64_REG_Q10, "q10", 16, 0),
199
- "d10": (unicorn.arm64_const.UC_ARM64_REG_D10, "q10", 8, 0),
200
- "s10": (unicorn.arm64_const.UC_ARM64_REG_S10, "q10", 4, 0),
201
- "h10": (unicorn.arm64_const.UC_ARM64_REG_H10, "q10", 2, 0),
202
- "b10": (unicorn.arm64_const.UC_ARM64_REG_B10, "q10", 1, 0),
203
- "q11": (unicorn.arm64_const.UC_ARM64_REG_Q11, "q11", 16, 0),
204
- "d11": (unicorn.arm64_const.UC_ARM64_REG_D11, "q11", 8, 0),
205
- "s11": (unicorn.arm64_const.UC_ARM64_REG_S11, "q11", 4, 0),
206
- "h11": (unicorn.arm64_const.UC_ARM64_REG_H11, "q11", 2, 0),
207
- "b11": (unicorn.arm64_const.UC_ARM64_REG_B11, "q11", 1, 0),
208
- "q12": (unicorn.arm64_const.UC_ARM64_REG_Q12, "q12", 16, 0),
209
- "d12": (unicorn.arm64_const.UC_ARM64_REG_D12, "q12", 8, 0),
210
- "s12": (unicorn.arm64_const.UC_ARM64_REG_S12, "q12", 4, 0),
211
- "h12": (unicorn.arm64_const.UC_ARM64_REG_H12, "q12", 2, 0),
212
- "b12": (unicorn.arm64_const.UC_ARM64_REG_B12, "q12", 1, 0),
213
- "q13": (unicorn.arm64_const.UC_ARM64_REG_Q13, "q13", 16, 0),
214
- "d13": (unicorn.arm64_const.UC_ARM64_REG_D13, "q13", 8, 0),
215
- "s13": (unicorn.arm64_const.UC_ARM64_REG_S13, "q13", 4, 0),
216
- "h13": (unicorn.arm64_const.UC_ARM64_REG_H13, "q13", 2, 0),
217
- "b13": (unicorn.arm64_const.UC_ARM64_REG_B13, "q13", 1, 0),
218
- "q14": (unicorn.arm64_const.UC_ARM64_REG_Q14, "q14", 16, 0),
219
- "d14": (unicorn.arm64_const.UC_ARM64_REG_D14, "q14", 8, 0),
220
- "s14": (unicorn.arm64_const.UC_ARM64_REG_S14, "q14", 4, 0),
221
- "h14": (unicorn.arm64_const.UC_ARM64_REG_H14, "q14", 2, 0),
222
- "b14": (unicorn.arm64_const.UC_ARM64_REG_B14, "q14", 1, 0),
223
- "q15": (unicorn.arm64_const.UC_ARM64_REG_Q15, "q15", 16, 0),
224
- "d15": (unicorn.arm64_const.UC_ARM64_REG_D15, "q15", 8, 0),
225
- "s15": (unicorn.arm64_const.UC_ARM64_REG_S15, "q15", 4, 0),
226
- "h15": (unicorn.arm64_const.UC_ARM64_REG_H15, "q15", 2, 0),
227
- "b15": (unicorn.arm64_const.UC_ARM64_REG_B15, "q15", 1, 0),
228
- "q16": (unicorn.arm64_const.UC_ARM64_REG_Q16, "q16", 16, 0),
229
- "d16": (unicorn.arm64_const.UC_ARM64_REG_D16, "q16", 8, 0),
230
- "s16": (unicorn.arm64_const.UC_ARM64_REG_S16, "q16", 4, 0),
231
- "h16": (unicorn.arm64_const.UC_ARM64_REG_H16, "q16", 2, 0),
232
- "b16": (unicorn.arm64_const.UC_ARM64_REG_B16, "q16", 1, 0),
233
- "q17": (unicorn.arm64_const.UC_ARM64_REG_Q17, "q17", 16, 0),
234
- "d17": (unicorn.arm64_const.UC_ARM64_REG_D17, "q17", 8, 0),
235
- "s17": (unicorn.arm64_const.UC_ARM64_REG_S17, "q17", 4, 0),
236
- "h17": (unicorn.arm64_const.UC_ARM64_REG_H17, "q17", 2, 0),
237
- "b17": (unicorn.arm64_const.UC_ARM64_REG_B17, "q17", 1, 0),
238
- "q18": (unicorn.arm64_const.UC_ARM64_REG_Q18, "q18", 16, 0),
239
- "d18": (unicorn.arm64_const.UC_ARM64_REG_D18, "q18", 8, 0),
240
- "s18": (unicorn.arm64_const.UC_ARM64_REG_S18, "q18", 4, 0),
241
- "h18": (unicorn.arm64_const.UC_ARM64_REG_H18, "q18", 2, 0),
242
- "b18": (unicorn.arm64_const.UC_ARM64_REG_B18, "q18", 1, 0),
243
- "q19": (unicorn.arm64_const.UC_ARM64_REG_Q19, "q19", 16, 0),
244
- "d19": (unicorn.arm64_const.UC_ARM64_REG_D19, "q19", 8, 0),
245
- "s19": (unicorn.arm64_const.UC_ARM64_REG_S19, "q19", 4, 0),
246
- "h19": (unicorn.arm64_const.UC_ARM64_REG_H19, "q19", 2, 0),
247
- "b19": (unicorn.arm64_const.UC_ARM64_REG_B19, "q19", 1, 0),
248
- "q20": (unicorn.arm64_const.UC_ARM64_REG_Q20, "q20", 16, 0),
249
- "d20": (unicorn.arm64_const.UC_ARM64_REG_D20, "q20", 8, 0),
250
- "s20": (unicorn.arm64_const.UC_ARM64_REG_S20, "q20", 4, 0),
251
- "h20": (unicorn.arm64_const.UC_ARM64_REG_H20, "q20", 2, 0),
252
- "b20": (unicorn.arm64_const.UC_ARM64_REG_B20, "q20", 1, 0),
253
- "q21": (unicorn.arm64_const.UC_ARM64_REG_Q21, "q21", 16, 0),
254
- "d21": (unicorn.arm64_const.UC_ARM64_REG_D21, "q21", 8, 0),
255
- "s21": (unicorn.arm64_const.UC_ARM64_REG_S21, "q21", 4, 0),
256
- "h21": (unicorn.arm64_const.UC_ARM64_REG_H21, "q21", 2, 0),
257
- "b21": (unicorn.arm64_const.UC_ARM64_REG_B21, "q21", 1, 0),
258
- "q22": (unicorn.arm64_const.UC_ARM64_REG_Q22, "q22", 16, 0),
259
- "d22": (unicorn.arm64_const.UC_ARM64_REG_D22, "q22", 8, 0),
260
- "s22": (unicorn.arm64_const.UC_ARM64_REG_S22, "q22", 4, 0),
261
- "h22": (unicorn.arm64_const.UC_ARM64_REG_H22, "q22", 2, 0),
262
- "b22": (unicorn.arm64_const.UC_ARM64_REG_B22, "q22", 1, 0),
263
- "q23": (unicorn.arm64_const.UC_ARM64_REG_Q23, "q23", 16, 0),
264
- "d23": (unicorn.arm64_const.UC_ARM64_REG_D23, "q23", 8, 0),
265
- "s23": (unicorn.arm64_const.UC_ARM64_REG_S23, "q23", 4, 0),
266
- "h23": (unicorn.arm64_const.UC_ARM64_REG_H23, "q23", 2, 0),
267
- "b23": (unicorn.arm64_const.UC_ARM64_REG_B23, "q23", 1, 0),
268
- "q24": (unicorn.arm64_const.UC_ARM64_REG_Q24, "q24", 16, 0),
269
- "d24": (unicorn.arm64_const.UC_ARM64_REG_D24, "q24", 8, 0),
270
- "s24": (unicorn.arm64_const.UC_ARM64_REG_S24, "q24", 4, 0),
271
- "h24": (unicorn.arm64_const.UC_ARM64_REG_H24, "q24", 2, 0),
272
- "b24": (unicorn.arm64_const.UC_ARM64_REG_B24, "q24", 1, 0),
273
- "q25": (unicorn.arm64_const.UC_ARM64_REG_Q25, "q25", 16, 0),
274
- "d25": (unicorn.arm64_const.UC_ARM64_REG_D25, "q25", 8, 0),
275
- "s25": (unicorn.arm64_const.UC_ARM64_REG_S25, "q25", 4, 0),
276
- "h25": (unicorn.arm64_const.UC_ARM64_REG_H25, "q25", 2, 0),
277
- "b25": (unicorn.arm64_const.UC_ARM64_REG_B25, "q25", 1, 0),
278
- "q26": (unicorn.arm64_const.UC_ARM64_REG_Q26, "q26", 16, 0),
279
- "d26": (unicorn.arm64_const.UC_ARM64_REG_D26, "q26", 8, 0),
280
- "s26": (unicorn.arm64_const.UC_ARM64_REG_S26, "q26", 4, 0),
281
- "h26": (unicorn.arm64_const.UC_ARM64_REG_H26, "q26", 2, 0),
282
- "b26": (unicorn.arm64_const.UC_ARM64_REG_B26, "q26", 1, 0),
283
- "q27": (unicorn.arm64_const.UC_ARM64_REG_Q27, "q27", 16, 0),
284
- "d27": (unicorn.arm64_const.UC_ARM64_REG_D27, "q27", 8, 0),
285
- "s27": (unicorn.arm64_const.UC_ARM64_REG_S27, "q27", 4, 0),
286
- "h27": (unicorn.arm64_const.UC_ARM64_REG_H27, "q27", 2, 0),
287
- "b27": (unicorn.arm64_const.UC_ARM64_REG_B27, "q27", 1, 0),
288
- "q28": (unicorn.arm64_const.UC_ARM64_REG_Q28, "q28", 16, 0),
289
- "d28": (unicorn.arm64_const.UC_ARM64_REG_D28, "q28", 8, 0),
290
- "s28": (unicorn.arm64_const.UC_ARM64_REG_S28, "q28", 4, 0),
291
- "h28": (unicorn.arm64_const.UC_ARM64_REG_H28, "q28", 2, 0),
292
- "b28": (unicorn.arm64_const.UC_ARM64_REG_B28, "q28", 1, 0),
293
- "q29": (unicorn.arm64_const.UC_ARM64_REG_Q29, "q29", 16, 0),
294
- "d29": (unicorn.arm64_const.UC_ARM64_REG_D29, "q29", 8, 0),
295
- "s29": (unicorn.arm64_const.UC_ARM64_REG_S29, "q29", 4, 0),
296
- "h29": (unicorn.arm64_const.UC_ARM64_REG_H29, "q29", 2, 0),
297
- "b29": (unicorn.arm64_const.UC_ARM64_REG_B29, "q29", 1, 0),
298
- "q30": (unicorn.arm64_const.UC_ARM64_REG_Q30, "q30", 16, 0),
299
- "d30": (unicorn.arm64_const.UC_ARM64_REG_D30, "q30", 8, 0),
300
- "s30": (unicorn.arm64_const.UC_ARM64_REG_S30, "q30", 4, 0),
301
- "h30": (unicorn.arm64_const.UC_ARM64_REG_H30, "q30", 2, 0),
302
- "b30": (unicorn.arm64_const.UC_ARM64_REG_B30, "q30", 1, 0),
303
- "q31": (unicorn.arm64_const.UC_ARM64_REG_Q31, "q31", 16, 0),
304
- "d31": (unicorn.arm64_const.UC_ARM64_REG_D31, "q31", 8, 0),
305
- "s31": (unicorn.arm64_const.UC_ARM64_REG_S31, "q31", 4, 0),
306
- "h31": (unicorn.arm64_const.UC_ARM64_REG_H31, "q31", 2, 0),
307
- "b31": (unicorn.arm64_const.UC_ARM64_REG_B31, "q31", 1, 0),
137
+ "q0": unicorn.arm64_const.UC_ARM64_REG_Q0,
138
+ "d0": unicorn.arm64_const.UC_ARM64_REG_D0,
139
+ "s0": unicorn.arm64_const.UC_ARM64_REG_S0,
140
+ "h0": unicorn.arm64_const.UC_ARM64_REG_H0,
141
+ "b0": unicorn.arm64_const.UC_ARM64_REG_B0,
142
+ "q1": unicorn.arm64_const.UC_ARM64_REG_Q1,
143
+ "d1": unicorn.arm64_const.UC_ARM64_REG_D1,
144
+ "s1": unicorn.arm64_const.UC_ARM64_REG_S1,
145
+ "h1": unicorn.arm64_const.UC_ARM64_REG_H1,
146
+ "b1": unicorn.arm64_const.UC_ARM64_REG_B1,
147
+ "q2": unicorn.arm64_const.UC_ARM64_REG_Q2,
148
+ "d2": unicorn.arm64_const.UC_ARM64_REG_D2,
149
+ "s2": unicorn.arm64_const.UC_ARM64_REG_S2,
150
+ "h2": unicorn.arm64_const.UC_ARM64_REG_H2,
151
+ "b2": unicorn.arm64_const.UC_ARM64_REG_B2,
152
+ "q3": unicorn.arm64_const.UC_ARM64_REG_Q3,
153
+ "d3": unicorn.arm64_const.UC_ARM64_REG_D3,
154
+ "s3": unicorn.arm64_const.UC_ARM64_REG_S3,
155
+ "h3": unicorn.arm64_const.UC_ARM64_REG_H3,
156
+ "b3": unicorn.arm64_const.UC_ARM64_REG_B3,
157
+ "q4": unicorn.arm64_const.UC_ARM64_REG_Q4,
158
+ "d4": unicorn.arm64_const.UC_ARM64_REG_D4,
159
+ "s4": unicorn.arm64_const.UC_ARM64_REG_S4,
160
+ "h4": unicorn.arm64_const.UC_ARM64_REG_H4,
161
+ "b4": unicorn.arm64_const.UC_ARM64_REG_B4,
162
+ "q5": unicorn.arm64_const.UC_ARM64_REG_Q5,
163
+ "d5": unicorn.arm64_const.UC_ARM64_REG_D5,
164
+ "s5": unicorn.arm64_const.UC_ARM64_REG_S5,
165
+ "h5": unicorn.arm64_const.UC_ARM64_REG_H5,
166
+ "b5": unicorn.arm64_const.UC_ARM64_REG_B5,
167
+ "q6": unicorn.arm64_const.UC_ARM64_REG_Q6,
168
+ "d6": unicorn.arm64_const.UC_ARM64_REG_D6,
169
+ "s6": unicorn.arm64_const.UC_ARM64_REG_S6,
170
+ "h6": unicorn.arm64_const.UC_ARM64_REG_H6,
171
+ "b6": unicorn.arm64_const.UC_ARM64_REG_B6,
172
+ "q7": unicorn.arm64_const.UC_ARM64_REG_Q7,
173
+ "d7": unicorn.arm64_const.UC_ARM64_REG_D7,
174
+ "s7": unicorn.arm64_const.UC_ARM64_REG_S7,
175
+ "h7": unicorn.arm64_const.UC_ARM64_REG_H7,
176
+ "b7": unicorn.arm64_const.UC_ARM64_REG_B7,
177
+ "q8": unicorn.arm64_const.UC_ARM64_REG_Q8,
178
+ "d8": unicorn.arm64_const.UC_ARM64_REG_D8,
179
+ "s8": unicorn.arm64_const.UC_ARM64_REG_S8,
180
+ "h8": unicorn.arm64_const.UC_ARM64_REG_H8,
181
+ "b8": unicorn.arm64_const.UC_ARM64_REG_B8,
182
+ "q9": unicorn.arm64_const.UC_ARM64_REG_Q9,
183
+ "d9": unicorn.arm64_const.UC_ARM64_REG_D9,
184
+ "s9": unicorn.arm64_const.UC_ARM64_REG_S9,
185
+ "h9": unicorn.arm64_const.UC_ARM64_REG_H9,
186
+ "b9": unicorn.arm64_const.UC_ARM64_REG_B9,
187
+ "q10": unicorn.arm64_const.UC_ARM64_REG_Q10,
188
+ "d10": unicorn.arm64_const.UC_ARM64_REG_D10,
189
+ "s10": unicorn.arm64_const.UC_ARM64_REG_S10,
190
+ "h10": unicorn.arm64_const.UC_ARM64_REG_H10,
191
+ "b10": unicorn.arm64_const.UC_ARM64_REG_B10,
192
+ "q11": unicorn.arm64_const.UC_ARM64_REG_Q11,
193
+ "d11": unicorn.arm64_const.UC_ARM64_REG_D11,
194
+ "s11": unicorn.arm64_const.UC_ARM64_REG_S11,
195
+ "h11": unicorn.arm64_const.UC_ARM64_REG_H11,
196
+ "b11": unicorn.arm64_const.UC_ARM64_REG_B11,
197
+ "q12": unicorn.arm64_const.UC_ARM64_REG_Q12,
198
+ "d12": unicorn.arm64_const.UC_ARM64_REG_D12,
199
+ "s12": unicorn.arm64_const.UC_ARM64_REG_S12,
200
+ "h12": unicorn.arm64_const.UC_ARM64_REG_H12,
201
+ "b12": unicorn.arm64_const.UC_ARM64_REG_B12,
202
+ "q13": unicorn.arm64_const.UC_ARM64_REG_Q13,
203
+ "d13": unicorn.arm64_const.UC_ARM64_REG_D13,
204
+ "s13": unicorn.arm64_const.UC_ARM64_REG_S13,
205
+ "h13": unicorn.arm64_const.UC_ARM64_REG_H13,
206
+ "b13": unicorn.arm64_const.UC_ARM64_REG_B13,
207
+ "q14": unicorn.arm64_const.UC_ARM64_REG_Q14,
208
+ "d14": unicorn.arm64_const.UC_ARM64_REG_D14,
209
+ "s14": unicorn.arm64_const.UC_ARM64_REG_S14,
210
+ "h14": unicorn.arm64_const.UC_ARM64_REG_H14,
211
+ "b14": unicorn.arm64_const.UC_ARM64_REG_B14,
212
+ "q15": unicorn.arm64_const.UC_ARM64_REG_Q15,
213
+ "d15": unicorn.arm64_const.UC_ARM64_REG_D15,
214
+ "s15": unicorn.arm64_const.UC_ARM64_REG_S15,
215
+ "h15": unicorn.arm64_const.UC_ARM64_REG_H15,
216
+ "b15": unicorn.arm64_const.UC_ARM64_REG_B15,
217
+ "q16": unicorn.arm64_const.UC_ARM64_REG_Q16,
218
+ "d16": unicorn.arm64_const.UC_ARM64_REG_D16,
219
+ "s16": unicorn.arm64_const.UC_ARM64_REG_S16,
220
+ "h16": unicorn.arm64_const.UC_ARM64_REG_H16,
221
+ "b16": unicorn.arm64_const.UC_ARM64_REG_B16,
222
+ "q17": unicorn.arm64_const.UC_ARM64_REG_Q17,
223
+ "d17": unicorn.arm64_const.UC_ARM64_REG_D17,
224
+ "s17": unicorn.arm64_const.UC_ARM64_REG_S17,
225
+ "h17": unicorn.arm64_const.UC_ARM64_REG_H17,
226
+ "b17": unicorn.arm64_const.UC_ARM64_REG_B17,
227
+ "q18": unicorn.arm64_const.UC_ARM64_REG_Q18,
228
+ "d18": unicorn.arm64_const.UC_ARM64_REG_D18,
229
+ "s18": unicorn.arm64_const.UC_ARM64_REG_S18,
230
+ "h18": unicorn.arm64_const.UC_ARM64_REG_H18,
231
+ "b18": unicorn.arm64_const.UC_ARM64_REG_B18,
232
+ "q19": unicorn.arm64_const.UC_ARM64_REG_Q19,
233
+ "d19": unicorn.arm64_const.UC_ARM64_REG_D19,
234
+ "s19": unicorn.arm64_const.UC_ARM64_REG_S19,
235
+ "h19": unicorn.arm64_const.UC_ARM64_REG_H19,
236
+ "b19": unicorn.arm64_const.UC_ARM64_REG_B19,
237
+ "q20": unicorn.arm64_const.UC_ARM64_REG_Q20,
238
+ "d20": unicorn.arm64_const.UC_ARM64_REG_D20,
239
+ "s20": unicorn.arm64_const.UC_ARM64_REG_S20,
240
+ "h20": unicorn.arm64_const.UC_ARM64_REG_H20,
241
+ "b20": unicorn.arm64_const.UC_ARM64_REG_B20,
242
+ "q21": unicorn.arm64_const.UC_ARM64_REG_Q21,
243
+ "d21": unicorn.arm64_const.UC_ARM64_REG_D21,
244
+ "s21": unicorn.arm64_const.UC_ARM64_REG_S21,
245
+ "h21": unicorn.arm64_const.UC_ARM64_REG_H21,
246
+ "b21": unicorn.arm64_const.UC_ARM64_REG_B21,
247
+ "q22": unicorn.arm64_const.UC_ARM64_REG_Q22,
248
+ "d22": unicorn.arm64_const.UC_ARM64_REG_D22,
249
+ "s22": unicorn.arm64_const.UC_ARM64_REG_S22,
250
+ "h22": unicorn.arm64_const.UC_ARM64_REG_H22,
251
+ "b22": unicorn.arm64_const.UC_ARM64_REG_B22,
252
+ "q23": unicorn.arm64_const.UC_ARM64_REG_Q23,
253
+ "d23": unicorn.arm64_const.UC_ARM64_REG_D23,
254
+ "s23": unicorn.arm64_const.UC_ARM64_REG_S23,
255
+ "h23": unicorn.arm64_const.UC_ARM64_REG_H23,
256
+ "b23": unicorn.arm64_const.UC_ARM64_REG_B23,
257
+ "q24": unicorn.arm64_const.UC_ARM64_REG_Q24,
258
+ "d24": unicorn.arm64_const.UC_ARM64_REG_D24,
259
+ "s24": unicorn.arm64_const.UC_ARM64_REG_S24,
260
+ "h24": unicorn.arm64_const.UC_ARM64_REG_H24,
261
+ "b24": unicorn.arm64_const.UC_ARM64_REG_B24,
262
+ "q25": unicorn.arm64_const.UC_ARM64_REG_Q25,
263
+ "d25": unicorn.arm64_const.UC_ARM64_REG_D25,
264
+ "s25": unicorn.arm64_const.UC_ARM64_REG_S25,
265
+ "h25": unicorn.arm64_const.UC_ARM64_REG_H25,
266
+ "b25": unicorn.arm64_const.UC_ARM64_REG_B25,
267
+ "q26": unicorn.arm64_const.UC_ARM64_REG_Q26,
268
+ "d26": unicorn.arm64_const.UC_ARM64_REG_D26,
269
+ "s26": unicorn.arm64_const.UC_ARM64_REG_S26,
270
+ "h26": unicorn.arm64_const.UC_ARM64_REG_H26,
271
+ "b26": unicorn.arm64_const.UC_ARM64_REG_B26,
272
+ "q27": unicorn.arm64_const.UC_ARM64_REG_Q27,
273
+ "d27": unicorn.arm64_const.UC_ARM64_REG_D27,
274
+ "s27": unicorn.arm64_const.UC_ARM64_REG_S27,
275
+ "h27": unicorn.arm64_const.UC_ARM64_REG_H27,
276
+ "b27": unicorn.arm64_const.UC_ARM64_REG_B27,
277
+ "q28": unicorn.arm64_const.UC_ARM64_REG_Q28,
278
+ "d28": unicorn.arm64_const.UC_ARM64_REG_D28,
279
+ "s28": unicorn.arm64_const.UC_ARM64_REG_S28,
280
+ "h28": unicorn.arm64_const.UC_ARM64_REG_H28,
281
+ "b28": unicorn.arm64_const.UC_ARM64_REG_B28,
282
+ "q29": unicorn.arm64_const.UC_ARM64_REG_Q29,
283
+ "d29": unicorn.arm64_const.UC_ARM64_REG_D29,
284
+ "s29": unicorn.arm64_const.UC_ARM64_REG_S29,
285
+ "h29": unicorn.arm64_const.UC_ARM64_REG_H29,
286
+ "b29": unicorn.arm64_const.UC_ARM64_REG_B29,
287
+ "q30": unicorn.arm64_const.UC_ARM64_REG_Q30,
288
+ "d30": unicorn.arm64_const.UC_ARM64_REG_D30,
289
+ "s30": unicorn.arm64_const.UC_ARM64_REG_S30,
290
+ "h30": unicorn.arm64_const.UC_ARM64_REG_H30,
291
+ "b30": unicorn.arm64_const.UC_ARM64_REG_B30,
292
+ "q31": unicorn.arm64_const.UC_ARM64_REG_Q31,
293
+ "d31": unicorn.arm64_const.UC_ARM64_REG_D31,
294
+ "s31": unicorn.arm64_const.UC_ARM64_REG_S31,
295
+ "h31": unicorn.arm64_const.UC_ARM64_REG_H31,
296
+ "b31": unicorn.arm64_const.UC_ARM64_REG_B31,
308
297
  # Vector registers
309
298
  # TODO: Figure out how to model these
310
299
  }