smallworld-re 1.0.2__py3-none-any.whl → 2.0.0__py3-none-any.whl

smallworld/state/models/powerpc/systemv/posix/signal.py

@@ -0,0 +1,157 @@
+from ....posix.signal import (
+    BsdSignal,
+    Kill,
+    Killpg,
+    PthreadKill,
+    PthreadSigmask,
+    Sigaction,
+    Sigaddset,
+    Sigaltstack,
+    Sigdelset,
+    Sigemptyset,
+    Sigfillset,
+    Sighold,
+    Sigignore,
+    Siginterrupt,
+    Sigismember,
+    Sigpause,
+    Sigpending,
+    Sigprocmask,
+    Sigqueue,
+    Sigrelse,
+    Sigset,
+    Sigsuspend,
+    Sigtimedwait,
+    Sigwait,
+    Sigwaitinfo,
+)
+from ..systemv import PowerPCSysVModel
+
+
+class PowerPCSysVBsdSignal(BsdSignal, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVKill(Kill, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVKillpg(Killpg, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVPthreadKill(PthreadKill, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVPthreadSigmask(PthreadSigmask, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigaction(Sigaction, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigaddset(Sigaddset, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigaltstack(Sigaltstack, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigdelset(Sigdelset, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigemptyset(Sigemptyset, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigfillset(Sigfillset, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSighold(Sighold, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigignore(Sigignore, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSiginterrupt(Siginterrupt, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigismember(Sigismember, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigpause(Sigpause, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigpending(Sigpending, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigprocmask(Sigprocmask, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigqueue(Sigqueue, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigrelse(Sigrelse, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigset(Sigset, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigsuspend(Sigsuspend, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigtimedwait(Sigtimedwait, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigwait(Sigwait, PowerPCSysVModel):
+    pass
+
+
+class PowerPCSysVSigwaitinfo(Sigwaitinfo, PowerPCSysVModel):
+    pass
+
+
+__all__ = [
+    "PowerPCSysVBsdSignal",
+    "PowerPCSysVKill",
+    "PowerPCSysVKillpg",
+    "PowerPCSysVPthreadKill",
+    "PowerPCSysVPthreadSigmask",
+    "PowerPCSysVSigaction",
+    "PowerPCSysVSigaddset",
+    "PowerPCSysVSigaltstack",
+    "PowerPCSysVSigdelset",
+    "PowerPCSysVSigemptyset",
+    "PowerPCSysVSigfillset",
+    "PowerPCSysVSighold",
+    "PowerPCSysVSigignore",
+    "PowerPCSysVSiginterrupt",
+    "PowerPCSysVSigismember",
+    "PowerPCSysVSigpause",
+    "PowerPCSysVSigpending",
+    "PowerPCSysVSigprocmask",
+    "PowerPCSysVSigqueue",
+    "PowerPCSysVSigrelse",
+    "PowerPCSysVSigset",
+    "PowerPCSysVSigsuspend",
+    "PowerPCSysVSigtimedwait",
+    "PowerPCSysVSigwait",
+    "PowerPCSysVSigwaitinfo",
+]

smallworld/state/models/powerpc/systemv/systemv.py

@@ -0,0 +1,93 @@
+import struct
+
+from ..... import emulators, platforms
+from ...cstd import ArgumentType, CStdModel
+
+
+class PowerPCSysVModel(CStdModel):
+    """Base class for C models using the PowerPC System-V ABI"""
+
+    platform = platforms.Platform(
+        platforms.Architecture.POWERPC32, platforms.Byteorder.BIG
+    )
+    abi = platforms.ABI.SYSTEMV
+
+    _int_sign_mask = 0x80000000
+    _int_inv_mask = 0xFFFFFFFF
+    _long_sign_mask = 0x80000000
+    _long_inv_mask = 0xFFFFFFFF
+    _long_long_sign_mask = 0x8000000000000000
+    _long_long_inv_mask = 0xFFFFFFFFFFFFFFFF
+
+    _four_byte_types = {
+        ArgumentType.INT,
+        ArgumentType.UINT,
+        ArgumentType.LONG,
+        ArgumentType.ULONG,
+        ArgumentType.SIZE_T,
+        ArgumentType.SSIZE_T,
+        ArgumentType.POINTER,
+    }
+
+    _eight_byte_types = {
+        ArgumentType.LONGLONG,
+        ArgumentType.ULONGLONG,
+    }
+
+    _four_byte_arg_regs = [
+        "r3",
+        "r4",
+        "r5",
+        "r6",
+        "r7",
+        "r8",
+        "r9",
+        "r10",
+    ]
+
+    _eight_byte_arg_regs = [
+        "r3",
+        "r4",
+        "r5",
+        "r6",
+        "r7",
+        "r8",
+        "r9",
+        "r10",
+    ]
+
+    _soft_float = False
+    _variadic_soft_float = False
+    _floats_are_doubles = True
+    _float_arg_regs = ["f1", "f2", "f3", "f4", "f5", "f6"]
+    _double_arg_regs = ["f1", "f2", "f3", "f4", "f5", "f6"]
+
+    _init_stack_offset = 8
+    _align_stack = True
+    _eight_byte_reg_size = 2
+    _double_reg_size = 1
+    _four_byte_stack_size = 4
+    _eight_byte_stack_size = 8
+    _float_stack_size = 4
+    _double_stack_size = 8
+
+    def _return_4_byte(self, emulator: emulators.Emulator, val: int) -> None:
+        emulator.write_register("r3", val & self._int_inv_mask)
+
+    def _return_8_byte(self, emulator: emulators.Emulator, val: int) -> None:
+        lo = val & self._int_inv_mask
+        hi = val >> 32 & self._int_inv_mask
+
+        emulator.write_register("r3", hi)
+        emulator.write_register("r4", lo)
+
+    def _return_float(self, emulator: emulators.Emulator, val: float) -> None:
+        # NOTE: powerpc promotes floats to doubles
+        data = struct.pack("<d", val)
+        intval = int.from_bytes(data, "little")
+        emulator.write_register("f1", intval)
+
+    def _return_double(self, emulator: emulators.Emulator, val: float) -> None:
+        data = struct.pack("<d", val)
+        intval = int.from_bytes(data, "little")
+        emulator.write_register("f1", intval)

smallworld/state/models/riscv64/__init__.py

@@ -0,0 +1 @@
+from .systemv import __all__ as __sysv__  # noqa: F401

smallworld/state/models/riscv64/systemv/__init__.py

@@ -0,0 +1,6 @@
+from .c99 import *  # noqa: F401,F403
+from .c99 import __all__ as __c99__
+from .posix import *  # noqa: F401,F403
+from .posix import __all__ as __posix__
+
+__all__ = __c99__ + __posix__

smallworld/state/models/riscv64/systemv/c99/__init__.py

@@ -0,0 +1,12 @@
+from .signal import *  # noqa F401,F403
+from .signal import __all__ as __signal__
+from .stdio import *  # noqa F401,F403
+from .stdio import __all__ as __stdio__
+from .stdlib import *  # noqa F401,F403
+from .stdlib import __all__ as __stdlib__
+from .string import *  # noqa F401,F403
+from .string import __all__ as __string__
+from .time import *  # noqa F401,F403
+from .time import __all__ as __time__
+
+__all__ = __signal__ + __stdlib__ + __string__ + __stdio__ + __time__

smallworld/state/models/riscv64/systemv/c99/signal.py

@@ -0,0 +1,16 @@
+from ....c99.signal import Raise, Signal
+from ..systemv import RiscV64SysVModel
+
+
+class RiscV64SysVRaise(Raise, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVSignal(Signal, RiscV64SysVModel):
+    pass
+
+
+__all__ = [
+    "RiscV64SysVRaise",
+    "RiscV64SysVSignal",
+]

smallworld/state/models/riscv64/systemv/c99/stdio.py

@@ -0,0 +1,265 @@
+from ....c99 import (
+    Clearerr,
+    Fclose,
+    Feof,
+    Ferror,
+    Fflush,
+    Fgetc,
+    Fgetpos,
+    Fgets,
+    Fopen,
+    Fprintf,
+    Fputc,
+    Fputs,
+    Fread,
+    Freopen,
+    Fscanf,
+    Fseek,
+    Fsetpos,
+    Ftell,
+    Fwrite,
+    Getc,
+    Getchar,
+    Gets,
+    Printf,
+    Putc,
+    Putchar,
+    Puts,
+    Remove,
+    Rename,
+    Rewind,
+    Scanf,
+    Snprintf,
+    Sprintf,
+    Sscanf,
+    Tmpfile,
+    Tmpnam,
+    Ungetc,
+    Vfprintf,
+    Vfscanf,
+    Vprintf,
+    Vscanf,
+    Vsnprintf,
+    Vsprintf,
+    Vsscanf,
+)
+from ..systemv import RiscV64SysVModel
+
+
+class RiscV64SysVFclose(Fclose, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFeof(Feof, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFerror(Ferror, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFgetc(Fgetc, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFgets(Fgets, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFopen(Fopen, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFprintf(Fprintf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFputc(Fputc, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFputs(Fputs, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFread(Fread, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFscanf(Fscanf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFseek(Fseek, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFtell(Ftell, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFwrite(Fwrite, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVGetc(Getc, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVGetchar(Getchar, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVGets(Gets, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVPrintf(Printf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVPutc(Putc, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVPutchar(Putchar, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVPuts(Puts, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVRemove(Remove, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVRename(Rename, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVRewind(Rewind, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVScanf(Scanf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVSnprintf(Snprintf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVSprintf(Sprintf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVSscanf(Sscanf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVClearerr(Clearerr, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFflush(Fflush, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFreopen(Freopen, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFgetpos(Fgetpos, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFsetpos(Fsetpos, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVTmpfile(Tmpfile, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVTmpnam(Tmpnam, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVUngetc(Ungetc, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVVfprintf(Vfprintf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVVfscanf(Vfscanf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVVprintf(Vprintf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVVscanf(Vscanf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVVsnprintf(Vsnprintf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVVsprintf(Vsprintf, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVVsscanf(Vsscanf, RiscV64SysVModel):
+    pass
+
+
+__all__ = [
+    "RiscV64SysVFclose",
+    "RiscV64SysVFeof",
+    "RiscV64SysVFerror",
+    "RiscV64SysVFgetc",
+    "RiscV64SysVFgets",
+    "RiscV64SysVFopen",
+    "RiscV64SysVFprintf",
+    "RiscV64SysVFputc",
+    "RiscV64SysVFputs",
+    "RiscV64SysVFread",
+    "RiscV64SysVFscanf",
+    "RiscV64SysVFseek",
+    "RiscV64SysVFtell",
+    "RiscV64SysVFwrite",
+    "RiscV64SysVGetc",
+    "RiscV64SysVGetchar",
+    "RiscV64SysVGets",
+    "RiscV64SysVPrintf",
+    "RiscV64SysVPutc",
+    "RiscV64SysVPutchar",
+    "RiscV64SysVPuts",
+    "RiscV64SysVRemove",
+    "RiscV64SysVRename",
+    "RiscV64SysVRewind",
+    "RiscV64SysVScanf",
+    "RiscV64SysVSnprintf",
+    "RiscV64SysVSprintf",
+    "RiscV64SysVSscanf",
+    "RiscV64SysVClearerr",
+    "RiscV64SysVFflush",
+    "RiscV64SysVFreopen",
+    "RiscV64SysVFgetpos",
+    "RiscV64SysVFsetpos",
+    "RiscV64SysVTmpfile",
+    "RiscV64SysVTmpnam",
+    "RiscV64SysVUngetc",
+    "RiscV64SysVVfprintf",
+    "RiscV64SysVVfscanf",
+    "RiscV64SysVVprintf",
+    "RiscV64SysVVscanf",
+    "RiscV64SysVVsnprintf",
+    "RiscV64SysVVsprintf",
+    "RiscV64SysVVsscanf",
+]

smallworld/state/models/riscv64/systemv/c99/stdlib.py

@@ -0,0 +1,169 @@
+from ....c99 import (
+    Abort,
+    Abs,
+    Atexit,
+    Atof,
+    Atoi,
+    Atol,
+    Atoll,
+    Calloc,
+    Div,
+    Exit,
+    Free,
+    Getenv,
+    LAbs,
+    LDiv,
+    LLAbs,
+    LLDiv,
+    Malloc,
+    Mblen,
+    Mbstowcs,
+    Mbtowc,
+    QSort,
+    Rand,
+    Realloc,
+    Srand,
+    System,
+    Wcstombs,
+    Wctomb,
+)
+from ..systemv import RiscV64SysVModel
+
+
+class RiscV64SysVAbs(Abs, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVLAbs(LAbs, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVLLAbs(LLAbs, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVAtof(Atof, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVAtoi(Atoi, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVAtol(Atol, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVAtoll(Atoll, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVCalloc(Calloc, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVDiv(Div, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVLDiv(LDiv, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVLLDiv(LLDiv, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVExit(Exit, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVFree(Free, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVMalloc(Malloc, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVQSort(QSort, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVRand(Rand, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVRealloc(Realloc, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVSrand(Srand, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVAbort(Abort, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVAtexit(Atexit, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVGetenv(Getenv, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVMblen(Mblen, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVMbstowcs(Mbstowcs, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVMbtowc(Mbtowc, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVSystem(System, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVWcstombs(Wcstombs, RiscV64SysVModel):
+    pass
+
+
+class RiscV64SysVWctomb(Wctomb, RiscV64SysVModel):
+    pass
+
+
+__all__ = [
+    "RiscV64SysVAbs",
+    "RiscV64SysVLAbs",
+    "RiscV64SysVLLAbs",
+    "RiscV64SysVAtof",
+    "RiscV64SysVAtoi",
+    "RiscV64SysVAtol",
+    "RiscV64SysVAtoll",
+    "RiscV64SysVCalloc",
+    "RiscV64SysVDiv",
+    "RiscV64SysVLDiv",
+    "RiscV64SysVLLDiv",
+    "RiscV64SysVExit",
+    "RiscV64SysVFree",
+    "RiscV64SysVMalloc",
+    "RiscV64SysVQSort",
+    "RiscV64SysVRand",
+    "RiscV64SysVRealloc",
+    "RiscV64SysVSrand",
+    "RiscV64SysVAbort",
+    "RiscV64SysVAtexit",
+    "RiscV64SysVGetenv",
+    "RiscV64SysVMblen",
+    "RiscV64SysVMbstowcs",
+    "RiscV64SysVMbtowc",
+    "RiscV64SysVSystem",
+    "RiscV64SysVWcstombs",
+    "RiscV64SysVWctomb",
+]