smallworld-re 1.0.2__py3-none-any.whl → 2.0.0__py3-none-any.whl

smallworld/state/memory/elf/coredump/prstatus/ppc.py

@@ -0,0 +1,82 @@
+import typing
+
+import lief
+
+from ...... import platforms
+from .prstatus import PrStatus
+
+
+class PowerPC(PrStatus):
+    byteorder = platforms.Byteorder.BIG
+
+    @property
+    def register_coords(
+        self,
+    ) -> typing.List[typing.Tuple[typing.Optional[str], int, int]]:
+        return self._register_coords
+
+    def __init__(self, elf: lief.ELF.Binary, wordsize):
+        _register_list = [
+            "r0",
+            "r1",
+            "r2",
+            "r3",
+            "r4",
+            "r5",
+            "r6",
+            "r7",
+            "r8",
+            "r9",
+            "r10",
+            "r11",
+            "r12",
+            "r13",
+            "r14",
+            "r15",
+            "r16",
+            "r17",
+            "r18",
+            "r19",
+            "r20",
+            "r21",
+            "r22",
+            "r23",
+            "r24",
+            "r25",
+            "r26",
+            "r27",
+            "r28",
+            "r29",
+            "r30",
+            "r31",
+            "pc",
+            # No idea what these are, as it's not documented.
+            None,
+            None,
+            "ctr",
+            "lr",
+        ]
+        self._register_coords = [
+            (_register_list[i], i * wordsize, wordsize)
+            for i in range(0, len(_register_list))
+        ]
+        super().__init__(elf)
+
+
+class PowerPC32(PowerPC):
+    architecture = platforms.Architecture.POWERPC32
+    pr_regs_off = 72
+    pr_regs_size = 192
+
+    def __init__(self, elf: lief.ELF.Binary):
+        super().__init__(elf, 4)
+
+
+class PowerPC64(PowerPC):
+    architecture = platforms.Architecture.POWERPC64
+
+    pr_regs_off = 112
+    pr_regs_size = 384
+
+    def __init__(self, elf: lief.ELF.Binary):
+        super().__init__(elf, 8)

smallworld/state/memory/elf/coredump/prstatus/prstatus.py

@@ -0,0 +1,129 @@
+import abc
+import typing
+
+import lief
+
+from ...... import exceptions, platforms, utils
+from .....cpus import CPU
+from .....state import FixedRegister
+
+
+class PrStatus:
+    """Class for extracting process information from a core dump
+
+    The prstatus struct is arch-specific.
+    Lief can interpret them for a small number of architectures,
+    but definitely not all supported by SmallWorld.
+    """
+
+    @property
+    @abc.abstractmethod
+    def architecture(self) -> platforms.Architecture:
+        raise NotImplementedError()
+
+    @property
+    @abc.abstractmethod
+    def byteorder(self) -> platforms.Byteorder:
+        raise NotImplementedError()
+
+    def __init__(self, elf: lief.ELF.Binary):
+        assert elf.header.file_type == lief.ELF.E_TYPE.CORE
+
+        self.platform = platforms.Platform(self.architecture, self.byteorder)
+        self.platdef = platforms.PlatformDef.for_platform(self.platform)
+
+        self._registers: typing.Dict[str, int] = dict()
+
+        # Find the PrStatus note
+        prstatus: typing.Optional[lief.ELF.CorePrStatus] = None
+        for note in elf.notes:
+            if isinstance(note, lief.ELF.CorePrStatus):
+                prstatus = note
+                break
+
+        if prstatus is None:
+            # Didn't find one.
+            raise exceptions.ConfigurationError("ELF core file has no PrStatus note")
+
+        self._parse_prstatus(prstatus)
+
+    @property
+    @abc.abstractmethod
+    def pr_regs_off(self) -> int:
+        raise NotImplementedError()
+
+    @property
+    @abc.abstractmethod
+    def pr_regs_size(self) -> int:
+        raise NotImplementedError()
+
+    @property
+    def register_coords(
+        self,
+    ) -> typing.List[typing.Tuple[typing.Optional[str], int, int]]:
+        raise NotImplementedError()
+
+    def _parse_prstatus(self, prstatus: lief.ELF.CorePrStatus) -> None:
+        # Load the registers from prstatus.
+        #
+        # All prstatus structs have the same layout:
+        # a single field called 'pr_regs' that contains a list of registers.
+        # The only trick is knowng the offset of that field
+        # and the offset and size of each register within it.
+
+        # Get byteorder literals
+        byteorder: typing.Literal["little", "big"]
+        if self.byteorder is platforms.Byteorder.LITTLE:
+            byteorder = "little"
+        elif self.byteorder is platforms.Byteorder.BIG:
+            # NOTE: Core dumps generated on a little-endian machine appear to come out little-endian.
+            # This may be a problem in the future
+            byteorder = "little"
+        else:
+            raise exceptions.ConfigurationError(
+                f"Can't decode byteorder {self.byteorder}"
+            )
+
+        # Extract the raw bytes
+        data = prstatus.description.tobytes()
+
+        # Extract the registers from the struct
+        for name, reg_off, reg_size in self.register_coords:
+            if name is None:
+                # Register we don't handle, or padding.
+                continue
+            reg_start = self.pr_regs_off + reg_off
+            reg_end = self.pr_regs_off + reg_off + reg_size
+
+            reg_bytes = data[reg_start:reg_end]
+            if (
+                self.platdef.address_size == 8
+                and self.byteorder is platforms.Byteorder.BIG
+            ):
+                # 64-bit registers are somehow presented middle-endian
+                # I have no idea.
+                reg_bytes = reg_bytes[4:8] + reg_bytes[0:4]
+
+            self._registers[name] = int.from_bytes(reg_bytes, byteorder)
+
+    def populate_cpu(self, cpu: CPU) -> None:
+        for reg, value in self._registers.items():
+            if not hasattr(cpu, reg):
+                raise exceptions.ConfigurationError(
+                    f"PrStatus register {reg} not in CPU for platform {self.platform}"
+                )
+            field = getattr(cpu, reg)
+            if not isinstance(field, FixedRegister):
+                field.set(value)
+
+    @classmethod
+    def for_platform(cls, platform: platforms.Platform, elf: lief.ELF.Binary):
+        try:
+            return utils.find_subclass(
+                cls,
+                lambda x: x.architecture == platform.architecture
+                and x.byteorder == platform.byteorder,
+                elf,
+            )
+        except Exception as e:
+            raise ValueError(f"No PrStatus class for {platform}") from e