siliconcompiler 0.28.9__py3-none-any.whl → 0.29.0__py3-none-any.whl

siliconcompiler/tools/openroad/scripts/apr/sc_repair_timing.tcl

@@ -0,0 +1,83 @@
+###############################
+# Reading SC Schema
+###############################
+
+source ./sc_manifest.tcl > /dev/null
+
+###############################
+# Task Preamble
+###############################
+
+set sc_refdir [sc_cfg_tool_task_get refdir]
+source -echo "$sc_refdir/apr/preamble.tcl"
+
+###############################
+# Timing Repair
+###############################
+
+set rsz_setup_slack_margin [lindex [sc_cfg_tool_task_get {var} rsz_setup_slack_margin] 0]
+set rsz_hold_slack_margin [lindex [sc_cfg_tool_task_get {var} rsz_hold_slack_margin] 0]
+set rsz_slew_margin [lindex [sc_cfg_tool_task_get {var} rsz_slew_margin] 0]
+set rsz_cap_margin [lindex [sc_cfg_tool_task_get {var} rsz_cap_margin] 0]
+set rsz_repair_tns [lindex [sc_cfg_tool_task_get {var} rsz_repair_tns] 0]
+
+set repair_timing_args []
+if { [lindex [sc_cfg_tool_task_get {var} rsz_skip_pin_swap] 0] == "true" } {
+    lappend repair_timing_args "-skip_pin_swap"
+}
+if { [lindex [sc_cfg_tool_task_get {var} rsz_skip_gate_cloning] 0] == "true" } {
+    lappend repair_timing_args "-skip_gate_cloning"
+}
+
+if { [lindex [sc_cfg_tool_task_get var rsz_skip_setup_repair] 0] != "true" } {
+    ###############################
+    # Setup Repair
+    ###############################
+
+    estimate_parasitics -placement
+
+    repair_timing \
+        -setup \
+        -verbose \
+        -setup_margin $rsz_setup_slack_margin \
+        -hold_margin $rsz_hold_slack_margin \
+        -repair_tns $rsz_repair_tns \
+        {*}$repair_timing_args
+
+    sc_detailed_placement
+}
+
+if { [lindex [sc_cfg_tool_task_get var rsz_skip_hold_repair] 0] != "true" } {
+    ###############################
+    # Hold Repair
+    ###############################
+
+    estimate_parasitics -placement
+
+    # Enable hold cells
+    unset_dont_use [sc_cfg_get library $sc_mainlib asic cells hold]
+
+    repair_timing \
+        -hold \
+        -verbose \
+        -setup_margin $rsz_setup_slack_margin \
+        -hold_margin $rsz_hold_slack_margin \
+        -repair_tns $rsz_repair_tns \
+        {*}$repair_timing_args
+
+    sc_detailed_placement
+
+    # Restore dont use
+    set_dont_use [sc_cfg_get library $sc_mainlib asic cells dontuse]
+}
+
+global_connect
+
+# estimate for metrics
+estimate_parasitics -placement
+
+###############################
+# Task Postamble
+###############################
+
+source -echo "$sc_refdir/apr/postamble.tcl"

siliconcompiler/tools/openroad/scripts/apr/sc_write_data.tcl

@@ -0,0 +1,125 @@
+###############################
+# Reading SC Schema
+###############################
+
+source ./sc_manifest.tcl > /dev/null
+
+###############################
+# Task Preamble
+###############################
+
+set sc_refdir [sc_cfg_tool_task_get refdir]
+source -echo "$sc_refdir/apr/preamble.tcl"
+
+###############################
+# Generate LEF
+###############################
+
+set lef_args []
+if {
+    [lindex [sc_cfg_tool_task_get {var} ord_abstract_lef_bloat_layers] 0]
+    == "true"
+} {
+    lappend lef_args "-bloat_occupied_layers"
+} else {
+    lappend lef_args \
+        "-bloat_factor" \
+        [lindex [sc_cfg_tool_task_get {var} ord_abstract_lef_bloat_factor] 0]
+}
+write_abstract_lef {*}$lef_args "outputs/${sc_design}.lef"
+
+###############################
+# Generate CDL
+###############################
+
+if { [lindex [sc_cfg_tool_task_get {var} write_cdl] 0] == "true" } {
+    # Write CDL
+    set sc_cdl_masters []
+    foreach lib "$sc_targetlibs $sc_macrolibs" {
+        #CDL files
+        if { [sc_cfg_exists library $lib output $sc_stackup cdl] } {
+            foreach cdl_file [sc_cfg_get library $lib output $sc_stackup cdl] {
+                lappend sc_cdl_masters $cdl_file
+            }
+        }
+    }
+    write_cdl -masters $sc_cdl_masters "outputs/${sc_design}.cdl"
+}
+
+###############################
+# Generate SPEF
+###############################
+
+if { [lindex [sc_cfg_tool_task_get {var} write_spef] 0] == "true" } {
+    # just need to define a corner
+    define_process_corner -ext_model_index 0 X
+    foreach pexcorner [sc_cfg_tool_task_get {var} pex_corners] {
+        set sc_pextool "${sc_tool}-openrcx"
+        set pex_model \
+            [lindex [sc_cfg_get pdk $sc_pdk pexmodel $sc_pextool $sc_stackup $pexcorner] 0]
+        puts "Writing SPEF for $pexcorner"
+        extract_parasitics -ext_model_file $pex_model
+        write_spef "outputs/${sc_design}.${pexcorner}.spef"
+    }
+
+    if { [lindex [sc_cfg_tool_task_get {var} use_spef] 0] == "true" } {
+        set lib_pex [dict create]
+        foreach scenario $sc_scenarios {
+            set pexcorner [sc_cfg_get constraint timing $scenario pexcorner]
+
+            dict set lib_pex $scenario $pexcorner
+        }
+
+        # read in spef for timing corners
+        foreach corner $sc_scenarios {
+            set pexcorner [dict get $lib_pex $corner]
+
+            puts "Reading SPEF for $pexcorner into $corner"
+            read_spef -corner $corner \
+                "outputs/${sc_design}.${pexcorner}.spef"
+        }
+    } else {
+        # estimate for metrics
+        estimate_parasitics -global_routing
+    }
+} else {
+    # estimate for metrics
+    estimate_parasitics -global_routing
+}
+
+###############################
+# Write Timing Models
+###############################
+
+foreach corner $sc_scenarios {
+    if { [lindex [sc_cfg_tool_task_get {var} write_liberty] 0] == "true" } {
+        puts "Writing timing model for $corner"
+        write_timing_model -library_name "${sc_design}_${corner}" \
+            -corner $corner \
+            "outputs/${sc_design}.${corner}.lib"
+    }
+
+    if { [lindex [sc_cfg_tool_task_get {var} write_sdf] 0] == "true" } {
+        puts "Writing SDF for $corner"
+        write_sdf -corner $corner \
+            -include_typ \
+            "outputs/${sc_design}.${corner}.sdf"
+    }
+}
+
+###############################
+# Check Power Network
+###############################
+
+foreach net [sc_psm_check_nets] {
+    foreach corner $sc_scenarios {
+        puts "Analyzing supply net: $net on $corner"
+        analyze_power_grid -net $net -corner $corner
+    }
+}
+
+###############################
+# Task Postamble
+###############################
+
+source -echo "$sc_refdir/apr/postamble.tcl"

siliconcompiler/tools/openroad/scripts/common/debugging.tcl

@@ -0,0 +1,28 @@
+###############################
+# Setup debugging if requested
+###############################
+
+if { [llength [sc_cfg_tool_task_get {var} debug_level]] > 0 } {
+    foreach debug [sc_cfg_tool_task_get {var} debug_level] {
+        lassign [split $debug " "] debug_tool debug_category debug_level
+
+        utl::info FLW 1 "Setting debugging for $debug_tool/$debug_category/$debug_level"
+        set_debug_level $debug_tool $debug_category $debug_level
+    }
+}
+
+###############################
+# Suppress messages if requested
+###############################
+
+foreach msg [sc_cfg_tool_task_get warningoff] {
+    set or_msg [split $msg "-"]
+    if { [llength $or_msg] != 2 } {
+        utl::warn FLW 1 "$msg is not a valid message id"
+    } else {
+        set or_tool [lindex $or_msg 0]
+        set or_msg_id [expr { int([lindex $or_msg 1]) }]
+        utl::info FLW 1 "Suppressing $msg messages"
+        suppress_message $or_tool $or_msg_id
+    }
+}