siliconcompiler 0.28.9__py3-none-any.whl → 0.29.0__py3-none-any.whl

siliconcompiler/tools/openroad/macro_placement.py

@@ -0,0 +1,65 @@
+from siliconcompiler import NodeStatus
+
+from siliconcompiler.tools._common import has_pre_post_script, get_tool_task
+
+from siliconcompiler.tools.openroad._apr import setup as apr_setup
+from siliconcompiler.tools.openroad._apr import set_reports, set_pnr_inputs, set_pnr_outputs
+from siliconcompiler.tools.openroad._apr import \
+    define_ord_params, define_sta_params, define_sdc_params, \
+    define_mpl_params, define_gpl_params
+from siliconcompiler.tools.openroad._apr import build_pex_corners, define_ord_files
+from siliconcompiler.tools.openroad._apr import extract_metrics
+
+
+def setup(chip):
+    '''
+    Macro placement
+    '''
+
+    # Generic apr tool setup.
+    apr_setup(chip)
+
+    # Task setup
+    step = chip.get('arg', 'step')
+    index = chip.get('arg', 'index')
+    tool, task = get_tool_task(chip, step, index)
+
+    chip.set('tool', tool, 'task', task, 'script', 'apr/sc_macro_placement.tcl',
+             step=step, index=index)
+
+    # Setup task IO
+    set_pnr_inputs(chip)
+    set_pnr_outputs(chip)
+
+    # set default values for openroad
+    define_ord_params(chip)
+    define_sta_params(chip)
+    define_sdc_params(chip)
+    define_mpl_params(chip)
+    define_gpl_params(chip)
+
+    set_reports(chip, [
+        'setup',
+        'unconstrained',
+        'power'
+    ])
+
+
+def pre_process(chip):
+    step = chip.get('arg', 'step')
+    index = chip.get('arg', 'index')
+    input_nodes = chip.get('record', 'inputnode', step=step, index=index)
+    if not has_pre_post_script(chip) and all([
+            chip.get('metric', 'macros', step=in_step, index=in_index) == 0
+            for in_step, in_index in input_nodes
+            ]):
+        chip.set('record', 'status', NodeStatus.SKIPPED, step=step, index=index)
+        chip.logger.warning(f'{step}{index} will be skipped since are no macros to place.')
+        return
+
+    build_pex_corners(chip)
+    define_ord_files(chip)
+
+
+def post_process(chip):
+    extract_metrics(chip)

siliconcompiler/tools/openroad/metrics.py

@@ -1,8 +1,10 @@
-from siliconcompiler.tools.openroad.openroad import setup as setup_tool
-from siliconcompiler.tools.openroad.openroad import build_pex_corners
-from siliconcompiler.tools.openroad.openroad import post_process as or_post_process
-from siliconcompiler.tools.openroad.openroad import pre_process as or_pre_process
-from siliconcompiler.tools.openroad.openroad import _set_reports, set_pnr_inputs, set_pnr_outputs
+from siliconcompiler.tools._common import get_tool_task
+from siliconcompiler.tools.openroad._apr import setup as setup_tool
+from siliconcompiler.tools.openroad._apr import set_reports, set_pnr_inputs, set_pnr_outputs
+from siliconcompiler.tools.openroad._apr import \
+    define_ord_params, define_sta_params, define_sdc_params
+from siliconcompiler.tools.openroad._apr import build_pex_corners, define_ord_files
+from siliconcompiler.tools.openroad._apr import extract_metrics
 
 
 def setup(chip):
@@ -13,10 +15,23 @@ def setup(chip):
     # Generic tool setup.
     setup_tool(chip)
 
+    # Task setup
+    step = chip.get('arg', 'step')
+    index = chip.get('arg', 'index')
+    tool, task = get_tool_task(chip, step, index)
+
+    chip.set('tool', tool, 'task', task, 'script', 'apr/sc_metrics.tcl',
+             step=step, index=index)
+
     set_pnr_inputs(chip)
     set_pnr_outputs(chip)
 
-    _set_reports(chip, [
+    # set default values for openroad
+    define_ord_params(chip)
+    define_sta_params(chip)
+    define_sdc_params(chip)
+
+    set_reports(chip, [
         'setup',
         'hold',
         'unconstrained',
@@ -36,9 +51,9 @@ def setup(chip):
 
 
 def pre_process(chip):
-    or_pre_process(chip)
+    define_ord_files(chip)
     build_pex_corners(chip)
 
 
 def post_process(chip):
-    or_post_process(chip)
+    extract_metrics(chip)

siliconcompiler/tools/openroad/pin_placement.py

@@ -0,0 +1,56 @@
+from siliconcompiler.tools._common import get_tool_task
+from siliconcompiler.tools.openroad._apr import setup as apr_setup
+from siliconcompiler.tools.openroad._apr import set_reports, set_pnr_inputs, set_pnr_outputs
+from siliconcompiler.tools.openroad._apr import \
+    define_ord_params, define_sta_params, define_sdc_params, \
+    define_gpl_params, define_ppl_params
+from siliconcompiler.tools.openroad._apr import build_pex_corners, define_ord_files
+from siliconcompiler.tools.openroad._apr import extract_metrics
+
+
+def setup(chip):
+    '''
+    Perform IO pin placement refinement
+    '''
+
+    # Generic apr tool setup.
+    apr_setup(chip)
+
+    # Task setup
+    step = chip.get('arg', 'step')
+    index = chip.get('arg', 'index')
+    tool, task = get_tool_task(chip, step, index)
+
+    chip.set('tool', tool, 'task', task, 'script', 'apr/sc_pin_placement.tcl',
+             step=step, index=index)
+
+    # Setup task IO
+    set_pnr_inputs(chip)
+    set_pnr_outputs(chip)
+
+    # set default values for openroad
+    define_ord_params(chip)
+    define_sta_params(chip)
+    define_sdc_params(chip)
+    define_gpl_params(chip)
+    define_ppl_params(chip)
+
+    set_reports(chip, [
+        'setup',
+        'unconstrained',
+        'power',
+
+        # Images
+        'placement_density',
+        'routing_congestion',
+        'power_density'
+    ])
+
+
+def pre_process(chip):
+    define_ord_files(chip)
+    build_pex_corners(chip)
+
+
+def post_process(chip):
+    extract_metrics(chip)

siliconcompiler/tools/openroad/power_grid.py

@@ -0,0 +1,65 @@
+from siliconcompiler import NodeStatus
+
+from siliconcompiler.tools._common import get_tool_task, has_pre_post_script
+
+from siliconcompiler.tools.openroad._apr import setup as apr_setup
+from siliconcompiler.tools.openroad._apr import set_reports, set_pnr_inputs, set_pnr_outputs
+from siliconcompiler.tools.openroad._apr import \
+    define_ord_params, define_sta_params, define_sdc_params, \
+    define_pdn_params, define_psm_params
+from siliconcompiler.tools.openroad._apr import build_pex_corners, \
+    define_ord_files, define_pdn_files
+from siliconcompiler.tools.openroad._apr import extract_metrics
+
+
+def setup(chip):
+    '''
+    Perform power grid insertion and connectivity analysis
+    '''
+
+    # Generic apr tool setup.
+    apr_setup(chip)
+
+    # Task setup
+    step = chip.get('arg', 'step')
+    index = chip.get('arg', 'index')
+    tool, task = get_tool_task(chip, step, index)
+
+    chip.set('tool', tool, 'task', task, 'script', 'apr/sc_power_grid.tcl',
+             step=step, index=index)
+
+    # Setup task IO
+    set_pnr_inputs(chip)
+    set_pnr_outputs(chip)
+
+    # set default values for openroad
+    define_ord_params(chip)
+    define_sta_params(chip)
+    define_sdc_params(chip)
+    define_pdn_params(chip)
+    define_psm_params(chip)
+
+    set_reports(chip, [])
+
+
+def pre_process(chip):
+    step = chip.get('arg', 'step')
+    index = chip.get('arg', 'index')
+    tool, task = get_tool_task(chip, step, index)
+
+    define_pdn_files(chip)
+    pdncfg = [file for file in chip.find_files('tool', tool, 'task', task, 'file', 'pdn_config',
+                                               step=step, index=index) if file]
+    if not has_pre_post_script(chip) and \
+            (chip.get('tool', tool, 'task', task, 'var', 'pdn_enable',
+                      step=step, index=index)[0] == 'false' or len(pdncfg) == 0):
+        chip.set('record', 'status', NodeStatus.SKIPPED, step=step, index=index)
+        chip.logger.warning(f'{step}{index} will be skipped since power grid is disabled.')
+        return
+
+    define_ord_files(chip)
+    build_pex_corners(chip)
+
+
+def post_process(chip):
+    extract_metrics(chip)

siliconcompiler/tools/openroad/rcx_bench.py

@@ -1,4 +1,4 @@
-from siliconcompiler.tools.openroad import openroad
+from siliconcompiler.tools import openroad
 from siliconcompiler.tools._common import get_tool_task
 
 
@@ -12,8 +12,10 @@ def setup_tool(chip):
     index = chip.get('arg', 'index')
     tool, task = get_tool_task(chip, step, index)
 
-    chip.set('tool', tool, 'task', task, 'script', 'sc_rcx.tcl', step=step, index=index)
-    chip.set('tool', tool, 'task', task, 'threads', 1, step=step, index=index)
+    chip.set('tool', tool, 'task', task, 'script', 'sc_rcx.tcl',
+             step=step, index=index)
+    chip.set('tool', tool, 'task', task, 'threads', 1,
+             step=step, index=index)
 
 
 def setup_task(chip):
@@ -49,7 +51,8 @@ def setup_task(chip):
 
 
 def setup(chip):
-    ''' Helper method for configs specific to extraction tasks.
+    '''
+    Builds the RCX extraction bench
     '''
 
     # Generic tool setup.

siliconcompiler/tools/openroad/rcx_extract.py

@@ -3,7 +3,8 @@ from siliconcompiler.tools._common import get_tool_task
 
 
 def setup(chip):
-    ''' Helper method for configs specific to extraction tasks.
+    '''
+    Convert extracted results into RCX.
     '''
 
     # Generic tool setup.

siliconcompiler/tools/openroad/rdlroute.py

@@ -2,8 +2,8 @@ import os
 
 from siliconcompiler.tools._common import input_provides, get_tool_task
 from siliconcompiler.tools._common.asic import set_tool_task_var
-from siliconcompiler.tools.openroad.openroad import build_pex_corners
-from siliconcompiler.tools.openroad.openroad import post_process as or_post_process
+from siliconcompiler.tools.openroad._apr import build_pex_corners
+from siliconcompiler.tools.openroad._apr import extract_metrics
 
 
 def setup(chip):
@@ -26,7 +26,7 @@ def setup(chip):
 
     chip.set('tool', tool, 'exe', tool)
     chip.set('tool', tool, 'vswitch', '-version')
-    chip.set('tool', tool, 'version', '>=v2.0-16839')
+    chip.set('tool', tool, 'version', '>=v2.0-17581')
     chip.set('tool', tool, 'format', 'tcl')
 
     # exit automatically in batch mode and not breakpoint
@@ -94,4 +94,4 @@ def pre_process(chip):
 
 
 def post_process(chip):
-    or_post_process(chip)
+    extract_metrics(chip)

siliconcompiler/tools/openroad/repair_design.py

@@ -0,0 +1,59 @@
+from siliconcompiler.tools._common import get_tool_task
+from siliconcompiler.tools.openroad._apr import setup as apr_setup
+from siliconcompiler.tools.openroad._apr import set_reports, set_pnr_inputs, set_pnr_outputs
+from siliconcompiler.tools.openroad._apr import \
+    define_ord_params, define_sta_params, define_sdc_params, \
+    define_rsz_params, define_tiecell_params
+from siliconcompiler.tools.openroad._apr import build_pex_corners, define_ord_files
+from siliconcompiler.tools.openroad._apr import extract_metrics
+
+
+def setup(chip):
+    '''
+    Perform timing repair and tie-off cell insertion
+    '''
+
+    # Generic apr tool setup.
+    apr_setup(chip)
+
+    # Task setup
+    step = chip.get('arg', 'step')
+    index = chip.get('arg', 'index')
+    tool, task = get_tool_task(chip, step, index)
+
+    chip.set('tool', tool, 'task', task, 'script', 'apr/sc_repair_design.tcl',
+             step=step, index=index)
+
+    # Setup task IO
+    set_pnr_inputs(chip)
+    set_pnr_outputs(chip)
+
+    # set default values for openroad
+    define_ord_params(chip)
+    define_sta_params(chip)
+    define_sdc_params(chip)
+    define_rsz_params(chip)
+    define_tiecell_params(chip)
+
+    set_reports(chip, [
+        'setup',
+        'unconstrained',
+        'power',
+        'drv_violations',
+        'fmax',
+
+        # Images
+        'placement_density',
+        'routing_congestion',
+        'power_density',
+        'optimization_placement'
+    ])
+
+
+def pre_process(chip):
+    define_ord_files(chip)
+    build_pex_corners(chip)
+
+
+def post_process(chip):
+    extract_metrics(chip)

siliconcompiler/tools/openroad/repair_timing.py

@@ -0,0 +1,63 @@
+from siliconcompiler.tools._common import get_tool_task
+from siliconcompiler.tools.openroad._apr import setup as apr_setup
+from siliconcompiler.tools.openroad._apr import set_reports, set_pnr_inputs, set_pnr_outputs
+from siliconcompiler.tools.openroad._apr import \
+    define_ord_params, define_sta_params, define_sdc_params, \
+    define_rsz_params, define_dpl_params
+from siliconcompiler.tools.openroad._apr import build_pex_corners, define_ord_files
+from siliconcompiler.tools.openroad._apr import extract_metrics
+
+
+def setup(chip):
+    '''
+    Perform setup and hold timing repairs
+    '''
+
+    # Generic apr tool setup.
+    apr_setup(chip)
+
+    # Task setup
+    step = chip.get('arg', 'step')
+    index = chip.get('arg', 'index')
+    tool, task = get_tool_task(chip, step, index)
+
+    chip.set('tool', tool, 'task', task, 'script', 'apr/sc_repair_timing.tcl',
+             step=step, index=index)
+
+    # Setup task IO
+    set_pnr_inputs(chip)
+    set_pnr_outputs(chip)
+
+    # set default values for openroad
+    define_ord_params(chip)
+    define_sta_params(chip)
+    define_sdc_params(chip)
+    define_rsz_params(chip)
+    define_dpl_params(chip)
+
+    set_reports(chip, [
+        'setup',
+        'hold',
+        'unconstrained',
+        'clock_skew',
+        'power',
+        'drv_violations',
+        'fmax',
+
+        # Images
+        'placement_density',
+        'routing_congestion',
+        'power_density',
+        'optimization_placement',
+        'clock_placement',
+        'clock_trees'
+    ])
+
+
+def pre_process(chip):
+    define_ord_files(chip)
+    build_pex_corners(chip)
+
+
+def post_process(chip):
+    extract_metrics(chip)

siliconcompiler/tools/openroad/screenshot.py

@@ -1,17 +1,14 @@
-from siliconcompiler.tools.openroad import openroad
-from siliconcompiler.tools.openroad.openroad import setup as setup_tool
-from siliconcompiler.tools.openroad.openroad import build_pex_corners
-from siliconcompiler.tools.openroad.show import copy_show_files, generic_show_setup
-from siliconcompiler.tools.openroad.openroad import pre_process as or_pre_process
-from siliconcompiler.tools.openroad.openroad import _set_reports
 from siliconcompiler.tools._common import get_tool_task
+from siliconcompiler.tools.openroad import make_docs as or_make_docs
+from siliconcompiler.tools.openroad import show
+from siliconcompiler.tools.openroad._apr import set_reports
 
 
 ####################################################################
 # Make Docs
 ####################################################################
 def make_docs(chip):
-    openroad.make_docs(chip)
+    or_make_docs(chip)
     chip.set('tool', 'openroad', 'task', 'screenshot', 'var', 'show_filepath', '<path>')
 
 
@@ -19,19 +16,13 @@ def setup(chip):
     '''
     Generate a PNG file from a layout file
     '''
+    show.generic_show_setup(chip, True)
 
-    tool = 'openroad'
-    design = chip.top()
     step = chip.get('arg', 'step')
     index = chip.get('arg', 'index')
-    _, task = get_tool_task(chip, step, index)
+    tool, task = get_tool_task(chip, step, index)
 
-    # Generic tool setup.
-    setup_tool(chip)
-
-    generic_show_setup(chip, task, True)
-
-    chip.add('tool', tool, 'task', task, 'output', design + '.png', step=step, index=index)
+    chip.add('tool', tool, 'task', task, 'output', f'{chip.top()}.png', step=step, index=index)
 
     chip.set('tool', tool, 'task', task, 'var', 'show_vertical_resolution', '1024',
              step=step, index=index, clobber=False)
@@ -42,7 +33,7 @@ def setup(chip):
              'true/false, include the images in reports/',
              field='help')
 
-    _set_reports(chip, [
+    set_reports(chip, [
         # Images
         'placement_density',
         'routing_congestion',
@@ -55,6 +46,4 @@ def setup(chip):
 
 
 def pre_process(chip):
-    or_pre_process(chip)
-    copy_show_files(chip)
-    build_pex_corners(chip)
+    show.pre_process(chip)

siliconcompiler/tools/openroad/scripts/apr/postamble.tcl

@@ -0,0 +1,44 @@
+if { [llength $openroad_dont_touch] > 0 } {
+    # unset for next step
+    unset_dont_touch $openroad_dont_touch
+}
+utl::pop_metrics_stage
+
+utl::push_metrics_stage "sc__poststep__{}"
+if { [sc_cfg_tool_task_exists postscript] } {
+    foreach sc_post_script [sc_cfg_tool_task_get postscript] {
+        puts "Sourcing post script: ${sc_post_script}"
+        source -echo $sc_post_script
+    }
+}
+utl::pop_metrics_stage
+
+###############################
+# Write Design Data
+###############################
+
+utl::push_metrics_stage "sc__write__{}"
+source "$sc_refdir/common/write_data.tcl"
+utl::pop_metrics_stage
+
+###############################
+# Reporting
+###############################
+
+utl::push_metrics_stage "sc__metric__{}"
+source "$sc_refdir/common/reports.tcl"
+utl::pop_metrics_stage
+
+# Images
+utl::push_metrics_stage "sc__image__{}"
+if {
+    [sc_has_gui] &&
+    [lindex [sc_cfg_tool_task_get var ord_enable_images] 0] == "true"
+} {
+    if { [gui::enabled] } {
+        source "$sc_refdir/common/write_images.tcl"
+    } else {
+        gui::show "source \"$sc_refdir/common/write_images.tcl\"" false
+    }
+}
+utl::pop_metrics_stage

siliconcompiler/tools/openroad/scripts/apr/preamble.tcl

@@ -0,0 +1,95 @@
+##############################
+# Schema Adapter
+###############################
+
+set sc_step [sc_cfg_get arg step]
+set sc_index [sc_cfg_get arg index]
+set sc_flow [sc_cfg_get option flow]
+set sc_tool [sc_cfg_get flowgraph $sc_flow $sc_step $sc_index tool]
+set sc_task [sc_cfg_get flowgraph $sc_flow $sc_step $sc_index task]
+
+set sc_refdir [sc_cfg_tool_task_get refdir]
+
+##############################
+# Setup debugging
+###############################
+
+source -echo "$sc_refdir/common/debugging.tcl"
+
+###############################
+# Setup helper functions
+###############################
+
+source "$sc_refdir/common/procs.tcl"
+
+###############################
+# Design information
+###############################
+
+# Design
+set sc_design [sc_top]
+set sc_optmode [sc_cfg_get option optmode]
+set sc_pdk [sc_cfg_get option pdk]
+set sc_stackup [sc_cfg_get option stackup]
+
+# APR Parameters
+set sc_targetlibs [sc_get_asic_libraries logic]
+set sc_mainlib [lindex $sc_targetlibs 0]
+set sc_delaymodel [sc_cfg_get asic delaymodel]
+
+# Hard macro libraries
+set sc_macrolibs [sc_get_asic_libraries macro]
+
+# Threads
+set_thread_count [sc_cfg_tool_task_get threads]
+
+###############################
+# Read Files
+###############################
+
+source -echo "$sc_refdir/common/read_liberty.tcl"
+
+source -echo "$sc_refdir/common/read_input_files.tcl"
+
+source -echo "$sc_refdir/common/read_timing_constraints.tcl"
+
+###############################
+# Common Setup
+###############################
+
+sc_setup_sta
+
+sc_setup_parasitics
+
+set_dont_use [sc_cfg_get library $sc_mainlib asic cells dontuse]
+
+sc_setup_global_routing
+
+###############################
+# Source Step Script
+###############################
+
+report_units_metric
+
+utl::push_metrics_stage "sc__prestep__{}"
+if { [sc_cfg_tool_task_exists prescript] } {
+    foreach sc_pre_script [sc_cfg_tool_task_get prescript] {
+        puts "Sourcing pre script: ${sc_pre_script}"
+        source -echo $sc_pre_script
+    }
+}
+utl::pop_metrics_stage
+
+utl::push_metrics_stage "sc__step__{}"
+
+set openroad_dont_touch {}
+if { [sc_cfg_tool_task_exists {var} dont_touch] } {
+    set openroad_dont_touch [sc_cfg_tool_task_get {var} dont_touch]
+}
+
+if { [llength $openroad_dont_touch] > 0 } {
+    # set don't touch list
+    set_dont_touch $openroad_dont_touch
+}
+tee -file reports/dont_touch.start.rpt {report_dont_touch}
+tee -file reports/dont_use.start.rpt {report_dont_use}

siliconcompiler/tools/openroad/scripts/apr/sc_antenna_repair.tcl

@@ -0,0 +1,51 @@
+###############################
+# Reading SC Schema
+###############################
+
+source ./sc_manifest.tcl > /dev/null
+
+###############################
+# Task Preamble
+###############################
+
+set sc_refdir [sc_cfg_tool_task_get refdir]
+source -echo "$sc_refdir/apr/preamble.tcl"
+
+###############################
+# Report and Repair Antennas
+###############################
+
+estimate_parasitics -global_routing
+if {
+    [lindex [sc_cfg_tool_task_get {var} ant_check] 0] == "true" &&
+    [check_antennas -report_file "reports/${sc_design}_antenna.rpt"] != 0
+} {
+    if {
+        [lindex [sc_cfg_tool_task_get {var} ant_repair] 0] == "true" &&
+        [llength [sc_cfg_get library $sc_mainlib asic cells antenna]] != 0
+    } {
+        set sc_antenna [lindex [sc_cfg_get library $sc_mainlib asic cells antenna] 0]
+
+        # Remove filler cells before attempting to repair antennas
+        remove_fillers
+
+        repair_antenna \
+            $sc_antenna \
+            -iterations [lindex [sc_cfg_tool_task_get {var} ant_iterations] 0] \
+            -ratio_margin [lindex [sc_cfg_tool_task_get {var} ant_margin] 0]
+
+        # Add filler cells back
+        sc_insert_fillers
+
+        # Check antennas again to get final report
+        check_antennas -report_file "reports/${sc_design}_antenna_post_repair.rpt"
+    }
+}
+
+estimate_parasitics -global_routing
+
+###############################
+# Task Postamble
+###############################
+
+source -echo "$sc_refdir/apr/postamble.tcl"