angr 9.2.117__py3-none-win_amd64.whl → 9.2.119__py3-none-win_amd64.whl

angr/storage/memory_mixins/paged_memory/pages/ultra_page.py

@@ -1,4 +1,5 @@
 # pylint:disable=arguments-differ
+from __future__ import annotations
 import logging
 from typing import Any
 from collections.abc import Iterable
@@ -138,7 +139,7 @@ class UltraPage(MemoryObjectMixin, PageBase):
         self,
         addr,
         data: int | SimMemoryObject,
-        size: int = None,
+        size: int | None = None,
         endness=None,
         memory=None,
         page_addr=None,  # pylint: disable=arguments-differ
@@ -158,24 +159,23 @@ class UltraPage(MemoryObjectMixin, PageBase):
 
         byte_width = memory.state.arch.byte_width
 
-        if type(data) is not int:
-            if data.object.op == "BVV" and not data.object.annotations:
-                # trim the unnecessary leading bytes if there are any
-                full_bits = len(data.object)
-                start = (page_addr + addr - data.base) & ((1 << memory.state.arch.bits) - 1)
-                if start >= data.base + data.length:
-                    raise SimMemoryError("Not enough bytes to store.")
-                start_bits = full_bits - start * byte_width - 1
-                # trim the overflowing bytes if there are any
-                end_bits = start_bits + 1 - size * byte_width
-                if start_bits != full_bits - 1 or end_bits != 0:
-                    if endness == "Iend_LE":
-                        start_bits, end_bits = len(data.object) - end_bits - 1, len(data.object) - start_bits - 1
-
-                    concrete_data: bytes = data.concrete_bytes(
-                        (full_bits - start_bits - 1) // byte_width, (start_bits - end_bits + 1) // byte_width
-                    )
-                    data = int.from_bytes(concrete_data, "big")
+        if type(data) is not int and data.object.op == "BVV" and not data.object.annotations:
+            # trim the unnecessary leading bytes if there are any
+            full_bits = len(data.object)
+            start = (page_addr + addr - data.base) & ((1 << memory.state.arch.bits) - 1)
+            if start >= data.base + data.length:
+                raise SimMemoryError("Not enough bytes to store.")
+            start_bits = full_bits - start * byte_width - 1
+            # trim the overflowing bytes if there are any
+            end_bits = start_bits + 1 - size * byte_width
+            if start_bits != full_bits - 1 or end_bits != 0:
+                if endness == "Iend_LE":
+                    start_bits, end_bits = len(data.object) - end_bits - 1, len(data.object) - start_bits - 1
+
+                concrete_data: bytes = data.concrete_bytes(
+                    (full_bits - start_bits - 1) // byte_width, (start_bits - end_bits + 1) // byte_width
+                )
+                data = int.from_bytes(concrete_data, "big")
 
         if type(data) is int or (data.object.op == "BVV" and not data.object.annotations):
             # mark range as not symbolic
@@ -183,10 +183,7 @@ class UltraPage(MemoryObjectMixin, PageBase):
 
             # store
             arange = range(addr, addr + size)
-            if type(data) is int:
-                ival = data
-            else:  # data.object.op == 'BVV'
-                ival = data.object.args[0]
+            ival = data if type(data) is int else data.object.args[0]
             if endness == "Iend_BE":
                 arange = reversed(arange)
 
@@ -217,14 +214,14 @@ class UltraPage(MemoryObjectMixin, PageBase):
 
     def merge(
         self,
-        others: list["UltraPage"],
+        others: list[UltraPage],
         merge_conditions,
         common_ancestor=None,
-        page_addr: int = None,  # pylint: disable=arguments-differ
+        page_addr: int | None = None,  # pylint: disable=arguments-differ
         memory=None,
         changed_offsets: set[int] | None = None,
     ):
-        all_pages = [self] + others
+        all_pages = [self, *others]
         merged_to = None
         merged_objects = set()
         merged_offsets = set()
@@ -242,7 +239,7 @@ class UltraPage(MemoryObjectMixin, PageBase):
 
             memory_objects: list[tuple[SimMemoryObject, Any]] = []
             concretes: list[tuple[int, Any]] = []
-            unconstrained_in: list[tuple["UltraPage", Any]] = []
+            unconstrained_in: list[tuple[UltraPage, Any]] = []
             our_mo: SimMemoryObject | None = None
 
             # first get a list of all memory objects at that location, and
@@ -285,7 +282,7 @@ class UltraPage(MemoryObjectMixin, PageBase):
                 to_merge = [(mo.object, fv) for mo, fv in memory_objects]
 
                 # Update `merged_to`
-                merged_to = b + list(mo_lengths)[0]
+                merged_to = b + next(iter(mo_lengths))
 
                 merged_val = self._merge_values(to_merge, memory_objects[0][0].length, memory=memory)
                 if merged_val is None:
@@ -295,7 +292,7 @@ class UltraPage(MemoryObjectMixin, PageBase):
                     # this object does not exist in the current page. do the store
                     new_object = SimMemoryObject(merged_val, page_addr + b, memory_objects[0][0].endness)
                     self.store(
-                        b, new_object, size=list(mo_lengths)[0], cooperate=True, page_addr=page_addr, memory=memory
+                        b, new_object, size=next(iter(mo_lengths)), cooperate=True, page_addr=page_addr, memory=memory
                     )
                     merged_objects.add(new_object)
                 else:
@@ -311,7 +308,7 @@ class UltraPage(MemoryObjectMixin, PageBase):
                 # the size of all memory objects and unallocated spaces.
                 min_size = min(mo.length - (page_addr + b - mo.base) for mo, _ in memory_objects)
                 for um, _ in unconstrained_in:
-                    for i in range(0, min_size):
+                    for i in range(min_size):
                         if um._contains(b + i, page_addr):
                             min_size = i
                             break
@@ -352,8 +349,7 @@ class UltraPage(MemoryObjectMixin, PageBase):
                 memoryview(self.concrete_data)[addr : addr + size],
                 memoryview(self.symbolic_bitmap)[addr : addr + size],
             )
-        else:
-            return self.concrete_data[addr : addr + size], memoryview(self.symbolic_bitmap)[addr : addr + size]
+        return self.concrete_data[addr : addr + size], memoryview(self.symbolic_bitmap)[addr : addr + size]
 
     def changed_bytes(self, other, page_addr=None) -> set[int]:
         changed_candidates = super().changed_bytes(other)
@@ -411,9 +407,8 @@ class UltraPage(MemoryObjectMixin, PageBase):
         if not self.symbolic_bitmap[start]:
             # concrete data
             return True
-        else:
-            # symbolic data or does not exist
-            return self._get_object(start, page_addr) is not None
+        # symbolic data or does not exist
+        return self._get_object(start, page_addr) is not None
 
     def _get_object(self, start: int, page_addr: int, memory=None) -> SimMemoryObject | None:
         try:
@@ -422,12 +417,13 @@ class UltraPage(MemoryObjectMixin, PageBase):
             return None
         else:
             obj = self.symbolic_data[place]
-            if obj.includes(start + page_addr):
-                return obj
-            elif memory is not None and obj.includes(start + page_addr + (1 << memory.state.arch.bits)):
+            if (
+                obj.includes(start + page_addr)
+                or memory is not None
+                and obj.includes(start + page_addr + (1 << memory.state.arch.bits))
+            ):
                 return obj
-            else:
-                return None
+            return None
 
     def _get_next_place(self, start):
         try:
@@ -439,7 +435,7 @@ class UltraPage(MemoryObjectMixin, PageBase):
 
     def replace_all_with_offsets(self, offsets: Iterable[int], old: claripy.ast.BV, new: claripy.ast.BV, memory=None):
         memory_objects = set()
-        for offset in sorted(list(offsets)):
+        for offset in sorted(offsets):
             try:
                 a = next(self.symbolic_data.irange(maximum=offset, reverse=True))
             except StopIteration:
@@ -468,7 +464,7 @@ class UltraPage(MemoryObjectMixin, PageBase):
             if replaced_object is not None:
                 self._replace_memory_object(mo, replaced_object, memory=memory)
 
-    def _replace_memory_object(self, old: SimMemoryObject, new_content: claripy.Bits, memory=None):
+    def _replace_memory_object(self, old: SimMemoryObject, new_content: claripy.ast.Bits, memory=None):
         """
         Replaces the memory object `old` with a new memory object containing `new_content`.
 

angr/storage/memory_mixins/paged_memory/privileged_mixin.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 from .paged_memory_mixin import PagedMemoryMixin
 
 

angr/storage/memory_mixins/paged_memory/stack_allocation_mixin.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 import logging
 
 from .paged_memory_mixin import PagedMemoryMixin

angr/storage/memory_mixins/regioned_memory/__init__.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 from .regioned_memory_mixin import RegionedMemoryMixin
 from .region_category_mixin import RegionCategoryMixin
 from .static_find_mixin import StaticFindMixin

angr/storage/memory_mixins/regioned_memory/abstract_address_descriptor.py

@@ -1,6 +1,7 @@
+from __future__ import annotations
 from collections.abc import Generator
 
-from claripy.vsa import StridedInterval
+from claripy.ast import BV
 
 
 class AbstractAddressDescriptor:
@@ -12,13 +13,13 @@ class AbstractAddressDescriptor:
     __slots__ = ("_regioned_addrs",)
 
     def __init__(self):
-        self._regioned_addrs: list[tuple[str, StridedInterval]] = []
+        self._regioned_addrs: list[tuple[str, BV]] = []
 
     def __len__(self) -> int:
         # this may raise an OverflowError if self.cardinality is greater than sys.maxint
         return self.cardinality
 
-    def __iter__(self) -> Generator[tuple[str, StridedInterval], None, None]:
+    def __iter__(self) -> Generator[tuple[str, BV]]:
         yield from self._regioned_addrs
 
     @property
@@ -28,7 +29,7 @@ class AbstractAddressDescriptor:
             n += si.cardinality
         return n
 
-    def add_regioned_address(self, region: str, addr: StridedInterval):
+    def add_regioned_address(self, region: str, addr: BV):
         self._regioned_addrs.append((region, addr))
 
     def clear(self):

angr/storage/memory_mixins/regioned_memory/abstract_merger_mixin.py

@@ -1,8 +1,9 @@
+from __future__ import annotations
+
 import logging
 from collections.abc import Iterable
 from typing import Any
 
-import claripy
 
 from .. import MemoryMixin
 
@@ -10,36 +11,20 @@ l = logging.getLogger(name=__name__)
 
 
 class AbstractMergerMixin(MemoryMixin):
-    def _merge_values(self, values: Iterable[tuple[Any, Any]], merged_size: int, **kwargs):
-        # if self.category == 'reg' and self.state.arch.register_endness == 'Iend_LE':
-        #     should_reverse = True
-        # elif self.state.arch.memory_endness == 'Iend_LE':
-        #     should_reverse = True
-        # else:
-        #     should_reverse = False
+    """AbstractMergerMixin handles merging initialized values."""
 
+    def _merge_values(self, values: Iterable[tuple[Any, Any]], merged_size: int, **kwargs):
         values = list(values)
         merged_val = values[0][0]
 
-        # if should_reverse: merged_val = merged_val.reversed
-
         for tm, _ in values[1:]:
-            # if should_reverse: tm = tm.reversed
-
-            if self._is_uninitialized(tm):
+            if tm.uninitialized:
                 continue
             l.info("Merging %s %s...", merged_val, tm)
             merged_val = merged_val.union(tm)
             l.info("... Merged to %s", merged_val)
 
-        # if should_reverse:
-        #     merged_val = merged_val.reversed
-
-        if not values[0][0].uninitialized and claripy.backends.vsa.identical(merged_val, values[0][0]):
+        if not values[0][0].uninitialized and merged_val.identical(values[0][0]):
             return None
 
         return merged_val
-
-    @staticmethod
-    def _is_uninitialized(a):
-        return getattr(claripy.backends.vsa.convert(a), "uninitialized", False)

angr/storage/memory_mixins/regioned_memory/region_category_mixin.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 from .. import MemoryMixin
 
 

angr/storage/memory_mixins/regioned_memory/region_data.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 from sortedcontainers import SortedDict
 
 import claripy
@@ -72,9 +73,7 @@ class RegionDescriptor:
         self.related_function_address = related_function_address
 
     def __repr__(self):
-        return "<{} - {:#x}>".format(
-            self.region_id, self.related_function_address if self.related_function_address is not None else 0
-        )
+        return f"<{self.region_id} - {self.related_function_address if self.related_function_address is not None else 0:#x}>"
 
 
 class RegionMap:
@@ -199,7 +198,7 @@ class RegionMap:
             return relative_address
 
         if region_id not in self._region_id_to_address:
-            raise SimRegionMapError('Non-existent region ID "%s"' % region_id)
+            raise SimRegionMapError(f'Non-existent region ID "{region_id}"')
 
         base_address = self._region_id_to_address[region_id].base_address
         return base_address + relative_address
@@ -239,7 +238,7 @@ class RegionMap:
                 return "global", absolute_address, None
 
             if target_region_id not in self._region_id_to_address:
-                raise SimRegionMapError('Trying to relativize to a non-existent region "%s"' % target_region_id)
+                raise SimRegionMapError(f'Trying to relativize to a non-existent region "{target_region_id}"')
 
             descriptor = self._region_id_to_address[target_region_id]
             base_address = descriptor.base_address

angr/storage/memory_mixins/regioned_memory/region_meta_mixin.py

@@ -1,11 +1,132 @@
+from __future__ import annotations
 import copy
 from typing import Any
 
-from claripy.vsa import AbstractLocation
-
 from .. import MemoryMixin
 
 
+class Segment:
+    """Segment represents a continuous memory region."""
+
+    def __init__(self, offset, size=0):
+        self.offset = offset
+        self.size = size
+
+    def __repr__(self):
+        return "Seg (%s [ %d ])" % (hex(self.offset), self.size)
+
+
+class AbstractLocation:
+    """AbstractLocation represents a location in memory."""
+
+    def __init__(self, bbl_key, stmt_id, region_id, segment_list=None, region_offset=None, size=None):
+        self._bbl_key = -1 if bbl_key is None else bbl_key
+        self._stmt_id = -1 if stmt_id is None else stmt_id
+        self._region_id = region_id
+        self._segment_list = [] if not segment_list else segment_list[::]
+
+        if region_offset and size:
+            self._add_segment(region_offset, size)
+
+    def _add_segment(self, offset, size):
+        segment_added = False
+
+        last_pos = 0
+        segment_end = offset + size
+
+        for i, s in enumerate(self._segment_list):
+            # Case 1
+            s_end = s.offset + s.size
+
+            if offset >= s.offset and segment_end <= s_end:
+                # It has been covered
+                return False
+
+            if offset - 1 <= s.offset <= offset + 1:
+                s.offset = min(s.offset, offset)
+                s.size = max(s_end, segment_end) - s.offset
+                segment_added = True
+                break
+
+            # Case 2
+            if segment_end - 1 <= s_end <= segment_end + 1:
+                s.offset = min(s.offset, offset)
+                s.size = max(s_end, segment_end) - s.offset
+                segment_added = True
+                break
+
+            if s.offset < offset:
+                last_pos = i + 1
+
+        if not segment_added:
+            # We create a new segment and add it to the list
+            s = Segment(offset, size)
+            self._segment_list.insert(last_pos, s)
+
+        # Check for possible merges
+        i = 0
+        while i < len(self._segment_list) - 1:
+            s = self._segment_list[i]
+            t = self._segment_list[i + 1]
+
+            if s.offset + s.size >= t.offset:
+                # They should be merged!
+                new_s = Segment(s.offset, max(s.offset + s.size, t.offset + t.size) - s.offset)
+                self._segment_list[i : i + 2] = [new_s]
+
+            else:
+                i += 1
+
+        return True
+
+    @property
+    def basicblock_key(self):
+        return self._bbl_key
+
+    @property
+    def statement_id(self):
+        return self._stmt_id
+
+    @property
+    def region(self):
+        return self._region_id
+
+    @property
+    def segments(self):
+        return self._segment_list
+
+    def update(self, region_offset, size):
+        return self._add_segment(region_offset, size)
+
+    def copy(self):
+        return AbstractLocation(self._bbl_key, self._stmt_id, self._region_id, self._segment_list)
+
+    def merge(self, other):
+        merged = False
+
+        for s in other._segment_list:
+            merged |= self.update(s.offset, s.size)
+
+        return merged
+
+    def __contains__(self, offset):
+        for s in self._segment_list:
+            if s.offset <= offset < s.offset + s.size:
+                return True
+
+            if s.offset > offset:
+                break
+
+        return False
+
+    def __repr__(self):
+        return "(%xh, %d) %s" % (
+            (self.basicblock_key if self.basicblock_key is not None else -1),
+            (self.statement_id if self.statement_id is not None else -1),
+            self._segment_list,
+        )
+
+
 class MemoryRegionMetaMixin(MemoryMixin):
     __slots__ = (
         "_endness",
@@ -27,7 +148,7 @@ class MemoryRegionMetaMixin(MemoryMixin):
 
     @MemoryMixin.memo
     def copy(self, memo):
-        r: "MemoryRegionMetaMixin" = super().copy(memo)
+        r: MemoryRegionMetaMixin = super().copy(memo)
         r.alocs = copy.deepcopy(self.alocs)
         r._related_function_addr = self._related_function_addr
         r._is_stack = self._is_stack
@@ -67,22 +188,17 @@ class MemoryRegionMetaMixin(MemoryMixin):
         return ret
 
     def store(self, addr, data, bbl_addr=None, stmt_id=None, ins_addr=None, endness=None, **kwargs):
-        if ins_addr is not None:
-            aloc_id = ins_addr
-        else:
-            # It comes from a SimProcedure. We'll use bbl_addr as the aloc_id
-            aloc_id = bbl_addr
+        # It comes from a SimProcedure. We'll use bbl_addr as the aloc_id
+        aloc_id = ins_addr if ins_addr is not None else bbl_addr
 
         if aloc_id not in self.alocs:
             self.alocs[aloc_id] = AbstractLocation(
                 bbl_addr, stmt_id, self.id, region_offset=addr, size=len(data) // self.state.arch.byte_width
             )
             return super().store(addr, data, endness=endness, **kwargs)
-        else:
-            if self.alocs[aloc_id].update(addr, len(data) // self.state.arch.byte_width):
-                return super().store(addr, data, endness=endness, **kwargs)
-            else:
-                return super().store(addr, data, endness=endness, **kwargs)
+        if self.alocs[aloc_id].update(addr, len(data) // self.state.arch.byte_width):
+            return super().store(addr, data, endness=endness, **kwargs)
+        return super().store(addr, data, endness=endness, **kwargs)
 
     def load(
         self, addr, size=None, bbl_addr=None, stmt_idx=None, ins_addr=None, **kwargs

angr/storage/memory_mixins/regioned_memory/regioned_address_concretization_mixin.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 from collections.abc import Generator
 
 import claripy
@@ -96,7 +97,7 @@ class RegionedAddressConcretizationMixin(MemoryMixin):
         original_addr: claripy.ast.Bits,
         is_write: bool = False,
         target_region: str | None = None,
-    ) -> Generator[AddressWrapper, None, None]:
+    ) -> Generator[AddressWrapper]:
         strategies = self.write_strategies if is_write else self.read_strategies
         targets_limit = self._write_targets_limit if is_write else self._read_targets_limit