angr 9.2.117__py3-none-win_amd64.whl → 9.2.119__py3-none-win_amd64.whl

angr/state_plugins/heap/heap_ptmalloc.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 import logging
 
 import claripy
@@ -56,8 +57,7 @@ class PTChunk(Chunk):
         chunk_size = self.get_size()
         if self.is_free():
             return chunk_size - 4 * self._chunk_size_t_size
-        else:
-            return chunk_size - 2 * self._chunk_size_t_size
+        return chunk_size - 2 * self._chunk_size_t_size
 
     def _set_leading_size(self, size):
         level = silence_logger()
@@ -89,9 +89,8 @@ class PTChunk(Chunk):
                 next_chunk.set_prev_freeness(is_free)
             else:
                 self.heap._set_final_freeness(is_free)
-        if is_free is not None and is_free or self.is_free():
-            if next_chunk is not None:
-                self.state.memory.store(next_chunk.base, size, size=self.state.arch.bytes)
+        if (is_free is not None and is_free or self.is_free()) and next_chunk is not None:
+            self.state.memory.store(next_chunk.base, size, size=self.state.arch.bytes)
 
     def set_prev_freeness(self, is_free):
         """
@@ -139,20 +138,19 @@ class PTChunk(Chunk):
         next_chunk = self.next_chunk()
         if next_chunk is not None:
             return next_chunk.is_prev_free()
-        else:
-            flag = (
-                self.state.memory.load(
-                    self.heap.heap_base + self.heap.heap_size - self._chunk_size_t_size, self._chunk_size_t_size
-                )
-                & CHUNK_P_MASK
+        flag = (
+            self.state.memory.load(
+                self.heap.heap_base + self.heap.heap_size - self._chunk_size_t_size, self._chunk_size_t_size
             )
+            & CHUNK_P_MASK
+        )
 
-            def sym_flag_handler(flag):
-                l.warning("The final P flag is symbolic; assuming it is not set")
-                return self.state.solver.min_int(flag)
+        def sym_flag_handler(flag):
+            l.warning("The final P flag is symbolic; assuming it is not set")
+            return self.state.solver.min_int(flag)
 
-            flag = concretize(flag, self.state.solver, sym_flag_handler)
-            return not flag
+        flag = concretize(flag, self.state.solver, sym_flag_handler)
+        return not flag
 
     def data_ptr(self):
         return self.base + (2 * self._chunk_size_t_size)
@@ -171,8 +169,7 @@ class PTChunk(Chunk):
         base = concretize(self.base + self.get_size(), self.state.solver, sym_base_handler)
         if base >= self.heap.heap_base + self.heap.heap_size - 2 * self._chunk_size_t_size:
             return None
-        else:
-            return PTChunk(base, self.state)
+        return PTChunk(base, self.state)
 
     def prev_chunk(self):
         """
@@ -183,8 +180,7 @@ class PTChunk(Chunk):
         """
         if self.is_prev_free():
             return PTChunk(self.base - self.prev_size(), self.state)
-        else:
-            raise SimHeapError("Attempted to access the previous chunk, but it was not free")
+        raise SimHeapError("Attempted to access the previous chunk, but it was not free")
 
     def fwd_chunk(self):
         """
@@ -198,8 +194,7 @@ class PTChunk(Chunk):
                 self.base + 2 * self._chunk_size_t_size, self._chunk_size_t_size, endness=self.state.arch.memory_endness
             )
             return PTChunk(base, self.state)
-        else:
-            raise SimHeapError("Attempted to access the forward chunk of an allocated chunk")
+        raise SimHeapError("Attempted to access the forward chunk of an allocated chunk")
 
     def set_fwd_chunk(self, fwd):
         self.state.memory.store(
@@ -221,8 +216,7 @@ class PTChunk(Chunk):
                 self.base + 3 * self._chunk_size_t_size, self._chunk_size_t_size, endness=self.state.arch.memory_endness
             )
             return PTChunk(base, self.state)
-        else:
-            raise SimHeapError("Attempted to access the backward chunk of an allocated chunk")
+        raise SimHeapError("Attempted to access the backward chunk of an allocated chunk")
 
     def set_bck_chunk(self, bck):
         self.state.memory.store(
@@ -339,11 +333,10 @@ class SimHeapPTMalloc(SimHeapFreelist):
                 cur = fwd
                 fwd = cur.fwd_chunk()
             return cur
-        else:
-            while fwd != self.free_head_chunk:
-                cur = fwd
-                fwd = cur.fwd_chunk()
-            return cur
+        while fwd != self.free_head_chunk:
+            cur = fwd
+            fwd = cur.fwd_chunk()
+        return cur
 
     def _set_final_freeness(self, flag):
         """
@@ -365,7 +358,7 @@ class SimHeapPTMalloc(SimHeapFreelist):
         """
         size = req_size
         size += 2 * self._chunk_size_t_size  # Two size fields
-        size = self._chunk_min_size if size < self._chunk_min_size else size
+        size = max(size, self._chunk_min_size)
         if size & self._chunk_align_mask:  # If the chunk would not be aligned
             size = (size & ~self._chunk_align_mask) + self._chunk_align_mask + 1  # Fix it
         return size
@@ -395,8 +388,7 @@ class SimHeapPTMalloc(SimHeapFreelist):
                 if fwd <= free_chunk:
                     l.debug("No free chunks of sufficient size available")
                     return 0
-                else:
-                    free_chunk = fwd
+                free_chunk = fwd
             elif free_size > size and free_size - size >= self._chunk_min_size:
                 # Chunk may be too large but we'll use it anyway
                 chunk = free_chunk
@@ -564,7 +556,7 @@ class SimHeapPTMalloc(SimHeapFreelist):
             self.state.memory.store(new_data_ptr, old_data)
             self.free(old_data_ptr)  # Free the old chunk
             return new_data_ptr
-        elif new_size < old_size and old_size - new_size >= self._chunk_min_size:
+        if new_size < old_size and old_size - new_size >= self._chunk_min_size:
             # Less space is needed, so just shrink the chunk and create a new free chunk from the freed space
             chunk.set_size(new_size, False)
             new_next_chunk = chunk.next_chunk()
@@ -572,9 +564,8 @@ class SimHeapPTMalloc(SimHeapFreelist):
             new_next_chunk.set_prev_freeness(False)
             self.free(new_next_chunk.data_ptr())
             return chunk.data_ptr()
-        else:
-            # No changes needed; we're already the right size
-            return chunk.data_ptr()
+        # No changes needed; we're already the right size
+        return chunk.data_ptr()
 
     def _malloc(self, sim_size):
         return self.malloc(sim_size)

angr/state_plugins/heap/utils.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 from ...errors import SimSolverError
 
 

angr/state_plugins/history.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 from collections.abc import Reversible
 import operator
 import logging
@@ -112,11 +113,11 @@ class SimStateHistory(SimStatePlugin):
         if addr is None:
             addr_str = "Unknown"
         elif isinstance(addr, int):
-            addr_str = "%#x" % addr
+            addr_str = f"{addr:#x}"
         else:
             addr_str = repr(addr)
 
-        return "<StateHistory @ %s>" % addr_str
+        return f"<StateHistory @ {addr_str}>"
 
     def set_strongref_state(self, state):
         if sim_options.EFFICIENT_STATE_MERGING in state.options:
@@ -256,9 +257,7 @@ class SimStateHistory(SimStatePlugin):
                 if addr.symbolic:
                     return False
                 addr = self.state.solver.eval(addr)
-            if addr != read_offset:
-                return False
-            return True
+            return addr == read_offset
 
         def action_writes(action):
             if action.type != write_type:
@@ -274,9 +273,7 @@ class SimStateHistory(SimStatePlugin):
                 if addr.symbolic:
                     return False
                 addr = self.state.solver.eval(addr)
-            if addr != write_offset:
-                return False
-            return True
+            return addr == write_offset
 
         return [
             x
@@ -361,11 +358,11 @@ class SimStateHistory(SimStatePlugin):
             yield from self.parent.lineage
 
     @property
-    def events(self) -> Reversible["SimEvent"]:
+    def events(self) -> Reversible[SimEvent]:
         return LambdaIterIter(self, operator.attrgetter("recent_events"))
 
     @property
-    def actions(self) -> Reversible["SimAction"]:
+    def actions(self) -> Reversible[SimAction]:
         return LambdaIterIter(self, operator.attrgetter("recent_actions"))
 
     @property

angr/state_plugins/inspect.py

@@ -1,4 +1,5 @@
 # TODO: SimValue being able to compare two symbolics for is_solution
+from __future__ import annotations
 
 import logging
 

angr/state_plugins/javavm_classloader.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 import logging
 
 from archinfo.arch_soot import SootAddressDescriptor, SootAddressTerminator, SootClassDescriptor
@@ -83,7 +84,7 @@ class SimJavaVmClassloader(SimStatePlugin):
         self.initialized_classes.add(class_)
 
         if not class_.is_loaded:
-            l.warning("Class %r is not loaded in CLE. Skip initializiation.", class_)
+            l.warning("Class %r is not loaded in CLE. Skip initialization.", class_)
             return
 
         clinit_method = resolve_method(
@@ -106,7 +107,7 @@ class SimJavaVmClassloader(SimStatePlugin):
             self.state.memory.vm_static_table = simgr.deadended[-1].memory.vm_static_table.copy()
             self.state.memory.heap = simgr.deadended[-1].memory.heap.copy()
         else:
-            l.debug("Class initializer <clinit> is not loaded in CLE. Skip initializiation.")
+            l.debug("Class initializer <clinit> is not loaded in CLE. Skip initialization.")
 
     @property
     def initialized_classes(self):

angr/state_plugins/jni_references.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 import logging
 
 from ..sim_state import SimState
@@ -72,7 +73,7 @@ class SimStateJNIReferences(SimStatePlugin):
 
     def _get_reference_value(self, opaque_ref):
         if self.state.solver.symbolic(opaque_ref):
-            raise NotImplementedError("Opaque reference %s is symbolic." % opaque_ref.to_claripy())
+            raise NotImplementedError(f"Opaque reference {opaque_ref.to_claripy()} is symbolic.")
         return self.state.solver.eval(opaque_ref)
 
     @SimStatePlugin.memo

angr/state_plugins/libc.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 from .plugin import SimStatePlugin
 
 
@@ -1249,13 +1250,12 @@ class SimStateLibc(SimStatePlugin):
         try:
             ival = getattr(self.state.posix, val)
         except AttributeError as e:
-            raise ValueError("Invalid errno constant %s" % val) from e
+            raise ValueError(f"Invalid errno constant {val}") from e
 
         if self.state.scratch.sim_procedure.is_syscall:
             return -ival
-        else:
-            self.errno = ival
-            return -1
+        self.errno = ival
+        return -1
 
 
 from angr.sim_state import SimState

angr/state_plugins/light_registers.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 import claripy
 import logging
 
@@ -18,8 +19,7 @@ class SimLightRegisters(SimStatePlugin):
 
     @SimStatePlugin.memo
     def copy(self, _memo):
-        o = type(self)(reg_map=self.reg_map, registers=dict(self.registers))
-        return o
+        return type(self)(reg_map=self.reg_map, registers=dict(self.registers))
 
     def set_state(self, state):
         super().set_state(state)
@@ -34,7 +34,7 @@ class SimLightRegisters(SimStatePlugin):
         bw = state.arch.byte_width
         for reg in state.arch.register_list:
             self.reg_map[(reg.vex_offset, reg.size)] = reg.name, None, reg.size * bw
-            for subreg_name, subreg_suboffset, subreg_size in reg.subregisters:
+            for _subreg_name, subreg_suboffset, subreg_size in reg.subregisters:
                 # endian swap gets undone here
                 if state.arch.register_endness == "Iend_BE":
                     extract_high = (reg.size - 1 - subreg_suboffset) * bw + 7
@@ -56,8 +56,7 @@ class SimLightRegisters(SimStatePlugin):
                 try:
                     if size.symbolic:
                         raise SimFastMemoryError("Can't handle symbolic register access")
-                    else:
-                        size = offset.args[0]
+                    size = offset.args[0]
                 except AttributeError:
                     raise TypeError("Invalid size argument") from None
 
@@ -65,8 +64,7 @@ class SimLightRegisters(SimStatePlugin):
                 try:
                     if offset.symbolic:
                         raise SimFastMemoryError("Can't handle symbolic register access")
-                    else:
-                        offset = offset.args[0]
+                    offset = offset.args[0]
                 except AttributeError:
                     raise TypeError("Invalid offset argument") from None
 
@@ -164,7 +162,7 @@ class SimLightRegisters(SimStatePlugin):
                         "to suppress these messages."
                     )
                 l.warning("Filling register %s with %d unconstrained bytes", name, size)
-            return self.state.solver.Unconstrained("reg_%s" % name, size_bits, key=("reg", name), eternal=True)  # :)
+            return self.state.solver.Unconstrained(f"reg_{name}", size_bits, key=("reg", name), eternal=True)  # :)
 
         self.registers[name] = value
         return value

angr/state_plugins/log.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 import logging
 
 l = logging.getLogger(name=__name__)

angr/state_plugins/loop_data.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 import logging
 import copy
 from collections import defaultdict

angr/state_plugins/plugin.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 from typing import cast
 
 import angr  # For type annotations; pylint: disable=unused-import
@@ -43,7 +44,7 @@ class SimStatePlugin:
         ``SimStatePlugin.memo``
 
         The base implementation of this function constructs a new instance of the plugin's class without calling its
-        initializer. If you super-call down to it, make sure you instanciate all the fields in your copy method!
+        initializer. If you super-call down to it, make sure you instantiate all the fields in your copy method!
 
         :param memo:    A dictionary mapping object identifiers (id(obj)) to their copied instance.  Use this to avoid
                         infinite recursion and diverged copies.
@@ -63,10 +64,9 @@ class SimStatePlugin:
                 memo = {}
             if id(self) in memo:
                 return memo[id(self)]
-            else:
-                c = f(self, memo, **kwargs)
-                memo[id(self)] = c
-                return c
+            c = f(self, memo, **kwargs)
+            memo[id(self)] = c
+            return c
 
         return inner
 
@@ -107,7 +107,7 @@ class SimStatePlugin:
         :returns: True if the state plugins are actually merged.
         :rtype: bool
         """
-        raise NotImplementedError("merge() not implement for %s" % self.__class__.__name__)
+        raise NotImplementedError(f"merge() not implement for {self.__class__.__name__}")
 
     def widen(self, others):  # pylint:disable=unused-argument
         """
@@ -120,7 +120,7 @@ class SimStatePlugin:
         :returns: True if the state plugin is actually widened.
         :rtype: bool
         """
-        raise NotImplementedError("widen() not implemented for %s" % self.__class__.__name__)
+        raise NotImplementedError(f"widen() not implemented for {self.__class__.__name__}")
 
     @classmethod
     def register_default(cls, name, xtr=None):
@@ -152,4 +152,3 @@ class SimStatePlugin:
         """
         Use this function to perform any initialization on the state at plugin-add time
         """
-        pass

angr/state_plugins/posix.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 import logging
 
 import claripy
@@ -16,12 +17,11 @@ class PosixDevFS(SimMount):  # this'll be mounted at /dev
     def get(self, path):  # pylint: disable=arguments-differ
         if path == ["stdin"]:
             return self.state.posix.fd.get(0, None)
-        elif path == ["stdout"]:
+        if path == ["stdout"]:
             return self.state.posix.fd.get(1, None)
-        elif path == ["stderr"]:
+        if path == ["stderr"]:
             return self.state.posix.fd.get(2, None)
-        else:
-            return None
+        return None
 
     def insert(self, path, simfile):  # pylint: disable=unused-argument, arguments-differ
         return False
@@ -50,8 +50,7 @@ class PosixProcFS(SimMount):
     def get(self, path):  # pylint: disable=arguments-differ
         if path == [b"uptime"]:
             return SimFile(b"uptime", content=b"0 0")
-        else:
-            return None
+        return None
 
     def insert(self, path, simfile):  # pylint: disable=unused-argument, arguments-differ
         return False
@@ -301,7 +300,7 @@ class SimSystemPosix(SimStatePlugin):
                 sock_pair[1].set_state(state)
 
     def _pick_fd(self):
-        for fd in range(0, max_fds):
+        for fd in range(max_fds):
             if fd not in self.fd:
                 return fd
         raise SimPosixError("exhausted file descriptors")
@@ -330,10 +329,7 @@ class SimSystemPosix(SimStatePlugin):
             return -1
 
         # TODO: speed this up (editor's note: ...really? this is fine)
-        if preferred_fd is not None and preferred_fd not in self.fd:
-            fd = preferred_fd
-        else:
-            fd = self._pick_fd()
+        fd = preferred_fd if preferred_fd is not None and preferred_fd not in self.fd else self._pick_fd()
 
         flags = self.state.solver.eval(flags)
         create_file = (flags & Flags.O_ACCMODE) in (Flags.O_RDWR, Flags.O_WRONLY)
@@ -344,7 +340,7 @@ class SimSystemPosix(SimStatePlugin):
             if not create_file:
                 if options.ALL_FILES_EXIST not in self.state.options:
                     if options.ANY_FILE_MIGHT_EXIST in self.state.options:
-                        file_exists = claripy.BoolS("file_exists_%s" % ident, explicit_name=True)
+                        file_exists = claripy.BoolS(f"file_exists_{ident}", explicit_name=True)
                     else:
                         return -1
                 else:
@@ -356,7 +352,7 @@ class SimSystemPosix(SimStatePlugin):
                     name,
                     ident=ident,
                     size=self.state.solver.BVS(
-                        "filesize_%s" % ident, self.state.arch.bits, key=("file", ident, "filesize"), eternal=True
+                        f"filesize_{ident}", self.state.arch.bits, key=("file", ident, "filesize"), eternal=True
                     ),
                     file_exists=file_exists,
                 )
@@ -370,9 +366,8 @@ class SimSystemPosix(SimStatePlugin):
         self.fd[fd] = simfd
         if self.state.solver.is_true(simfd.file_exists):
             return fd
-        else:
-            m1 = claripy.BVV(-1, self.state.arch.sizeof["int"])
-            return claripy.If(simfd.file_exists, fd, m1)
+        m1 = claripy.BVV(-1, self.state.arch.sizeof["int"])
+        return claripy.If(simfd.file_exists, fd, m1)
 
     def open_socket(self, ident):
         fd = self._pick_fd()
@@ -398,8 +393,8 @@ class SimSystemPosix(SimStatePlugin):
                     sockpair = sockpair[0].copy(memo), sockpair[1].copy(memo)
 
             if sockpair is None:
-                read_file = SimPacketsStream("socket %s read" % str(ident))
-                write_file = SimPacketsStream("socket %s write" % str(ident))
+                read_file = SimPacketsStream(f"socket {ident!s} read")
+                write_file = SimPacketsStream(f"socket {ident!s} write")
                 sockpair = (read_file, write_file)
 
             self.sockets[ident] = sockpair
@@ -444,10 +439,7 @@ class SimSystemPosix(SimStatePlugin):
 
         new_filename = b"/tmp/angr_implicit_%d" % self.autotmp_counter
         self.autotmp_counter += 1
-        if create_file:
-            flags = Flags.O_RDWR
-        else:
-            flags = Flags.O_RDONLY
+        flags = Flags.O_RDWR if create_file else Flags.O_RDONLY
         concr_fd = self._pick_fd()
         if not self.state.satisfiable(extra_constraints=(concr_fd == fd,)):
             l.error("Could not look up a partially constrained symbolic fd")

angr/state_plugins/preconstrainer.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 import logging
 
 import claripy
@@ -57,7 +58,7 @@ class SimStatePreconstrainer(SimStatePlugin):
         elif value.op != "BVV":
             raise ValueError("Passed a value to preconstrain that was not a BVV or a string")
 
-        if variable.op not in claripy.operations.leaf_operations:
+        if not variable.is_leaf():
             l.warning(
                 "The variable %s to preconstrain is not a leaf AST. This may cause replacement failures in the "
                 "claripy replacement backend.",
@@ -146,13 +147,13 @@ class SimStatePreconstrainer(SimStatePlugin):
         precon_cache_keys = set()
 
         for con in self.preconstraints:
-            precon_cache_keys.add(con.cache_key)
+            precon_cache_keys.add(con.hash())
 
         # if we used the replacement solver we didn't add constraints we need to remove so keep all constraints
         if o.REPLACEMENT_SOLVER in self.state.options:
             new_constraints = self.state.solver.constraints
         else:
-            new_constraints = [x for x in self.state.solver.constraints if x.cache_key not in precon_cache_keys]
+            new_constraints = [x for x in self.state.solver.constraints if x.hash() not in precon_cache_keys]
 
         if self.state.has_plugin("zen_plugin"):
             new_constraints = self.state.get_plugin("zen_plugin").filter_constraints(new_constraints)

angr/state_plugins/scratch.py

@@ -1,3 +1,4 @@
+from __future__ import annotations
 import logging
 
 import claripy
@@ -29,7 +30,7 @@ class SimStateScratch(SimStatePlugin):
 
         # information on exits *from* this state
         self.jumpkind = None
-        self.guard = claripy.true
+        self.guard = claripy.true()
         self.target = None
         self.source = None
         self.exit_stmt_idx = None
@@ -75,7 +76,7 @@ class SimStateScratch(SimStatePlugin):
 
             self.statement_offset = scratch.statement_offset
 
-        # priveleges
+        # privileges
         self._priv_stack = [False]
 
     @property
@@ -109,13 +110,13 @@ class SimStateScratch(SimStatePlugin):
                 raise SimMissingTempError(
                     "VEX temp variable %d does not exist. This is usually the result of an incorrect slicing." % tmp
                 )
-        except IndexError:
-            raise SimMissingTempError("Accessing a temp that is illegal in this tyenv")
+        except IndexError as err:
+            raise SimMissingTempError("Accessing a temp that is illegal in this tyenv") from err
         self.state._inspect("tmp_read", BP_AFTER, tmp_read_expr=v)
         return v
 
     # pylint:disable=unused-argument
-    def store_tmp(self, tmp, content, reg_deps=None, tmp_deps=None, deps=None, **kwargs):
+    def store_tmp(self, tmp, content, reg_deps=frozenset(), tmp_deps=frozenset(), deps=None, **kwargs):
         """
         Stores a Claripy expression in a VEX temp value.
         If in symbolic mode, this involves adding a constraint for the tmp's symbolic variable.