v86 0.4.0 → 0.5.10

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (386) hide show
  1. package/Readme.md +56 -111
  2. package/build/libv86-debug.js +12677 -0
  3. package/build/libv86-debug.mjs +732 -0
  4. package/build/libv86.js +710 -0
  5. package/build/libv86.mjs +636 -0
  6. package/build/v86-debug.wasm +0 -0
  7. package/build/v86-fallback.wasm +0 -0
  8. package/build/v86.wasm +0 -0
  9. package/package.json +12 -35
  10. package/bios/.gitignore +0 -1
  11. package/bios/COPYING.LESSER +0 -165
  12. package/bios/bochs-bios.bin +0 -0
  13. package/bios/bochs-vgabios.bin +0 -0
  14. package/bios/fetch-and-build-seabios.sh +0 -13
  15. package/bios/seabios/.config +0 -113
  16. package/bios/seabios/.config.old +0 -114
  17. package/bios/seabios/.gitignore +0 -4
  18. package/bios/seabios/COPYING +0 -674
  19. package/bios/seabios/COPYING.LESSER +0 -165
  20. package/bios/seabios/Makefile +0 -286
  21. package/bios/seabios/README +0 -17
  22. package/bios/seabios/docs/Build_overview.md +0 -104
  23. package/bios/seabios/docs/Contributing.md +0 -20
  24. package/bios/seabios/docs/Debugging.md +0 -111
  25. package/bios/seabios/docs/Developer_Documentation.md +0 -25
  26. package/bios/seabios/docs/Developer_links.md +0 -86
  27. package/bios/seabios/docs/Download.md +0 -27
  28. package/bios/seabios/docs/Execution_and_code_flow.md +0 -178
  29. package/bios/seabios/docs/Linking_overview.md +0 -160
  30. package/bios/seabios/docs/Mailinglist.md +0 -8
  31. package/bios/seabios/docs/Memory_Model.md +0 -253
  32. package/bios/seabios/docs/README +0 -5
  33. package/bios/seabios/docs/Releases.md +0 -482
  34. package/bios/seabios/docs/Runtime_config.md +0 -193
  35. package/bios/seabios/docs/SeaBIOS.md +0 -17
  36. package/bios/seabios/docs/SeaVGABIOS.md +0 -39
  37. package/bios/seabios/out/autoconf.h +0 -117
  38. package/bios/seabios/out/include/config/acpi/dsdt.h +0 -0
  39. package/bios/seabios/out/include/config/acpi.h +0 -0
  40. package/bios/seabios/out/include/config/ahci.h +0 -0
  41. package/bios/seabios/out/include/config/apmbios.h +0 -0
  42. package/bios/seabios/out/include/config/ata/dma.h +0 -0
  43. package/bios/seabios/out/include/config/ata/pio32.h +0 -0
  44. package/bios/seabios/out/include/config/ata.h +0 -0
  45. package/bios/seabios/out/include/config/auto.conf +0 -69
  46. package/bios/seabios/out/include/config/auto.conf.cmd +0 -9
  47. package/bios/seabios/out/include/config/boot.h +0 -0
  48. package/bios/seabios/out/include/config/bootorder.h +0 -0
  49. package/bios/seabios/out/include/config/build/vgabios.h +0 -0
  50. package/bios/seabios/out/include/config/call32/smm.h +0 -0
  51. package/bios/seabios/out/include/config/cdrom/boot.h +0 -0
  52. package/bios/seabios/out/include/config/cdrom/emu.h +0 -0
  53. package/bios/seabios/out/include/config/debug/level.h +0 -0
  54. package/bios/seabios/out/include/config/drives.h +0 -0
  55. package/bios/seabios/out/include/config/entry/extrastack.h +0 -0
  56. package/bios/seabios/out/include/config/esp/scsi.h +0 -0
  57. package/bios/seabios/out/include/config/flash/floppy.h +0 -0
  58. package/bios/seabios/out/include/config/floppy.h +0 -0
  59. package/bios/seabios/out/include/config/fw/romfile/load.h +0 -0
  60. package/bios/seabios/out/include/config/hardware/irq.h +0 -0
  61. package/bios/seabios/out/include/config/kbd/call/int15/4f.h +0 -0
  62. package/bios/seabios/out/include/config/keyboard.h +0 -0
  63. package/bios/seabios/out/include/config/lpt.h +0 -0
  64. package/bios/seabios/out/include/config/lsi/scsi.h +0 -0
  65. package/bios/seabios/out/include/config/malloc/uppermemory.h +0 -0
  66. package/bios/seabios/out/include/config/megasas.h +0 -0
  67. package/bios/seabios/out/include/config/mouse.h +0 -0
  68. package/bios/seabios/out/include/config/mpt/scsi.h +0 -0
  69. package/bios/seabios/out/include/config/mptable.h +0 -0
  70. package/bios/seabios/out/include/config/mtrr/init.h +0 -0
  71. package/bios/seabios/out/include/config/optionroms.h +0 -0
  72. package/bios/seabios/out/include/config/override/pci/id.h +0 -0
  73. package/bios/seabios/out/include/config/pcibios.h +0 -0
  74. package/bios/seabios/out/include/config/pirtable.h +0 -0
  75. package/bios/seabios/out/include/config/pmm.h +0 -0
  76. package/bios/seabios/out/include/config/pmtimer.h +0 -0
  77. package/bios/seabios/out/include/config/pnpbios.h +0 -0
  78. package/bios/seabios/out/include/config/ps2port.h +0 -0
  79. package/bios/seabios/out/include/config/pvscsi.h +0 -0
  80. package/bios/seabios/out/include/config/qemu/hardware.h +0 -0
  81. package/bios/seabios/out/include/config/qemu.h +0 -0
  82. package/bios/seabios/out/include/config/rom/size.h +0 -0
  83. package/bios/seabios/out/include/config/rtc/timer.h +0 -0
  84. package/bios/seabios/out/include/config/s3/resume.h +0 -0
  85. package/bios/seabios/out/include/config/sdcard.h +0 -0
  86. package/bios/seabios/out/include/config/serial.h +0 -0
  87. package/bios/seabios/out/include/config/tcgbios.h +0 -0
  88. package/bios/seabios/out/include/config/threads.h +0 -0
  89. package/bios/seabios/out/include/config/tristate.conf +0 -4
  90. package/bios/seabios/out/include/config/tsc/timer.h +0 -0
  91. package/bios/seabios/out/include/config/use/smm.h +0 -0
  92. package/bios/seabios/out/include/config/vga/allocate/extra/stack.h +0 -0
  93. package/bios/seabios/out/include/config/vga/bochs/stdvga.h +0 -0
  94. package/bios/seabios/out/include/config/vga/bochs.h +0 -0
  95. package/bios/seabios/out/include/config/vga/did.h +0 -0
  96. package/bios/seabios/out/include/config/vga/extra/stack/size.h +0 -0
  97. package/bios/seabios/out/include/config/vga/fixup/asm.h +0 -0
  98. package/bios/seabios/out/include/config/vga/pci.h +0 -0
  99. package/bios/seabios/out/include/config/vga/stdvga/ports.h +0 -0
  100. package/bios/seabios/out/include/config/vga/vbe.h +0 -0
  101. package/bios/seabios/out/include/config/vga/vid.h +0 -0
  102. package/bios/seabios/out/include/config/vgahooks.h +0 -0
  103. package/bios/seabios/out/include/config/virtio/blk.h +0 -0
  104. package/bios/seabios/out/include/config/virtio/scsi.h +0 -0
  105. package/bios/seabios/out/include/config/xen.h +0 -0
  106. package/bios/seabios/out/scripts/kconfig/conf +0 -0
  107. package/bios/seabios/out/scripts/kconfig/conf.o +0 -0
  108. package/bios/seabios/out/scripts/kconfig/zconf.hash.c +0 -289
  109. package/bios/seabios/out/scripts/kconfig/zconf.lex.c +0 -2420
  110. package/bios/seabios/out/scripts/kconfig/zconf.tab.c +0 -2538
  111. package/bios/seabios/out/scripts/kconfig/zconf.tab.o +0 -0
  112. package/bios/seabios/scripts/acpi_extract.py +0 -366
  113. package/bios/seabios/scripts/acpi_extract_preprocess.py +0 -41
  114. package/bios/seabios/scripts/buildrom.py +0 -56
  115. package/bios/seabios/scripts/buildversion.py +0 -134
  116. package/bios/seabios/scripts/checkrom.py +0 -95
  117. package/bios/seabios/scripts/checkstack.py +0 -226
  118. package/bios/seabios/scripts/checksum.py +0 -16
  119. package/bios/seabios/scripts/encodeint.py +0 -21
  120. package/bios/seabios/scripts/gen-offsets.sh +0 -17
  121. package/bios/seabios/scripts/kconfig/.gitignore +0 -22
  122. package/bios/seabios/scripts/kconfig/Makefile +0 -331
  123. package/bios/seabios/scripts/kconfig/POTFILES.in +0 -12
  124. package/bios/seabios/scripts/kconfig/check.sh +0 -13
  125. package/bios/seabios/scripts/kconfig/conf.c +0 -718
  126. package/bios/seabios/scripts/kconfig/confdata.c +0 -1250
  127. package/bios/seabios/scripts/kconfig/expr.c +0 -1168
  128. package/bios/seabios/scripts/kconfig/expr.h +0 -241
  129. package/bios/seabios/scripts/kconfig/gconf.c +0 -1542
  130. package/bios/seabios/scripts/kconfig/gconf.glade +0 -661
  131. package/bios/seabios/scripts/kconfig/images.c +0 -326
  132. package/bios/seabios/scripts/kconfig/kxgettext.c +0 -235
  133. package/bios/seabios/scripts/kconfig/lex.zconf.c +0 -2430
  134. package/bios/seabios/scripts/kconfig/list.h +0 -131
  135. package/bios/seabios/scripts/kconfig/lkc.h +0 -200
  136. package/bios/seabios/scripts/kconfig/lkc_proto.h +0 -57
  137. package/bios/seabios/scripts/kconfig/lxdialog/.gitignore +0 -4
  138. package/bios/seabios/scripts/kconfig/lxdialog/BIG.FAT.WARNING +0 -4
  139. package/bios/seabios/scripts/kconfig/lxdialog/check-lxdialog.sh +0 -87
  140. package/bios/seabios/scripts/kconfig/lxdialog/checklist.c +0 -332
  141. package/bios/seabios/scripts/kconfig/lxdialog/dialog.h +0 -257
  142. package/bios/seabios/scripts/kconfig/lxdialog/inputbox.c +0 -301
  143. package/bios/seabios/scripts/kconfig/lxdialog/menubox.c +0 -437
  144. package/bios/seabios/scripts/kconfig/lxdialog/textbox.c +0 -408
  145. package/bios/seabios/scripts/kconfig/lxdialog/util.c +0 -713
  146. package/bios/seabios/scripts/kconfig/lxdialog/yesno.c +0 -114
  147. package/bios/seabios/scripts/kconfig/mconf.c +0 -1036
  148. package/bios/seabios/scripts/kconfig/menu.c +0 -697
  149. package/bios/seabios/scripts/kconfig/merge_config.sh +0 -150
  150. package/bios/seabios/scripts/kconfig/nconf.c +0 -1556
  151. package/bios/seabios/scripts/kconfig/nconf.gui.c +0 -656
  152. package/bios/seabios/scripts/kconfig/nconf.h +0 -96
  153. package/bios/seabios/scripts/kconfig/qconf.cc +0 -1795
  154. package/bios/seabios/scripts/kconfig/qconf.h +0 -338
  155. package/bios/seabios/scripts/kconfig/streamline_config.pl +0 -647
  156. package/bios/seabios/scripts/kconfig/symbol.c +0 -1373
  157. package/bios/seabios/scripts/kconfig/util.c +0 -157
  158. package/bios/seabios/scripts/kconfig/zconf.gperf +0 -48
  159. package/bios/seabios/scripts/kconfig/zconf.hash.c_shipped +0 -289
  160. package/bios/seabios/scripts/kconfig/zconf.l +0 -363
  161. package/bios/seabios/scripts/kconfig/zconf.lex.c_shipped +0 -2420
  162. package/bios/seabios/scripts/kconfig/zconf.tab.c_shipped +0 -2538
  163. package/bios/seabios/scripts/kconfig/zconf.y +0 -733
  164. package/bios/seabios/scripts/layoutrom.py +0 -705
  165. package/bios/seabios/scripts/python23compat.py +0 -14
  166. package/bios/seabios/scripts/readserial.py +0 -190
  167. package/bios/seabios/scripts/tarball.sh +0 -36
  168. package/bios/seabios/scripts/test-build.sh +0 -90
  169. package/bios/seabios/scripts/transdump.py +0 -53
  170. package/bios/seabios/scripts/vgafixup.py +0 -96
  171. package/bios/seabios/src/Kconfig +0 -579
  172. package/bios/seabios/src/apm.c +0 -215
  173. package/bios/seabios/src/asm-offsets.c +0 -23
  174. package/bios/seabios/src/biosvar.h +0 -130
  175. package/bios/seabios/src/block.c +0 -623
  176. package/bios/seabios/src/block.h +0 -121
  177. package/bios/seabios/src/bmp.c +0 -117
  178. package/bios/seabios/src/boot.c +0 -793
  179. package/bios/seabios/src/bootsplash.c +0 -255
  180. package/bios/seabios/src/bregs.h +0 -80
  181. package/bios/seabios/src/byteorder.h +0 -71
  182. package/bios/seabios/src/cdrom.c +0 -322
  183. package/bios/seabios/src/clock.c +0 -506
  184. package/bios/seabios/src/code16gcc.s +0 -1
  185. package/bios/seabios/src/config.h +0 -108
  186. package/bios/seabios/src/cp437.c +0 -275
  187. package/bios/seabios/src/cp437.h +0 -1
  188. package/bios/seabios/src/disk.c +0 -779
  189. package/bios/seabios/src/e820map.c +0 -152
  190. package/bios/seabios/src/e820map.h +0 -26
  191. package/bios/seabios/src/entryfuncs.S +0 -165
  192. package/bios/seabios/src/farptr.h +0 -208
  193. package/bios/seabios/src/font.c +0 -139
  194. package/bios/seabios/src/fw/acpi-dsdt-cpu-hotplug.dsl +0 -78
  195. package/bios/seabios/src/fw/acpi-dsdt-dbug.dsl +0 -26
  196. package/bios/seabios/src/fw/acpi-dsdt-hpet.dsl +0 -36
  197. package/bios/seabios/src/fw/acpi-dsdt-isa.dsl +0 -102
  198. package/bios/seabios/src/fw/acpi-dsdt-pci-crs.dsl +0 -90
  199. package/bios/seabios/src/fw/acpi-dsdt.dsl +0 -342
  200. package/bios/seabios/src/fw/acpi-dsdt.hex +0 -554
  201. package/bios/seabios/src/fw/acpi.c +0 -685
  202. package/bios/seabios/src/fw/biostables.c +0 -491
  203. package/bios/seabios/src/fw/coreboot.c +0 -569
  204. package/bios/seabios/src/fw/csm.c +0 -347
  205. package/bios/seabios/src/fw/dev-pci.h +0 -52
  206. package/bios/seabios/src/fw/dev-piix.h +0 -29
  207. package/bios/seabios/src/fw/dev-q35.h +0 -52
  208. package/bios/seabios/src/fw/lzmadecode.c +0 -398
  209. package/bios/seabios/src/fw/lzmadecode.h +0 -67
  210. package/bios/seabios/src/fw/mptable.c +0 -197
  211. package/bios/seabios/src/fw/mtrr.c +0 -105
  212. package/bios/seabios/src/fw/multiboot.c +0 -111
  213. package/bios/seabios/src/fw/paravirt.c +0 -624
  214. package/bios/seabios/src/fw/paravirt.h +0 -63
  215. package/bios/seabios/src/fw/pciinit.c +0 -1187
  216. package/bios/seabios/src/fw/pirtable.c +0 -103
  217. package/bios/seabios/src/fw/q35-acpi-dsdt.dsl +0 -450
  218. package/bios/seabios/src/fw/romfile_loader.c +0 -259
  219. package/bios/seabios/src/fw/romfile_loader.h +0 -91
  220. package/bios/seabios/src/fw/shadow.c +0 -208
  221. package/bios/seabios/src/fw/smbios.c +0 -585
  222. package/bios/seabios/src/fw/smm.c +0 -269
  223. package/bios/seabios/src/fw/smp.c +0 -194
  224. package/bios/seabios/src/fw/ssdt-misc.dsl +0 -104
  225. package/bios/seabios/src/fw/ssdt-misc.hex +0 -88
  226. package/bios/seabios/src/fw/ssdt-pcihp.dsl +0 -36
  227. package/bios/seabios/src/fw/ssdt-pcihp.hex +0 -38
  228. package/bios/seabios/src/fw/ssdt-proc.dsl +0 -48
  229. package/bios/seabios/src/fw/ssdt-proc.hex +0 -35
  230. package/bios/seabios/src/fw/xen.c +0 -149
  231. package/bios/seabios/src/fw/xen.h +0 -125
  232. package/bios/seabios/src/gen-defs.h +0 -19
  233. package/bios/seabios/src/hw/ahci.c +0 -697
  234. package/bios/seabios/src/hw/ahci.h +0 -201
  235. package/bios/seabios/src/hw/ata.c +0 -1046
  236. package/bios/seabios/src/hw/ata.h +0 -163
  237. package/bios/seabios/src/hw/blockcmd.c +0 -372
  238. package/bios/seabios/src/hw/blockcmd.h +0 -114
  239. package/bios/seabios/src/hw/dma.c +0 -67
  240. package/bios/seabios/src/hw/esp-scsi.c +0 -241
  241. package/bios/seabios/src/hw/esp-scsi.h +0 -8
  242. package/bios/seabios/src/hw/floppy.c +0 -741
  243. package/bios/seabios/src/hw/lsi-scsi.c +0 -221
  244. package/bios/seabios/src/hw/lsi-scsi.h +0 -8
  245. package/bios/seabios/src/hw/megasas.c +0 -405
  246. package/bios/seabios/src/hw/megasas.h +0 -8
  247. package/bios/seabios/src/hw/mpt-scsi.c +0 -319
  248. package/bios/seabios/src/hw/mpt-scsi.h +0 -8
  249. package/bios/seabios/src/hw/nvme-int.h +0 -199
  250. package/bios/seabios/src/hw/nvme.c +0 -708
  251. package/bios/seabios/src/hw/nvme.h +0 -17
  252. package/bios/seabios/src/hw/pci.c +0 -133
  253. package/bios/seabios/src/hw/pci.h +0 -47
  254. package/bios/seabios/src/hw/pci_ids.h +0 -2632
  255. package/bios/seabios/src/hw/pci_regs.h +0 -556
  256. package/bios/seabios/src/hw/pcidevice.c +0 -192
  257. package/bios/seabios/src/hw/pcidevice.h +0 -76
  258. package/bios/seabios/src/hw/pic.c +0 -115
  259. package/bios/seabios/src/hw/pic.h +0 -60
  260. package/bios/seabios/src/hw/ps2port.c +0 -543
  261. package/bios/seabios/src/hw/ps2port.h +0 -67
  262. package/bios/seabios/src/hw/pvscsi.c +0 -333
  263. package/bios/seabios/src/hw/pvscsi.h +0 -8
  264. package/bios/seabios/src/hw/ramdisk.c +0 -108
  265. package/bios/seabios/src/hw/rtc.c +0 -100
  266. package/bios/seabios/src/hw/rtc.h +0 -75
  267. package/bios/seabios/src/hw/sdcard.c +0 -572
  268. package/bios/seabios/src/hw/serialio.c +0 -113
  269. package/bios/seabios/src/hw/serialio.h +0 -29
  270. package/bios/seabios/src/hw/timer.c +0 -259
  271. package/bios/seabios/src/hw/tpm_drivers.c +0 -636
  272. package/bios/seabios/src/hw/tpm_drivers.h +0 -127
  273. package/bios/seabios/src/hw/usb-ehci.c +0 -650
  274. package/bios/seabios/src/hw/usb-ehci.h +0 -177
  275. package/bios/seabios/src/hw/usb-hid.c +0 -442
  276. package/bios/seabios/src/hw/usb-hid.h +0 -29
  277. package/bios/seabios/src/hw/usb-hub.c +0 -205
  278. package/bios/seabios/src/hw/usb-hub.h +0 -64
  279. package/bios/seabios/src/hw/usb-msc.c +0 -222
  280. package/bios/seabios/src/hw/usb-msc.h +0 -10
  281. package/bios/seabios/src/hw/usb-ohci.c +0 -568
  282. package/bios/seabios/src/hw/usb-ohci.h +0 -144
  283. package/bios/seabios/src/hw/usb-uas.c +0 -289
  284. package/bios/seabios/src/hw/usb-uas.h +0 -9
  285. package/bios/seabios/src/hw/usb-uhci.c +0 -571
  286. package/bios/seabios/src/hw/usb-uhci.h +0 -128
  287. package/bios/seabios/src/hw/usb-xhci.c +0 -1161
  288. package/bios/seabios/src/hw/usb-xhci.h +0 -133
  289. package/bios/seabios/src/hw/usb.c +0 -499
  290. package/bios/seabios/src/hw/usb.h +0 -254
  291. package/bios/seabios/src/hw/virtio-blk.c +0 -211
  292. package/bios/seabios/src/hw/virtio-blk.h +0 -43
  293. package/bios/seabios/src/hw/virtio-pci.c +0 -501
  294. package/bios/seabios/src/hw/virtio-pci.h +0 -151
  295. package/bios/seabios/src/hw/virtio-ring.c +0 -147
  296. package/bios/seabios/src/hw/virtio-ring.h +0 -121
  297. package/bios/seabios/src/hw/virtio-scsi.c +0 -220
  298. package/bios/seabios/src/hw/virtio-scsi.h +0 -47
  299. package/bios/seabios/src/jpeg.c +0 -1055
  300. package/bios/seabios/src/kbd.c +0 -599
  301. package/bios/seabios/src/list.h +0 -91
  302. package/bios/seabios/src/malloc.c +0 -561
  303. package/bios/seabios/src/malloc.h +0 -70
  304. package/bios/seabios/src/memmap.h +0 -21
  305. package/bios/seabios/src/misc.c +0 -195
  306. package/bios/seabios/src/mouse.c +0 -342
  307. package/bios/seabios/src/optionroms.c +0 -475
  308. package/bios/seabios/src/output.c +0 -584
  309. package/bios/seabios/src/output.h +0 -68
  310. package/bios/seabios/src/pcibios.c +0 -241
  311. package/bios/seabios/src/pmm.c +0 -176
  312. package/bios/seabios/src/pnpbios.c +0 -88
  313. package/bios/seabios/src/post.c +0 -337
  314. package/bios/seabios/src/resume.c +0 -157
  315. package/bios/seabios/src/romfile.c +0 -146
  316. package/bios/seabios/src/romfile.h +0 -21
  317. package/bios/seabios/src/romlayout.S +0 -698
  318. package/bios/seabios/src/sercon.c +0 -677
  319. package/bios/seabios/src/serial.c +0 -317
  320. package/bios/seabios/src/sha1.c +0 -147
  321. package/bios/seabios/src/sha1.h +0 -8
  322. package/bios/seabios/src/stacks.c +0 -771
  323. package/bios/seabios/src/stacks.h +0 -68
  324. package/bios/seabios/src/std/LegacyBios.h +0 -985
  325. package/bios/seabios/src/std/acpi.h +0 -323
  326. package/bios/seabios/src/std/bda.h +0 -174
  327. package/bios/seabios/src/std/disk.h +0 -175
  328. package/bios/seabios/src/std/mptable.h +0 -77
  329. package/bios/seabios/src/std/multiboot.h +0 -260
  330. package/bios/seabios/src/std/optionrom.h +0 -59
  331. package/bios/seabios/src/std/pirtable.h +0 -35
  332. package/bios/seabios/src/std/pmm.h +0 -19
  333. package/bios/seabios/src/std/pnpbios.h +0 -24
  334. package/bios/seabios/src/std/smbios.h +0 -167
  335. package/bios/seabios/src/std/tcg.h +0 -554
  336. package/bios/seabios/src/std/vbe.h +0 -156
  337. package/bios/seabios/src/std/vga.h +0 -63
  338. package/bios/seabios/src/string.c +0 -251
  339. package/bios/seabios/src/string.h +0 -31
  340. package/bios/seabios/src/system.c +0 -357
  341. package/bios/seabios/src/tcgbios.c +0 -2014
  342. package/bios/seabios/src/tcgbios.h +0 -19
  343. package/bios/seabios/src/types.h +0 -156
  344. package/bios/seabios/src/util.h +0 -251
  345. package/bios/seabios/src/version.c +0 -5
  346. package/bios/seabios/src/vgahooks.c +0 -355
  347. package/bios/seabios/src/x86.c +0 -23
  348. package/bios/seabios/src/x86.h +0 -277
  349. package/bios/seabios/vgasrc/Kconfig +0 -211
  350. package/bios/seabios/vgasrc/bochsdisplay.c +0 -59
  351. package/bios/seabios/vgasrc/bochsvga.c +0 -447
  352. package/bios/seabios/vgasrc/bochsvga.h +0 -57
  353. package/bios/seabios/vgasrc/cbvga.c +0 -337
  354. package/bios/seabios/vgasrc/clext.c +0 -627
  355. package/bios/seabios/vgasrc/geodevga.c +0 -434
  356. package/bios/seabios/vgasrc/geodevga.h +0 -89
  357. package/bios/seabios/vgasrc/ramfb.c +0 -163
  358. package/bios/seabios/vgasrc/stdvga.c +0 -485
  359. package/bios/seabios/vgasrc/stdvga.h +0 -81
  360. package/bios/seabios/vgasrc/stdvgaio.c +0 -186
  361. package/bios/seabios/vgasrc/stdvgamodes.c +0 -534
  362. package/bios/seabios/vgasrc/swcursor.c +0 -96
  363. package/bios/seabios/vgasrc/vbe.c +0 -432
  364. package/bios/seabios/vgasrc/vgabios.c +0 -1131
  365. package/bios/seabios/vgasrc/vgabios.h +0 -88
  366. package/bios/seabios/vgasrc/vgaentry.S +0 -161
  367. package/bios/seabios/vgasrc/vgafb.c +0 -661
  368. package/bios/seabios/vgasrc/vgafb.h +0 -42
  369. package/bios/seabios/vgasrc/vgafonts.c +0 -785
  370. package/bios/seabios/vgasrc/vgahw.h +0 -152
  371. package/bios/seabios/vgasrc/vgainit.c +0 -202
  372. package/bios/seabios/vgasrc/vgalayout.lds.S +0 -23
  373. package/bios/seabios/vgasrc/vgautil.h +0 -103
  374. package/bios/seabios/vgasrc/vgaversion.c +0 -6
  375. package/bios/seabios-debug.bin +0 -0
  376. package/bios/seabios-debug.config +0 -117
  377. package/bios/seabios.bin +0 -0
  378. package/bios/seabios.config +0 -114
  379. package/bios/vgabios-debug.bin +0 -0
  380. package/bios/vgabios.bin +0 -0
  381. package/build/binaries.js +0 -1
  382. package/build/index-debug.cjs +0 -1
  383. package/build/index-debug.js +0 -1
  384. package/build/index.cjs +0 -1
  385. package/build/index.js +0 -1
  386. package/v86.css +0 -259
@@ -1,571 +0,0 @@
1
- // Code for handling UHCI USB controllers.
2
- //
3
- // Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
4
- //
5
- // This file may be distributed under the terms of the GNU LGPLv3 license.
6
-
7
- #include "biosvar.h" // GET_LOWFLAT
8
- #include "config.h" // CONFIG_*
9
- #include "malloc.h" // free
10
- #include "output.h" // dprintf
11
- #include "pci.h" // pci_config_writew
12
- #include "pcidevice.h" // foreachpci
13
- #include "pci_ids.h" // PCI_CLASS_SERIAL_USB_UHCI
14
- #include "pci_regs.h" // PCI_BASE_ADDRESS_4
15
- #include "string.h" // memset
16
- #include "usb.h" // struct usb_s
17
- #include "usb-ehci.h" // ehci_wait_controllers
18
- #include "usb-uhci.h" // USBLEGSUP
19
- #include "util.h" // msleep
20
- #include "x86.h" // outw
21
-
22
- struct usb_uhci_s {
23
- struct usb_s usb;
24
- u16 iobase;
25
- struct uhci_qh *control_qh;
26
- struct uhci_framelist *framelist;
27
- };
28
-
29
- struct uhci_pipe {
30
- struct uhci_qh qh;
31
- struct uhci_td *next_td;
32
- struct usb_pipe pipe;
33
- u16 iobase;
34
- u8 toggle;
35
- };
36
-
37
-
38
- /****************************************************************
39
- * Root hub
40
- ****************************************************************/
41
-
42
- // Check if device attached to a given port
43
- static int
44
- uhci_hub_detect(struct usbhub_s *hub, u32 port)
45
- {
46
- struct usb_uhci_s *cntl = container_of(hub->cntl, struct usb_uhci_s, usb);
47
- u16 ioport = cntl->iobase + USBPORTSC1 + port * 2;
48
- u16 status = inw(ioport);
49
- if (!(status & USBPORTSC_CCS))
50
- // No device found.
51
- return 0;
52
-
53
- // XXX - if just powered up, need to wait for USB_TIME_ATTDB?
54
-
55
- // Begin reset on port
56
- outw(USBPORTSC_PR, ioport);
57
- msleep(USB_TIME_DRSTR);
58
- return 1;
59
- }
60
-
61
- // Reset device on port
62
- static int
63
- uhci_hub_reset(struct usbhub_s *hub, u32 port)
64
- {
65
- struct usb_uhci_s *cntl = container_of(hub->cntl, struct usb_uhci_s, usb);
66
- u16 ioport = cntl->iobase + USBPORTSC1 + port * 2;
67
-
68
- // Finish reset on port
69
- outw(0, ioport);
70
- udelay(6); // 64 high-speed bit times
71
- u16 status = inw(ioport);
72
- if (!(status & USBPORTSC_CCS))
73
- // No longer connected
74
- return -1;
75
- outw(USBPORTSC_PE, ioport);
76
- return !!(status & USBPORTSC_LSDA);
77
- }
78
-
79
- // Disable port
80
- static void
81
- uhci_hub_disconnect(struct usbhub_s *hub, u32 port)
82
- {
83
- struct usb_uhci_s *cntl = container_of(hub->cntl, struct usb_uhci_s, usb);
84
- u16 ioport = cntl->iobase + USBPORTSC1 + port * 2;
85
- outw(0, ioport);
86
- }
87
-
88
- static struct usbhub_op_s uhci_HubOp = {
89
- .detect = uhci_hub_detect,
90
- .reset = uhci_hub_reset,
91
- .disconnect = uhci_hub_disconnect,
92
- };
93
-
94
- // Find any devices connected to the root hub.
95
- static int
96
- check_uhci_ports(struct usb_uhci_s *cntl)
97
- {
98
- ASSERT32FLAT();
99
- // Wait for ehci init - in case this is a "companion controller"
100
- ehci_wait_controllers();
101
-
102
- struct usbhub_s hub;
103
- memset(&hub, 0, sizeof(hub));
104
- hub.cntl = &cntl->usb;
105
- hub.portcount = 2;
106
- hub.op = &uhci_HubOp;
107
- usb_enumerate(&hub);
108
- return hub.devcount;
109
- }
110
-
111
-
112
- /****************************************************************
113
- * Setup
114
- ****************************************************************/
115
-
116
- // Wait for next USB frame to start - for ensuring safe memory release.
117
- static void
118
- uhci_waittick(u16 iobase)
119
- {
120
- barrier();
121
- u16 startframe = inw(iobase + USBFRNUM);
122
- u32 end = timer_calc(1000 * 5);
123
- for (;;) {
124
- if (inw(iobase + USBFRNUM) != startframe)
125
- break;
126
- if (timer_check(end)) {
127
- warn_timeout();
128
- return;
129
- }
130
- yield();
131
- }
132
- }
133
-
134
- static void
135
- uhci_free_pipes(struct usb_uhci_s *cntl)
136
- {
137
- dprintf(7, "uhci_free_pipes %p\n", cntl);
138
-
139
- struct uhci_qh *pos = (void*)(cntl->framelist->links[0] & ~UHCI_PTR_BITS);
140
- for (;;) {
141
- u32 link = pos->link;
142
- if (link == UHCI_PTR_TERM)
143
- break;
144
- struct uhci_qh *next = (void*)(link & ~UHCI_PTR_BITS);
145
- struct uhci_pipe *pipe = container_of(next, struct uhci_pipe, qh);
146
- if (usb_is_freelist(&cntl->usb, &pipe->pipe))
147
- pos->link = next->link;
148
- else
149
- pos = next;
150
- }
151
- uhci_waittick(cntl->iobase);
152
- for (;;) {
153
- struct usb_pipe *usbpipe = cntl->usb.freelist;
154
- if (!usbpipe)
155
- break;
156
- cntl->usb.freelist = usbpipe->freenext;
157
- struct uhci_pipe *pipe = container_of(usbpipe, struct uhci_pipe, pipe);
158
- free(pipe);
159
- }
160
- }
161
-
162
- static void
163
- reset_uhci(struct usb_uhci_s *cntl, u16 bdf)
164
- {
165
- // XXX - don't reset if not needed.
166
-
167
- // Reset PIRQ and SMI
168
- pci_config_writew(bdf, USBLEGSUP, USBLEGSUP_RWC);
169
-
170
- // Reset the HC
171
- outw(USBCMD_HCRESET, cntl->iobase + USBCMD);
172
- udelay(5);
173
-
174
- // Disable interrupts and commands (just to be safe).
175
- outw(0, cntl->iobase + USBINTR);
176
- outw(0, cntl->iobase + USBCMD);
177
- }
178
-
179
- static void
180
- configure_uhci(void *data)
181
- {
182
- struct usb_uhci_s *cntl = data;
183
-
184
- // Allocate ram for schedule storage
185
- struct uhci_td *term_td = malloc_high(sizeof(*term_td));
186
- struct uhci_framelist *fl = memalign_high(sizeof(*fl), sizeof(*fl));
187
- struct uhci_pipe *intr_pipe = malloc_high(sizeof(*intr_pipe));
188
- struct uhci_pipe *term_pipe = malloc_high(sizeof(*term_pipe));
189
- if (!term_td || !fl || !intr_pipe || !term_pipe) {
190
- warn_noalloc();
191
- goto fail;
192
- }
193
-
194
- // Work around for PIIX errata
195
- memset(term_td, 0, sizeof(*term_td));
196
- term_td->link = UHCI_PTR_TERM;
197
- term_td->token = (uhci_explen(0) | (0x7f << TD_TOKEN_DEVADDR_SHIFT)
198
- | USB_PID_IN);
199
- memset(term_pipe, 0, sizeof(*term_pipe));
200
- term_pipe->qh.element = (u32)term_td;
201
- term_pipe->qh.link = UHCI_PTR_TERM;
202
- term_pipe->pipe.cntl = &cntl->usb;
203
-
204
- // Set schedule to point to primary intr queue head
205
- memset(intr_pipe, 0, sizeof(*intr_pipe));
206
- intr_pipe->qh.element = UHCI_PTR_TERM;
207
- intr_pipe->qh.link = (u32)&term_pipe->qh | UHCI_PTR_QH;
208
- intr_pipe->pipe.cntl = &cntl->usb;
209
- int i;
210
- for (i=0; i<ARRAY_SIZE(fl->links); i++)
211
- fl->links[i] = (u32)&intr_pipe->qh | UHCI_PTR_QH;
212
- cntl->framelist = fl;
213
- cntl->control_qh = &intr_pipe->qh;
214
- barrier();
215
-
216
- // Set the frame length to the default: 1 ms exactly
217
- outb(USBSOF_DEFAULT, cntl->iobase + USBSOF);
218
-
219
- // Store the frame list base address
220
- outl((u32)fl->links, cntl->iobase + USBFLBASEADD);
221
-
222
- // Set the current frame number
223
- outw(0, cntl->iobase + USBFRNUM);
224
-
225
- // Mark as configured and running with a 64-byte max packet.
226
- outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, cntl->iobase + USBCMD);
227
-
228
- // Find devices
229
- int count = check_uhci_ports(cntl);
230
- uhci_free_pipes(cntl);
231
- if (count)
232
- // Success
233
- return;
234
-
235
- // No devices found - shutdown and free controller.
236
- outw(0, cntl->iobase + USBCMD);
237
- fail:
238
- free(term_td);
239
- free(fl);
240
- free(intr_pipe);
241
- free(term_pipe);
242
- free(cntl);
243
- }
244
-
245
- static void
246
- uhci_controller_setup(struct pci_device *pci)
247
- {
248
- u16 iobase = pci_enable_iobar(pci, PCI_BASE_ADDRESS_4);
249
- if (!iobase)
250
- return;
251
-
252
- struct usb_uhci_s *cntl = malloc_tmphigh(sizeof(*cntl));
253
- if (!cntl) {
254
- warn_noalloc();
255
- return;
256
- }
257
- memset(cntl, 0, sizeof(*cntl));
258
- cntl->usb.pci = pci;
259
- cntl->usb.type = USB_TYPE_UHCI;
260
- cntl->iobase = iobase;
261
-
262
- dprintf(1, "UHCI init on dev %pP (io=%x)\n", pci, cntl->iobase);
263
-
264
- pci_enable_busmaster(pci);
265
-
266
- reset_uhci(cntl, pci->bdf);
267
-
268
- run_thread(configure_uhci, cntl);
269
- }
270
-
271
- void
272
- uhci_setup(void)
273
- {
274
- if (! CONFIG_USB_UHCI)
275
- return;
276
- struct pci_device *pci;
277
- foreachpci(pci) {
278
- if (pci_classprog(pci) == PCI_CLASS_SERIAL_USB_UHCI)
279
- uhci_controller_setup(pci);
280
- }
281
- }
282
-
283
-
284
- /****************************************************************
285
- * End point communication
286
- ****************************************************************/
287
-
288
- static struct usb_pipe *
289
- uhci_alloc_intr_pipe(struct usbdevice_s *usbdev
290
- , struct usb_endpoint_descriptor *epdesc)
291
- {
292
- struct usb_uhci_s *cntl = container_of(
293
- usbdev->hub->cntl, struct usb_uhci_s, usb);
294
- int frameexp = usb_get_period(usbdev, epdesc);
295
- dprintf(7, "uhci_alloc_intr_pipe %p %d\n", &cntl->usb, frameexp);
296
-
297
- if (frameexp > 10)
298
- frameexp = 10;
299
- int maxpacket = epdesc->wMaxPacketSize;
300
- // Determine number of entries needed for 2 timer ticks.
301
- int ms = 1<<frameexp;
302
- int count = DIV_ROUND_UP(ticks_to_ms(2), ms);
303
- count = ALIGN(count, 2);
304
- struct uhci_pipe *pipe = malloc_low(sizeof(*pipe));
305
- struct uhci_td *tds = malloc_low(sizeof(*tds) * count);
306
- void *data = malloc_low(maxpacket * count);
307
- if (!pipe || !tds || !data) {
308
- warn_noalloc();
309
- goto fail;
310
- }
311
- memset(pipe, 0, sizeof(*pipe));
312
- usb_desc2pipe(&pipe->pipe, usbdev, epdesc);
313
- int lowspeed = pipe->pipe.speed;
314
- int devaddr = pipe->pipe.devaddr | (pipe->pipe.ep << 7);
315
- pipe->qh.element = (u32)tds;
316
- pipe->next_td = &tds[0];
317
- pipe->iobase = cntl->iobase;
318
-
319
- int toggle = 0;
320
- int i;
321
- for (i=0; i<count; i++) {
322
- tds[i].link = (i==count-1 ? (u32)&tds[0] : (u32)&tds[i+1]);
323
- tds[i].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
324
- | TD_CTRL_ACTIVE);
325
- tds[i].token = (uhci_explen(maxpacket) | toggle
326
- | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
327
- | USB_PID_IN);
328
- tds[i].buffer = data + maxpacket * i;
329
- toggle ^= TD_TOKEN_TOGGLE;
330
- }
331
-
332
- // Add to interrupt schedule.
333
- struct uhci_framelist *fl = cntl->framelist;
334
- if (frameexp == 0) {
335
- // Add to existing interrupt entry.
336
- struct uhci_qh *intr_qh = (void*)(fl->links[0] & ~UHCI_PTR_BITS);
337
- pipe->qh.link = intr_qh->link;
338
- barrier();
339
- intr_qh->link = (u32)&pipe->qh | UHCI_PTR_QH;
340
- if (cntl->control_qh == intr_qh)
341
- cntl->control_qh = &pipe->qh;
342
- } else {
343
- int startpos = 1<<(frameexp-1);
344
- pipe->qh.link = fl->links[startpos];
345
- barrier();
346
- for (i=startpos; i<ARRAY_SIZE(fl->links); i+=ms)
347
- fl->links[i] = (u32)&pipe->qh | UHCI_PTR_QH;
348
- }
349
-
350
- return &pipe->pipe;
351
- fail:
352
- free(pipe);
353
- free(tds);
354
- free(data);
355
- return NULL;
356
- }
357
-
358
- struct usb_pipe *
359
- uhci_realloc_pipe(struct usbdevice_s *usbdev, struct usb_pipe *upipe
360
- , struct usb_endpoint_descriptor *epdesc)
361
- {
362
- if (! CONFIG_USB_UHCI)
363
- return NULL;
364
- usb_add_freelist(upipe);
365
- if (!epdesc)
366
- return NULL;
367
- u8 eptype = epdesc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
368
- if (eptype == USB_ENDPOINT_XFER_INT)
369
- return uhci_alloc_intr_pipe(usbdev, epdesc);
370
- struct usb_uhci_s *cntl = container_of(
371
- usbdev->hub->cntl, struct usb_uhci_s, usb);
372
- dprintf(7, "uhci_alloc_async_pipe %p %d\n", &cntl->usb, eptype);
373
-
374
- struct usb_pipe *usbpipe = usb_get_freelist(&cntl->usb, eptype);
375
- if (usbpipe) {
376
- // Use previously allocated pipe.
377
- usb_desc2pipe(usbpipe, usbdev, epdesc);
378
- return usbpipe;
379
- }
380
-
381
- // Allocate a new queue head.
382
- struct uhci_pipe *pipe;
383
- if (eptype == USB_ENDPOINT_XFER_CONTROL)
384
- pipe = malloc_tmphigh(sizeof(*pipe));
385
- else
386
- pipe = malloc_low(sizeof(*pipe));
387
- if (!pipe) {
388
- warn_noalloc();
389
- return NULL;
390
- }
391
- memset(pipe, 0, sizeof(*pipe));
392
- usb_desc2pipe(&pipe->pipe, usbdev, epdesc);
393
- pipe->qh.element = UHCI_PTR_TERM;
394
- pipe->iobase = cntl->iobase;
395
-
396
- // Add queue head to controller list.
397
- struct uhci_qh *control_qh = cntl->control_qh;
398
- pipe->qh.link = control_qh->link;
399
- barrier();
400
- control_qh->link = (u32)&pipe->qh | UHCI_PTR_QH;
401
- if (eptype == USB_ENDPOINT_XFER_CONTROL)
402
- cntl->control_qh = &pipe->qh;
403
- return &pipe->pipe;
404
- }
405
-
406
- static int
407
- wait_pipe(struct uhci_pipe *pipe, u32 end)
408
- {
409
- for (;;) {
410
- u32 el_link = GET_LOWFLAT(pipe->qh.element);
411
- if (el_link & UHCI_PTR_TERM)
412
- return 0;
413
- if (timer_check(end)) {
414
- warn_timeout();
415
- u16 iobase = GET_LOWFLAT(pipe->iobase);
416
- struct uhci_td *td = (void*)(el_link & ~UHCI_PTR_BITS);
417
- dprintf(1, "Timeout on wait_pipe %p (td=%p s=%x c=%x/%x)\n"
418
- , pipe, (void*)el_link, GET_LOWFLAT(td->status)
419
- , inw(iobase + USBCMD)
420
- , inw(iobase + USBSTS));
421
- SET_LOWFLAT(pipe->qh.element, UHCI_PTR_TERM);
422
- uhci_waittick(iobase);
423
- return -1;
424
- }
425
- yield();
426
- }
427
- }
428
-
429
- static int
430
- wait_td(struct uhci_td *td, u32 end)
431
- {
432
- u32 status;
433
- for (;;) {
434
- status = td->status;
435
- if (!(status & TD_CTRL_ACTIVE))
436
- break;
437
- if (timer_check(end)) {
438
- warn_timeout();
439
- return -1;
440
- }
441
- yield();
442
- }
443
- if (status & TD_CTRL_ANY_ERROR) {
444
- dprintf(1, "wait_td error - status=%x\n", status);
445
- return -2;
446
- }
447
- return 0;
448
- }
449
-
450
- #define STACKTDS 16
451
- #define TDALIGN 16
452
-
453
- int
454
- uhci_send_pipe(struct usb_pipe *p, int dir, const void *cmd
455
- , void *data, int datasize)
456
- {
457
- if (! CONFIG_USB_UHCI)
458
- return -1;
459
- struct uhci_pipe *pipe = container_of(p, struct uhci_pipe, pipe);
460
- dprintf(7, "uhci_send_pipe qh=%p dir=%d data=%p size=%d\n"
461
- , &pipe->qh, dir, data, datasize);
462
- int maxpacket = GET_LOWFLAT(pipe->pipe.maxpacket);
463
- int lowspeed = GET_LOWFLAT(pipe->pipe.speed);
464
- int devaddr = (GET_LOWFLAT(pipe->pipe.devaddr)
465
- | (GET_LOWFLAT(pipe->pipe.ep) << 7));
466
- int toggle = GET_LOWFLAT(pipe->toggle) ? TD_TOKEN_TOGGLE : 0;
467
-
468
- // Allocate 16 tds on stack (16byte aligned)
469
- u8 tdsbuf[sizeof(struct uhci_td) * STACKTDS + TDALIGN - 1];
470
- struct uhci_td *tds = (void*)ALIGN((u32)tdsbuf, TDALIGN);
471
- memset(tds, 0, sizeof(*tds) * STACKTDS);
472
- int tdpos = 0;
473
-
474
- // Enable tds
475
- u32 end = timer_calc(usb_xfer_time(p, datasize));
476
- barrier();
477
- SET_LOWFLAT(pipe->qh.element, (u32)MAKE_FLATPTR(GET_SEG(SS), tds));
478
-
479
- // Setup transfer descriptors
480
- if (cmd) {
481
- // Send setup pid on control transfers
482
- struct uhci_td *td = &tds[tdpos++ % STACKTDS];
483
- u32 nexttd = (u32)MAKE_FLATPTR(GET_SEG(SS), &tds[tdpos % STACKTDS]);
484
- td->link = nexttd | UHCI_PTR_DEPTH;
485
- td->token = (uhci_explen(USB_CONTROL_SETUP_SIZE)
486
- | (devaddr << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_SETUP);
487
- td->buffer = (void*)cmd;
488
- barrier();
489
- td->status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
490
- | TD_CTRL_ACTIVE);
491
- toggle = TD_TOKEN_TOGGLE;
492
- }
493
- while (datasize) {
494
- // Send data pids
495
- struct uhci_td *td = &tds[tdpos++ % STACKTDS];
496
- int ret = wait_td(td, end);
497
- if (ret)
498
- goto fail;
499
-
500
- int transfer = datasize;
501
- if (transfer > maxpacket)
502
- transfer = maxpacket;
503
- u32 nexttd = (u32)MAKE_FLATPTR(GET_SEG(SS), &tds[tdpos % STACKTDS]);
504
- td->link = ((transfer==datasize && !cmd)
505
- ? UHCI_PTR_TERM : (nexttd | UHCI_PTR_DEPTH));
506
- td->token = (uhci_explen(transfer) | toggle
507
- | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
508
- | (dir ? USB_PID_IN : USB_PID_OUT));
509
- td->buffer = data;
510
- barrier();
511
- td->status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
512
- | TD_CTRL_ACTIVE);
513
- toggle ^= TD_TOKEN_TOGGLE;
514
-
515
- data += transfer;
516
- datasize -= transfer;
517
- }
518
- if (cmd) {
519
- // Send status pid on control transfers
520
- struct uhci_td *td = &tds[tdpos++ % STACKTDS];
521
- int ret = wait_td(td, end);
522
- if (ret)
523
- goto fail;
524
- td->link = UHCI_PTR_TERM;
525
- td->token = (uhci_explen(0) | TD_TOKEN_TOGGLE
526
- | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
527
- | (dir ? USB_PID_OUT : USB_PID_IN));
528
- td->buffer = 0;
529
- barrier();
530
- td->status = (uhci_maxerr(0) | (lowspeed ? TD_CTRL_LS : 0)
531
- | TD_CTRL_ACTIVE);
532
- }
533
- SET_LOWFLAT(pipe->toggle, !!toggle);
534
- return wait_pipe(pipe, end);
535
- fail:
536
- dprintf(1, "uhci_send_bulk failed\n");
537
- SET_LOWFLAT(pipe->qh.element, UHCI_PTR_TERM);
538
- uhci_waittick(GET_LOWFLAT(pipe->iobase));
539
- return -1;
540
- }
541
-
542
- int
543
- uhci_poll_intr(struct usb_pipe *p, void *data)
544
- {
545
- ASSERT16();
546
- if (! CONFIG_USB_UHCI)
547
- return -1;
548
-
549
- struct uhci_pipe *pipe = container_of(p, struct uhci_pipe, pipe);
550
- struct uhci_td *td = GET_LOWFLAT(pipe->next_td);
551
- u32 status = GET_LOWFLAT(td->status);
552
- u32 token = GET_LOWFLAT(td->token);
553
- if (status & TD_CTRL_ACTIVE)
554
- // No intrs found.
555
- return -1;
556
- // XXX - check for errors.
557
-
558
- // Copy data.
559
- void *tddata = GET_LOWFLAT(td->buffer);
560
- memcpy_far(GET_SEG(SS), data, SEG_LOW, LOWFLAT2LOW(tddata)
561
- , uhci_expected_length(token));
562
-
563
- // Reenable this td.
564
- struct uhci_td *next = (void*)(GET_LOWFLAT(td->link) & ~UHCI_PTR_BITS);
565
- SET_LOWFLAT(pipe->next_td, next);
566
- barrier();
567
- SET_LOWFLAT(td->status, (uhci_maxerr(0) | (status & TD_CTRL_LS)
568
- | TD_CTRL_ACTIVE));
569
-
570
- return 0;
571
- }
@@ -1,128 +0,0 @@
1
- #ifndef __USB_UHCI_H
2
- #define __USB_UHCI_H
3
-
4
- // usb-uhci.c
5
- void uhci_setup(void);
6
- struct usbdevice_s;
7
- struct usb_endpoint_descriptor;
8
- struct usb_pipe;
9
- struct usb_pipe *uhci_realloc_pipe(struct usbdevice_s *usbdev
10
- , struct usb_pipe *upipe
11
- , struct usb_endpoint_descriptor *epdesc);
12
- int uhci_send_pipe(struct usb_pipe *p, int dir, const void *cmd
13
- , void *data, int datasize);
14
- int uhci_poll_intr(struct usb_pipe *p, void *data);
15
-
16
-
17
- /****************************************************************
18
- * uhci structs and flags
19
- ****************************************************************/
20
-
21
- /* USB port status and control registers */
22
- #define USBPORTSC1 16
23
- #define USBPORTSC2 18
24
- #define USBPORTSC_CCS 0x0001 /* Current Connect Status
25
- * ("device present") */
26
- #define USBPORTSC_CSC 0x0002 /* Connect Status Change */
27
- #define USBPORTSC_PE 0x0004 /* Port Enable */
28
- #define USBPORTSC_PEC 0x0008 /* Port Enable Change */
29
- #define USBPORTSC_DPLUS 0x0010 /* D+ high (line status) */
30
- #define USBPORTSC_DMINUS 0x0020 /* D- high (line status) */
31
- #define USBPORTSC_RD 0x0040 /* Resume Detect */
32
- #define USBPORTSC_RES1 0x0080 /* reserved, always 1 */
33
- #define USBPORTSC_LSDA 0x0100 /* Low Speed Device Attached */
34
- #define USBPORTSC_PR 0x0200 /* Port Reset */
35
-
36
- /* Legacy support register */
37
- #define USBLEGSUP 0xc0
38
- #define USBLEGSUP_RWC 0x8f00 /* the R/WC bits */
39
-
40
- /* Command register */
41
- #define USBCMD 0
42
- #define USBCMD_RS 0x0001 /* Run/Stop */
43
- #define USBCMD_HCRESET 0x0002 /* Host reset */
44
- #define USBCMD_GRESET 0x0004 /* Global reset */
45
- #define USBCMD_EGSM 0x0008 /* Global Suspend Mode */
46
- #define USBCMD_FGR 0x0010 /* Force Global Resume */
47
- #define USBCMD_SWDBG 0x0020 /* SW Debug mode */
48
- #define USBCMD_CF 0x0040 /* Config Flag (sw only) */
49
- #define USBCMD_MAXP 0x0080 /* Max Packet (0 = 32, 1 = 64) */
50
-
51
- /* Status register */
52
- #define USBSTS 2
53
- #define USBSTS_USBINT 0x0001 /* Interrupt due to IOC */
54
- #define USBSTS_ERROR 0x0002 /* Interrupt due to error */
55
- #define USBSTS_RD 0x0004 /* Resume Detect */
56
- #define USBSTS_HSE 0x0008 /* Host System Error: PCI problems */
57
- #define USBSTS_HCPE 0x0010 /* Host Controller Process Error:
58
- * the schedule is buggy */
59
- #define USBSTS_HCH 0x0020 /* HC Halted */
60
-
61
- /* Interrupt enable register */
62
- #define USBINTR 4
63
- #define USBINTR_TIMEOUT 0x0001 /* Timeout/CRC error enable */
64
- #define USBINTR_RESUME 0x0002 /* Resume interrupt enable */
65
- #define USBINTR_IOC 0x0004 /* Interrupt On Complete enable */
66
- #define USBINTR_SP 0x0008 /* Short packet interrupt enable */
67
-
68
- #define USBFRNUM 6
69
- #define USBFLBASEADD 8
70
- #define USBSOF 12
71
- #define USBSOF_DEFAULT 64 /* Frame length is exactly 1 ms */
72
-
73
- struct uhci_framelist {
74
- u32 links[1024];
75
- } PACKED;
76
-
77
- #define TD_CTRL_SPD (1 << 29) /* Short Packet Detect */
78
- #define TD_CTRL_C_ERR_MASK (3 << 27) /* Error Counter bits */
79
- #define TD_CTRL_C_ERR_SHIFT 27
80
- #define TD_CTRL_LS (1 << 26) /* Low Speed Device */
81
- #define TD_CTRL_IOS (1 << 25) /* Isochronous Select */
82
- #define TD_CTRL_IOC (1 << 24) /* Interrupt on Complete */
83
- #define TD_CTRL_ACTIVE (1 << 23) /* TD Active */
84
- #define TD_CTRL_STALLED (1 << 22) /* TD Stalled */
85
- #define TD_CTRL_DBUFERR (1 << 21) /* Data Buffer Error */
86
- #define TD_CTRL_BABBLE (1 << 20) /* Babble Detected */
87
- #define TD_CTRL_NAK (1 << 19) /* NAK Received */
88
- #define TD_CTRL_CRCTIMEO (1 << 18) /* CRC/Time Out Error */
89
- #define TD_CTRL_BITSTUFF (1 << 17) /* Bit Stuff Error */
90
- #define TD_CTRL_ACTLEN_MASK 0x7FF /* actual length, encoded as n - 1 */
91
-
92
- #define TD_CTRL_ANY_ERROR (TD_CTRL_STALLED | TD_CTRL_DBUFERR | \
93
- TD_CTRL_BABBLE | TD_CTRL_CRCTIMEO | \
94
- TD_CTRL_BITSTUFF)
95
- #define uhci_maxerr(err) ((err) << TD_CTRL_C_ERR_SHIFT)
96
-
97
- #define TD_TOKEN_DEVADDR_SHIFT 8
98
- #define TD_TOKEN_TOGGLE_SHIFT 19
99
- #define TD_TOKEN_TOGGLE (1 << 19)
100
- #define TD_TOKEN_EXPLEN_SHIFT 21
101
- #define TD_TOKEN_EXPLEN_MASK 0x7FF /* expected length, encoded as n-1 */
102
- #define TD_TOKEN_PID_MASK 0xFF
103
-
104
- #define uhci_explen(len) ((((len) - 1) & TD_TOKEN_EXPLEN_MASK) << \
105
- TD_TOKEN_EXPLEN_SHIFT)
106
-
107
- #define uhci_expected_length(token) ((((token) >> TD_TOKEN_EXPLEN_SHIFT) + \
108
- 1) & TD_TOKEN_EXPLEN_MASK)
109
-
110
- struct uhci_td {
111
- u32 link;
112
- u32 status;
113
- u32 token;
114
- void *buffer;
115
- } PACKED;
116
-
117
- struct uhci_qh {
118
- u32 link;
119
- u32 element;
120
- } PACKED;
121
-
122
- #define UHCI_PTR_BITS 0x000F
123
- #define UHCI_PTR_TERM 0x0001
124
- #define UHCI_PTR_QH 0x0002
125
- #define UHCI_PTR_DEPTH 0x0004
126
- #define UHCI_PTR_BREADTH 0x0000
127
-
128
- #endif // usb-uhci.h