wasmtime 16.0.0 → 17.0.0

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Files changed (1111) hide show
  1. checksums.yaml +4 -4
  2. data/Cargo.lock +103 -79
  3. data/ext/Cargo.toml +7 -6
  4. data/ext/cargo-vendor/cranelift-bforest-0.104.0/.cargo-checksum.json +1 -0
  5. data/ext/cargo-vendor/cranelift-bforest-0.104.0/Cargo.toml +40 -0
  6. data/ext/cargo-vendor/cranelift-codegen-0.104.0/.cargo-checksum.json +1 -0
  7. data/ext/cargo-vendor/cranelift-codegen-0.104.0/Cargo.toml +175 -0
  8. data/ext/cargo-vendor/cranelift-codegen-0.104.0/build.rs +392 -0
  9. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/isa/aarch64/inst.isle +4197 -0
  10. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/isa/aarch64/lower/isle.rs +882 -0
  11. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/isa/x64/abi.rs +1305 -0
  12. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/isle_prelude.rs +957 -0
  13. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/machinst/isle.rs +908 -0
  14. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/machinst/mod.rs +558 -0
  15. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/machinst/pcc.rs +159 -0
  16. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/arithmetic.isle +169 -0
  17. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/bitops.isle +188 -0
  18. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/cprop.isle +248 -0
  19. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/extends.isle +116 -0
  20. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/icmp.isle +197 -0
  21. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/selects.isle +77 -0
  22. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/shifts.isle +307 -0
  23. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/spaceship.isle +194 -0
  24. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts.rs +265 -0
  25. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/prelude.isle +641 -0
  26. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/prelude_lower.isle +1073 -0
  27. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/prelude_opt.isle +134 -0
  28. data/ext/cargo-vendor/cranelift-codegen-meta-0.104.0/.cargo-checksum.json +1 -0
  29. data/ext/cargo-vendor/cranelift-codegen-meta-0.104.0/Cargo.toml +35 -0
  30. data/ext/cargo-vendor/cranelift-codegen-shared-0.104.0/.cargo-checksum.json +1 -0
  31. data/ext/cargo-vendor/cranelift-codegen-shared-0.104.0/Cargo.toml +22 -0
  32. data/ext/cargo-vendor/cranelift-control-0.104.0/.cargo-checksum.json +1 -0
  33. data/ext/cargo-vendor/cranelift-control-0.104.0/Cargo.toml +30 -0
  34. data/ext/cargo-vendor/cranelift-entity-0.104.0/.cargo-checksum.json +1 -0
  35. data/ext/cargo-vendor/cranelift-entity-0.104.0/Cargo.toml +50 -0
  36. data/ext/cargo-vendor/cranelift-entity-0.104.0/src/primary.rs +541 -0
  37. data/ext/cargo-vendor/cranelift-frontend-0.104.0/.cargo-checksum.json +1 -0
  38. data/ext/cargo-vendor/cranelift-frontend-0.104.0/Cargo.toml +68 -0
  39. data/ext/cargo-vendor/cranelift-isle-0.104.0/.cargo-checksum.json +1 -0
  40. data/ext/cargo-vendor/cranelift-isle-0.104.0/Cargo.toml +46 -0
  41. data/ext/cargo-vendor/cranelift-native-0.104.0/.cargo-checksum.json +1 -0
  42. data/ext/cargo-vendor/cranelift-native-0.104.0/Cargo.toml +43 -0
  43. data/ext/cargo-vendor/cranelift-wasm-0.104.0/.cargo-checksum.json +1 -0
  44. data/ext/cargo-vendor/cranelift-wasm-0.104.0/Cargo.toml +106 -0
  45. data/ext/cargo-vendor/cranelift-wasm-0.104.0/src/code_translator.rs +3646 -0
  46. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/.cargo-checksum.json +1 -0
  47. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/Cargo.toml +49 -0
  48. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/README.md +52 -0
  49. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/src/clocks.rs +56 -0
  50. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/src/lib.rs +24 -0
  51. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/src/noop_scheduler.rs +25 -0
  52. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/tests/clocks.rs +33 -0
  53. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/tests/common/mod.rs +33 -0
  54. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/tests/random.rs +17 -0
  55. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/tests/scheduler.rs +24 -0
  56. data/ext/cargo-vendor/rand_pcg-0.3.1/.cargo-checksum.json +1 -0
  57. data/ext/cargo-vendor/rand_pcg-0.3.1/CHANGELOG.md +37 -0
  58. data/ext/cargo-vendor/rand_pcg-0.3.1/COPYRIGHT +12 -0
  59. data/ext/cargo-vendor/rand_pcg-0.3.1/Cargo.toml +37 -0
  60. data/ext/cargo-vendor/rand_pcg-0.3.1/LICENSE-APACHE +201 -0
  61. data/ext/cargo-vendor/rand_pcg-0.3.1/LICENSE-MIT +26 -0
  62. data/ext/cargo-vendor/rand_pcg-0.3.1/README.md +42 -0
  63. data/ext/cargo-vendor/rand_pcg-0.3.1/src/lib.rs +45 -0
  64. data/ext/cargo-vendor/rand_pcg-0.3.1/src/pcg128.rs +296 -0
  65. data/ext/cargo-vendor/rand_pcg-0.3.1/src/pcg64.rs +166 -0
  66. data/ext/cargo-vendor/rand_pcg-0.3.1/tests/lcg128xsl64.rs +77 -0
  67. data/ext/cargo-vendor/rand_pcg-0.3.1/tests/lcg64xsh32.rs +70 -0
  68. data/ext/cargo-vendor/rand_pcg-0.3.1/tests/mcg128xsl64.rs +75 -0
  69. data/ext/cargo-vendor/wasi-cap-std-sync-17.0.0/.cargo-checksum.json +1 -0
  70. data/ext/cargo-vendor/wasi-cap-std-sync-17.0.0/Cargo.toml +102 -0
  71. data/ext/cargo-vendor/wasi-common-17.0.0/.cargo-checksum.json +1 -0
  72. data/ext/cargo-vendor/wasi-common-17.0.0/Cargo.toml +131 -0
  73. data/ext/cargo-vendor/wasi-common-17.0.0/src/error.rs +26 -0
  74. data/ext/cargo-vendor/wasi-common-17.0.0/src/snapshots/preview_1/error.rs +266 -0
  75. data/ext/cargo-vendor/wasmtime-17.0.0/.cargo-checksum.json +1 -0
  76. data/ext/cargo-vendor/wasmtime-17.0.0/Cargo.toml +211 -0
  77. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/component.rs +545 -0
  78. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/instance.rs +815 -0
  79. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/linker.rs +580 -0
  80. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/matching.rs +215 -0
  81. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/mod.rs +351 -0
  82. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/resource_table.rs +350 -0
  83. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/resources.rs +823 -0
  84. data/ext/cargo-vendor/wasmtime-17.0.0/src/config.rs +2428 -0
  85. data/ext/cargo-vendor/wasmtime-17.0.0/src/func/typed.rs +638 -0
  86. data/ext/cargo-vendor/wasmtime-17.0.0/src/lib.rs +526 -0
  87. data/ext/cargo-vendor/wasmtime-17.0.0/src/store.rs +2389 -0
  88. data/ext/cargo-vendor/wasmtime-asm-macros-17.0.0/.cargo-checksum.json +1 -0
  89. data/ext/cargo-vendor/wasmtime-asm-macros-17.0.0/Cargo.toml +22 -0
  90. data/ext/cargo-vendor/wasmtime-cache-17.0.0/.cargo-checksum.json +1 -0
  91. data/ext/cargo-vendor/wasmtime-cache-17.0.0/Cargo.toml +81 -0
  92. data/ext/cargo-vendor/wasmtime-component-macro-17.0.0/.cargo-checksum.json +1 -0
  93. data/ext/cargo-vendor/wasmtime-component-macro-17.0.0/Cargo.toml +67 -0
  94. data/ext/cargo-vendor/wasmtime-component-macro-17.0.0/src/bindgen.rs +371 -0
  95. data/ext/cargo-vendor/wasmtime-component-macro-17.0.0/tests/codegen/multiversion/root.wit +8 -0
  96. data/ext/cargo-vendor/wasmtime-component-util-17.0.0/.cargo-checksum.json +1 -0
  97. data/ext/cargo-vendor/wasmtime-component-util-17.0.0/Cargo.toml +25 -0
  98. data/ext/cargo-vendor/wasmtime-cranelift-17.0.0/.cargo-checksum.json +1 -0
  99. data/ext/cargo-vendor/wasmtime-cranelift-17.0.0/Cargo.toml +112 -0
  100. data/ext/cargo-vendor/wasmtime-cranelift-shared-17.0.0/.cargo-checksum.json +1 -0
  101. data/ext/cargo-vendor/wasmtime-cranelift-shared-17.0.0/Cargo.toml +71 -0
  102. data/ext/cargo-vendor/wasmtime-environ-17.0.0/.cargo-checksum.json +1 -0
  103. data/ext/cargo-vendor/wasmtime-environ-17.0.0/Cargo.lock +726 -0
  104. data/ext/cargo-vendor/wasmtime-environ-17.0.0/Cargo.toml +125 -0
  105. data/ext/cargo-vendor/wasmtime-environ-17.0.0/examples/factc.rs +205 -0
  106. data/ext/cargo-vendor/wasmtime-fiber-17.0.0/.cargo-checksum.json +1 -0
  107. data/ext/cargo-vendor/wasmtime-fiber-17.0.0/Cargo.toml +63 -0
  108. data/ext/cargo-vendor/wasmtime-jit-17.0.0/.cargo-checksum.json +1 -0
  109. data/ext/cargo-vendor/wasmtime-jit-17.0.0/Cargo.toml +125 -0
  110. data/ext/cargo-vendor/wasmtime-jit-debug-17.0.0/.cargo-checksum.json +1 -0
  111. data/ext/cargo-vendor/wasmtime-jit-debug-17.0.0/Cargo.toml +67 -0
  112. data/ext/cargo-vendor/wasmtime-jit-icache-coherence-17.0.0/.cargo-checksum.json +1 -0
  113. data/ext/cargo-vendor/wasmtime-jit-icache-coherence-17.0.0/Cargo.toml +46 -0
  114. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/.cargo-checksum.json +1 -0
  115. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/Cargo.toml +139 -0
  116. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/src/instance/allocator/pooling/memory_pool.rs +997 -0
  117. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/src/instance/allocator/pooling.rs +658 -0
  118. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/src/memory.rs +973 -0
  119. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/src/parking_spot.rs +622 -0
  120. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/src/sys/windows/mmap.rs +216 -0
  121. data/ext/cargo-vendor/wasmtime-types-17.0.0/.cargo-checksum.json +1 -0
  122. data/ext/cargo-vendor/wasmtime-types-17.0.0/Cargo.toml +36 -0
  123. data/ext/cargo-vendor/wasmtime-versioned-export-macros-17.0.0/.cargo-checksum.json +1 -0
  124. data/ext/cargo-vendor/wasmtime-versioned-export-macros-17.0.0/Cargo.toml +32 -0
  125. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/.cargo-checksum.json +1 -0
  126. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/Cargo.toml +261 -0
  127. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/ctx.rs +333 -0
  128. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/filesystem.rs +325 -0
  129. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/host/clocks.rs +103 -0
  130. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/host/filesystem.rs +1069 -0
  131. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/host/instance_network.rs +15 -0
  132. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/host/network.rs +625 -0
  133. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/host/tcp.rs +605 -0
  134. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/host/udp.rs +530 -0
  135. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/mod.rs +327 -0
  136. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/network.rs +108 -0
  137. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/poll.rs +175 -0
  138. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/preview1.rs +2362 -0
  139. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/stream.rs +181 -0
  140. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/tcp.rs +335 -0
  141. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/udp.rs +125 -0
  142. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/tests/all/api.rs +217 -0
  143. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/tests/all/async_.rs +364 -0
  144. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/tests/all/main.rs +112 -0
  145. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/tests/all/preview1.rs +243 -0
  146. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/tests/all/sync.rs +303 -0
  147. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/command-extended.wit +6 -0
  148. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/cli/command.wit +7 -0
  149. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/cli/imports.wit +20 -0
  150. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/cli/stdio.wit +17 -0
  151. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/cli/terminal.wit +49 -0
  152. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/clocks/monotonic-clock.wit +45 -0
  153. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/clocks/wall-clock.wit +42 -0
  154. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/clocks/world.wit +6 -0
  155. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/filesystem/preopens.wit +8 -0
  156. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/filesystem/types.wit +634 -0
  157. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/filesystem/world.wit +6 -0
  158. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/http/proxy.wit +32 -0
  159. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/http/types.wit +570 -0
  160. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/io/error.wit +34 -0
  161. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/io/poll.wit +41 -0
  162. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/io/streams.wit +251 -0
  163. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/io/world.wit +6 -0
  164. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/random/insecure-seed.wit +25 -0
  165. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/random/insecure.wit +22 -0
  166. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/random/random.wit +26 -0
  167. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/random/world.wit +7 -0
  168. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/ip-name-lookup.wit +51 -0
  169. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/network.wit +145 -0
  170. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/tcp-create-socket.wit +27 -0
  171. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/tcp.wit +309 -0
  172. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/udp-create-socket.wit +27 -0
  173. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/udp.wit +264 -0
  174. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/world.wit +11 -0
  175. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/test.wit +22 -0
  176. data/ext/cargo-vendor/wasmtime-winch-17.0.0/.cargo-checksum.json +1 -0
  177. data/ext/cargo-vendor/wasmtime-winch-17.0.0/Cargo.toml +77 -0
  178. data/ext/cargo-vendor/wasmtime-wit-bindgen-17.0.0/.cargo-checksum.json +1 -0
  179. data/ext/cargo-vendor/wasmtime-wit-bindgen-17.0.0/Cargo.toml +41 -0
  180. data/ext/cargo-vendor/wasmtime-wit-bindgen-17.0.0/src/lib.rs +2097 -0
  181. data/ext/cargo-vendor/wasmtime-wmemcheck-17.0.0/.cargo-checksum.json +1 -0
  182. data/ext/cargo-vendor/wasmtime-wmemcheck-17.0.0/Cargo.toml +29 -0
  183. data/ext/cargo-vendor/wiggle-17.0.0/.cargo-checksum.json +1 -0
  184. data/ext/cargo-vendor/wiggle-17.0.0/Cargo.toml +115 -0
  185. data/ext/cargo-vendor/wiggle-generate-17.0.0/.cargo-checksum.json +1 -0
  186. data/ext/cargo-vendor/wiggle-generate-17.0.0/Cargo.toml +65 -0
  187. data/ext/cargo-vendor/wiggle-macro-17.0.0/.cargo-checksum.json +1 -0
  188. data/ext/cargo-vendor/wiggle-macro-17.0.0/Cargo.toml +55 -0
  189. data/ext/cargo-vendor/winch-codegen-0.15.0/.cargo-checksum.json +1 -0
  190. data/ext/cargo-vendor/winch-codegen-0.15.0/Cargo.toml +76 -0
  191. data/ext/cargo-vendor/winch-codegen-0.15.0/src/codegen/context.rs +553 -0
  192. data/ext/cargo-vendor/winch-codegen-0.15.0/src/codegen/env.rs +309 -0
  193. data/ext/cargo-vendor/winch-codegen-0.15.0/src/isa/aarch64/masm.rs +457 -0
  194. data/ext/cargo-vendor/winch-codegen-0.15.0/src/isa/x64/asm.rs +1149 -0
  195. data/ext/cargo-vendor/winch-codegen-0.15.0/src/isa/x64/masm.rs +1044 -0
  196. data/ext/cargo-vendor/winch-codegen-0.15.0/src/masm.rs +708 -0
  197. data/ext/cargo-vendor/winch-codegen-0.15.0/src/stack.rs +452 -0
  198. data/ext/cargo-vendor/winch-codegen-0.15.0/src/visitor.rs +1617 -0
  199. data/ext/src/helpers/mod.rs +4 -0
  200. data/ext/src/helpers/nogvl.rs +29 -0
  201. data/ext/src/helpers/tmplock.rs +45 -0
  202. data/ext/src/ruby_api/engine.rs +7 -3
  203. data/ext/src/ruby_api/mod.rs +3 -0
  204. data/ext/src/ruby_api/module.rs +22 -8
  205. data/ext/src/ruby_api/store.rs +66 -12
  206. data/ext/src/ruby_api/wasi_ctx.rs +110 -0
  207. data/ext/src/ruby_api/wasi_ctx_builder.rs +10 -7
  208. data/lib/wasmtime/version.rb +1 -1
  209. metadata +931 -904
  210. data/ext/cargo-vendor/cranelift-bforest-0.103.0/.cargo-checksum.json +0 -1
  211. data/ext/cargo-vendor/cranelift-bforest-0.103.0/Cargo.toml +0 -40
  212. data/ext/cargo-vendor/cranelift-codegen-0.103.0/.cargo-checksum.json +0 -1
  213. data/ext/cargo-vendor/cranelift-codegen-0.103.0/Cargo.toml +0 -175
  214. data/ext/cargo-vendor/cranelift-codegen-0.103.0/build.rs +0 -391
  215. data/ext/cargo-vendor/cranelift-codegen-0.103.0/src/isa/aarch64/inst.isle +0 -4193
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  389. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/LICENSE +0 -0
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  410. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/fx.rs +0 -0
  411. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/incremental_cache.rs +0 -0
  412. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/inst_predicates.rs +0 -0
  413. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/atomic_rmw_op.rs +0 -0
  414. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/builder.rs +0 -0
  415. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/condcodes.rs +0 -0
  416. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/constant.rs +0 -0
  417. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/dfg.rs +0 -0
  418. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/dynamic_type.rs +0 -0
  419. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/entities.rs +0 -0
  420. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/extfunc.rs +0 -0
  421. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/extname.rs +0 -0
  422. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/function.rs +0 -0
  423. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/globalvalue.rs +0 -0
  424. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/immediates.rs +0 -0
  425. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/instructions.rs +0 -0
  426. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/jumptable.rs +0 -0
  427. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/known_symbol.rs +0 -0
  428. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/layout.rs +0 -0
  429. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/libcall.rs +0 -0
  430. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/memflags.rs +0 -0
  431. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/memtype.rs +0 -0
  432. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/mod.rs +0 -0
  433. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/pcc.rs +0 -0
  434. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/progpoint.rs +0 -0
  435. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/sourceloc.rs +0 -0
  436. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/stackslot.rs +0 -0
  437. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/table.rs +0 -0
  438. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/trapcode.rs +0 -0
  439. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/types.rs +0 -0
  440. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/abi.rs +0 -0
  441. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/args.rs +0 -0
  442. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/emit.rs +0 -0
  443. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/emit_tests.rs +0 -0
  444. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/imms.rs +0 -0
  445. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/mod.rs +0 -0
  446. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/regs.rs +0 -0
  447. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/unwind/systemv.rs +0 -0
  448. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/unwind.rs +0 -0
  449. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst_neon.isle +0 -0
  450. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/lower/isle/generated_code.rs +0 -0
  451. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/lower.isle +0 -0
  452. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/lower.rs +0 -0
  453. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/lower_dynamic_neon.isle +0 -0
  454. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/mod.rs +0 -0
  455. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/pcc.rs +0 -0
  456. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/settings.rs +0 -0
  457. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/call_conv.rs +0 -0
  458. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/mod.rs +0 -0
  459. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/abi.rs +0 -0
  460. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/args.rs +0 -0
  461. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/emit.rs +0 -0
  462. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/emit_tests.rs +0 -0
  463. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/encode.rs +0 -0
  464. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/imms.rs +0 -0
  465. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/mod.rs +0 -0
  466. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/regs.rs +0 -0
  467. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/unwind/systemv.rs +0 -0
  468. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/unwind.rs +0 -0
  469. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/vector.rs +0 -0
  470. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst.isle +0 -0
  471. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst_vector.isle +0 -0
  472. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/lower/isle/generated_code.rs +0 -0
  473. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/lower/isle.rs +0 -0
  474. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/lower.isle +0 -0
  475. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/lower.rs +0 -0
  476. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/mod.rs +0 -0
  477. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/settings.rs +0 -0
  478. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/abi.rs +0 -0
  479. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/args.rs +0 -0
  480. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/emit.rs +0 -0
  481. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/emit_tests.rs +0 -0
  482. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/imms.rs +0 -0
  483. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/mod.rs +0 -0
  484. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/regs.rs +0 -0
  485. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/unwind/systemv.rs +0 -0
  486. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/unwind.rs +0 -0
  487. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst.isle +0 -0
  488. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/lower/isle/generated_code.rs +0 -0
  489. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/lower/isle.rs +0 -0
  490. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/lower.isle +0 -0
  491. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/lower.rs +0 -0
  492. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/mod.rs +0 -0
  493. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/settings.rs +0 -0
  494. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/unwind/systemv.rs +0 -0
  495. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/unwind/winx64.rs +0 -0
  496. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/unwind.rs +0 -0
  497. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/encoding/evex.rs +0 -0
  498. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/encoding/mod.rs +0 -0
  499. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/encoding/rex.rs +0 -0
  500. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/encoding/vex.rs +0 -0
  501. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/args.rs +0 -0
  502. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/emit.rs +0 -0
  503. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/emit_state.rs +0 -0
  504. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/emit_tests.rs +0 -0
  505. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/mod.rs +0 -0
  506. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/regs.rs +0 -0
  507. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/unwind/systemv.rs +0 -0
  508. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/unwind/winx64.rs +0 -0
  509. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/unwind.rs +0 -0
  510. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst.isle +0 -0
  511. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/lower/isle/generated_code.rs +0 -0
  512. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/lower/isle.rs +0 -0
  513. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/lower.isle +0 -0
  514. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/lower.rs +0 -0
  515. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/mod.rs +0 -0
  516. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/pcc.rs +0 -0
  517. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/settings.rs +0 -0
  518. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/iterators.rs +0 -0
  519. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/legalizer/globalvalue.rs +0 -0
  520. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/legalizer/mod.rs +0 -0
  521. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/legalizer/table.rs +0 -0
  522. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/lib.rs +0 -0
  523. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/loop_analysis.rs +0 -0
  524. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/abi.rs +0 -0
  525. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/blockorder.rs +0 -0
  526. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/buffer.rs +0 -0
  527. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/compile.rs +0 -0
  528. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/helpers.rs +0 -0
  529. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/inst_common.rs +0 -0
  530. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/lower.rs +0 -0
  531. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/reg.rs +0 -0
  532. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/valueregs.rs +0 -0
  533. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/vcode.rs +0 -0
  534. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/nan_canonicalization.rs +0 -0
  535. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/opts/README.md +0 -0
  536. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/opts/generated_code.rs +0 -0
  537. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/opts/remat.isle +0 -0
  538. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/opts/vector.isle +0 -0
  539. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/print_errors.rs +0 -0
  540. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/remove_constant_phis.rs +0 -0
  541. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/result.rs +0 -0
  542. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/scoped_hash_map.rs +0 -0
  543. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/settings.rs +0 -0
  544. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/souper_harvest.rs +0 -0
  545. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/timing.rs +0 -0
  546. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/unionfind.rs +0 -0
  547. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/unreachable_code.rs +0 -0
  548. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/value_label.rs +0 -0
  549. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/verifier/mod.rs +0 -0
  550. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/write.rs +0 -0
  551. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/LICENSE +0 -0
  552. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/README.md +0 -0
  553. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/formats.rs +0 -0
  554. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/instructions.rs +0 -0
  555. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/isa.rs +0 -0
  556. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/mod.rs +0 -0
  557. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/operands.rs +0 -0
  558. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/settings.rs +0 -0
  559. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/types.rs +0 -0
  560. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/typevar.rs +0 -0
  561. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/constant_hash.rs +0 -0
  562. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/error.rs +0 -0
  563. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/gen_inst.rs +0 -0
  564. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/gen_settings.rs +0 -0
  565. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/gen_types.rs +0 -0
  566. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/isa/arm64.rs +0 -0
  567. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/isa/mod.rs +0 -0
  568. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/isa/riscv64.rs +0 -0
  569. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/isa/s390x.rs +0 -0
  570. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/isa/x86.rs +0 -0
  571. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/lib.rs +0 -0
  572. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/entities.rs +0 -0
  573. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/formats.rs +0 -0
  574. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/immediates.rs +0 -0
  575. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/instructions.rs +0 -0
  576. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/mod.rs +0 -0
  577. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/settings.rs +0 -0
  578. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/types.rs +0 -0
  579. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/srcgen.rs +0 -0
  580. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/unique_table.rs +0 -0
  581. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.103.0 → cranelift-codegen-shared-0.104.0}/LICENSE +0 -0
  582. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.103.0 → cranelift-codegen-shared-0.104.0}/README.md +0 -0
  583. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.103.0 → cranelift-codegen-shared-0.104.0}/src/constant_hash.rs +0 -0
  584. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.103.0 → cranelift-codegen-shared-0.104.0}/src/constants.rs +0 -0
  585. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.103.0 → cranelift-codegen-shared-0.104.0}/src/lib.rs +0 -0
  586. /data/ext/cargo-vendor/{cranelift-control-0.103.0 → cranelift-control-0.104.0}/LICENSE +0 -0
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  588. /data/ext/cargo-vendor/{cranelift-control-0.103.0 → cranelift-control-0.104.0}/src/chaos.rs +0 -0
  589. /data/ext/cargo-vendor/{cranelift-control-0.103.0 → cranelift-control-0.104.0}/src/lib.rs +0 -0
  590. /data/ext/cargo-vendor/{cranelift-control-0.103.0 → cranelift-control-0.104.0}/src/zero_sized.rs +0 -0
  591. /data/ext/cargo-vendor/{cranelift-entity-0.103.0 → cranelift-entity-0.104.0}/LICENSE +0 -0
  592. /data/ext/cargo-vendor/{cranelift-entity-0.103.0 → cranelift-entity-0.104.0}/README.md +0 -0
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  599. /data/ext/cargo-vendor/{cranelift-entity-0.103.0 → cranelift-entity-0.104.0}/src/packed_option.rs +0 -0
  600. /data/ext/cargo-vendor/{cranelift-entity-0.103.0 → cranelift-entity-0.104.0}/src/set.rs +0 -0
  601. /data/ext/cargo-vendor/{cranelift-entity-0.103.0 → cranelift-entity-0.104.0}/src/sparse.rs +0 -0
  602. /data/ext/cargo-vendor/{cranelift-entity-0.103.0 → cranelift-entity-0.104.0}/src/unsigned.rs +0 -0
  603. /data/ext/cargo-vendor/{cranelift-frontend-0.103.0 → cranelift-frontend-0.104.0}/LICENSE +0 -0
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  631. /data/ext/cargo-vendor/{cranelift-isle-0.103.0 → cranelift-isle-0.104.0}/isle_examples/pass/bound_var.isle +0 -0
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  647. /data/ext/cargo-vendor/{cranelift-isle-0.103.0 → cranelift-isle-0.104.0}/src/codegen.rs +0 -0
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  657. /data/ext/cargo-vendor/{cranelift-isle-0.103.0 → cranelift-isle-0.104.0}/src/trie_again.rs +0 -0
  658. /data/ext/cargo-vendor/{cranelift-isle-0.103.0 → cranelift-isle-0.104.0}/tests/run_tests.rs +0 -0
  659. /data/ext/cargo-vendor/{cranelift-native-0.103.0 → cranelift-native-0.104.0}/LICENSE +0 -0
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  662. /data/ext/cargo-vendor/{cranelift-native-0.103.0 → cranelift-native-0.104.0}/src/riscv.rs +0 -0
  663. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/LICENSE +0 -0
  664. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/README.md +0 -0
  665. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/code_translator/bounds_checks.rs +0 -0
  666. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/environ/dummy.rs +0 -0
  667. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/environ/mod.rs +0 -0
  668. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/environ/spec.rs +0 -0
  669. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/func_translator.rs +0 -0
  670. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/heap.rs +0 -0
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  674. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/state.rs +0 -0
  675. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/translation_utils.rs +0 -0
  676. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/tests/wasm_testsuite.rs +0 -0
  677. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/wasmtests/arith.wat +0 -0
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  856. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/rename.wit +0 -0
  857. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/resources-export.wit +0 -0
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  859. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/share-types.wit +0 -0
  860. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/simple-functions.wit +0 -0
  861. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/simple-lists.wit +0 -0
  862. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/simple-wasi.wit +0 -0
  863. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/small-anonymous.wit +0 -0
  864. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/smoke-default.wit +0 -0
  865. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/smoke-export.wit +0 -0
  866. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/smoke.wit +0 -0
  867. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/strings.wit +0 -0
  868. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/use-paths.wit +0 -0
  869. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/variants.wit +0 -0
  870. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/worlds-with-types.wit +0 -0
  871. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen.rs +0 -0
  872. /data/ext/cargo-vendor/{wasmtime-component-util-16.0.0 → wasmtime-component-util-17.0.0}/src/lib.rs +0 -0
  873. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/LICENSE +0 -0
  874. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/SECURITY.md +0 -0
  875. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/builder.rs +0 -0
  876. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/compiler/component.rs +0 -0
  877. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/compiler.rs +0 -0
  878. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/gc.rs +0 -0
  879. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/address_transform.rs +0 -0
  880. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/attr.rs +0 -0
  881. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/expression.rs +0 -0
  882. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/line_program.rs +0 -0
  883. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/mod.rs +0 -0
  884. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/range_info_builder.rs +0 -0
  885. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/refs.rs +0 -0
  886. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/simulate.rs +0 -0
  887. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/unit.rs +0 -0
  888. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/utils.rs +0 -0
  889. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/write_debuginfo.rs +0 -0
  890. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug.rs +0 -0
  891. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/func_environ.rs +0 -0
  892. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/lib.rs +0 -0
  893. /data/ext/cargo-vendor/{wasmtime-cranelift-shared-16.0.0 → wasmtime-cranelift-shared-17.0.0}/src/compiled_function.rs +0 -0
  894. /data/ext/cargo-vendor/{wasmtime-cranelift-shared-16.0.0 → wasmtime-cranelift-shared-17.0.0}/src/isa_builder.rs +0 -0
  895. /data/ext/cargo-vendor/{wasmtime-cranelift-shared-16.0.0 → wasmtime-cranelift-shared-17.0.0}/src/lib.rs +0 -0
  896. /data/ext/cargo-vendor/{wasmtime-cranelift-shared-16.0.0 → wasmtime-cranelift-shared-17.0.0}/src/obj.rs +0 -0
  897. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/LICENSE +0 -0
  898. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/address_map.rs +0 -0
  899. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/builtin.rs +0 -0
  900. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/compilation.rs +0 -0
  901. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/compiler.rs +0 -0
  902. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/dfg.rs +0 -0
  903. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/info.rs +0 -0
  904. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/translate/adapt.rs +0 -0
  905. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/translate/inline.rs +0 -0
  906. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/translate.rs +0 -0
  907. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/types/resources.rs +0 -0
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  913. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/fact/trampoline.rs +0 -0
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  921. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/obj.rs +0 -0
  922. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/ref_bits.rs +0 -0
  923. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/scopevec.rs +0 -0
  924. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/stack_map.rs +0 -0
  925. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/trap_encoding.rs +0 -0
  926. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/tunables.rs +0 -0
  927. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/vmoffsets.rs +0 -0
  928. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/LICENSE +0 -0
  929. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/build.rs +0 -0
  930. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/src/lib.rs +0 -0
  931. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/src/unix/aarch64.rs +0 -0
  932. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/src/unix/arm.rs +0 -0
  933. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/src/unix/riscv64.rs +0 -0
  934. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/src/unix/s390x.S +0 -0
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  938. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/src/windows.c +0 -0
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  940. /data/ext/cargo-vendor/{wasmtime-jit-16.0.0 → wasmtime-jit-17.0.0}/LICENSE +0 -0
  941. /data/ext/cargo-vendor/{wasmtime-jit-16.0.0 → wasmtime-jit-17.0.0}/src/code_memory.rs +0 -0
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  948. /data/ext/cargo-vendor/{wasmtime-jit-16.0.0 → wasmtime-jit-17.0.0}/src/profiling/vtune.rs +0 -0
  949. /data/ext/cargo-vendor/{wasmtime-jit-16.0.0 → wasmtime-jit-17.0.0}/src/profiling.rs +0 -0
  950. /data/ext/cargo-vendor/{wasmtime-jit-debug-16.0.0 → wasmtime-jit-debug-17.0.0}/README.md +0 -0
  951. /data/ext/cargo-vendor/{wasmtime-jit-debug-16.0.0 → wasmtime-jit-debug-17.0.0}/src/gdb_jit_int.rs +0 -0
  952. /data/ext/cargo-vendor/{wasmtime-jit-debug-16.0.0 → wasmtime-jit-debug-17.0.0}/src/lib.rs +0 -0
  953. /data/ext/cargo-vendor/{wasmtime-jit-debug-16.0.0 → wasmtime-jit-debug-17.0.0}/src/perf_jitdump.rs +0 -0
  954. /data/ext/cargo-vendor/{wasmtime-jit-icache-coherence-16.0.0 → wasmtime-jit-icache-coherence-17.0.0}/src/lib.rs +0 -0
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  957. /data/ext/cargo-vendor/{wasmtime-jit-icache-coherence-16.0.0 → wasmtime-jit-icache-coherence-17.0.0}/src/win.rs +0 -0
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  961. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/arch/aarch64.rs +0 -0
  962. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/arch/mod.rs +0 -0
  963. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/arch/riscv64.rs +0 -0
  964. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/arch/s390x.S +0 -0
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  966. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/arch/x86_64.rs +0 -0
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  972. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/export.rs +0 -0
  973. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/externref.rs +0 -0
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  976. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/instance/allocator/on_demand.rs +0 -0
  977. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/instance/allocator/pooling/index_allocator.rs +0 -0
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  981. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/instance.rs +0 -0
  982. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/lib.rs +0 -0
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  984. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/mmap.rs +0 -0
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  986. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/module_id.rs +0 -0
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  1002. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/unix/mmap.rs +0 -0
  1003. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/unix/mod.rs +0 -0
  1004. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/unix/signals.rs +0 -0
  1005. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/unix/unwind.rs +0 -0
  1006. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/unix/vm.rs +0 -0
  1007. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/windows/mod.rs +0 -0
  1008. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/windows/traphandlers.rs +0 -0
  1009. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/windows/unwind.rs +0 -0
  1010. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/windows/vm.rs +0 -0
  1011. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/table.rs +0 -0
  1012. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/traphandlers/backtrace.rs +0 -0
  1013. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/traphandlers/coredump.rs +0 -0
  1014. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/traphandlers.rs +0 -0
  1015. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/vmcontext/vm_host_func_context.rs +0 -0
  1016. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/vmcontext.rs +0 -0
  1017. /data/ext/cargo-vendor/{wasmtime-types-16.0.0 → wasmtime-types-17.0.0}/LICENSE +0 -0
  1018. /data/ext/cargo-vendor/{wasmtime-types-16.0.0 → wasmtime-types-17.0.0}/src/error.rs +0 -0
  1019. /data/ext/cargo-vendor/{wasmtime-types-16.0.0 → wasmtime-types-17.0.0}/src/lib.rs +0 -0
  1020. /data/ext/cargo-vendor/{wasmtime-versioned-export-macros-16.0.0 → wasmtime-versioned-export-macros-17.0.0}/src/lib.rs +0 -0
  1021. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/LICENSE +0 -0
  1022. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/README.md +0 -0
  1023. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/build.rs +0 -0
  1024. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/lib.rs +0 -0
  1025. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/clocks/host.rs +0 -0
  1026. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/clocks.rs +0 -0
  1027. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/command.rs +0 -0
  1028. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/error.rs +0 -0
  1029. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/env.rs +0 -0
  1030. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/exit.rs +0 -0
  1031. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/filesystem/sync.rs +0 -0
  1032. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/io.rs +0 -0
  1033. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/mod.rs +0 -0
  1034. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/random.rs +0 -0
  1035. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/tcp_create_socket.rs +0 -0
  1036. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/udp_create_socket.rs +0 -0
  1037. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/ip_name_lookup.rs +0 -0
  1038. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/pipe.rs +0 -0
  1039. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/preview0.rs +0 -0
  1040. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/random.rs +0 -0
  1041. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/stdio/worker_thread_stdin.rs +0 -0
  1042. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/stdio.rs +0 -0
  1043. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/write_stream.rs +0 -0
  1044. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/tests/process_stdin.rs +0 -0
  1045. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/wit/deps/cli/environment.wit +0 -0
  1046. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/wit/deps/cli/exit.wit +0 -0
  1047. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/wit/deps/cli/run.wit +0 -0
  1048. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/wit/deps/http/handler.wit +0 -0
  1049. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/wit/deps/sockets/instance-network.wit +0 -0
  1050. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/witx/preview0/typenames.witx +0 -0
  1051. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/witx/preview0/wasi_unstable.witx +0 -0
  1052. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/witx/preview1/typenames.witx +0 -0
  1053. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/witx/preview1/wasi_snapshot_preview1.witx +0 -0
  1054. /data/ext/cargo-vendor/{wasmtime-winch-16.0.0 → wasmtime-winch-17.0.0}/LICENSE +0 -0
  1055. /data/ext/cargo-vendor/{wasmtime-winch-16.0.0 → wasmtime-winch-17.0.0}/src/builder.rs +0 -0
  1056. /data/ext/cargo-vendor/{wasmtime-winch-16.0.0 → wasmtime-winch-17.0.0}/src/compiler.rs +0 -0
  1057. /data/ext/cargo-vendor/{wasmtime-winch-16.0.0 → wasmtime-winch-17.0.0}/src/lib.rs +0 -0
  1058. /data/ext/cargo-vendor/{wasmtime-wit-bindgen-16.0.0 → wasmtime-wit-bindgen-17.0.0}/src/rust.rs +0 -0
  1059. /data/ext/cargo-vendor/{wasmtime-wit-bindgen-16.0.0 → wasmtime-wit-bindgen-17.0.0}/src/source.rs +0 -0
  1060. /data/ext/cargo-vendor/{wasmtime-wit-bindgen-16.0.0 → wasmtime-wit-bindgen-17.0.0}/src/types.rs +0 -0
  1061. /data/ext/cargo-vendor/{wasmtime-wmemcheck-16.0.0 → wasmtime-wmemcheck-17.0.0}/src/lib.rs +0 -0
  1062. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/LICENSE +0 -0
  1063. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/README.md +0 -0
  1064. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/src/borrow.rs +0 -0
  1065. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/src/error.rs +0 -0
  1066. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/src/guest_type.rs +0 -0
  1067. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/src/lib.rs +0 -0
  1068. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/src/region.rs +0 -0
  1069. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/src/wasmtime.rs +0 -0
  1070. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/LICENSE +0 -0
  1071. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/README.md +0 -0
  1072. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/codegen_settings.rs +0 -0
  1073. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/config.rs +0 -0
  1074. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/funcs.rs +0 -0
  1075. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/lib.rs +0 -0
  1076. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/lifetimes.rs +0 -0
  1077. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/module_trait.rs +0 -0
  1078. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/names.rs +0 -0
  1079. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/types/error.rs +0 -0
  1080. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/types/flags.rs +0 -0
  1081. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/types/handle.rs +0 -0
  1082. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/types/mod.rs +0 -0
  1083. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/types/record.rs +0 -0
  1084. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/types/variant.rs +0 -0
  1085. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/wasmtime.rs +0 -0
  1086. /data/ext/cargo-vendor/{wiggle-macro-16.0.0 → wiggle-macro-17.0.0}/LICENSE +0 -0
  1087. /data/ext/cargo-vendor/{wiggle-macro-16.0.0 → wiggle-macro-17.0.0}/src/lib.rs +0 -0
  1088. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/LICENSE +0 -0
  1089. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/build.rs +0 -0
  1090. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/abi/local.rs +0 -0
  1091. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/abi/mod.rs +0 -0
  1092. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/codegen/builtin.rs +0 -0
  1093. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/codegen/call.rs +0 -0
  1094. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/codegen/control.rs +0 -0
  1095. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/codegen/mod.rs +0 -0
  1096. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/frame/mod.rs +0 -0
  1097. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/aarch64/abi.rs +0 -0
  1098. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/aarch64/address.rs +0 -0
  1099. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/aarch64/asm.rs +0 -0
  1100. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/aarch64/mod.rs +0 -0
  1101. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/aarch64/regs.rs +0 -0
  1102. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/mod.rs +0 -0
  1103. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/reg.rs +0 -0
  1104. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/x64/abi.rs +0 -0
  1105. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/x64/address.rs +0 -0
  1106. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/x64/mod.rs +0 -0
  1107. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/x64/regs.rs +0 -0
  1108. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/lib.rs +0 -0
  1109. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/regalloc.rs +0 -0
  1110. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/regset.rs +0 -0
  1111. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/trampoline.rs +0 -0
@@ -1,1300 +0,0 @@
1
- //! Implementation of the standard x64 ABI.
2
-
3
- use crate::ir::{self, types, LibCall, MemFlags, Opcode, Signature, TrapCode, Type};
4
- use crate::ir::{types::*, ExternalName};
5
- use crate::isa;
6
- use crate::isa::{unwind::UnwindInst, x64::inst::*, x64::settings as x64_settings, CallConv};
7
- use crate::machinst::abi::*;
8
- use crate::machinst::*;
9
- use crate::settings;
10
- use crate::{CodegenError, CodegenResult};
11
- use alloc::boxed::Box;
12
- use alloc::vec::Vec;
13
- use args::*;
14
- use regalloc2::{MachineEnv, PReg, PRegSet, VReg};
15
- use smallvec::{smallvec, SmallVec};
16
- use std::convert::TryFrom;
17
- use std::sync::OnceLock;
18
-
19
- /// This is the limit for the size of argument and return-value areas on the
20
- /// stack. We place a reasonable limit here to avoid integer overflow issues
21
- /// with 32-bit arithmetic: for now, 128 MB.
22
- static STACK_ARG_RET_SIZE_LIMIT: u32 = 128 * 1024 * 1024;
23
-
24
- /// Support for the x64 ABI from the callee side (within a function body).
25
- pub(crate) type X64Callee = Callee<X64ABIMachineSpec>;
26
-
27
- /// Support for the x64 ABI from the caller side (at a callsite).
28
- pub(crate) type X64CallSite = CallSite<X64ABIMachineSpec>;
29
-
30
- /// Implementation of ABI primitives for x64.
31
- pub struct X64ABIMachineSpec;
32
-
33
- impl X64ABIMachineSpec {
34
- fn gen_probestack_unroll(insts: &mut SmallInstVec<Inst>, guard_size: u32, probe_count: u32) {
35
- insts.reserve(probe_count as usize);
36
- for _ in 0..probe_count {
37
- // "Allocate" stack space for the probe by decrementing the stack pointer before
38
- // the write. This is required to make valgrind happy.
39
- // See: https://github.com/bytecodealliance/wasmtime/issues/7454
40
- insts.extend(Self::gen_sp_reg_adjust(-(guard_size as i32)));
41
-
42
- // TODO: It would be nice if we could store the imm 0, but we don't have insts for those
43
- // so store the stack pointer. Any register will do, since the stack is undefined at this point
44
- insts.push(Self::gen_store_stack(
45
- StackAMode::SPOffset(0, I8),
46
- regs::rsp(),
47
- I32,
48
- ));
49
- }
50
-
51
- // Restore the stack pointer to its original value
52
- insts.extend(Self::gen_sp_reg_adjust((guard_size * probe_count) as i32));
53
- }
54
-
55
- fn gen_probestack_loop(
56
- insts: &mut SmallInstVec<Inst>,
57
- call_conv: isa::CallConv,
58
- frame_size: u32,
59
- guard_size: u32,
60
- ) {
61
- // We have to use a caller-saved register since clobbering only
62
- // happens after stack probing.
63
- let tmp = match call_conv {
64
- // All registers are caller-saved on the `tail` calling convention,
65
- // and `r15` is not used to pass arguments.
66
- isa::CallConv::Tail => regs::r15(),
67
- // `r11` is caller saved on both Fastcall and SystemV, and not used
68
- // for argument passing, so it's pretty much free. It is also not
69
- // used by the stacklimit mechanism.
70
- _ => {
71
- let tmp = regs::r11();
72
- debug_assert!({
73
- let real_reg = tmp.to_real_reg().unwrap();
74
- !is_callee_save_systemv(real_reg, false)
75
- && !is_callee_save_fastcall(real_reg, false)
76
- });
77
- tmp
78
- }
79
- };
80
-
81
- insts.push(Inst::StackProbeLoop {
82
- tmp: Writable::from_reg(tmp),
83
- frame_size,
84
- guard_size,
85
- });
86
- }
87
- }
88
-
89
- impl IsaFlags for x64_settings::Flags {}
90
-
91
- impl ABIMachineSpec for X64ABIMachineSpec {
92
- type I = Inst;
93
-
94
- type F = x64_settings::Flags;
95
-
96
- fn word_bits() -> u32 {
97
- 64
98
- }
99
-
100
- /// Return required stack alignment in bytes.
101
- fn stack_align(_call_conv: isa::CallConv) -> u32 {
102
- 16
103
- }
104
-
105
- fn compute_arg_locs<'a, I>(
106
- call_conv: isa::CallConv,
107
- flags: &settings::Flags,
108
- params: I,
109
- args_or_rets: ArgsOrRets,
110
- add_ret_area_ptr: bool,
111
- mut args: ArgsAccumulator<'_>,
112
- ) -> CodegenResult<(u32, Option<usize>)>
113
- where
114
- I: IntoIterator<Item = &'a ir::AbiParam>,
115
- {
116
- let is_fastcall = call_conv.extends_windows_fastcall();
117
-
118
- let mut next_gpr = 0;
119
- let mut next_vreg = 0;
120
- let mut next_stack: u32 = 0;
121
- let mut next_param_idx = 0; // Fastcall cares about overall param index
122
-
123
- if args_or_rets == ArgsOrRets::Args && is_fastcall {
124
- // Fastcall always reserves 32 bytes of shadow space corresponding to
125
- // the four initial in-arg parameters.
126
- //
127
- // (See:
128
- // https://docs.microsoft.com/en-us/cpp/build/x64-calling-convention?view=msvc-160)
129
- next_stack = 32;
130
- }
131
-
132
- for param in params {
133
- if let ir::ArgumentPurpose::StructArgument(size) = param.purpose {
134
- let offset = next_stack as i64;
135
- let size = size;
136
- assert!(size % 8 == 0, "StructArgument size is not properly aligned");
137
- next_stack += size;
138
- args.push(ABIArg::StructArg {
139
- pointer: None,
140
- offset,
141
- size: size as u64,
142
- purpose: param.purpose,
143
- });
144
- continue;
145
- }
146
-
147
- // Find regclass(es) of the register(s) used to store a value of this type.
148
- let (rcs, reg_tys) = Inst::rc_for_type(param.value_type)?;
149
-
150
- // Now assign ABIArgSlots for each register-sized part.
151
- //
152
- // Note that the handling of `i128` values is unique here:
153
- //
154
- // - If `enable_llvm_abi_extensions` is set in the flags, each
155
- // `i128` is split into two `i64`s and assigned exactly as if it
156
- // were two consecutive 64-bit args. This is consistent with LLVM's
157
- // behavior, and is needed for some uses of Cranelift (e.g., the
158
- // rustc backend).
159
- //
160
- // - Otherwise, both SysV and Fastcall specify behavior (use of
161
- // vector register, a register pair, or passing by reference
162
- // depending on the case), but for simplicity, we will just panic if
163
- // an i128 type appears in a signature and the LLVM extensions flag
164
- // is not set.
165
- //
166
- // For examples of how rustc compiles i128 args and return values on
167
- // both SysV and Fastcall platforms, see:
168
- // https://godbolt.org/z/PhG3ob
169
-
170
- if param.value_type.bits() > 64
171
- && !param.value_type.is_vector()
172
- && !flags.enable_llvm_abi_extensions()
173
- {
174
- panic!(
175
- "i128 args/return values not supported unless LLVM ABI extensions are enabled"
176
- );
177
- }
178
-
179
- // Windows fastcall dictates that `__m128i` paramters to a function
180
- // are passed indirectly as pointers, so handle that as a special
181
- // case before the loop below.
182
- if param.value_type.is_vector()
183
- && param.value_type.bits() >= 128
184
- && args_or_rets == ArgsOrRets::Args
185
- && is_fastcall
186
- {
187
- let pointer = match get_intreg_for_arg(&call_conv, next_gpr, next_param_idx) {
188
- Some(reg) => {
189
- next_gpr += 1;
190
- ABIArgSlot::Reg {
191
- reg: reg.to_real_reg().unwrap(),
192
- ty: ir::types::I64,
193
- extension: ir::ArgumentExtension::None,
194
- }
195
- }
196
-
197
- None => {
198
- next_stack = align_to(next_stack, 8) + 8;
199
- ABIArgSlot::Stack {
200
- offset: (next_stack - 8) as i64,
201
- ty: ir::types::I64,
202
- extension: param.extension,
203
- }
204
- }
205
- };
206
- next_param_idx += 1;
207
- args.push(ABIArg::ImplicitPtrArg {
208
- // NB: this is filled in after this loop
209
- offset: 0,
210
- pointer,
211
- ty: param.value_type,
212
- purpose: param.purpose,
213
- });
214
- continue;
215
- }
216
-
217
- let mut slots = ABIArgSlotVec::new();
218
- for (rc, reg_ty) in rcs.iter().zip(reg_tys.iter()) {
219
- let intreg = *rc == RegClass::Int;
220
- let nextreg = if intreg {
221
- match args_or_rets {
222
- ArgsOrRets::Args => {
223
- get_intreg_for_arg(&call_conv, next_gpr, next_param_idx)
224
- }
225
- ArgsOrRets::Rets => get_intreg_for_retval(&call_conv, next_gpr),
226
- }
227
- } else {
228
- match args_or_rets {
229
- ArgsOrRets::Args => {
230
- get_fltreg_for_arg(&call_conv, next_vreg, next_param_idx)
231
- }
232
- ArgsOrRets::Rets => get_fltreg_for_retval(&call_conv, next_vreg),
233
- }
234
- };
235
- next_param_idx += 1;
236
- if let Some(reg) = nextreg {
237
- if intreg {
238
- next_gpr += 1;
239
- } else {
240
- next_vreg += 1;
241
- }
242
- slots.push(ABIArgSlot::Reg {
243
- reg: reg.to_real_reg().unwrap(),
244
- ty: *reg_ty,
245
- extension: param.extension,
246
- });
247
- } else {
248
- let size = reg_ty.bits() / 8;
249
- let size = std::cmp::max(size, 8);
250
- // Align.
251
- debug_assert!(size.is_power_of_two());
252
- next_stack = align_to(next_stack, size);
253
- slots.push(ABIArgSlot::Stack {
254
- offset: next_stack as i64,
255
- ty: *reg_ty,
256
- extension: param.extension,
257
- });
258
- next_stack += size;
259
- }
260
- }
261
-
262
- args.push(ABIArg::Slots {
263
- slots,
264
- purpose: param.purpose,
265
- });
266
- }
267
-
268
- // Fastcall's indirect 128+ bit vector arguments are all located on the
269
- // stack, and stack space is reserved after all paramters are passed,
270
- // so allocate from the space now.
271
- if args_or_rets == ArgsOrRets::Args && is_fastcall {
272
- for arg in args.args_mut() {
273
- if let ABIArg::ImplicitPtrArg { offset, .. } = arg {
274
- assert_eq!(*offset, 0);
275
- next_stack = align_to(next_stack, 16);
276
- *offset = next_stack as i64;
277
- next_stack += 16;
278
- }
279
- }
280
- }
281
-
282
- let extra_arg = if add_ret_area_ptr {
283
- debug_assert!(args_or_rets == ArgsOrRets::Args);
284
- if let Some(reg) = get_intreg_for_arg(&call_conv, next_gpr, next_param_idx) {
285
- args.push_non_formal(ABIArg::reg(
286
- reg.to_real_reg().unwrap(),
287
- types::I64,
288
- ir::ArgumentExtension::None,
289
- ir::ArgumentPurpose::Normal,
290
- ));
291
- } else {
292
- args.push_non_formal(ABIArg::stack(
293
- next_stack as i64,
294
- types::I64,
295
- ir::ArgumentExtension::None,
296
- ir::ArgumentPurpose::Normal,
297
- ));
298
- next_stack += 8;
299
- }
300
- Some(args.args().len() - 1)
301
- } else {
302
- None
303
- };
304
-
305
- next_stack = align_to(next_stack, 16);
306
-
307
- // To avoid overflow issues, limit the arg/return size to something reasonable.
308
- if next_stack > STACK_ARG_RET_SIZE_LIMIT {
309
- return Err(CodegenError::ImplLimitExceeded);
310
- }
311
-
312
- Ok((next_stack, extra_arg))
313
- }
314
-
315
- fn fp_to_arg_offset(_call_conv: isa::CallConv, _flags: &settings::Flags) -> i64 {
316
- 16 // frame pointer + return address.
317
- }
318
-
319
- fn gen_load_stack(mem: StackAMode, into_reg: Writable<Reg>, ty: Type) -> Self::I {
320
- // For integer-typed values, we always load a full 64 bits (and we always spill a full 64
321
- // bits as well -- see `Inst::store()`).
322
- let ty = match ty {
323
- types::I8 | types::I16 | types::I32 => types::I64,
324
- _ => ty,
325
- };
326
- Inst::load(ty, mem, into_reg, ExtKind::None)
327
- }
328
-
329
- fn gen_store_stack(mem: StackAMode, from_reg: Reg, ty: Type) -> Self::I {
330
- Inst::store(ty, from_reg, mem)
331
- }
332
-
333
- fn gen_move(to_reg: Writable<Reg>, from_reg: Reg, ty: Type) -> Self::I {
334
- Inst::gen_move(to_reg, from_reg, ty)
335
- }
336
-
337
- /// Generate an integer-extend operation.
338
- fn gen_extend(
339
- to_reg: Writable<Reg>,
340
- from_reg: Reg,
341
- is_signed: bool,
342
- from_bits: u8,
343
- to_bits: u8,
344
- ) -> Self::I {
345
- let ext_mode = ExtMode::new(from_bits as u16, to_bits as u16)
346
- .unwrap_or_else(|| panic!("invalid extension: {} -> {}", from_bits, to_bits));
347
- if is_signed {
348
- Inst::movsx_rm_r(ext_mode, RegMem::reg(from_reg), to_reg)
349
- } else {
350
- Inst::movzx_rm_r(ext_mode, RegMem::reg(from_reg), to_reg)
351
- }
352
- }
353
-
354
- fn gen_args(args: Vec<ArgPair>) -> Inst {
355
- Inst::Args { args }
356
- }
357
-
358
- fn gen_rets(rets: Vec<RetPair>) -> Inst {
359
- Inst::Rets { rets }
360
- }
361
-
362
- fn gen_add_imm(
363
- _call_conv: isa::CallConv,
364
- into_reg: Writable<Reg>,
365
- from_reg: Reg,
366
- imm: u32,
367
- ) -> SmallInstVec<Self::I> {
368
- let mut ret = SmallVec::new();
369
- if from_reg != into_reg.to_reg() {
370
- ret.push(Inst::gen_move(into_reg, from_reg, I64));
371
- }
372
- ret.push(Inst::alu_rmi_r(
373
- OperandSize::Size64,
374
- AluRmiROpcode::Add,
375
- RegMemImm::imm(imm),
376
- into_reg,
377
- ));
378
- ret
379
- }
380
-
381
- fn gen_stack_lower_bound_trap(limit_reg: Reg) -> SmallInstVec<Self::I> {
382
- smallvec![
383
- Inst::cmp_rmi_r(OperandSize::Size64, RegMemImm::reg(regs::rsp()), limit_reg),
384
- Inst::TrapIf {
385
- // NBE == "> unsigned"; args above are reversed; this tests limit_reg > rsp.
386
- cc: CC::NBE,
387
- trap_code: TrapCode::StackOverflow,
388
- },
389
- ]
390
- }
391
-
392
- fn gen_get_stack_addr(mem: StackAMode, into_reg: Writable<Reg>, _ty: Type) -> Self::I {
393
- let mem: SyntheticAmode = mem.into();
394
- Inst::lea(mem, into_reg)
395
- }
396
-
397
- fn get_stacklimit_reg(call_conv: isa::CallConv) -> Reg {
398
- // As per comment on trait definition, we must return a caller-save
399
- // register that is not used as an argument here.
400
- match call_conv {
401
- isa::CallConv::Tail => regs::r14(),
402
- _ => {
403
- debug_assert!(!is_callee_save_systemv(
404
- regs::r10().to_real_reg().unwrap(),
405
- false
406
- ));
407
- regs::r10()
408
- }
409
- }
410
- }
411
-
412
- fn gen_load_base_offset(into_reg: Writable<Reg>, base: Reg, offset: i32, ty: Type) -> Self::I {
413
- // Only ever used for I64s and vectors; if that changes, see if the
414
- // ExtKind below needs to be changed.
415
- assert!(ty == I64 || ty.is_vector());
416
- let mem = Amode::imm_reg(offset, base);
417
- Inst::load(ty, mem, into_reg, ExtKind::None)
418
- }
419
-
420
- fn gen_store_base_offset(base: Reg, offset: i32, from_reg: Reg, ty: Type) -> Self::I {
421
- let mem = Amode::imm_reg(offset, base);
422
- Inst::store(ty, from_reg, mem)
423
- }
424
-
425
- fn gen_sp_reg_adjust(amount: i32) -> SmallInstVec<Self::I> {
426
- let (alu_op, amount) = if amount >= 0 {
427
- (AluRmiROpcode::Add, amount)
428
- } else {
429
- (AluRmiROpcode::Sub, -amount)
430
- };
431
-
432
- let amount = amount as u32;
433
-
434
- smallvec![Inst::alu_rmi_r(
435
- OperandSize::Size64,
436
- alu_op,
437
- RegMemImm::imm(amount),
438
- Writable::from_reg(regs::rsp()),
439
- )]
440
- }
441
-
442
- fn gen_nominal_sp_adj(offset: i32) -> Self::I {
443
- Inst::VirtualSPOffsetAdj {
444
- offset: offset as i64,
445
- }
446
- }
447
-
448
- fn gen_prologue_frame_setup(
449
- _call_conv: isa::CallConv,
450
- flags: &settings::Flags,
451
- _isa_flags: &x64_settings::Flags,
452
- frame_layout: &FrameLayout,
453
- ) -> SmallInstVec<Self::I> {
454
- let r_rsp = regs::rsp();
455
- let r_rbp = regs::rbp();
456
- let w_rbp = Writable::from_reg(r_rbp);
457
- let mut insts = SmallVec::new();
458
- // `push %rbp`
459
- // RSP before the call will be 0 % 16. So here, it is 8 % 16.
460
- insts.push(Inst::push64(RegMemImm::reg(r_rbp)));
461
-
462
- if flags.unwind_info() {
463
- insts.push(Inst::Unwind {
464
- inst: UnwindInst::PushFrameRegs {
465
- offset_upward_to_caller_sp: frame_layout.setup_area_size,
466
- },
467
- });
468
- }
469
-
470
- // `mov %rsp, %rbp`
471
- // RSP is now 0 % 16
472
- insts.push(Inst::mov_r_r(OperandSize::Size64, r_rsp, w_rbp));
473
-
474
- insts
475
- }
476
-
477
- fn gen_epilogue_frame_restore(
478
- call_conv: isa::CallConv,
479
- _flags: &settings::Flags,
480
- _isa_flags: &x64_settings::Flags,
481
- frame_layout: &FrameLayout,
482
- ) -> SmallInstVec<Self::I> {
483
- let mut insts = SmallVec::new();
484
- // `mov %rbp, %rsp`
485
- insts.push(Inst::mov_r_r(
486
- OperandSize::Size64,
487
- regs::rbp(),
488
- Writable::from_reg(regs::rsp()),
489
- ));
490
- // `pop %rbp`
491
- insts.push(Inst::pop64(Writable::from_reg(regs::rbp())));
492
- // Emit return instruction.
493
- let stack_bytes_to_pop = if call_conv == isa::CallConv::Tail {
494
- frame_layout.stack_args_size
495
- } else {
496
- 0
497
- };
498
- insts.push(Inst::ret(stack_bytes_to_pop));
499
- insts
500
- }
501
-
502
- fn gen_probestack(insts: &mut SmallInstVec<Self::I>, frame_size: u32) {
503
- insts.push(Inst::imm(
504
- OperandSize::Size32,
505
- frame_size as u64,
506
- Writable::from_reg(regs::rax()),
507
- ));
508
- insts.push(Inst::CallKnown {
509
- dest: ExternalName::LibCall(LibCall::Probestack),
510
- info: Box::new(CallInfo {
511
- // No need to include arg here: we are post-regalloc
512
- // so no constraints will be seen anyway.
513
- uses: smallvec![],
514
- defs: smallvec![],
515
- clobbers: PRegSet::empty(),
516
- opcode: Opcode::Call,
517
- callee_pop_size: 0,
518
- callee_conv: CallConv::Probestack,
519
- }),
520
- });
521
- }
522
-
523
- fn gen_inline_probestack(
524
- insts: &mut SmallInstVec<Self::I>,
525
- call_conv: isa::CallConv,
526
- frame_size: u32,
527
- guard_size: u32,
528
- ) {
529
- // Unroll at most n consecutive probes, before falling back to using a loop
530
- //
531
- // This was number was picked because the loop version is 38 bytes long. We can fit
532
- // 4 inline probes in that space, so unroll if its beneficial in terms of code size.
533
- const PROBE_MAX_UNROLL: u32 = 4;
534
-
535
- // Number of probes that we need to perform
536
- let probe_count = align_to(frame_size, guard_size) / guard_size;
537
-
538
- if probe_count <= PROBE_MAX_UNROLL {
539
- Self::gen_probestack_unroll(insts, guard_size, probe_count)
540
- } else {
541
- Self::gen_probestack_loop(insts, call_conv, frame_size, guard_size)
542
- }
543
- }
544
-
545
- fn gen_clobber_save(
546
- call_conv: isa::CallConv,
547
- flags: &settings::Flags,
548
- frame_layout: &FrameLayout,
549
- ) -> SmallVec<[Self::I; 16]> {
550
- if call_conv == isa::CallConv::Tail {
551
- assert!(frame_layout.clobbered_callee_saves.is_empty());
552
- }
553
-
554
- let mut insts = SmallVec::new();
555
-
556
- if flags.unwind_info() && frame_layout.setup_area_size > 0 {
557
- // Emit unwind info: start the frame. The frame (from unwind
558
- // consumers' point of view) starts at clobbbers, just below
559
- // the FP and return address. Spill slots and stack slots are
560
- // part of our actual frame but do not concern the unwinder.
561
- insts.push(Inst::Unwind {
562
- inst: UnwindInst::DefineNewFrame {
563
- offset_downward_to_clobbers: frame_layout.clobber_size,
564
- offset_upward_to_caller_sp: frame_layout.setup_area_size,
565
- },
566
- });
567
- }
568
-
569
- // Adjust the stack pointer downward for clobbers and the function fixed
570
- // frame (spillslots and storage slots).
571
- let stack_size = frame_layout.fixed_frame_storage_size + frame_layout.clobber_size;
572
- if stack_size > 0 {
573
- insts.push(Inst::alu_rmi_r(
574
- OperandSize::Size64,
575
- AluRmiROpcode::Sub,
576
- RegMemImm::imm(stack_size),
577
- Writable::from_reg(regs::rsp()),
578
- ));
579
- }
580
- // Store each clobbered register in order at offsets from RSP,
581
- // placing them above the fixed frame slots.
582
- let mut cur_offset = frame_layout.fixed_frame_storage_size;
583
- for reg in &frame_layout.clobbered_callee_saves {
584
- let r_reg = reg.to_reg();
585
- let off = cur_offset;
586
- match r_reg.class() {
587
- RegClass::Int => {
588
- insts.push(Inst::store(
589
- types::I64,
590
- r_reg.into(),
591
- Amode::imm_reg(cur_offset.try_into().unwrap(), regs::rsp()),
592
- ));
593
- cur_offset += 8;
594
- }
595
- RegClass::Float => {
596
- cur_offset = align_to(cur_offset, 16);
597
- insts.push(Inst::store(
598
- types::I8X16,
599
- r_reg.into(),
600
- Amode::imm_reg(cur_offset.try_into().unwrap(), regs::rsp()),
601
- ));
602
- cur_offset += 16;
603
- }
604
- RegClass::Vector => unreachable!(),
605
- };
606
- if flags.unwind_info() {
607
- insts.push(Inst::Unwind {
608
- inst: UnwindInst::SaveReg {
609
- clobber_offset: off - frame_layout.fixed_frame_storage_size,
610
- reg: r_reg,
611
- },
612
- });
613
- }
614
- }
615
-
616
- insts
617
- }
618
-
619
- fn gen_clobber_restore(
620
- _call_conv: isa::CallConv,
621
- _flags: &settings::Flags,
622
- frame_layout: &FrameLayout,
623
- ) -> SmallVec<[Self::I; 16]> {
624
- let mut insts = SmallVec::new();
625
-
626
- let stack_size = frame_layout.fixed_frame_storage_size + frame_layout.clobber_size;
627
-
628
- // Restore regs by loading from offsets of RSP. RSP will be
629
- // returned to nominal-RSP at this point, so we can use the
630
- // same offsets that we used when saving clobbers above.
631
- let mut cur_offset = frame_layout.fixed_frame_storage_size;
632
- for reg in &frame_layout.clobbered_callee_saves {
633
- let rreg = reg.to_reg();
634
- match rreg.class() {
635
- RegClass::Int => {
636
- insts.push(Inst::mov64_m_r(
637
- Amode::imm_reg(cur_offset.try_into().unwrap(), regs::rsp()),
638
- Writable::from_reg(rreg.into()),
639
- ));
640
- cur_offset += 8;
641
- }
642
- RegClass::Float => {
643
- cur_offset = align_to(cur_offset, 16);
644
- insts.push(Inst::load(
645
- types::I8X16,
646
- Amode::imm_reg(cur_offset.try_into().unwrap(), regs::rsp()),
647
- Writable::from_reg(rreg.into()),
648
- ExtKind::None,
649
- ));
650
- cur_offset += 16;
651
- }
652
- RegClass::Vector => unreachable!(),
653
- }
654
- }
655
- // Adjust RSP back upward.
656
- if stack_size > 0 {
657
- insts.push(Inst::alu_rmi_r(
658
- OperandSize::Size64,
659
- AluRmiROpcode::Add,
660
- RegMemImm::imm(stack_size),
661
- Writable::from_reg(regs::rsp()),
662
- ));
663
- }
664
-
665
- insts
666
- }
667
-
668
- /// Generate a call instruction/sequence.
669
- fn gen_call(
670
- dest: &CallDest,
671
- uses: CallArgList,
672
- defs: CallRetList,
673
- clobbers: PRegSet,
674
- opcode: ir::Opcode,
675
- tmp: Writable<Reg>,
676
- callee_conv: isa::CallConv,
677
- _caller_conv: isa::CallConv,
678
- callee_pop_size: u32,
679
- ) -> SmallVec<[Self::I; 2]> {
680
- let mut insts = SmallVec::new();
681
- match dest {
682
- &CallDest::ExtName(ref name, RelocDistance::Near) => {
683
- insts.push(Inst::call_known(
684
- name.clone(),
685
- uses,
686
- defs,
687
- clobbers,
688
- opcode,
689
- callee_pop_size,
690
- callee_conv,
691
- ));
692
- }
693
- &CallDest::ExtName(ref name, RelocDistance::Far) => {
694
- insts.push(Inst::LoadExtName {
695
- dst: tmp,
696
- name: Box::new(name.clone()),
697
- offset: 0,
698
- distance: RelocDistance::Far,
699
- });
700
- insts.push(Inst::call_unknown(
701
- RegMem::reg(tmp.to_reg()),
702
- uses,
703
- defs,
704
- clobbers,
705
- opcode,
706
- callee_pop_size,
707
- callee_conv,
708
- ));
709
- }
710
- &CallDest::Reg(reg) => {
711
- insts.push(Inst::call_unknown(
712
- RegMem::reg(reg),
713
- uses,
714
- defs,
715
- clobbers,
716
- opcode,
717
- callee_pop_size,
718
- callee_conv,
719
- ));
720
- }
721
- }
722
- insts
723
- }
724
-
725
- fn gen_memcpy<F: FnMut(Type) -> Writable<Reg>>(
726
- call_conv: isa::CallConv,
727
- dst: Reg,
728
- src: Reg,
729
- size: usize,
730
- mut alloc_tmp: F,
731
- ) -> SmallVec<[Self::I; 8]> {
732
- let mut insts = SmallVec::new();
733
- let arg0 = get_intreg_for_arg(&call_conv, 0, 0).unwrap();
734
- let arg1 = get_intreg_for_arg(&call_conv, 1, 1).unwrap();
735
- let arg2 = get_intreg_for_arg(&call_conv, 2, 2).unwrap();
736
- let temp = alloc_tmp(Self::word_type());
737
- let temp2 = alloc_tmp(Self::word_type());
738
- insts.push(Inst::imm(OperandSize::Size64, size as u64, temp));
739
- // We use an indirect call and a full LoadExtName because we do not have
740
- // information about the libcall `RelocDistance` here, so we
741
- // conservatively use the more flexible calling sequence.
742
- insts.push(Inst::LoadExtName {
743
- dst: temp2,
744
- name: Box::new(ExternalName::LibCall(LibCall::Memcpy)),
745
- offset: 0,
746
- distance: RelocDistance::Far,
747
- });
748
- let callee_pop_size = 0;
749
- insts.push(Inst::call_unknown(
750
- RegMem::reg(temp2.to_reg()),
751
- /* uses = */
752
- smallvec![
753
- CallArgPair {
754
- vreg: dst,
755
- preg: arg0
756
- },
757
- CallArgPair {
758
- vreg: src,
759
- preg: arg1
760
- },
761
- CallArgPair {
762
- vreg: temp.to_reg(),
763
- preg: arg2
764
- },
765
- ],
766
- /* defs = */ smallvec![],
767
- /* clobbers = */ Self::get_regs_clobbered_by_call(call_conv),
768
- Opcode::Call,
769
- callee_pop_size,
770
- call_conv,
771
- ));
772
- insts
773
- }
774
-
775
- fn get_number_of_spillslots_for_value(
776
- rc: RegClass,
777
- vector_scale: u32,
778
- _isa_flags: &Self::F,
779
- ) -> u32 {
780
- // We allocate in terms of 8-byte slots.
781
- match rc {
782
- RegClass::Int => 1,
783
- RegClass::Float => vector_scale / 8,
784
- RegClass::Vector => unreachable!(),
785
- }
786
- }
787
-
788
- fn get_virtual_sp_offset_from_state(s: &<Self::I as MachInstEmit>::State) -> i64 {
789
- s.virtual_sp_offset()
790
- }
791
-
792
- fn get_nominal_sp_to_fp(s: &<Self::I as MachInstEmit>::State) -> i64 {
793
- s.nominal_sp_to_fp()
794
- }
795
-
796
- fn get_machine_env(flags: &settings::Flags, _call_conv: isa::CallConv) -> &MachineEnv {
797
- if flags.enable_pinned_reg() {
798
- static MACHINE_ENV: OnceLock<MachineEnv> = OnceLock::new();
799
- MACHINE_ENV.get_or_init(|| create_reg_env_systemv(true))
800
- } else {
801
- static MACHINE_ENV: OnceLock<MachineEnv> = OnceLock::new();
802
- MACHINE_ENV.get_or_init(|| create_reg_env_systemv(false))
803
- }
804
- }
805
-
806
- fn get_regs_clobbered_by_call(call_conv_of_callee: isa::CallConv) -> PRegSet {
807
- if call_conv_of_callee == isa::CallConv::Tail {
808
- TAIL_CLOBBERS
809
- } else if call_conv_of_callee.extends_windows_fastcall() {
810
- WINDOWS_CLOBBERS
811
- } else {
812
- SYSV_CLOBBERS
813
- }
814
- }
815
-
816
- fn get_ext_mode(
817
- _call_conv: isa::CallConv,
818
- specified: ir::ArgumentExtension,
819
- ) -> ir::ArgumentExtension {
820
- specified
821
- }
822
-
823
- fn compute_frame_layout(
824
- call_conv: CallConv,
825
- flags: &settings::Flags,
826
- _sig: &Signature,
827
- regs: &[Writable<RealReg>],
828
- _is_leaf: bool,
829
- stack_args_size: u32,
830
- fixed_frame_storage_size: u32,
831
- outgoing_args_size: u32,
832
- ) -> FrameLayout {
833
- let mut regs: Vec<Writable<RealReg>> = match call_conv {
834
- // The `tail` calling convention doesn't have any callee-save
835
- // registers.
836
- CallConv::Tail => vec![],
837
- CallConv::Fast | CallConv::Cold | CallConv::SystemV => regs
838
- .iter()
839
- .cloned()
840
- .filter(|r| is_callee_save_systemv(r.to_reg(), flags.enable_pinned_reg()))
841
- .collect(),
842
- CallConv::WindowsFastcall => regs
843
- .iter()
844
- .cloned()
845
- .filter(|r| is_callee_save_fastcall(r.to_reg(), flags.enable_pinned_reg()))
846
- .collect(),
847
- CallConv::Probestack => todo!("probestack?"),
848
- CallConv::WasmtimeSystemV | CallConv::AppleAarch64 => unreachable!(),
849
- };
850
- // Sort registers for deterministic code output. We can do an unstable sort because the
851
- // registers will be unique (there are no dups).
852
- regs.sort_unstable_by_key(|r| VReg::from(r.to_reg()).vreg());
853
-
854
- // Compute clobber size.
855
- let clobber_size = compute_clobber_size(&regs);
856
-
857
- // Compute setup area size.
858
- let setup_area_size = 16; // RBP, return address
859
-
860
- // Return FrameLayout structure.
861
- debug_assert!(outgoing_args_size == 0);
862
- FrameLayout {
863
- stack_args_size,
864
- setup_area_size,
865
- clobber_size,
866
- fixed_frame_storage_size,
867
- outgoing_args_size,
868
- clobbered_callee_saves: regs,
869
- }
870
- }
871
- }
872
-
873
- impl X64CallSite {
874
- pub fn emit_return_call(mut self, ctx: &mut Lower<Inst>, args: isle::ValueSlice) {
875
- let (new_stack_arg_size, old_stack_arg_size) =
876
- self.emit_temporary_tail_call_frame(ctx, args);
877
-
878
- // Make a copy of the frame pointer, since we use it when copying down
879
- // the new stack frame.
880
- let fp = ctx.temp_writable_gpr();
881
- let rbp = PReg::from(regs::rbp().to_real_reg().unwrap());
882
- ctx.emit(Inst::MovFromPReg { src: rbp, dst: fp });
883
-
884
- // Load the return address, because copying our new stack frame
885
- // over our current stack frame might overwrite it, and we'll need to
886
- // place it in the correct location after we do that copy.
887
- //
888
- // But we only need to actually move the return address if the size of
889
- // stack arguments changes.
890
- let ret_addr = if new_stack_arg_size != old_stack_arg_size {
891
- let ret_addr = ctx.temp_writable_gpr();
892
- ctx.emit(Inst::Mov64MR {
893
- src: SyntheticAmode::Real(Amode::ImmReg {
894
- simm32: 8,
895
- base: *fp.to_reg(),
896
- flags: MemFlags::trusted(),
897
- }),
898
- dst: ret_addr,
899
- });
900
- Some(ret_addr.to_reg())
901
- } else {
902
- None
903
- };
904
-
905
- // Finally, emit the macro instruction to copy the new stack frame over
906
- // our current one and do the actual tail call!
907
-
908
- let dest = self.dest().clone();
909
- let info = Box::new(ReturnCallInfo {
910
- new_stack_arg_size,
911
- old_stack_arg_size,
912
- ret_addr,
913
- fp: fp.to_reg(),
914
- tmp: ctx.temp_writable_gpr(),
915
- uses: self.take_uses(),
916
- });
917
- match dest {
918
- CallDest::ExtName(callee, RelocDistance::Near) => {
919
- ctx.emit(Inst::ReturnCallKnown { callee, info });
920
- }
921
- CallDest::ExtName(callee, RelocDistance::Far) => {
922
- let tmp2 = ctx.temp_writable_gpr();
923
- ctx.emit(Inst::LoadExtName {
924
- dst: tmp2.to_writable_reg(),
925
- name: Box::new(callee),
926
- offset: 0,
927
- distance: RelocDistance::Far,
928
- });
929
- ctx.emit(Inst::ReturnCallUnknown {
930
- callee: tmp2.to_writable_reg().into(),
931
- info,
932
- });
933
- }
934
- CallDest::Reg(callee) => ctx.emit(Inst::ReturnCallUnknown {
935
- callee: callee.into(),
936
- info,
937
- }),
938
- }
939
- }
940
- }
941
-
942
- impl From<StackAMode> for SyntheticAmode {
943
- fn from(amode: StackAMode) -> Self {
944
- // We enforce a 128 MB stack-frame size limit above, so these
945
- // `expect()`s should never fail.
946
- match amode {
947
- StackAMode::FPOffset(off, _ty) => {
948
- let off = i32::try_from(off)
949
- .expect("Offset in FPOffset is greater than 2GB; should hit impl limit first");
950
- SyntheticAmode::Real(Amode::ImmReg {
951
- simm32: off,
952
- base: regs::rbp(),
953
- flags: MemFlags::trusted(),
954
- })
955
- }
956
- StackAMode::NominalSPOffset(off, _ty) => {
957
- let off = i32::try_from(off).expect(
958
- "Offset in NominalSPOffset is greater than 2GB; should hit impl limit first",
959
- );
960
- SyntheticAmode::nominal_sp_offset(off)
961
- }
962
- StackAMode::SPOffset(off, _ty) => {
963
- let off = i32::try_from(off)
964
- .expect("Offset in SPOffset is greater than 2GB; should hit impl limit first");
965
- SyntheticAmode::Real(Amode::ImmReg {
966
- simm32: off,
967
- base: regs::rsp(),
968
- flags: MemFlags::trusted(),
969
- })
970
- }
971
- }
972
- }
973
- }
974
-
975
- fn get_intreg_for_arg(call_conv: &CallConv, idx: usize, arg_idx: usize) -> Option<Reg> {
976
- let is_fastcall = call_conv.extends_windows_fastcall();
977
-
978
- if *call_conv == isa::CallConv::Tail {
979
- return match idx {
980
- 0 => Some(regs::rax()),
981
- 1 => Some(regs::rcx()),
982
- 2 => Some(regs::rdx()),
983
- 3 => Some(regs::rbx()),
984
- 4 => Some(regs::rsi()),
985
- 5 => Some(regs::rdi()),
986
- 6 => Some(regs::r8()),
987
- 7 => Some(regs::r9()),
988
- 8 => Some(regs::r10()),
989
- 9 => Some(regs::r11()),
990
- // NB: `r12`, `r13`, `r14` and `r15` are reserved for indirect
991
- // callee addresses and temporaries required for our tail call
992
- // sequence (fp, ret_addr, tmp).
993
- _ => None,
994
- };
995
- }
996
-
997
- // Fastcall counts by absolute argument number; SysV counts by argument of
998
- // this (integer) class.
999
- let i = if is_fastcall { arg_idx } else { idx };
1000
- match (i, is_fastcall) {
1001
- (0, false) => Some(regs::rdi()),
1002
- (1, false) => Some(regs::rsi()),
1003
- (2, false) => Some(regs::rdx()),
1004
- (3, false) => Some(regs::rcx()),
1005
- (4, false) => Some(regs::r8()),
1006
- (5, false) => Some(regs::r9()),
1007
- (0, true) => Some(regs::rcx()),
1008
- (1, true) => Some(regs::rdx()),
1009
- (2, true) => Some(regs::r8()),
1010
- (3, true) => Some(regs::r9()),
1011
- _ => None,
1012
- }
1013
- }
1014
-
1015
- fn get_fltreg_for_arg(call_conv: &CallConv, idx: usize, arg_idx: usize) -> Option<Reg> {
1016
- let is_fastcall = call_conv.extends_windows_fastcall();
1017
-
1018
- // Fastcall counts by absolute argument number; SysV counts by argument of
1019
- // this (floating-point) class.
1020
- let i = if is_fastcall { arg_idx } else { idx };
1021
- match (i, is_fastcall) {
1022
- (0, false) => Some(regs::xmm0()),
1023
- (1, false) => Some(regs::xmm1()),
1024
- (2, false) => Some(regs::xmm2()),
1025
- (3, false) => Some(regs::xmm3()),
1026
- (4, false) => Some(regs::xmm4()),
1027
- (5, false) => Some(regs::xmm5()),
1028
- (6, false) => Some(regs::xmm6()),
1029
- (7, false) => Some(regs::xmm7()),
1030
- (0, true) => Some(regs::xmm0()),
1031
- (1, true) => Some(regs::xmm1()),
1032
- (2, true) => Some(regs::xmm2()),
1033
- (3, true) => Some(regs::xmm3()),
1034
- _ => None,
1035
- }
1036
- }
1037
-
1038
- fn get_intreg_for_retval(call_conv: &CallConv, intreg_idx: usize) -> Option<Reg> {
1039
- match call_conv {
1040
- CallConv::Tail => match intreg_idx {
1041
- 0 => Some(regs::rax()),
1042
- 1 => Some(regs::rcx()),
1043
- 2 => Some(regs::rdx()),
1044
- 3 => Some(regs::rbx()),
1045
- 4 => Some(regs::rsi()),
1046
- 5 => Some(regs::rdi()),
1047
- 6 => Some(regs::r8()),
1048
- 7 => Some(regs::r9()),
1049
- 8 => Some(regs::r10()),
1050
- 9 => Some(regs::r11()),
1051
- 10 => Some(regs::r12()),
1052
- 11 => Some(regs::r13()),
1053
- 12 => Some(regs::r14()),
1054
- // NB: `r15` is reserved as a scratch register.
1055
- _ => None,
1056
- },
1057
- CallConv::Fast | CallConv::Cold | CallConv::SystemV => match intreg_idx {
1058
- 0 => Some(regs::rax()),
1059
- 1 => Some(regs::rdx()),
1060
- _ => None,
1061
- },
1062
- CallConv::WindowsFastcall => match intreg_idx {
1063
- 0 => Some(regs::rax()),
1064
- 1 => Some(regs::rdx()), // The Rust ABI for i128s needs this.
1065
- _ => None,
1066
- },
1067
- CallConv::Probestack => todo!(),
1068
- CallConv::WasmtimeSystemV | CallConv::AppleAarch64 => unreachable!(),
1069
- }
1070
- }
1071
-
1072
- fn get_fltreg_for_retval(call_conv: &CallConv, fltreg_idx: usize) -> Option<Reg> {
1073
- match call_conv {
1074
- CallConv::Tail => match fltreg_idx {
1075
- 0 => Some(regs::xmm0()),
1076
- 1 => Some(regs::xmm1()),
1077
- 2 => Some(regs::xmm2()),
1078
- 3 => Some(regs::xmm3()),
1079
- 4 => Some(regs::xmm4()),
1080
- 5 => Some(regs::xmm5()),
1081
- 6 => Some(regs::xmm6()),
1082
- 7 => Some(regs::xmm7()),
1083
- _ => None,
1084
- },
1085
- CallConv::Fast | CallConv::Cold | CallConv::SystemV => match fltreg_idx {
1086
- 0 => Some(regs::xmm0()),
1087
- 1 => Some(regs::xmm1()),
1088
- _ => None,
1089
- },
1090
- CallConv::WindowsFastcall => match fltreg_idx {
1091
- 0 => Some(regs::xmm0()),
1092
- _ => None,
1093
- },
1094
- CallConv::Probestack => todo!(),
1095
- CallConv::WasmtimeSystemV | CallConv::AppleAarch64 => unreachable!(),
1096
- }
1097
- }
1098
-
1099
- fn is_callee_save_systemv(r: RealReg, enable_pinned_reg: bool) -> bool {
1100
- use regs::*;
1101
- match r.class() {
1102
- RegClass::Int => match r.hw_enc() {
1103
- ENC_RBX | ENC_RBP | ENC_R12 | ENC_R13 | ENC_R14 => true,
1104
- // R15 is the pinned register; if we're using it that way,
1105
- // it is effectively globally-allocated, and is not
1106
- // callee-saved.
1107
- ENC_R15 => !enable_pinned_reg,
1108
- _ => false,
1109
- },
1110
- RegClass::Float => false,
1111
- RegClass::Vector => unreachable!(),
1112
- }
1113
- }
1114
-
1115
- fn is_callee_save_fastcall(r: RealReg, enable_pinned_reg: bool) -> bool {
1116
- use regs::*;
1117
- match r.class() {
1118
- RegClass::Int => match r.hw_enc() {
1119
- ENC_RBX | ENC_RBP | ENC_RSI | ENC_RDI | ENC_R12 | ENC_R13 | ENC_R14 => true,
1120
- // See above for SysV: we must treat the pinned reg specially.
1121
- ENC_R15 => !enable_pinned_reg,
1122
- _ => false,
1123
- },
1124
- RegClass::Float => match r.hw_enc() {
1125
- 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 => true,
1126
- _ => false,
1127
- },
1128
- RegClass::Vector => unreachable!(),
1129
- }
1130
- }
1131
-
1132
- fn compute_clobber_size(clobbers: &[Writable<RealReg>]) -> u32 {
1133
- let mut clobbered_size = 0;
1134
- for reg in clobbers {
1135
- match reg.to_reg().class() {
1136
- RegClass::Int => {
1137
- clobbered_size += 8;
1138
- }
1139
- RegClass::Float => {
1140
- clobbered_size = align_to(clobbered_size, 16);
1141
- clobbered_size += 16;
1142
- }
1143
- RegClass::Vector => unreachable!(),
1144
- }
1145
- }
1146
- align_to(clobbered_size, 16)
1147
- }
1148
-
1149
- const WINDOWS_CLOBBERS: PRegSet = windows_clobbers();
1150
- const SYSV_CLOBBERS: PRegSet = sysv_clobbers();
1151
- const TAIL_CLOBBERS: PRegSet = tail_clobbers();
1152
-
1153
- const fn windows_clobbers() -> PRegSet {
1154
- PRegSet::empty()
1155
- .with(regs::gpr_preg(regs::ENC_RAX))
1156
- .with(regs::gpr_preg(regs::ENC_RCX))
1157
- .with(regs::gpr_preg(regs::ENC_RDX))
1158
- .with(regs::gpr_preg(regs::ENC_R8))
1159
- .with(regs::gpr_preg(regs::ENC_R9))
1160
- .with(regs::gpr_preg(regs::ENC_R10))
1161
- .with(regs::gpr_preg(regs::ENC_R11))
1162
- .with(regs::fpr_preg(0))
1163
- .with(regs::fpr_preg(1))
1164
- .with(regs::fpr_preg(2))
1165
- .with(regs::fpr_preg(3))
1166
- .with(regs::fpr_preg(4))
1167
- .with(regs::fpr_preg(5))
1168
- }
1169
-
1170
- const fn sysv_clobbers() -> PRegSet {
1171
- PRegSet::empty()
1172
- .with(regs::gpr_preg(regs::ENC_RAX))
1173
- .with(regs::gpr_preg(regs::ENC_RCX))
1174
- .with(regs::gpr_preg(regs::ENC_RDX))
1175
- .with(regs::gpr_preg(regs::ENC_RSI))
1176
- .with(regs::gpr_preg(regs::ENC_RDI))
1177
- .with(regs::gpr_preg(regs::ENC_R8))
1178
- .with(regs::gpr_preg(regs::ENC_R9))
1179
- .with(regs::gpr_preg(regs::ENC_R10))
1180
- .with(regs::gpr_preg(regs::ENC_R11))
1181
- .with(regs::fpr_preg(0))
1182
- .with(regs::fpr_preg(1))
1183
- .with(regs::fpr_preg(2))
1184
- .with(regs::fpr_preg(3))
1185
- .with(regs::fpr_preg(4))
1186
- .with(regs::fpr_preg(5))
1187
- .with(regs::fpr_preg(6))
1188
- .with(regs::fpr_preg(7))
1189
- .with(regs::fpr_preg(8))
1190
- .with(regs::fpr_preg(9))
1191
- .with(regs::fpr_preg(10))
1192
- .with(regs::fpr_preg(11))
1193
- .with(regs::fpr_preg(12))
1194
- .with(regs::fpr_preg(13))
1195
- .with(regs::fpr_preg(14))
1196
- .with(regs::fpr_preg(15))
1197
- }
1198
-
1199
- const fn tail_clobbers() -> PRegSet {
1200
- PRegSet::empty()
1201
- .with(regs::gpr_preg(regs::ENC_RAX))
1202
- .with(regs::gpr_preg(regs::ENC_RCX))
1203
- .with(regs::gpr_preg(regs::ENC_RDX))
1204
- .with(regs::gpr_preg(regs::ENC_RBX))
1205
- .with(regs::gpr_preg(regs::ENC_RSI))
1206
- .with(regs::gpr_preg(regs::ENC_RDI))
1207
- .with(regs::gpr_preg(regs::ENC_R8))
1208
- .with(regs::gpr_preg(regs::ENC_R9))
1209
- .with(regs::gpr_preg(regs::ENC_R10))
1210
- .with(regs::gpr_preg(regs::ENC_R11))
1211
- .with(regs::gpr_preg(regs::ENC_R12))
1212
- .with(regs::gpr_preg(regs::ENC_R13))
1213
- .with(regs::gpr_preg(regs::ENC_R14))
1214
- .with(regs::gpr_preg(regs::ENC_R15))
1215
- .with(regs::fpr_preg(0))
1216
- .with(regs::fpr_preg(1))
1217
- .with(regs::fpr_preg(2))
1218
- .with(regs::fpr_preg(3))
1219
- .with(regs::fpr_preg(4))
1220
- .with(regs::fpr_preg(5))
1221
- .with(regs::fpr_preg(6))
1222
- .with(regs::fpr_preg(7))
1223
- .with(regs::fpr_preg(8))
1224
- .with(regs::fpr_preg(9))
1225
- .with(regs::fpr_preg(10))
1226
- .with(regs::fpr_preg(11))
1227
- .with(regs::fpr_preg(12))
1228
- .with(regs::fpr_preg(13))
1229
- .with(regs::fpr_preg(14))
1230
- .with(regs::fpr_preg(15))
1231
- }
1232
-
1233
- fn create_reg_env_systemv(enable_pinned_reg: bool) -> MachineEnv {
1234
- fn preg(r: Reg) -> PReg {
1235
- r.to_real_reg().unwrap().into()
1236
- }
1237
-
1238
- let mut env = MachineEnv {
1239
- preferred_regs_by_class: [
1240
- // Preferred GPRs: caller-saved in the SysV ABI.
1241
- vec![
1242
- preg(regs::rsi()),
1243
- preg(regs::rdi()),
1244
- preg(regs::rax()),
1245
- preg(regs::rcx()),
1246
- preg(regs::rdx()),
1247
- preg(regs::r8()),
1248
- preg(regs::r9()),
1249
- preg(regs::r10()),
1250
- preg(regs::r11()),
1251
- ],
1252
- // Preferred XMMs: the first 8, which can have smaller encodings
1253
- // with AVX instructions.
1254
- vec![
1255
- preg(regs::xmm0()),
1256
- preg(regs::xmm1()),
1257
- preg(regs::xmm2()),
1258
- preg(regs::xmm3()),
1259
- preg(regs::xmm4()),
1260
- preg(regs::xmm5()),
1261
- preg(regs::xmm6()),
1262
- preg(regs::xmm7()),
1263
- ],
1264
- // The Vector Regclass is unused
1265
- vec![],
1266
- ],
1267
- non_preferred_regs_by_class: [
1268
- // Non-preferred GPRs: callee-saved in the SysV ABI.
1269
- vec![
1270
- preg(regs::rbx()),
1271
- preg(regs::r12()),
1272
- preg(regs::r13()),
1273
- preg(regs::r14()),
1274
- ],
1275
- // Non-preferred XMMs: the last 8 registers, which can have larger
1276
- // encodings with AVX instructions.
1277
- vec![
1278
- preg(regs::xmm8()),
1279
- preg(regs::xmm9()),
1280
- preg(regs::xmm10()),
1281
- preg(regs::xmm11()),
1282
- preg(regs::xmm12()),
1283
- preg(regs::xmm13()),
1284
- preg(regs::xmm14()),
1285
- preg(regs::xmm15()),
1286
- ],
1287
- // The Vector Regclass is unused
1288
- vec![],
1289
- ],
1290
- fixed_stack_slots: vec![],
1291
- scratch_by_class: [None, None, None],
1292
- };
1293
-
1294
- debug_assert_eq!(regs::r15(), regs::pinned_reg());
1295
- if !enable_pinned_reg {
1296
- env.non_preferred_regs_by_class[0].push(preg(regs::r15()));
1297
- }
1298
-
1299
- env
1300
- }