wasmtime 16.0.0 → 17.0.0

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Files changed (1111) hide show
  1. checksums.yaml +4 -4
  2. data/Cargo.lock +103 -79
  3. data/ext/Cargo.toml +7 -6
  4. data/ext/cargo-vendor/cranelift-bforest-0.104.0/.cargo-checksum.json +1 -0
  5. data/ext/cargo-vendor/cranelift-bforest-0.104.0/Cargo.toml +40 -0
  6. data/ext/cargo-vendor/cranelift-codegen-0.104.0/.cargo-checksum.json +1 -0
  7. data/ext/cargo-vendor/cranelift-codegen-0.104.0/Cargo.toml +175 -0
  8. data/ext/cargo-vendor/cranelift-codegen-0.104.0/build.rs +392 -0
  9. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/isa/aarch64/inst.isle +4197 -0
  10. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/isa/aarch64/lower/isle.rs +882 -0
  11. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/isa/x64/abi.rs +1305 -0
  12. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/isle_prelude.rs +957 -0
  13. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/machinst/isle.rs +908 -0
  14. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/machinst/mod.rs +558 -0
  15. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/machinst/pcc.rs +159 -0
  16. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/arithmetic.isle +169 -0
  17. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/bitops.isle +188 -0
  18. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/cprop.isle +248 -0
  19. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/extends.isle +116 -0
  20. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/icmp.isle +197 -0
  21. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/selects.isle +77 -0
  22. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/shifts.isle +307 -0
  23. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts/spaceship.isle +194 -0
  24. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/opts.rs +265 -0
  25. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/prelude.isle +641 -0
  26. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/prelude_lower.isle +1073 -0
  27. data/ext/cargo-vendor/cranelift-codegen-0.104.0/src/prelude_opt.isle +134 -0
  28. data/ext/cargo-vendor/cranelift-codegen-meta-0.104.0/.cargo-checksum.json +1 -0
  29. data/ext/cargo-vendor/cranelift-codegen-meta-0.104.0/Cargo.toml +35 -0
  30. data/ext/cargo-vendor/cranelift-codegen-shared-0.104.0/.cargo-checksum.json +1 -0
  31. data/ext/cargo-vendor/cranelift-codegen-shared-0.104.0/Cargo.toml +22 -0
  32. data/ext/cargo-vendor/cranelift-control-0.104.0/.cargo-checksum.json +1 -0
  33. data/ext/cargo-vendor/cranelift-control-0.104.0/Cargo.toml +30 -0
  34. data/ext/cargo-vendor/cranelift-entity-0.104.0/.cargo-checksum.json +1 -0
  35. data/ext/cargo-vendor/cranelift-entity-0.104.0/Cargo.toml +50 -0
  36. data/ext/cargo-vendor/cranelift-entity-0.104.0/src/primary.rs +541 -0
  37. data/ext/cargo-vendor/cranelift-frontend-0.104.0/.cargo-checksum.json +1 -0
  38. data/ext/cargo-vendor/cranelift-frontend-0.104.0/Cargo.toml +68 -0
  39. data/ext/cargo-vendor/cranelift-isle-0.104.0/.cargo-checksum.json +1 -0
  40. data/ext/cargo-vendor/cranelift-isle-0.104.0/Cargo.toml +46 -0
  41. data/ext/cargo-vendor/cranelift-native-0.104.0/.cargo-checksum.json +1 -0
  42. data/ext/cargo-vendor/cranelift-native-0.104.0/Cargo.toml +43 -0
  43. data/ext/cargo-vendor/cranelift-wasm-0.104.0/.cargo-checksum.json +1 -0
  44. data/ext/cargo-vendor/cranelift-wasm-0.104.0/Cargo.toml +106 -0
  45. data/ext/cargo-vendor/cranelift-wasm-0.104.0/src/code_translator.rs +3646 -0
  46. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/.cargo-checksum.json +1 -0
  47. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/Cargo.toml +49 -0
  48. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/README.md +52 -0
  49. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/src/clocks.rs +56 -0
  50. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/src/lib.rs +24 -0
  51. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/src/noop_scheduler.rs +25 -0
  52. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/tests/clocks.rs +33 -0
  53. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/tests/common/mod.rs +33 -0
  54. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/tests/random.rs +17 -0
  55. data/ext/cargo-vendor/deterministic-wasi-ctx-0.1.18/tests/scheduler.rs +24 -0
  56. data/ext/cargo-vendor/rand_pcg-0.3.1/.cargo-checksum.json +1 -0
  57. data/ext/cargo-vendor/rand_pcg-0.3.1/CHANGELOG.md +37 -0
  58. data/ext/cargo-vendor/rand_pcg-0.3.1/COPYRIGHT +12 -0
  59. data/ext/cargo-vendor/rand_pcg-0.3.1/Cargo.toml +37 -0
  60. data/ext/cargo-vendor/rand_pcg-0.3.1/LICENSE-APACHE +201 -0
  61. data/ext/cargo-vendor/rand_pcg-0.3.1/LICENSE-MIT +26 -0
  62. data/ext/cargo-vendor/rand_pcg-0.3.1/README.md +42 -0
  63. data/ext/cargo-vendor/rand_pcg-0.3.1/src/lib.rs +45 -0
  64. data/ext/cargo-vendor/rand_pcg-0.3.1/src/pcg128.rs +296 -0
  65. data/ext/cargo-vendor/rand_pcg-0.3.1/src/pcg64.rs +166 -0
  66. data/ext/cargo-vendor/rand_pcg-0.3.1/tests/lcg128xsl64.rs +77 -0
  67. data/ext/cargo-vendor/rand_pcg-0.3.1/tests/lcg64xsh32.rs +70 -0
  68. data/ext/cargo-vendor/rand_pcg-0.3.1/tests/mcg128xsl64.rs +75 -0
  69. data/ext/cargo-vendor/wasi-cap-std-sync-17.0.0/.cargo-checksum.json +1 -0
  70. data/ext/cargo-vendor/wasi-cap-std-sync-17.0.0/Cargo.toml +102 -0
  71. data/ext/cargo-vendor/wasi-common-17.0.0/.cargo-checksum.json +1 -0
  72. data/ext/cargo-vendor/wasi-common-17.0.0/Cargo.toml +131 -0
  73. data/ext/cargo-vendor/wasi-common-17.0.0/src/error.rs +26 -0
  74. data/ext/cargo-vendor/wasi-common-17.0.0/src/snapshots/preview_1/error.rs +266 -0
  75. data/ext/cargo-vendor/wasmtime-17.0.0/.cargo-checksum.json +1 -0
  76. data/ext/cargo-vendor/wasmtime-17.0.0/Cargo.toml +211 -0
  77. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/component.rs +545 -0
  78. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/instance.rs +815 -0
  79. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/linker.rs +580 -0
  80. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/matching.rs +215 -0
  81. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/mod.rs +351 -0
  82. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/resource_table.rs +350 -0
  83. data/ext/cargo-vendor/wasmtime-17.0.0/src/component/resources.rs +823 -0
  84. data/ext/cargo-vendor/wasmtime-17.0.0/src/config.rs +2428 -0
  85. data/ext/cargo-vendor/wasmtime-17.0.0/src/func/typed.rs +638 -0
  86. data/ext/cargo-vendor/wasmtime-17.0.0/src/lib.rs +526 -0
  87. data/ext/cargo-vendor/wasmtime-17.0.0/src/store.rs +2389 -0
  88. data/ext/cargo-vendor/wasmtime-asm-macros-17.0.0/.cargo-checksum.json +1 -0
  89. data/ext/cargo-vendor/wasmtime-asm-macros-17.0.0/Cargo.toml +22 -0
  90. data/ext/cargo-vendor/wasmtime-cache-17.0.0/.cargo-checksum.json +1 -0
  91. data/ext/cargo-vendor/wasmtime-cache-17.0.0/Cargo.toml +81 -0
  92. data/ext/cargo-vendor/wasmtime-component-macro-17.0.0/.cargo-checksum.json +1 -0
  93. data/ext/cargo-vendor/wasmtime-component-macro-17.0.0/Cargo.toml +67 -0
  94. data/ext/cargo-vendor/wasmtime-component-macro-17.0.0/src/bindgen.rs +371 -0
  95. data/ext/cargo-vendor/wasmtime-component-macro-17.0.0/tests/codegen/multiversion/root.wit +8 -0
  96. data/ext/cargo-vendor/wasmtime-component-util-17.0.0/.cargo-checksum.json +1 -0
  97. data/ext/cargo-vendor/wasmtime-component-util-17.0.0/Cargo.toml +25 -0
  98. data/ext/cargo-vendor/wasmtime-cranelift-17.0.0/.cargo-checksum.json +1 -0
  99. data/ext/cargo-vendor/wasmtime-cranelift-17.0.0/Cargo.toml +112 -0
  100. data/ext/cargo-vendor/wasmtime-cranelift-shared-17.0.0/.cargo-checksum.json +1 -0
  101. data/ext/cargo-vendor/wasmtime-cranelift-shared-17.0.0/Cargo.toml +71 -0
  102. data/ext/cargo-vendor/wasmtime-environ-17.0.0/.cargo-checksum.json +1 -0
  103. data/ext/cargo-vendor/wasmtime-environ-17.0.0/Cargo.lock +726 -0
  104. data/ext/cargo-vendor/wasmtime-environ-17.0.0/Cargo.toml +125 -0
  105. data/ext/cargo-vendor/wasmtime-environ-17.0.0/examples/factc.rs +205 -0
  106. data/ext/cargo-vendor/wasmtime-fiber-17.0.0/.cargo-checksum.json +1 -0
  107. data/ext/cargo-vendor/wasmtime-fiber-17.0.0/Cargo.toml +63 -0
  108. data/ext/cargo-vendor/wasmtime-jit-17.0.0/.cargo-checksum.json +1 -0
  109. data/ext/cargo-vendor/wasmtime-jit-17.0.0/Cargo.toml +125 -0
  110. data/ext/cargo-vendor/wasmtime-jit-debug-17.0.0/.cargo-checksum.json +1 -0
  111. data/ext/cargo-vendor/wasmtime-jit-debug-17.0.0/Cargo.toml +67 -0
  112. data/ext/cargo-vendor/wasmtime-jit-icache-coherence-17.0.0/.cargo-checksum.json +1 -0
  113. data/ext/cargo-vendor/wasmtime-jit-icache-coherence-17.0.0/Cargo.toml +46 -0
  114. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/.cargo-checksum.json +1 -0
  115. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/Cargo.toml +139 -0
  116. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/src/instance/allocator/pooling/memory_pool.rs +997 -0
  117. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/src/instance/allocator/pooling.rs +658 -0
  118. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/src/memory.rs +973 -0
  119. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/src/parking_spot.rs +622 -0
  120. data/ext/cargo-vendor/wasmtime-runtime-17.0.0/src/sys/windows/mmap.rs +216 -0
  121. data/ext/cargo-vendor/wasmtime-types-17.0.0/.cargo-checksum.json +1 -0
  122. data/ext/cargo-vendor/wasmtime-types-17.0.0/Cargo.toml +36 -0
  123. data/ext/cargo-vendor/wasmtime-versioned-export-macros-17.0.0/.cargo-checksum.json +1 -0
  124. data/ext/cargo-vendor/wasmtime-versioned-export-macros-17.0.0/Cargo.toml +32 -0
  125. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/.cargo-checksum.json +1 -0
  126. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/Cargo.toml +261 -0
  127. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/ctx.rs +333 -0
  128. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/filesystem.rs +325 -0
  129. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/host/clocks.rs +103 -0
  130. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/host/filesystem.rs +1069 -0
  131. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/host/instance_network.rs +15 -0
  132. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/host/network.rs +625 -0
  133. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/host/tcp.rs +605 -0
  134. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/host/udp.rs +530 -0
  135. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/mod.rs +327 -0
  136. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/network.rs +108 -0
  137. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/poll.rs +175 -0
  138. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/preview1.rs +2362 -0
  139. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/stream.rs +181 -0
  140. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/tcp.rs +335 -0
  141. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/src/preview2/udp.rs +125 -0
  142. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/tests/all/api.rs +217 -0
  143. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/tests/all/async_.rs +364 -0
  144. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/tests/all/main.rs +112 -0
  145. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/tests/all/preview1.rs +243 -0
  146. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/tests/all/sync.rs +303 -0
  147. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/command-extended.wit +6 -0
  148. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/cli/command.wit +7 -0
  149. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/cli/imports.wit +20 -0
  150. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/cli/stdio.wit +17 -0
  151. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/cli/terminal.wit +49 -0
  152. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/clocks/monotonic-clock.wit +45 -0
  153. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/clocks/wall-clock.wit +42 -0
  154. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/clocks/world.wit +6 -0
  155. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/filesystem/preopens.wit +8 -0
  156. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/filesystem/types.wit +634 -0
  157. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/filesystem/world.wit +6 -0
  158. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/http/proxy.wit +32 -0
  159. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/http/types.wit +570 -0
  160. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/io/error.wit +34 -0
  161. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/io/poll.wit +41 -0
  162. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/io/streams.wit +251 -0
  163. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/io/world.wit +6 -0
  164. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/random/insecure-seed.wit +25 -0
  165. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/random/insecure.wit +22 -0
  166. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/random/random.wit +26 -0
  167. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/random/world.wit +7 -0
  168. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/ip-name-lookup.wit +51 -0
  169. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/network.wit +145 -0
  170. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/tcp-create-socket.wit +27 -0
  171. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/tcp.wit +309 -0
  172. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/udp-create-socket.wit +27 -0
  173. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/udp.wit +264 -0
  174. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/deps/sockets/world.wit +11 -0
  175. data/ext/cargo-vendor/wasmtime-wasi-17.0.0/wit/test.wit +22 -0
  176. data/ext/cargo-vendor/wasmtime-winch-17.0.0/.cargo-checksum.json +1 -0
  177. data/ext/cargo-vendor/wasmtime-winch-17.0.0/Cargo.toml +77 -0
  178. data/ext/cargo-vendor/wasmtime-wit-bindgen-17.0.0/.cargo-checksum.json +1 -0
  179. data/ext/cargo-vendor/wasmtime-wit-bindgen-17.0.0/Cargo.toml +41 -0
  180. data/ext/cargo-vendor/wasmtime-wit-bindgen-17.0.0/src/lib.rs +2097 -0
  181. data/ext/cargo-vendor/wasmtime-wmemcheck-17.0.0/.cargo-checksum.json +1 -0
  182. data/ext/cargo-vendor/wasmtime-wmemcheck-17.0.0/Cargo.toml +29 -0
  183. data/ext/cargo-vendor/wiggle-17.0.0/.cargo-checksum.json +1 -0
  184. data/ext/cargo-vendor/wiggle-17.0.0/Cargo.toml +115 -0
  185. data/ext/cargo-vendor/wiggle-generate-17.0.0/.cargo-checksum.json +1 -0
  186. data/ext/cargo-vendor/wiggle-generate-17.0.0/Cargo.toml +65 -0
  187. data/ext/cargo-vendor/wiggle-macro-17.0.0/.cargo-checksum.json +1 -0
  188. data/ext/cargo-vendor/wiggle-macro-17.0.0/Cargo.toml +55 -0
  189. data/ext/cargo-vendor/winch-codegen-0.15.0/.cargo-checksum.json +1 -0
  190. data/ext/cargo-vendor/winch-codegen-0.15.0/Cargo.toml +76 -0
  191. data/ext/cargo-vendor/winch-codegen-0.15.0/src/codegen/context.rs +553 -0
  192. data/ext/cargo-vendor/winch-codegen-0.15.0/src/codegen/env.rs +309 -0
  193. data/ext/cargo-vendor/winch-codegen-0.15.0/src/isa/aarch64/masm.rs +457 -0
  194. data/ext/cargo-vendor/winch-codegen-0.15.0/src/isa/x64/asm.rs +1149 -0
  195. data/ext/cargo-vendor/winch-codegen-0.15.0/src/isa/x64/masm.rs +1044 -0
  196. data/ext/cargo-vendor/winch-codegen-0.15.0/src/masm.rs +708 -0
  197. data/ext/cargo-vendor/winch-codegen-0.15.0/src/stack.rs +452 -0
  198. data/ext/cargo-vendor/winch-codegen-0.15.0/src/visitor.rs +1617 -0
  199. data/ext/src/helpers/mod.rs +4 -0
  200. data/ext/src/helpers/nogvl.rs +29 -0
  201. data/ext/src/helpers/tmplock.rs +45 -0
  202. data/ext/src/ruby_api/engine.rs +7 -3
  203. data/ext/src/ruby_api/mod.rs +3 -0
  204. data/ext/src/ruby_api/module.rs +22 -8
  205. data/ext/src/ruby_api/store.rs +66 -12
  206. data/ext/src/ruby_api/wasi_ctx.rs +110 -0
  207. data/ext/src/ruby_api/wasi_ctx_builder.rs +10 -7
  208. data/lib/wasmtime/version.rb +1 -1
  209. metadata +931 -904
  210. data/ext/cargo-vendor/cranelift-bforest-0.103.0/.cargo-checksum.json +0 -1
  211. data/ext/cargo-vendor/cranelift-bforest-0.103.0/Cargo.toml +0 -40
  212. data/ext/cargo-vendor/cranelift-codegen-0.103.0/.cargo-checksum.json +0 -1
  213. data/ext/cargo-vendor/cranelift-codegen-0.103.0/Cargo.toml +0 -175
  214. data/ext/cargo-vendor/cranelift-codegen-0.103.0/build.rs +0 -391
  215. data/ext/cargo-vendor/cranelift-codegen-0.103.0/src/isa/aarch64/inst.isle +0 -4193
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  389. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/LICENSE +0 -0
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  410. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/fx.rs +0 -0
  411. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/incremental_cache.rs +0 -0
  412. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/inst_predicates.rs +0 -0
  413. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/atomic_rmw_op.rs +0 -0
  414. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/builder.rs +0 -0
  415. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/condcodes.rs +0 -0
  416. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/constant.rs +0 -0
  417. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/dfg.rs +0 -0
  418. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/dynamic_type.rs +0 -0
  419. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/entities.rs +0 -0
  420. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/extfunc.rs +0 -0
  421. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/extname.rs +0 -0
  422. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/function.rs +0 -0
  423. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/globalvalue.rs +0 -0
  424. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/immediates.rs +0 -0
  425. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/instructions.rs +0 -0
  426. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/jumptable.rs +0 -0
  427. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/known_symbol.rs +0 -0
  428. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/layout.rs +0 -0
  429. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/libcall.rs +0 -0
  430. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/memflags.rs +0 -0
  431. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/memtype.rs +0 -0
  432. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/mod.rs +0 -0
  433. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/pcc.rs +0 -0
  434. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/progpoint.rs +0 -0
  435. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/sourceloc.rs +0 -0
  436. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/stackslot.rs +0 -0
  437. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/table.rs +0 -0
  438. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/trapcode.rs +0 -0
  439. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/ir/types.rs +0 -0
  440. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/abi.rs +0 -0
  441. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/args.rs +0 -0
  442. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/emit.rs +0 -0
  443. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/emit_tests.rs +0 -0
  444. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/imms.rs +0 -0
  445. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/mod.rs +0 -0
  446. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/regs.rs +0 -0
  447. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/unwind/systemv.rs +0 -0
  448. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst/unwind.rs +0 -0
  449. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/inst_neon.isle +0 -0
  450. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/lower/isle/generated_code.rs +0 -0
  451. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/lower.isle +0 -0
  452. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/lower.rs +0 -0
  453. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/lower_dynamic_neon.isle +0 -0
  454. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/mod.rs +0 -0
  455. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/pcc.rs +0 -0
  456. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/aarch64/settings.rs +0 -0
  457. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/call_conv.rs +0 -0
  458. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/mod.rs +0 -0
  459. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/abi.rs +0 -0
  460. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/args.rs +0 -0
  461. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/emit.rs +0 -0
  462. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/emit_tests.rs +0 -0
  463. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/encode.rs +0 -0
  464. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/imms.rs +0 -0
  465. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/mod.rs +0 -0
  466. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/regs.rs +0 -0
  467. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/unwind/systemv.rs +0 -0
  468. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/unwind.rs +0 -0
  469. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst/vector.rs +0 -0
  470. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst.isle +0 -0
  471. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/inst_vector.isle +0 -0
  472. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/lower/isle/generated_code.rs +0 -0
  473. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/lower/isle.rs +0 -0
  474. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/lower.isle +0 -0
  475. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/lower.rs +0 -0
  476. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/mod.rs +0 -0
  477. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/riscv64/settings.rs +0 -0
  478. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/abi.rs +0 -0
  479. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/args.rs +0 -0
  480. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/emit.rs +0 -0
  481. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/emit_tests.rs +0 -0
  482. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/imms.rs +0 -0
  483. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/mod.rs +0 -0
  484. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/regs.rs +0 -0
  485. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/unwind/systemv.rs +0 -0
  486. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst/unwind.rs +0 -0
  487. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/inst.isle +0 -0
  488. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/lower/isle/generated_code.rs +0 -0
  489. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/lower/isle.rs +0 -0
  490. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/lower.isle +0 -0
  491. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/lower.rs +0 -0
  492. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/mod.rs +0 -0
  493. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/s390x/settings.rs +0 -0
  494. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/unwind/systemv.rs +0 -0
  495. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/unwind/winx64.rs +0 -0
  496. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/unwind.rs +0 -0
  497. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/encoding/evex.rs +0 -0
  498. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/encoding/mod.rs +0 -0
  499. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/encoding/rex.rs +0 -0
  500. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/encoding/vex.rs +0 -0
  501. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/args.rs +0 -0
  502. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/emit.rs +0 -0
  503. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/emit_state.rs +0 -0
  504. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/emit_tests.rs +0 -0
  505. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/mod.rs +0 -0
  506. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/regs.rs +0 -0
  507. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/unwind/systemv.rs +0 -0
  508. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/unwind/winx64.rs +0 -0
  509. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst/unwind.rs +0 -0
  510. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/inst.isle +0 -0
  511. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/lower/isle/generated_code.rs +0 -0
  512. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/lower/isle.rs +0 -0
  513. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/lower.isle +0 -0
  514. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/lower.rs +0 -0
  515. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/mod.rs +0 -0
  516. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/pcc.rs +0 -0
  517. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/isa/x64/settings.rs +0 -0
  518. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/iterators.rs +0 -0
  519. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/legalizer/globalvalue.rs +0 -0
  520. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/legalizer/mod.rs +0 -0
  521. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/legalizer/table.rs +0 -0
  522. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/lib.rs +0 -0
  523. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/loop_analysis.rs +0 -0
  524. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/abi.rs +0 -0
  525. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/blockorder.rs +0 -0
  526. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/buffer.rs +0 -0
  527. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/compile.rs +0 -0
  528. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/helpers.rs +0 -0
  529. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/inst_common.rs +0 -0
  530. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/lower.rs +0 -0
  531. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/reg.rs +0 -0
  532. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/valueregs.rs +0 -0
  533. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/machinst/vcode.rs +0 -0
  534. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/nan_canonicalization.rs +0 -0
  535. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/opts/README.md +0 -0
  536. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/opts/generated_code.rs +0 -0
  537. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/opts/remat.isle +0 -0
  538. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/opts/vector.isle +0 -0
  539. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/print_errors.rs +0 -0
  540. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/remove_constant_phis.rs +0 -0
  541. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/result.rs +0 -0
  542. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/scoped_hash_map.rs +0 -0
  543. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/settings.rs +0 -0
  544. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/souper_harvest.rs +0 -0
  545. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/timing.rs +0 -0
  546. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/unionfind.rs +0 -0
  547. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/unreachable_code.rs +0 -0
  548. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/value_label.rs +0 -0
  549. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/verifier/mod.rs +0 -0
  550. /data/ext/cargo-vendor/{cranelift-codegen-0.103.0 → cranelift-codegen-0.104.0}/src/write.rs +0 -0
  551. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/LICENSE +0 -0
  552. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/README.md +0 -0
  553. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/formats.rs +0 -0
  554. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/instructions.rs +0 -0
  555. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/isa.rs +0 -0
  556. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/mod.rs +0 -0
  557. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/operands.rs +0 -0
  558. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/settings.rs +0 -0
  559. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/types.rs +0 -0
  560. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/cdsl/typevar.rs +0 -0
  561. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/constant_hash.rs +0 -0
  562. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/error.rs +0 -0
  563. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/gen_inst.rs +0 -0
  564. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/gen_settings.rs +0 -0
  565. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/gen_types.rs +0 -0
  566. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/isa/arm64.rs +0 -0
  567. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/isa/mod.rs +0 -0
  568. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/isa/riscv64.rs +0 -0
  569. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/isa/s390x.rs +0 -0
  570. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/isa/x86.rs +0 -0
  571. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/lib.rs +0 -0
  572. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/entities.rs +0 -0
  573. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/formats.rs +0 -0
  574. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/immediates.rs +0 -0
  575. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/instructions.rs +0 -0
  576. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/mod.rs +0 -0
  577. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/settings.rs +0 -0
  578. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/shared/types.rs +0 -0
  579. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/srcgen.rs +0 -0
  580. /data/ext/cargo-vendor/{cranelift-codegen-meta-0.103.0 → cranelift-codegen-meta-0.104.0}/src/unique_table.rs +0 -0
  581. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.103.0 → cranelift-codegen-shared-0.104.0}/LICENSE +0 -0
  582. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.103.0 → cranelift-codegen-shared-0.104.0}/README.md +0 -0
  583. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.103.0 → cranelift-codegen-shared-0.104.0}/src/constant_hash.rs +0 -0
  584. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.103.0 → cranelift-codegen-shared-0.104.0}/src/constants.rs +0 -0
  585. /data/ext/cargo-vendor/{cranelift-codegen-shared-0.103.0 → cranelift-codegen-shared-0.104.0}/src/lib.rs +0 -0
  586. /data/ext/cargo-vendor/{cranelift-control-0.103.0 → cranelift-control-0.104.0}/LICENSE +0 -0
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  588. /data/ext/cargo-vendor/{cranelift-control-0.103.0 → cranelift-control-0.104.0}/src/chaos.rs +0 -0
  589. /data/ext/cargo-vendor/{cranelift-control-0.103.0 → cranelift-control-0.104.0}/src/lib.rs +0 -0
  590. /data/ext/cargo-vendor/{cranelift-control-0.103.0 → cranelift-control-0.104.0}/src/zero_sized.rs +0 -0
  591. /data/ext/cargo-vendor/{cranelift-entity-0.103.0 → cranelift-entity-0.104.0}/LICENSE +0 -0
  592. /data/ext/cargo-vendor/{cranelift-entity-0.103.0 → cranelift-entity-0.104.0}/README.md +0 -0
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  599. /data/ext/cargo-vendor/{cranelift-entity-0.103.0 → cranelift-entity-0.104.0}/src/packed_option.rs +0 -0
  600. /data/ext/cargo-vendor/{cranelift-entity-0.103.0 → cranelift-entity-0.104.0}/src/set.rs +0 -0
  601. /data/ext/cargo-vendor/{cranelift-entity-0.103.0 → cranelift-entity-0.104.0}/src/sparse.rs +0 -0
  602. /data/ext/cargo-vendor/{cranelift-entity-0.103.0 → cranelift-entity-0.104.0}/src/unsigned.rs +0 -0
  603. /data/ext/cargo-vendor/{cranelift-frontend-0.103.0 → cranelift-frontend-0.104.0}/LICENSE +0 -0
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  631. /data/ext/cargo-vendor/{cranelift-isle-0.103.0 → cranelift-isle-0.104.0}/isle_examples/pass/bound_var.isle +0 -0
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  647. /data/ext/cargo-vendor/{cranelift-isle-0.103.0 → cranelift-isle-0.104.0}/src/codegen.rs +0 -0
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  657. /data/ext/cargo-vendor/{cranelift-isle-0.103.0 → cranelift-isle-0.104.0}/src/trie_again.rs +0 -0
  658. /data/ext/cargo-vendor/{cranelift-isle-0.103.0 → cranelift-isle-0.104.0}/tests/run_tests.rs +0 -0
  659. /data/ext/cargo-vendor/{cranelift-native-0.103.0 → cranelift-native-0.104.0}/LICENSE +0 -0
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  662. /data/ext/cargo-vendor/{cranelift-native-0.103.0 → cranelift-native-0.104.0}/src/riscv.rs +0 -0
  663. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/LICENSE +0 -0
  664. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/README.md +0 -0
  665. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/code_translator/bounds_checks.rs +0 -0
  666. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/environ/dummy.rs +0 -0
  667. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/environ/mod.rs +0 -0
  668. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/environ/spec.rs +0 -0
  669. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/func_translator.rs +0 -0
  670. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/heap.rs +0 -0
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  674. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/state.rs +0 -0
  675. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/src/translation_utils.rs +0 -0
  676. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/tests/wasm_testsuite.rs +0 -0
  677. /data/ext/cargo-vendor/{cranelift-wasm-0.103.0 → cranelift-wasm-0.104.0}/wasmtests/arith.wat +0 -0
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  856. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/rename.wit +0 -0
  857. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/resources-export.wit +0 -0
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  859. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/share-types.wit +0 -0
  860. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/simple-functions.wit +0 -0
  861. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/simple-lists.wit +0 -0
  862. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/simple-wasi.wit +0 -0
  863. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/small-anonymous.wit +0 -0
  864. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/smoke-default.wit +0 -0
  865. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/smoke-export.wit +0 -0
  866. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/smoke.wit +0 -0
  867. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/strings.wit +0 -0
  868. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/use-paths.wit +0 -0
  869. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/variants.wit +0 -0
  870. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen/worlds-with-types.wit +0 -0
  871. /data/ext/cargo-vendor/{wasmtime-component-macro-16.0.0 → wasmtime-component-macro-17.0.0}/tests/codegen.rs +0 -0
  872. /data/ext/cargo-vendor/{wasmtime-component-util-16.0.0 → wasmtime-component-util-17.0.0}/src/lib.rs +0 -0
  873. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/LICENSE +0 -0
  874. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/SECURITY.md +0 -0
  875. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/builder.rs +0 -0
  876. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/compiler/component.rs +0 -0
  877. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/compiler.rs +0 -0
  878. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/gc.rs +0 -0
  879. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/address_transform.rs +0 -0
  880. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/attr.rs +0 -0
  881. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/expression.rs +0 -0
  882. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/line_program.rs +0 -0
  883. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/mod.rs +0 -0
  884. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/range_info_builder.rs +0 -0
  885. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/refs.rs +0 -0
  886. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/simulate.rs +0 -0
  887. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/unit.rs +0 -0
  888. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/transform/utils.rs +0 -0
  889. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug/write_debuginfo.rs +0 -0
  890. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/debug.rs +0 -0
  891. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/func_environ.rs +0 -0
  892. /data/ext/cargo-vendor/{wasmtime-cranelift-16.0.0 → wasmtime-cranelift-17.0.0}/src/lib.rs +0 -0
  893. /data/ext/cargo-vendor/{wasmtime-cranelift-shared-16.0.0 → wasmtime-cranelift-shared-17.0.0}/src/compiled_function.rs +0 -0
  894. /data/ext/cargo-vendor/{wasmtime-cranelift-shared-16.0.0 → wasmtime-cranelift-shared-17.0.0}/src/isa_builder.rs +0 -0
  895. /data/ext/cargo-vendor/{wasmtime-cranelift-shared-16.0.0 → wasmtime-cranelift-shared-17.0.0}/src/lib.rs +0 -0
  896. /data/ext/cargo-vendor/{wasmtime-cranelift-shared-16.0.0 → wasmtime-cranelift-shared-17.0.0}/src/obj.rs +0 -0
  897. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/LICENSE +0 -0
  898. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/address_map.rs +0 -0
  899. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/builtin.rs +0 -0
  900. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/compilation.rs +0 -0
  901. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/compiler.rs +0 -0
  902. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/dfg.rs +0 -0
  903. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/info.rs +0 -0
  904. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/translate/adapt.rs +0 -0
  905. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/translate/inline.rs +0 -0
  906. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/translate.rs +0 -0
  907. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/component/types/resources.rs +0 -0
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  913. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/fact/trampoline.rs +0 -0
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  921. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/obj.rs +0 -0
  922. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/ref_bits.rs +0 -0
  923. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/scopevec.rs +0 -0
  924. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/stack_map.rs +0 -0
  925. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/trap_encoding.rs +0 -0
  926. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/tunables.rs +0 -0
  927. /data/ext/cargo-vendor/{wasmtime-environ-16.0.0 → wasmtime-environ-17.0.0}/src/vmoffsets.rs +0 -0
  928. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/LICENSE +0 -0
  929. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/build.rs +0 -0
  930. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/src/lib.rs +0 -0
  931. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/src/unix/aarch64.rs +0 -0
  932. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/src/unix/arm.rs +0 -0
  933. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/src/unix/riscv64.rs +0 -0
  934. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/src/unix/s390x.S +0 -0
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  938. /data/ext/cargo-vendor/{wasmtime-fiber-16.0.0 → wasmtime-fiber-17.0.0}/src/windows.c +0 -0
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  940. /data/ext/cargo-vendor/{wasmtime-jit-16.0.0 → wasmtime-jit-17.0.0}/LICENSE +0 -0
  941. /data/ext/cargo-vendor/{wasmtime-jit-16.0.0 → wasmtime-jit-17.0.0}/src/code_memory.rs +0 -0
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  948. /data/ext/cargo-vendor/{wasmtime-jit-16.0.0 → wasmtime-jit-17.0.0}/src/profiling/vtune.rs +0 -0
  949. /data/ext/cargo-vendor/{wasmtime-jit-16.0.0 → wasmtime-jit-17.0.0}/src/profiling.rs +0 -0
  950. /data/ext/cargo-vendor/{wasmtime-jit-debug-16.0.0 → wasmtime-jit-debug-17.0.0}/README.md +0 -0
  951. /data/ext/cargo-vendor/{wasmtime-jit-debug-16.0.0 → wasmtime-jit-debug-17.0.0}/src/gdb_jit_int.rs +0 -0
  952. /data/ext/cargo-vendor/{wasmtime-jit-debug-16.0.0 → wasmtime-jit-debug-17.0.0}/src/lib.rs +0 -0
  953. /data/ext/cargo-vendor/{wasmtime-jit-debug-16.0.0 → wasmtime-jit-debug-17.0.0}/src/perf_jitdump.rs +0 -0
  954. /data/ext/cargo-vendor/{wasmtime-jit-icache-coherence-16.0.0 → wasmtime-jit-icache-coherence-17.0.0}/src/lib.rs +0 -0
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  957. /data/ext/cargo-vendor/{wasmtime-jit-icache-coherence-16.0.0 → wasmtime-jit-icache-coherence-17.0.0}/src/win.rs +0 -0
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  961. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/arch/aarch64.rs +0 -0
  962. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/arch/mod.rs +0 -0
  963. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/arch/riscv64.rs +0 -0
  964. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/arch/s390x.S +0 -0
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  966. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/arch/x86_64.rs +0 -0
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  972. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/export.rs +0 -0
  973. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/externref.rs +0 -0
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  976. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/instance/allocator/on_demand.rs +0 -0
  977. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/instance/allocator/pooling/index_allocator.rs +0 -0
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  981. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/instance.rs +0 -0
  982. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/lib.rs +0 -0
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  984. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/mmap.rs +0 -0
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  986. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/module_id.rs +0 -0
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  1002. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/unix/mmap.rs +0 -0
  1003. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/unix/mod.rs +0 -0
  1004. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/unix/signals.rs +0 -0
  1005. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/unix/unwind.rs +0 -0
  1006. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/unix/vm.rs +0 -0
  1007. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/windows/mod.rs +0 -0
  1008. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/windows/traphandlers.rs +0 -0
  1009. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/windows/unwind.rs +0 -0
  1010. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/sys/windows/vm.rs +0 -0
  1011. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/table.rs +0 -0
  1012. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/traphandlers/backtrace.rs +0 -0
  1013. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/traphandlers/coredump.rs +0 -0
  1014. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/traphandlers.rs +0 -0
  1015. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/vmcontext/vm_host_func_context.rs +0 -0
  1016. /data/ext/cargo-vendor/{wasmtime-runtime-16.0.0 → wasmtime-runtime-17.0.0}/src/vmcontext.rs +0 -0
  1017. /data/ext/cargo-vendor/{wasmtime-types-16.0.0 → wasmtime-types-17.0.0}/LICENSE +0 -0
  1018. /data/ext/cargo-vendor/{wasmtime-types-16.0.0 → wasmtime-types-17.0.0}/src/error.rs +0 -0
  1019. /data/ext/cargo-vendor/{wasmtime-types-16.0.0 → wasmtime-types-17.0.0}/src/lib.rs +0 -0
  1020. /data/ext/cargo-vendor/{wasmtime-versioned-export-macros-16.0.0 → wasmtime-versioned-export-macros-17.0.0}/src/lib.rs +0 -0
  1021. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/LICENSE +0 -0
  1022. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/README.md +0 -0
  1023. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/build.rs +0 -0
  1024. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/lib.rs +0 -0
  1025. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/clocks/host.rs +0 -0
  1026. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/clocks.rs +0 -0
  1027. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/command.rs +0 -0
  1028. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/error.rs +0 -0
  1029. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/env.rs +0 -0
  1030. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/exit.rs +0 -0
  1031. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/filesystem/sync.rs +0 -0
  1032. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/io.rs +0 -0
  1033. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/mod.rs +0 -0
  1034. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/random.rs +0 -0
  1035. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/tcp_create_socket.rs +0 -0
  1036. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/host/udp_create_socket.rs +0 -0
  1037. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/ip_name_lookup.rs +0 -0
  1038. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/pipe.rs +0 -0
  1039. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/preview0.rs +0 -0
  1040. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/random.rs +0 -0
  1041. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/stdio/worker_thread_stdin.rs +0 -0
  1042. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/stdio.rs +0 -0
  1043. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/src/preview2/write_stream.rs +0 -0
  1044. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/tests/process_stdin.rs +0 -0
  1045. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/wit/deps/cli/environment.wit +0 -0
  1046. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/wit/deps/cli/exit.wit +0 -0
  1047. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/wit/deps/cli/run.wit +0 -0
  1048. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/wit/deps/http/handler.wit +0 -0
  1049. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/wit/deps/sockets/instance-network.wit +0 -0
  1050. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/witx/preview0/typenames.witx +0 -0
  1051. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/witx/preview0/wasi_unstable.witx +0 -0
  1052. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/witx/preview1/typenames.witx +0 -0
  1053. /data/ext/cargo-vendor/{wasmtime-wasi-16.0.0 → wasmtime-wasi-17.0.0}/witx/preview1/wasi_snapshot_preview1.witx +0 -0
  1054. /data/ext/cargo-vendor/{wasmtime-winch-16.0.0 → wasmtime-winch-17.0.0}/LICENSE +0 -0
  1055. /data/ext/cargo-vendor/{wasmtime-winch-16.0.0 → wasmtime-winch-17.0.0}/src/builder.rs +0 -0
  1056. /data/ext/cargo-vendor/{wasmtime-winch-16.0.0 → wasmtime-winch-17.0.0}/src/compiler.rs +0 -0
  1057. /data/ext/cargo-vendor/{wasmtime-winch-16.0.0 → wasmtime-winch-17.0.0}/src/lib.rs +0 -0
  1058. /data/ext/cargo-vendor/{wasmtime-wit-bindgen-16.0.0 → wasmtime-wit-bindgen-17.0.0}/src/rust.rs +0 -0
  1059. /data/ext/cargo-vendor/{wasmtime-wit-bindgen-16.0.0 → wasmtime-wit-bindgen-17.0.0}/src/source.rs +0 -0
  1060. /data/ext/cargo-vendor/{wasmtime-wit-bindgen-16.0.0 → wasmtime-wit-bindgen-17.0.0}/src/types.rs +0 -0
  1061. /data/ext/cargo-vendor/{wasmtime-wmemcheck-16.0.0 → wasmtime-wmemcheck-17.0.0}/src/lib.rs +0 -0
  1062. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/LICENSE +0 -0
  1063. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/README.md +0 -0
  1064. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/src/borrow.rs +0 -0
  1065. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/src/error.rs +0 -0
  1066. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/src/guest_type.rs +0 -0
  1067. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/src/lib.rs +0 -0
  1068. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/src/region.rs +0 -0
  1069. /data/ext/cargo-vendor/{wiggle-16.0.0 → wiggle-17.0.0}/src/wasmtime.rs +0 -0
  1070. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/LICENSE +0 -0
  1071. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/README.md +0 -0
  1072. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/codegen_settings.rs +0 -0
  1073. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/config.rs +0 -0
  1074. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/funcs.rs +0 -0
  1075. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/lib.rs +0 -0
  1076. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/lifetimes.rs +0 -0
  1077. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/module_trait.rs +0 -0
  1078. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/names.rs +0 -0
  1079. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/types/error.rs +0 -0
  1080. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/types/flags.rs +0 -0
  1081. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/types/handle.rs +0 -0
  1082. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/types/mod.rs +0 -0
  1083. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/types/record.rs +0 -0
  1084. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/types/variant.rs +0 -0
  1085. /data/ext/cargo-vendor/{wiggle-generate-16.0.0 → wiggle-generate-17.0.0}/src/wasmtime.rs +0 -0
  1086. /data/ext/cargo-vendor/{wiggle-macro-16.0.0 → wiggle-macro-17.0.0}/LICENSE +0 -0
  1087. /data/ext/cargo-vendor/{wiggle-macro-16.0.0 → wiggle-macro-17.0.0}/src/lib.rs +0 -0
  1088. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/LICENSE +0 -0
  1089. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/build.rs +0 -0
  1090. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/abi/local.rs +0 -0
  1091. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/abi/mod.rs +0 -0
  1092. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/codegen/builtin.rs +0 -0
  1093. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/codegen/call.rs +0 -0
  1094. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/codegen/control.rs +0 -0
  1095. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/codegen/mod.rs +0 -0
  1096. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/frame/mod.rs +0 -0
  1097. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/aarch64/abi.rs +0 -0
  1098. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/aarch64/address.rs +0 -0
  1099. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/aarch64/asm.rs +0 -0
  1100. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/aarch64/mod.rs +0 -0
  1101. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/aarch64/regs.rs +0 -0
  1102. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/mod.rs +0 -0
  1103. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/reg.rs +0 -0
  1104. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/x64/abi.rs +0 -0
  1105. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/x64/address.rs +0 -0
  1106. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/x64/mod.rs +0 -0
  1107. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/isa/x64/regs.rs +0 -0
  1108. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/lib.rs +0 -0
  1109. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/regalloc.rs +0 -0
  1110. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/regset.rs +0 -0
  1111. /data/ext/cargo-vendor/{winch-codegen-0.14.0 → winch-codegen-0.15.0}/src/trampoline.rs +0 -0
@@ -0,0 +1,1149 @@
1
+ //! Assembler library implementation for x64.
2
+
3
+ use crate::{
4
+ isa::reg::Reg,
5
+ masm::{DivKind, ExtendKind, IntCmpKind, OperandSize, RemKind, RoundingMode, ShiftKind},
6
+ };
7
+ use cranelift_codegen::{
8
+ entity::EntityRef,
9
+ ir::{types, ConstantPool, ExternalName, LibCall, Opcode, TrapCode, UserExternalNameRef},
10
+ isa::{
11
+ x64::{
12
+ args::{
13
+ self, AluRmiROpcode, Amode, CmpOpcode, DivSignedness, ExtMode, FromWritableReg,
14
+ Gpr, GprMem, GprMemImm, Imm8Gpr, Imm8Reg, RegMem, RegMemImm,
15
+ ShiftKind as CraneliftShiftKind, SseOpcode, SyntheticAmode, WritableGpr,
16
+ WritableXmm, Xmm, XmmMem, XmmMemAligned, CC,
17
+ },
18
+ settings as x64_settings, CallInfo, EmitInfo, EmitState, Inst,
19
+ },
20
+ CallConv,
21
+ },
22
+ settings, Final, MachBuffer, MachBufferFinalized, MachInstEmit, MachInstEmitState, MachLabel,
23
+ VCodeConstantData, VCodeConstants, Writable,
24
+ };
25
+
26
+ use super::address::Address;
27
+ use smallvec::{smallvec, SmallVec};
28
+
29
+ // Conversions between winch-codegen x64 types and cranelift-codegen x64 types.
30
+
31
+ impl From<Reg> for RegMemImm {
32
+ fn from(reg: Reg) -> Self {
33
+ RegMemImm::reg(reg.into())
34
+ }
35
+ }
36
+
37
+ impl From<Reg> for RegMem {
38
+ fn from(value: Reg) -> Self {
39
+ RegMem::Reg { reg: value.into() }
40
+ }
41
+ }
42
+
43
+ impl From<Reg> for WritableGpr {
44
+ fn from(reg: Reg) -> Self {
45
+ let writable = Writable::from_reg(reg.into());
46
+ WritableGpr::from_writable_reg(writable).expect("valid writable gpr")
47
+ }
48
+ }
49
+
50
+ impl From<Reg> for WritableXmm {
51
+ fn from(reg: Reg) -> Self {
52
+ let writable = Writable::from_reg(reg.into());
53
+ WritableXmm::from_writable_reg(writable).expect("valid writable xmm")
54
+ }
55
+ }
56
+
57
+ impl From<Reg> for Gpr {
58
+ fn from(reg: Reg) -> Self {
59
+ Gpr::new(reg.into()).expect("valid gpr")
60
+ }
61
+ }
62
+
63
+ impl From<Reg> for GprMem {
64
+ fn from(value: Reg) -> Self {
65
+ GprMem::new(value.into()).expect("valid gpr")
66
+ }
67
+ }
68
+
69
+ impl From<Reg> for GprMemImm {
70
+ fn from(reg: Reg) -> Self {
71
+ GprMemImm::new(reg.into()).expect("valid gpr")
72
+ }
73
+ }
74
+
75
+ impl From<Reg> for Imm8Gpr {
76
+ fn from(value: Reg) -> Self {
77
+ Imm8Gpr::new(Imm8Reg::Reg { reg: value.into() }).expect("valid Imm8Gpr")
78
+ }
79
+ }
80
+
81
+ impl From<Reg> for Xmm {
82
+ fn from(reg: Reg) -> Self {
83
+ Xmm::new(reg.into()).expect("valid Xmm register")
84
+ }
85
+ }
86
+
87
+ impl From<OperandSize> for args::OperandSize {
88
+ fn from(size: OperandSize) -> Self {
89
+ match size {
90
+ OperandSize::S32 => Self::Size32,
91
+ OperandSize::S64 => Self::Size64,
92
+ s => panic!("Invalid operand size {:?}", s),
93
+ }
94
+ }
95
+ }
96
+
97
+ impl From<DivKind> for DivSignedness {
98
+ fn from(kind: DivKind) -> DivSignedness {
99
+ match kind {
100
+ DivKind::Signed => DivSignedness::Signed,
101
+ DivKind::Unsigned => DivSignedness::Unsigned,
102
+ }
103
+ }
104
+ }
105
+
106
+ impl From<IntCmpKind> for CC {
107
+ fn from(value: IntCmpKind) -> Self {
108
+ match value {
109
+ IntCmpKind::Eq => CC::Z,
110
+ IntCmpKind::Ne => CC::NZ,
111
+ IntCmpKind::LtS => CC::L,
112
+ IntCmpKind::LtU => CC::B,
113
+ IntCmpKind::GtS => CC::NLE,
114
+ IntCmpKind::GtU => CC::NBE,
115
+ IntCmpKind::LeS => CC::LE,
116
+ IntCmpKind::LeU => CC::BE,
117
+ IntCmpKind::GeS => CC::NL,
118
+ IntCmpKind::GeU => CC::NB,
119
+ }
120
+ }
121
+ }
122
+
123
+ impl From<ShiftKind> for CraneliftShiftKind {
124
+ fn from(value: ShiftKind) -> Self {
125
+ match value {
126
+ ShiftKind::Shl => CraneliftShiftKind::ShiftLeft,
127
+ ShiftKind::ShrS => CraneliftShiftKind::ShiftRightArithmetic,
128
+ ShiftKind::ShrU => CraneliftShiftKind::ShiftRightLogical,
129
+ ShiftKind::Rotl => CraneliftShiftKind::RotateLeft,
130
+ ShiftKind::Rotr => CraneliftShiftKind::RotateRight,
131
+ }
132
+ }
133
+ }
134
+
135
+ impl From<ExtendKind> for ExtMode {
136
+ fn from(value: ExtendKind) -> Self {
137
+ match value {
138
+ ExtendKind::I64ExtendI32S | ExtendKind::I64ExtendI32U | ExtendKind::I64Extend32S => {
139
+ ExtMode::LQ
140
+ }
141
+ ExtendKind::I32Extend8S => ExtMode::BL,
142
+ ExtendKind::I32Extend16S => ExtMode::WL,
143
+ ExtendKind::I64Extend8S => ExtMode::BQ,
144
+ ExtendKind::I64Extend16S => ExtMode::WQ,
145
+ }
146
+ }
147
+ }
148
+
149
+ /// Low level assembler implementation for x64.
150
+ pub(crate) struct Assembler {
151
+ /// The machine instruction buffer.
152
+ buffer: MachBuffer<Inst>,
153
+ /// Constant emission information.
154
+ emit_info: EmitInfo,
155
+ /// Emission state.
156
+ emit_state: EmitState,
157
+ /// x64 flags.
158
+ isa_flags: x64_settings::Flags,
159
+ /// Constant pool.
160
+ pool: ConstantPool,
161
+ /// Constants that will be emitted separately by the MachBuffer.
162
+ constants: VCodeConstants,
163
+ }
164
+
165
+ impl Assembler {
166
+ /// Create a new x64 assembler.
167
+ pub fn new(shared_flags: settings::Flags, isa_flags: x64_settings::Flags) -> Self {
168
+ Self {
169
+ buffer: MachBuffer::<Inst>::new(),
170
+ emit_state: Default::default(),
171
+ emit_info: EmitInfo::new(shared_flags, isa_flags.clone()),
172
+ constants: Default::default(),
173
+ pool: ConstantPool::new(),
174
+ isa_flags,
175
+ }
176
+ }
177
+
178
+ /// Get a mutable reference to underlying
179
+ /// machine buffer.
180
+ pub fn buffer_mut(&mut self) -> &mut MachBuffer<Inst> {
181
+ &mut self.buffer
182
+ }
183
+
184
+ /// Adds a constant to the constant pool and returns its address.
185
+ pub fn add_constant(&mut self, constant: &[u8]) -> Address {
186
+ let handle = self.pool.insert(constant.into());
187
+ Address::constant(handle)
188
+ }
189
+
190
+ /// Return the emitted code.
191
+ pub fn finalize(mut self) -> MachBufferFinalized<Final> {
192
+ let stencil = self
193
+ .buffer
194
+ .finish(&self.constants, self.emit_state.ctrl_plane_mut());
195
+ stencil.apply_base_srcloc(Default::default())
196
+ }
197
+
198
+ fn emit(&mut self, inst: Inst) {
199
+ inst.emit(&[], &mut self.buffer, &self.emit_info, &mut self.emit_state);
200
+ }
201
+
202
+ fn to_synthetic_amode(
203
+ addr: &Address,
204
+ pool: &mut ConstantPool,
205
+ constants: &mut VCodeConstants,
206
+ buffer: &mut MachBuffer<Inst>,
207
+ ) -> SyntheticAmode {
208
+ match addr {
209
+ Address::Offset { base, offset } => {
210
+ SyntheticAmode::real(Amode::imm_reg(*offset as i32, (*base).into()))
211
+ }
212
+ Address::Const(c) => {
213
+ // Defer the creation of the
214
+ // `SyntheticAmode::ConstantOffset` addressing mode
215
+ // until the address is referenced by an actual
216
+ // instrunction.
217
+ let constant_data = pool.get(*c);
218
+ let data = VCodeConstantData::Pool(*c, constant_data.clone());
219
+ // If the constaant data is not marked as used, it will be
220
+ // inserted, therefore, it needs to be registered.
221
+ let needs_registration = !constants.pool_uses(&data);
222
+ let constant = constants.insert(VCodeConstantData::Pool(*c, constant_data.clone()));
223
+
224
+ if needs_registration {
225
+ buffer.register_constant(&constant, &data);
226
+ }
227
+ SyntheticAmode::ConstantOffset(constant)
228
+ }
229
+ }
230
+ }
231
+
232
+ /// Push register.
233
+ pub fn push_r(&mut self, reg: Reg) {
234
+ self.emit(Inst::Push64 { src: reg.into() });
235
+ }
236
+
237
+ /// Pop to register.
238
+ pub fn pop_r(&mut self, dst: Reg) {
239
+ let writable = Writable::from_reg(dst.into());
240
+ let dst = WritableGpr::from_writable_reg(writable).expect("valid writable gpr");
241
+ self.emit(Inst::Pop64 { dst });
242
+ }
243
+
244
+ /// Return instruction.
245
+ pub fn ret(&mut self) {
246
+ self.emit(Inst::Ret {
247
+ stack_bytes_to_pop: 0,
248
+ });
249
+ }
250
+
251
+ /// Register-to-register move.
252
+ pub fn mov_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
253
+ self.emit(Inst::MovRR {
254
+ src: src.into(),
255
+ dst: dst.into(),
256
+ size: size.into(),
257
+ });
258
+ }
259
+
260
+ /// Register-to-memory move.
261
+ pub fn mov_rm(&mut self, src: Reg, addr: &Address, size: OperandSize) {
262
+ assert!(addr.is_offset());
263
+ let dst =
264
+ Self::to_synthetic_amode(addr, &mut self.pool, &mut self.constants, &mut self.buffer);
265
+ self.emit(Inst::MovRM {
266
+ size: size.into(),
267
+ src: src.into(),
268
+ dst,
269
+ });
270
+ }
271
+
272
+ /// Immediate-to-memory move.
273
+ pub fn mov_im(&mut self, src: i32, addr: &Address, size: OperandSize) {
274
+ assert!(addr.is_offset());
275
+ let dst =
276
+ Self::to_synthetic_amode(addr, &mut self.pool, &mut self.constants, &mut self.buffer);
277
+ self.emit(Inst::MovImmM {
278
+ size: size.into(),
279
+ simm32: src,
280
+ dst,
281
+ });
282
+ }
283
+
284
+ /// Immediate-to-register move.
285
+ pub fn mov_ir(&mut self, imm: u64, dst: Reg, size: OperandSize) {
286
+ let dst = WritableGpr::from_writable_reg(Writable::from_reg(dst.into()))
287
+ .expect("valid writable gpr");
288
+
289
+ self.emit(Inst::Imm {
290
+ dst_size: size.into(),
291
+ simm64: imm,
292
+ dst,
293
+ });
294
+ }
295
+
296
+ /// Memory-to-register load.
297
+ pub fn mov_mr(&mut self, addr: &Address, dst: Reg, size: OperandSize) {
298
+ use OperandSize::S64;
299
+
300
+ let src =
301
+ Self::to_synthetic_amode(addr, &mut self.pool, &mut self.constants, &mut self.buffer);
302
+
303
+ if size == S64 {
304
+ self.emit(Inst::Mov64MR {
305
+ src,
306
+ dst: dst.into(),
307
+ });
308
+ } else {
309
+ let reg_mem = RegMem::mem(src);
310
+ self.emit(Inst::MovzxRmR {
311
+ ext_mode: ExtMode::LQ,
312
+ src: GprMem::new(reg_mem).expect("valid memory address"),
313
+ dst: dst.into(),
314
+ });
315
+ }
316
+ }
317
+
318
+ /// Register-to-register move with zero extension.
319
+ pub fn movzx_rr(&mut self, src: Reg, dst: Reg, kind: ExtendKind) {
320
+ self.emit(Inst::MovzxRmR {
321
+ ext_mode: kind.into(),
322
+ src: src.into(),
323
+ dst: dst.into(),
324
+ })
325
+ }
326
+
327
+ /// Register-to-register move with sign extension.
328
+ pub fn movsx_rr(&mut self, src: Reg, dst: Reg, kind: ExtendKind) {
329
+ self.emit(Inst::MovsxRmR {
330
+ ext_mode: kind.into(),
331
+ src: src.into(),
332
+ dst: dst.into(),
333
+ });
334
+ }
335
+
336
+ /// Integer register conditional move.
337
+ pub fn cmov(&mut self, src: Reg, dst: Reg, cc: IntCmpKind, size: OperandSize) {
338
+ self.emit(Inst::Cmove {
339
+ size: size.into(),
340
+ cc: cc.into(),
341
+ consequent: src.into(),
342
+ alternative: dst.into(),
343
+ dst: dst.into(),
344
+ })
345
+ }
346
+
347
+ /// Single and double precision floating point
348
+ /// register-to-register move.
349
+ pub fn xmm_mov_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
350
+ use OperandSize::*;
351
+
352
+ let op = match size {
353
+ S32 => SseOpcode::Movaps,
354
+ S64 => SseOpcode::Movapd,
355
+ S128 => SseOpcode::Movdqa,
356
+ };
357
+
358
+ self.emit(Inst::XmmUnaryRmRUnaligned {
359
+ op,
360
+ src: XmmMem::new(src.into()).expect("valid xmm unaligned"),
361
+ dst: dst.into(),
362
+ });
363
+ }
364
+
365
+ /// Single and double precision floating point load.
366
+ pub fn xmm_mov_mr(&mut self, src: &Address, dst: Reg, size: OperandSize) {
367
+ use OperandSize::*;
368
+
369
+ assert!(dst.is_float());
370
+ let op = match size {
371
+ S32 => SseOpcode::Movss,
372
+ S64 => SseOpcode::Movsd,
373
+ S128 => SseOpcode::Movdqu,
374
+ };
375
+
376
+ let src =
377
+ Self::to_synthetic_amode(src, &mut self.pool, &mut self.constants, &mut self.buffer);
378
+ self.emit(Inst::XmmUnaryRmRUnaligned {
379
+ op,
380
+ src: XmmMem::new(RegMem::mem(src)).expect("valid xmm unaligned"),
381
+ dst: dst.into(),
382
+ });
383
+ }
384
+
385
+ /// Single and double precision floating point store.
386
+ pub fn xmm_mov_rm(&mut self, src: Reg, dst: &Address, size: OperandSize) {
387
+ use OperandSize::*;
388
+
389
+ assert!(src.is_float());
390
+
391
+ let op = match size {
392
+ S32 => SseOpcode::Movss,
393
+ S64 => SseOpcode::Movsd,
394
+ S128 => SseOpcode::Movdqu,
395
+ };
396
+
397
+ let dst =
398
+ Self::to_synthetic_amode(dst, &mut self.pool, &mut self.constants, &mut self.buffer);
399
+ self.emit(Inst::XmmMovRM {
400
+ op,
401
+ src: src.into(),
402
+ dst,
403
+ });
404
+ }
405
+
406
+ /// Floating point register conditional move.
407
+ pub fn xmm_cmov(&mut self, src: Reg, dst: Reg, cc: IntCmpKind, size: OperandSize) {
408
+ let ty = match size {
409
+ OperandSize::S32 => types::F32,
410
+ OperandSize::S64 => types::F64,
411
+ // Move the entire 128 bits via movdqa.
412
+ OperandSize::S128 => types::I128,
413
+ };
414
+
415
+ self.emit(Inst::XmmCmove {
416
+ ty,
417
+ cc: cc.into(),
418
+ consequent: XmmMemAligned::new(src.into()).expect("valid XmmMemAligned"),
419
+ alternative: dst.into(),
420
+ dst: dst.into(),
421
+ })
422
+ }
423
+
424
+ /// Subtract register and register
425
+ pub fn sub_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
426
+ self.emit(Inst::AluRmiR {
427
+ size: size.into(),
428
+ op: AluRmiROpcode::Sub,
429
+ src1: dst.into(),
430
+ src2: src.into(),
431
+ dst: dst.into(),
432
+ });
433
+ }
434
+
435
+ /// Subtact immediate register.
436
+ pub fn sub_ir(&mut self, imm: i32, dst: Reg, size: OperandSize) {
437
+ let imm = RegMemImm::imm(imm as u32);
438
+
439
+ self.emit(Inst::AluRmiR {
440
+ size: size.into(),
441
+ op: AluRmiROpcode::Sub,
442
+ src1: dst.into(),
443
+ src2: GprMemImm::new(imm).expect("valid immediate"),
444
+ dst: dst.into(),
445
+ });
446
+ }
447
+
448
+ /// "and" two registers.
449
+ pub fn and_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
450
+ self.emit(Inst::AluRmiR {
451
+ size: size.into(),
452
+ op: AluRmiROpcode::And,
453
+ src1: dst.into(),
454
+ src2: src.into(),
455
+ dst: dst.into(),
456
+ });
457
+ }
458
+
459
+ pub fn and_ir(&mut self, imm: i32, dst: Reg, size: OperandSize) {
460
+ let imm = RegMemImm::imm(imm as u32);
461
+ self.emit(Inst::AluRmiR {
462
+ size: size.into(),
463
+ op: AluRmiROpcode::And,
464
+ src1: dst.into(),
465
+ src2: GprMemImm::new(imm).expect("valid immediate"),
466
+ dst: dst.into(),
467
+ });
468
+ }
469
+
470
+ /// "and" two float registers.
471
+ pub fn xmm_and_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
472
+ let op = match size {
473
+ OperandSize::S32 => SseOpcode::Andps,
474
+ OperandSize::S64 => SseOpcode::Andpd,
475
+ OperandSize::S128 => unreachable!(),
476
+ };
477
+
478
+ self.emit(Inst::XmmRmR {
479
+ op,
480
+ src1: dst.into(),
481
+ src2: XmmMemAligned::from(Xmm::from(src)),
482
+ dst: dst.into(),
483
+ });
484
+ }
485
+
486
+ /// "and not" two float registers.
487
+ pub fn xmm_andn_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
488
+ let op = match size {
489
+ OperandSize::S32 => SseOpcode::Andnps,
490
+ OperandSize::S64 => SseOpcode::Andnpd,
491
+ OperandSize::S128 => unreachable!(),
492
+ };
493
+
494
+ self.emit(Inst::XmmRmR {
495
+ op,
496
+ src1: dst.into(),
497
+ src2: Xmm::from(src).into(),
498
+ dst: dst.into(),
499
+ });
500
+ }
501
+
502
+ pub fn gpr_to_xmm(&mut self, src: Reg, dst: Reg, size: OperandSize) {
503
+ let op = match size {
504
+ OperandSize::S32 => SseOpcode::Movd,
505
+ OperandSize::S64 => SseOpcode::Movq,
506
+ OperandSize::S128 => unreachable!(),
507
+ };
508
+
509
+ self.emit(Inst::GprToXmm {
510
+ op,
511
+ src: src.into(),
512
+ dst: dst.into(),
513
+ src_size: size.into(),
514
+ })
515
+ }
516
+
517
+ pub fn or_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
518
+ self.emit(Inst::AluRmiR {
519
+ size: size.into(),
520
+ op: AluRmiROpcode::Or,
521
+ src1: dst.into(),
522
+ src2: src.into(),
523
+ dst: dst.into(),
524
+ });
525
+ }
526
+
527
+ pub fn or_ir(&mut self, imm: i32, dst: Reg, size: OperandSize) {
528
+ let imm = RegMemImm::imm(imm as u32);
529
+
530
+ self.emit(Inst::AluRmiR {
531
+ size: size.into(),
532
+ op: AluRmiROpcode::Or,
533
+ src1: dst.into(),
534
+ src2: GprMemImm::new(imm).expect("valid immediate"),
535
+ dst: dst.into(),
536
+ });
537
+ }
538
+
539
+ pub fn xmm_or_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
540
+ let op = match size {
541
+ OperandSize::S32 => SseOpcode::Orps,
542
+ OperandSize::S64 => SseOpcode::Orpd,
543
+ OperandSize::S128 => unreachable!(),
544
+ };
545
+
546
+ self.emit(Inst::XmmRmR {
547
+ op,
548
+ src1: dst.into(),
549
+ src2: XmmMemAligned::from(Xmm::from(src)),
550
+ dst: dst.into(),
551
+ });
552
+ }
553
+
554
+ /// Logical exclusive or with registers.
555
+ pub fn xor_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
556
+ self.emit(Inst::AluRmiR {
557
+ size: size.into(),
558
+ op: AluRmiROpcode::Xor,
559
+ src1: dst.into(),
560
+ src2: src.into(),
561
+ dst: dst.into(),
562
+ });
563
+ }
564
+
565
+ pub fn xor_ir(&mut self, imm: i32, dst: Reg, size: OperandSize) {
566
+ let imm = RegMemImm::imm(imm as u32);
567
+
568
+ self.emit(Inst::AluRmiR {
569
+ size: size.into(),
570
+ op: AluRmiROpcode::Xor,
571
+ src1: dst.into(),
572
+ src2: GprMemImm::new(imm).expect("valid immediate"),
573
+ dst: dst.into(),
574
+ });
575
+ }
576
+
577
+ /// Logical exclusive or with float registers.
578
+ pub fn xmm_xor_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
579
+ let op = match size {
580
+ OperandSize::S32 => SseOpcode::Xorps,
581
+ OperandSize::S64 => SseOpcode::Xorpd,
582
+ OperandSize::S128 => unreachable!(),
583
+ };
584
+
585
+ self.emit(Inst::XmmRmR {
586
+ op,
587
+ src1: dst.into(),
588
+ src2: XmmMemAligned::from(Xmm::from(src)),
589
+ dst: dst.into(),
590
+ });
591
+ }
592
+
593
+ /// Shift with register and register.
594
+ pub fn shift_rr(&mut self, src: Reg, dst: Reg, kind: ShiftKind, size: OperandSize) {
595
+ self.emit(Inst::ShiftR {
596
+ size: size.into(),
597
+ kind: kind.into(),
598
+ src: dst.into(),
599
+ num_bits: src.into(),
600
+ dst: dst.into(),
601
+ });
602
+ }
603
+
604
+ /// Shift with immediate and register.
605
+ pub fn shift_ir(&mut self, imm: u8, dst: Reg, kind: ShiftKind, size: OperandSize) {
606
+ let imm = imm.into();
607
+
608
+ self.emit(Inst::ShiftR {
609
+ size: size.into(),
610
+ kind: kind.into(),
611
+ src: dst.into(),
612
+ num_bits: Imm8Gpr::new(imm).expect("valid immediate"),
613
+ dst: dst.into(),
614
+ });
615
+ }
616
+
617
+ /// Signed/unsigned division.
618
+ ///
619
+ /// Emits a sequence of instructions to ensure the correctness of
620
+ /// the division invariants. This function assumes that the
621
+ /// caller has correctly allocated the dividend as `(rdx:rax)` and
622
+ /// accounted for the quotient to be stored in `rax`.
623
+ pub fn div(&mut self, divisor: Reg, dst: (Reg, Reg), kind: DivKind, size: OperandSize) {
624
+ let trap = match kind {
625
+ // Signed division has two trapping conditions, integer overflow and
626
+ // divide-by-zero. Check for divide-by-zero explicitly and let the
627
+ // hardware detect overflow.
628
+ //
629
+ // The dividend is sign extended to initialize `rdx`.
630
+ DivKind::Signed => {
631
+ self.emit(Inst::CmpRmiR {
632
+ size: size.into(),
633
+ src: GprMemImm::new(RegMemImm::imm(0)).unwrap(),
634
+ dst: divisor.into(),
635
+ opcode: CmpOpcode::Cmp,
636
+ });
637
+ self.emit(Inst::TrapIf {
638
+ cc: CC::Z,
639
+ trap_code: TrapCode::IntegerDivisionByZero,
640
+ });
641
+ self.emit(Inst::SignExtendData {
642
+ size: size.into(),
643
+ src: dst.0.into(),
644
+ dst: dst.1.into(),
645
+ });
646
+ TrapCode::IntegerOverflow
647
+ }
648
+
649
+ // Unsigned division only traps in one case, on divide-by-zero, so
650
+ // defer that to the trap opcode.
651
+ //
652
+ // The divisor_hi reg is initialized with zero through an
653
+ // xor-against-itself op.
654
+ DivKind::Unsigned => {
655
+ self.emit(Inst::AluRmiR {
656
+ size: size.into(),
657
+ op: AluRmiROpcode::Xor,
658
+ src1: dst.1.into(),
659
+ src2: dst.1.into(),
660
+ dst: dst.1.into(),
661
+ });
662
+ TrapCode::IntegerDivisionByZero
663
+ }
664
+ };
665
+ self.emit(Inst::Div {
666
+ sign: kind.into(),
667
+ size: size.into(),
668
+ trap,
669
+ divisor: GprMem::new(RegMem::reg(divisor.into())).unwrap(),
670
+ dividend_lo: dst.0.into(),
671
+ dividend_hi: dst.1.into(),
672
+ dst_quotient: dst.0.into(),
673
+ dst_remainder: dst.1.into(),
674
+ });
675
+ }
676
+
677
+ /// Signed/unsigned remainder.
678
+ ///
679
+ /// Emits a sequence of instructions to ensure the correctness of the
680
+ /// division invariants and ultimately calculate the remainder.
681
+ /// This function assumes that the
682
+ /// caller has correctly allocated the dividend as `(rdx:rax)` and
683
+ /// accounted for the remainder to be stored in `rdx`.
684
+ pub fn rem(&mut self, divisor: Reg, dst: (Reg, Reg), kind: RemKind, size: OperandSize) {
685
+ match kind {
686
+ // Signed remainder goes through a pseudo-instruction which has
687
+ // some internal branching. The `dividend_hi`, or `rdx`, is
688
+ // initialized here with a `SignExtendData` instruction.
689
+ RemKind::Signed => {
690
+ self.emit(Inst::SignExtendData {
691
+ size: size.into(),
692
+ src: dst.0.into(),
693
+ dst: dst.1.into(),
694
+ });
695
+ self.emit(Inst::CheckedSRemSeq {
696
+ size: size.into(),
697
+ divisor: divisor.into(),
698
+ dividend_lo: dst.0.into(),
699
+ dividend_hi: dst.1.into(),
700
+ dst_quotient: dst.0.into(),
701
+ dst_remainder: dst.1.into(),
702
+ });
703
+ }
704
+
705
+ // Unsigned remainder initializes `dividend_hi` with zero and
706
+ // then executes a normal `div` instruction.
707
+ RemKind::Unsigned => {
708
+ self.emit(Inst::AluRmiR {
709
+ size: size.into(),
710
+ op: AluRmiROpcode::Xor,
711
+ src1: dst.1.into(),
712
+ src2: dst.1.into(),
713
+ dst: dst.1.into(),
714
+ });
715
+ self.emit(Inst::Div {
716
+ sign: DivSignedness::Unsigned,
717
+ trap: TrapCode::IntegerDivisionByZero,
718
+ size: size.into(),
719
+ divisor: GprMem::new(RegMem::reg(divisor.into())).unwrap(),
720
+ dividend_lo: dst.0.into(),
721
+ dividend_hi: dst.1.into(),
722
+ dst_quotient: dst.0.into(),
723
+ dst_remainder: dst.1.into(),
724
+ });
725
+ }
726
+ }
727
+ }
728
+
729
+ /// Multiply immediate and register.
730
+ pub fn mul_ir(&mut self, imm: i32, dst: Reg, size: OperandSize) {
731
+ let imm = RegMemImm::imm(imm as u32);
732
+
733
+ self.emit(Inst::AluRmiR {
734
+ size: size.into(),
735
+ op: AluRmiROpcode::Mul,
736
+ src1: dst.into(),
737
+ src2: GprMemImm::new(imm).expect("valid immediate"),
738
+ dst: dst.into(),
739
+ });
740
+ }
741
+
742
+ /// Multiply register and register.
743
+ pub fn mul_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
744
+ self.emit(Inst::AluRmiR {
745
+ size: size.into(),
746
+ op: AluRmiROpcode::Mul,
747
+ src1: dst.into(),
748
+ src2: src.into(),
749
+ dst: dst.into(),
750
+ });
751
+ }
752
+
753
+ /// Add immediate and register.
754
+ pub fn add_ir(&mut self, imm: i32, dst: Reg, size: OperandSize) {
755
+ let imm = RegMemImm::imm(imm as u32);
756
+
757
+ self.emit(Inst::AluRmiR {
758
+ size: size.into(),
759
+ op: AluRmiROpcode::Add,
760
+ src1: dst.into(),
761
+ src2: GprMemImm::new(imm).expect("valid immediate"),
762
+ dst: dst.into(),
763
+ });
764
+ }
765
+
766
+ /// Add register and register.
767
+ pub fn add_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
768
+ self.emit(Inst::AluRmiR {
769
+ size: size.into(),
770
+ op: AluRmiROpcode::Add,
771
+ src1: dst.into(),
772
+ src2: src.into(),
773
+ dst: dst.into(),
774
+ });
775
+ }
776
+
777
+ pub fn cmp_ir(&mut self, imm: i32, dst: Reg, size: OperandSize) {
778
+ let imm = RegMemImm::imm(imm as u32);
779
+
780
+ self.emit(Inst::CmpRmiR {
781
+ size: size.into(),
782
+ opcode: CmpOpcode::Cmp,
783
+ src: GprMemImm::new(imm).expect("valid immediate"),
784
+ dst: dst.into(),
785
+ });
786
+ }
787
+
788
+ pub fn cmp_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
789
+ self.emit(Inst::CmpRmiR {
790
+ size: size.into(),
791
+ opcode: CmpOpcode::Cmp,
792
+ src: src.into(),
793
+ dst: dst.into(),
794
+ });
795
+ }
796
+
797
+ /// Compares values in src and dst and sets ZF, PF, and CF flags in EFLAGS
798
+ /// register.
799
+ pub fn ucomis(&mut self, src: Reg, dst: Reg, size: OperandSize) {
800
+ let op = match size {
801
+ OperandSize::S32 => SseOpcode::Ucomiss,
802
+ OperandSize::S64 => SseOpcode::Ucomisd,
803
+ OperandSize::S128 => unreachable!(),
804
+ };
805
+
806
+ self.emit(Inst::XmmCmpRmR {
807
+ op,
808
+ src: Xmm::from(src).into(),
809
+ dst: dst.into(),
810
+ });
811
+ }
812
+
813
+ pub fn popcnt(&mut self, src: Reg, size: OperandSize) {
814
+ assert!(
815
+ self.isa_flags.has_popcnt() && self.isa_flags.has_sse42(),
816
+ "Requires has_popcnt and has_sse42 flags"
817
+ );
818
+ self.emit(Inst::UnaryRmR {
819
+ size: size.into(),
820
+ op: args::UnaryRmROpcode::Popcnt,
821
+ src: src.into(),
822
+ dst: src.into(),
823
+ });
824
+ }
825
+
826
+ /// Emit a test instruction with two register operands.
827
+ pub fn test_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
828
+ self.emit(Inst::CmpRmiR {
829
+ size: size.into(),
830
+ opcode: CmpOpcode::Test,
831
+ src: src.into(),
832
+ dst: dst.into(),
833
+ })
834
+ }
835
+
836
+ /// Set value in dst to `0` or `1` based on flags in status register and
837
+ /// [`CmpKind`].
838
+ pub fn setcc(&mut self, kind: IntCmpKind, dst: Reg) {
839
+ self.setcc_impl(kind.into(), dst);
840
+ }
841
+
842
+ /// Set value in dst to `1` if parity flag in status register is set, `0`
843
+ /// otherwise.
844
+ pub fn setp(&mut self, dst: Reg) {
845
+ self.setcc_impl(CC::P, dst);
846
+ }
847
+
848
+ /// Set value in dst to `1` if parity flag in status register is not set,
849
+ /// `0` otherwise.
850
+ pub fn setnp(&mut self, dst: Reg) {
851
+ self.setcc_impl(CC::NP, dst);
852
+ }
853
+
854
+ fn setcc_impl(&mut self, cc: CC, dst: Reg) {
855
+ // Clear the dst register or bits 1 to 31 may be incorrectly set.
856
+ // Don't use xor since it updates the status register.
857
+ self.emit(Inst::Imm {
858
+ dst_size: args::OperandSize::Size32, // Always going to be an i32 result.
859
+ simm64: 0,
860
+ dst: dst.into(),
861
+ });
862
+ // Copy correct bit from status register into dst register.
863
+ self.emit(Inst::Setcc {
864
+ cc,
865
+ dst: dst.into(),
866
+ });
867
+ }
868
+
869
+ /// Store the count of leading zeroes in src in dst.
870
+ /// Requires `has_lzcnt` flag.
871
+ pub fn lzcnt(&mut self, src: Reg, dst: Reg, size: OperandSize) {
872
+ assert!(self.isa_flags.has_lzcnt(), "Requires has_lzcnt flag");
873
+ self.emit(Inst::UnaryRmR {
874
+ size: size.into(),
875
+ op: args::UnaryRmROpcode::Lzcnt,
876
+ src: src.into(),
877
+ dst: dst.into(),
878
+ });
879
+ }
880
+
881
+ /// Store the count of trailing zeroes in src in dst.
882
+ /// Requires `has_bmi1` flag.
883
+ pub fn tzcnt(&mut self, src: Reg, dst: Reg, size: OperandSize) {
884
+ assert!(self.isa_flags.has_bmi1(), "Requires has_bmi1 flag");
885
+ self.emit(Inst::UnaryRmR {
886
+ size: size.into(),
887
+ op: args::UnaryRmROpcode::Tzcnt,
888
+ src: src.into(),
889
+ dst: dst.into(),
890
+ });
891
+ }
892
+
893
+ /// Stores position of the most significant bit set in src in dst.
894
+ /// Zero flag is set if src is equal to 0.
895
+ pub fn bsr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
896
+ self.emit(Inst::UnaryRmR {
897
+ size: size.into(),
898
+ op: args::UnaryRmROpcode::Bsr,
899
+ src: src.into(),
900
+ dst: dst.into(),
901
+ });
902
+ }
903
+
904
+ /// Performs integer negation on src and places result in dst.
905
+ pub fn neg(&mut self, src: Reg, dst: Reg, size: OperandSize) {
906
+ self.emit(Inst::Neg {
907
+ size: size.into(),
908
+ src: src.into(),
909
+ dst: dst.into(),
910
+ });
911
+ }
912
+
913
+ /// Stores position of the least significant bit set in src in dst.
914
+ /// Zero flag is set if src is equal to 0.
915
+ pub fn bsf(&mut self, src: Reg, dst: Reg, size: OperandSize) {
916
+ self.emit(Inst::UnaryRmR {
917
+ size: size.into(),
918
+ op: args::UnaryRmROpcode::Bsf,
919
+ src: src.into(),
920
+ dst: dst.into(),
921
+ });
922
+ }
923
+
924
+ /// Performs float addition on src and dst and places result in dst.
925
+ pub fn xmm_add_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
926
+ let op = match size {
927
+ OperandSize::S32 => SseOpcode::Addss,
928
+ OperandSize::S64 => SseOpcode::Addsd,
929
+ OperandSize::S128 => unreachable!(),
930
+ };
931
+
932
+ self.emit(Inst::XmmRmRUnaligned {
933
+ op,
934
+ src1: Xmm::from(dst).into(),
935
+ src2: Xmm::from(src).into(),
936
+ dst: dst.into(),
937
+ });
938
+ }
939
+
940
+ /// Performs float subtraction on src and dst and places result in dst.
941
+ pub fn xmm_sub_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
942
+ let op = match size {
943
+ OperandSize::S32 => SseOpcode::Subss,
944
+ OperandSize::S64 => SseOpcode::Subsd,
945
+ OperandSize::S128 => unreachable!(),
946
+ };
947
+
948
+ self.emit(Inst::XmmRmRUnaligned {
949
+ op,
950
+ src1: Xmm::from(dst).into(),
951
+ src2: Xmm::from(src).into(),
952
+ dst: dst.into(),
953
+ });
954
+ }
955
+
956
+ /// Performs float multiplication on src and dst and places result in dst.
957
+ pub fn xmm_mul_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
958
+ let op = match size {
959
+ OperandSize::S32 => SseOpcode::Mulss,
960
+ OperandSize::S64 => SseOpcode::Mulsd,
961
+ OperandSize::S128 => unreachable!(),
962
+ };
963
+
964
+ self.emit(Inst::XmmRmRUnaligned {
965
+ op,
966
+ src1: Xmm::from(dst).into(),
967
+ src2: Xmm::from(src).into(),
968
+ dst: dst.into(),
969
+ });
970
+ }
971
+
972
+ /// Performs float division on src and dst and places result in dst.
973
+ pub fn xmm_div_rr(&mut self, src: Reg, dst: Reg, size: OperandSize) {
974
+ let op = match size {
975
+ OperandSize::S32 => SseOpcode::Divss,
976
+ OperandSize::S64 => SseOpcode::Divsd,
977
+ OperandSize::S128 => unreachable!(),
978
+ };
979
+
980
+ self.emit(Inst::XmmRmRUnaligned {
981
+ op,
982
+ src1: Xmm::from(dst).into(),
983
+ src2: Xmm::from(src).into(),
984
+ dst: dst.into(),
985
+ });
986
+ }
987
+
988
+ /// Mininum for src and dst XMM registers with results put in dst.
989
+ pub fn xmm_min_seq(&mut self, src: Reg, dst: Reg, size: OperandSize) {
990
+ self.emit(Inst::XmmMinMaxSeq {
991
+ size: size.into(),
992
+ is_min: true,
993
+ lhs: src.into(),
994
+ rhs: dst.into(),
995
+ dst: dst.into(),
996
+ });
997
+ }
998
+
999
+ /// Maximum for src and dst XMM registers with results put in dst.
1000
+ pub fn xmm_max_seq(&mut self, src: Reg, dst: Reg, size: OperandSize) {
1001
+ self.emit(Inst::XmmMinMaxSeq {
1002
+ size: size.into(),
1003
+ is_min: false,
1004
+ lhs: src.into(),
1005
+ rhs: dst.into(),
1006
+ dst: dst.into(),
1007
+ });
1008
+ }
1009
+
1010
+ /// Perform rounding operation on float register src and place results in
1011
+ /// float register dst.
1012
+ pub fn xmm_rounds_rr(&mut self, src: Reg, dst: Reg, mode: RoundingMode, size: OperandSize) {
1013
+ let op = match size {
1014
+ OperandSize::S32 => SseOpcode::Roundss,
1015
+ OperandSize::S64 => SseOpcode::Roundsd,
1016
+ OperandSize::S128 => unreachable!(),
1017
+ };
1018
+
1019
+ let imm: u8 = match mode {
1020
+ RoundingMode::Nearest => 0x00,
1021
+ RoundingMode::Down => 0x01,
1022
+ RoundingMode::Up => 0x02,
1023
+ RoundingMode::Zero => 0x03,
1024
+ };
1025
+
1026
+ self.emit(Inst::XmmUnaryRmRImm {
1027
+ op,
1028
+ src: XmmMemAligned::from(Xmm::from(src)),
1029
+ imm,
1030
+ dst: dst.into(),
1031
+ })
1032
+ }
1033
+
1034
+ pub fn sqrt(&mut self, src: Reg, dst: Reg, size: OperandSize) {
1035
+ let op = match size {
1036
+ OperandSize::S32 => SseOpcode::Sqrtss,
1037
+ OperandSize::S64 => SseOpcode::Sqrtsd,
1038
+ OperandSize::S128 => unreachable!(),
1039
+ };
1040
+
1041
+ self.emit(Inst::XmmUnaryRmR {
1042
+ op,
1043
+ src: Xmm::from(src).into(),
1044
+ dst: dst.into(),
1045
+ })
1046
+ }
1047
+
1048
+ /// Emit a call to an unknown location through a register.
1049
+ pub fn call_with_reg(&mut self, callee: Reg) {
1050
+ self.emit(Inst::CallUnknown {
1051
+ dest: RegMem::reg(callee.into()),
1052
+ info: Box::new(CallInfo {
1053
+ uses: smallvec![],
1054
+ defs: smallvec![],
1055
+ clobbers: Default::default(),
1056
+ opcode: Opcode::Call,
1057
+ callee_pop_size: 0,
1058
+ callee_conv: CallConv::SystemV,
1059
+ }),
1060
+ });
1061
+ }
1062
+
1063
+ /// Emit a call to a locally defined function through an index.
1064
+ pub fn call_with_index(&mut self, index: u32) {
1065
+ let dest = ExternalName::user(UserExternalNameRef::new(index as usize));
1066
+ self.emit(Inst::CallKnown {
1067
+ dest,
1068
+ info: Box::new(CallInfo {
1069
+ uses: smallvec![],
1070
+ defs: smallvec![],
1071
+ clobbers: Default::default(),
1072
+ opcode: Opcode::Call,
1073
+ callee_pop_size: 0,
1074
+ callee_conv: CallConv::SystemV,
1075
+ }),
1076
+ });
1077
+ }
1078
+
1079
+ /// Emit a call to a well-known libcall.
1080
+ pub fn call_with_lib(&mut self, lib: LibCall) {
1081
+ let dest = ExternalName::LibCall(lib);
1082
+ self.emit(Inst::CallKnown {
1083
+ dest,
1084
+ info: Box::new(CallInfo {
1085
+ uses: smallvec![],
1086
+ defs: smallvec![],
1087
+ clobbers: Default::default(),
1088
+ opcode: Opcode::Call,
1089
+ callee_pop_size: 0,
1090
+ callee_conv: CallConv::SystemV,
1091
+ }),
1092
+ });
1093
+ }
1094
+
1095
+ /// Emits a conditional jump to the given label.
1096
+ pub fn jmp_if(&mut self, cc: impl Into<CC>, taken: MachLabel) {
1097
+ self.emit(Inst::JmpIf {
1098
+ cc: cc.into(),
1099
+ taken,
1100
+ });
1101
+ }
1102
+
1103
+ /// Performs an unconditional jump to the given label.
1104
+ pub fn jmp(&mut self, target: MachLabel) {
1105
+ self.emit(Inst::JmpKnown { dst: target });
1106
+ }
1107
+
1108
+ /// Emits a jump table sequence.
1109
+ pub fn jmp_table(
1110
+ &mut self,
1111
+ targets: SmallVec<[MachLabel; 4]>,
1112
+ default: MachLabel,
1113
+ index: Reg,
1114
+ tmp1: Reg,
1115
+ tmp2: Reg,
1116
+ ) {
1117
+ self.emit(Inst::JmpTableSeq {
1118
+ idx: index.into(),
1119
+ tmp1: Writable::from_reg(tmp1.into()),
1120
+ tmp2: Writable::from_reg(tmp2.into()),
1121
+ default_target: default,
1122
+ targets: Box::new(targets.to_vec()),
1123
+ })
1124
+ }
1125
+
1126
+ /// Emit a trap instruction.
1127
+ pub fn trap(&mut self, code: TrapCode) {
1128
+ self.emit(Inst::Ud2 { trap_code: code })
1129
+ }
1130
+
1131
+ /// Conditional trap.
1132
+ pub fn trapif(&mut self, cc: IntCmpKind, trap_code: TrapCode) {
1133
+ self.emit(Inst::TrapIf {
1134
+ cc: cc.into(),
1135
+ trap_code,
1136
+ });
1137
+ }
1138
+
1139
+ /// Load effective address.
1140
+ pub fn lea(&mut self, addr: &Address, dst: Reg, size: OperandSize) {
1141
+ let addr =
1142
+ Self::to_synthetic_amode(addr, &mut self.pool, &mut self.constants, &mut self.buffer);
1143
+ self.emit(Inst::LoadEffectiveAddress {
1144
+ addr,
1145
+ dst: dst.into(),
1146
+ size: size.into(),
1147
+ });
1148
+ }
1149
+ }