udb 0.1.14 → 0.1.15

data/.data/spec/std/isa/param/MTVEC_BASE_ALIGNMENT_VECTORED.yaml

@@ -25,73 +25,79 @@ description: |
   the base, the minimum alignment cannot be less than 4.
 schema:
   description: An unsigned power of 2 greater than or equal to 4 that fits in 64 bits
-  default: 4
+  default: 0x4
   enum:
     [
-      4,
-      8,
-      16,
-      32,
-      64,
-      128,
-      256,
-      512,
-      1024,
-      2048,
-      4095,
-      8192,
-      16384,
-      32768,
-      65536,
-      131072,
-      262144,
-      524288,
-      1048576,
-      2097152,
-      4194304,
-      8388608,
-      16777216,
-      33554432,
-      67108864,
-      134217728,
-      268435456,
-      536870912,
-      1073741824,
-      2147483648,
-      4294967296,
-      8589934592,
-      17179869184,
-      34359738368,
-      68719476736,
-      137438953472,
-      274877906944,
-      549755813888,
-      1099511627776,
-      2199023255552,
-      4398046511104,
-      8796093022208,
-      17592186044416,
-      35184372088832,
-      70368744177664,
-      140737488355328,
-      281474976710656,
-      562949953421312,
-      1125899906842624,
-      2251799813685248,
-      4503599627370496,
-      9007199254740992,
-      18014398509481984,
-      36028797018963968,
-      72057594037927936,
-      144115188075855872,
-      288230376151711744,
-      576460752303423488,
-      1152921504606846976,
-      2305843009213693952,
-      4611686018427387904,
-      9223372036854775808,
+      0x4,
+      0x8,
+      0x10,
+      0x20,
+      0x40,
+      0x80,
+      0x100,
+      0x200,
+      0x400,
+      0x800,
+      0x1000,
+      0x2000,
+      0x4000,
+      0x8000,
+      0x10000,
+      0x20000,
+      0x40000,
+      0x80000,
+      0x100000,
+      0x200000,
+      0x400000,
+      0x800000,
+      0x1000000,
+      0x2000000,
+      0x4000000,
+      0x8000000,
+      0x10000000,
+      0x20000000,
+      0x40000000,
+      0x80000000,
+      0x100000000,
+      0x200000000,
+      0x400000000,
+      0x800000000,
+      0x1000000000,
+      0x2000000000,
+      0x4000000000,
+      0x8000000000,
+      0x10000000000,
+      0x20000000000,
+      0x40000000000,
+      0x80000000000,
+      0x100000000000,
+      0x200000000000,
+      0x400000000000,
+      0x800000000000,
+      0x1000000000000,
+      0x2000000000000,
+      0x4000000000000,
+      0x8000000000000,
+      0x10000000000000,
+      0x20000000000000,
+      0x40000000000000,
+      0x80000000000000,
+      0x100000000000000,
+      0x200000000000000,
+      0x400000000000000,
+      0x800000000000000,
+      0x1000000000000000,
+      0x2000000000000000,
+      0x4000000000000000,
+      0x8000000000000000,
     ]
 
 requirements:
-  idl(): |
-    (MXLEN == 32) -> MTVEC_BASE_ALIGNMENT_VECTORED <= 2147483648;
+  if:
+    param:
+      name: MXLEN
+      equal: 32
+  then:
+    param:
+      name: MTVEC_BASE_ALIGNMENT_VECTORED
+      lessThanOrEqual: 0x80000000

data/.data/spec/std/isa/param/STVAL_WIDTH.yaml

@@ -10,10 +10,11 @@ description: |
   The number of implemented bits in `stval`.
 
   Must be greater than or equal to _max_(`PHYS_ADDR_WIDTH`, `VA_SIZE`)
-long_name: TODO
+long_name: "`stval` implemented bits"
 schema:
   type: integer
-  maximum: 18446744073709551615
+  minimum: 0
+  maximum: 64
 definedBy:
   extension:
     name: S

data/.data/spec/std/isa/param/STVEC_BASE_ALIGNMENT_VECTORED.yaml

@@ -0,0 +1,100 @@
+# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+# yaml-language-server: $schema=../../../schemas/param_schema.json
+
+$schema: param_schema.json#
+kind: parameter
+name: STVEC_BASE_ALIGNMENT_VECTORED
+long_name: |
+  Minimum alignment of `stvec.BASE` when `stvec.MODE` is 1 (Vectored)
+definedBy:
+  allOf:
+    - extension:
+        name: S
+    - param:
+        name: STVEC_MODES
+        includes: 1
+        reason: Only relevant when vectored mode is supported
+description: |
+  Minimum alignment of the base pointer when `stvec.MODE` is Vectored. Because
+  `stvec` excludes the two least-significant bits of the base, the minimum
+  alignment cannot be less than 4 bytes.
+schema:
+  description: An unsigned power of 2 greater than or equal to 4 that fits in 64 bits
+  default: 0x4
+  enum:
+    [
+      0x4,
+      0x8,
+      0x10,
+      0x20,
+      0x40,
+      0x80,
+      0x100,
+      0x200,
+      0x400,
+      0x800,
+      0x1000,
+      0x2000,
+      0x4000,
+      0x8000,
+      0x10000,
+      0x20000,
+      0x40000,
+      0x80000,
+      0x100000,
+      0x200000,
+      0x400000,
+      0x800000,
+      0x1000000,
+      0x2000000,
+      0x4000000,
+      0x8000000,
+      0x10000000,
+      0x20000000,
+      0x40000000,
+      0x80000000,
+      0x100000000,
+      0x200000000,
+      0x400000000,
+      0x800000000,
+      0x1000000000,
+      0x2000000000,
+      0x4000000000,
+      0x8000000000,
+      0x10000000000,
+      0x20000000000,
+      0x40000000000,
+      0x80000000000,
+      0x100000000000,
+      0x200000000000,
+      0x400000000000,
+      0x800000000000,
+      0x1000000000000,
+      0x2000000000000,
+      0x4000000000000,
+      0x8000000000000,
+      0x10000000000000,
+      0x20000000000000,
+      0x40000000000000,
+      0x80000000000000,
+      0x100000000000000,
+      0x200000000000000,
+      0x400000000000000,
+      0x800000000000000,
+      0x1000000000000000,
+      0x2000000000000000,
+      0x4000000000000000,
+      0x8000000000000000,
+    ]
+
+requirements:
+  if:
+    param:
+      name: SXLEN
+      includes: 32
+  then:
+    param:
+      name: STVEC_BASE_ALIGNMENT_VECTORED
+      lessThanOrEqual: 0x80000000

data/.data/spec/std/isa/param/STVEC_MODES.yaml

@@ -0,0 +1,31 @@
+# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+# yaml-language-server: $schema=../../../schemas/param_schema.json
+
+$schema: param_schema.json#
+kind: parameter
+name: STVEC_MODES
+long_name: |
+  Modes supported by `stvec.MODE`
+definedBy:
+  extension:
+    name: S
+description: |
+  Options:
+
+    0::
+      Direct; All traps set `pc` to `stvec.BASE`
+    1::
+      Vectored; Asynchronous interrupts set `pc` to `stvec.BASE` + 4 x cause.
+
+  If only one mode is given, `stvec.MODE` is assumed to be read-only with that value.
+  Otherwise, `stvec.MODE` is read-write.
+schema:
+  type: array
+  items:
+    type: integer
+    enum: [0, 1]
+  minItems: 1
+  maxItems: 2
+  uniqueItems: true

data/.data/spec/std/isa/param/SV32_VSMODE_TRANSLATION.yaml

@@ -16,7 +16,7 @@ requirements:
   idl(): |
     # at least one of Bare, Sv32 must be supported
     !VSSTAGE_MODE_BARE
-      -> SV39_VSMODE_TRANSLATION;
+      -> SV32_VSMODE_TRANSLATION;
   reason: at least one of Bare, Sv32 must be supported
 definedBy:
   allOf:

data/.data/spec/std/isa/param/SXLEN.yaml

@@ -9,8 +9,8 @@ name: SXLEN
 description: |
   Set of XLENs supported in S-mode. Can be one of:
 
-    * 32:   SXLEN is always 32
-    * 64:   SXLEN is always 64
+    * [32]:     SXLEN is always 32
+    * [64]:     SXLEN is always 64
     * [32, 64]: SXLEN can be changed (via mstatus.SXL) between 32 and 64
 long_name: TODO
 schema:

data/.data/spec/std/isa/param/TINST_VALUE_ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT.yaml

@@ -7,7 +7,7 @@ $schema: param_schema.json#
 kind: parameter
 name: TINST_VALUE_ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT
 description: |
-  Value to write into htval/mtval2 when there is a guest page fault on a final translation.
+  Value written into htinst/mtinst when there is an instruction guest-page fault on a final translation.
 
   Possible values:
     * "always zero": Always write the value zero

data/.data/spec/std/isa/param/TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT.yaml

@@ -7,7 +7,7 @@ $schema: param_schema.json#
 kind: parameter
 name: TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT
 description: |
-  Value to write into htval/mtval2 when there is a guest page fault on a final translation.
+  Value written into htinst/mtinst when there is a load guest-page fault on a final translation.
 
   Possible values:
     * "always zero": Always write the value zero

data/.data/spec/std/isa/param/TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT.yaml

@@ -7,7 +7,7 @@ $schema: param_schema.json#
 kind: parameter
 name: TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT
 description: |
-  Value to write into htval/mtval2 when there is a guest page fault on a final translation.
+  Value written into htinst/mtinst when there is a store/AMO guest-page fault on a final translation.
 
   Possible values:
     * "always zero": Always write the value zero

data/.data/spec/std/isa/param/TINST_VALUE_ON_LOAD_ADDRESS_MISALIGNED.yaml

@@ -7,7 +7,7 @@ $schema: param_schema.json#
 kind: parameter
 name: TINST_VALUE_ON_LOAD_ADDRESS_MISALIGNED
 description: |
-  Value written into htinst/mtinst on a VirtualInstruction exception from VU/VS-mode.
+  Value written into htinst/mtinst on a LoadAddressMisaligned exception from VU/VS-mode.
 
   Possible values:
     * "always zero": Always write the value zero

data/.data/spec/std/isa/param/TINST_VALUE_ON_STORE_AMO_ADDRESS_MISALIGNED.yaml

@@ -7,7 +7,7 @@ $schema: param_schema.json#
 kind: parameter
 name: TINST_VALUE_ON_STORE_AMO_ADDRESS_MISALIGNED
 description: |
-  Value written into htinst/mtinst on a VirtualInstruction exception from VU/VS-mode.
+  Value written into htinst/mtinst on a StoreAmoAddressMisaligned exception from VU/VS-mode.
 
   Possible values:
     * "always zero": Always write the value zero

data/.data/spec/std/isa/param/UXLEN.yaml

@@ -7,7 +7,7 @@ $schema: param_schema.json#
 kind: parameter
 name: UXLEN
 description: |
-  Set of XLENs supported in U-mode. When both 32 and 64 are supported, SXLEN can be changed,
+  Set of XLENs supported in U-mode. When both 32 and 64 are supported, UXLEN can be changed,
   via mstatus.UXL, between 32 and 64.
 long_name: TODO
 schema:

data/.data/spec/std/isa/param/VLEN.yaml

@@ -8,15 +8,24 @@ kind: parameter
 name: VLEN
 description: |
   The number of bits in a single vector register.
-long_name: TODO
+long_name: vector register bit width
 schema:
   type: integer
-  minimum: 32
-  maximum: 65536
-#    requirements:
-#      idl(): |
-#        -> (VLEN >= ELEN) && (VLEN <='h10000) && (popcount(VLEN) == 1);
-#      reason: VLEN >= ELEN, which must be a power of 2, and must be no greater than 2^16.
+  enum:
+    [
+      0x20,
+      0x40,
+      0x80,
+      0x100,
+      0x200,
+      0x400,
+      0x800,
+      0x1000,
+      0x2000,
+      0x4000,
+      0x8000,
+      0x10000,
+    ]
 definedBy:
   extension:
     name: Zvl32b

data/.data/spec/std/isa/param/VSTVEC_MODES.yaml

@@ -0,0 +1,31 @@
+# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+# yaml-language-server: $schema=../../../schemas/param_schema.json
+
+$schema: param_schema.json#
+kind: parameter
+name: VSTVEC_MODES
+long_name: |
+  Modes supported by `vstvec.MODE`
+definedBy:
+  extension:
+    name: H
+description: |
+  Options:
+
+    0::
+      Direct; All traps set `pc` to `vstvec.BASE`
+    1::
+      Vectored; Asynchronous interrupts set `pc` to `vstvec.BASE` + 4 x cause.
+
+  If only one mode is given, `vstvec.MODE` is assumed to be read-only with that value.
+  Otherwise, `vstvec.MODE` is read-write.
+schema:
+  type: array
+  items:
+    type: integer
+    enum: [0, 1]
+  minItems: 1
+  maxItems: 2
+  uniqueItems: true

data/lib/udb/Z3_VERSION

@@ -1 +1 @@
-z3-4.16.0
+z3-5.0.0

data/lib/udb/obj/csr.rb

@@ -198,7 +198,7 @@ module Udb
         # VSXLEN condition applies if VS-mode is possible
         (cfg_arch.mxlen.nil?) || \
         (cfg_arch.possible_extensions.map(&:name).include?("S") && \
-          (cfg_arch.param_values["SXLEN"].nil? || cfg_arch.param_values["SXLEN"].size > 1)) && \
+          (cfg_arch.param_values["SXLEN"].nil? || cfg_arch.param_values["SXLEN"].size > 1)) || \
         (cfg_arch.possible_extensions.map(&:name).include?("H") && \
           (cfg_arch.param_values["VSXLEN"].nil? || cfg_arch.param_values["VSXLEN"].size > 1))
       else

data/lib/udb/obj/csr_field.rb

@@ -715,7 +715,7 @@ module Udb
     sig { override.returns(T::Boolean) }
     def defined_in_base64? = base != 32
 
-    sig { params(xlen: Integer).returns(T::Boolean) }
+    sig { override.params(xlen: Integer).returns(T::Boolean) }
     def defined_in_base?(xlen) = xlen == 32 ? defined_in_base32? : defined_in_base64?
 
     # @return [Boolean] Whether or not this field exists for any XLEN

data/lib/udb/obj/extension.rb

@@ -403,7 +403,7 @@ module Udb
     sig { override.params(other_ext: Object).returns(T.nilable(Integer)).checked(:never) }
     def <=>(other_ext)
       return nil unless other_ext.is_a?(Extension)
-      other_ext.name <=> name
+      name <=> other_ext.name
     end
 
     # returns list of exception codes that are defined by any version of this extension

data/lib/udb/version.rb

@@ -5,5 +5,5 @@
 # frozen_string_literal: true
 
 module Udb
-  def self.version = "0.1.14"
+  def self.version = "0.1.15"
 end

data/lib/udb/version_spec.rb

@@ -114,7 +114,7 @@ module Udb
     sig { params(other: T.untyped).returns(T.nilable(Integer)).checked(:never) }
     def <=>(other)
       if other.is_a?(String)
-        VersionSpec.new(other) <=> self
+        self <=> VersionSpec.new(other)
       elsif other.is_a?(VersionSpec)
         if @major != other.major
           @major <=> other.major

data/lib/udb/z3.rb

@@ -318,12 +318,13 @@ module Udb
   # Supported JSON schema features:
   # - Type constraints (boolean, integer, string, array)
   # - Value constraints (const, enum, minimum, maximum)
-  # - Composition (allOf)
+  # - Composition (allOf; anyOf for boolean, integer, and string)
   # - References ($ref to uint32/uint64)
   # - Array constraints (items, minItems, maxItems, contains, uniqueItems)
   #
   # Not yet supported (TODO):
-  # - anyOf, oneOf, noneOf (would require disjunctive constraints)
+  # - anyOf for array
+  # - oneOf, noneOf
   # - if/then/else (conditional schemas)
   class Z3ParameterTerm
     extend T::Sig
@@ -341,6 +342,7 @@ module Udb
     # - enum: one of several values
     # - minimum/maximum: range bounds (unsigned comparison)
     # - allOf: conjunction of subschemas
+    # - anyOf: inclusive disjunction of subschemas (at least one must hold)
     # - $ref: references to uint32/uint64 types
     #
     # @param solver [Z3Solver] The solver to add assertions to
@@ -385,12 +387,15 @@ module Udb
 
       if schema_hsh.key?("allOf")
         schema_hsh.fetch("allOf").each do |h|
-          assertions += constrain_int(solver, term, h)
+          assertions += constrain_int(solver, term, h, assert: false)
         end
       end
 
       if schema_hsh.key?("anyOf")
-        raise "TODO: anyOf not yet implemented for integer constraints"
+        branches = schema_hsh.fetch("anyOf").map do |h|
+          constrain_int(solver, term, h, assert: false)
+        end
+        assertions << any_of_constraint(branches)
       end
 
       if schema_hsh.key?("oneOf")
@@ -433,6 +438,7 @@ module Udb
     # Handles JSON schema keywords:
     # - const: exact boolean value
     # - allOf: conjunction of subschemas
+    # - anyOf: inclusive disjunction of subschemas (at least one must hold)
     #
     # @param solver [Z3Solver] The solver to add assertions to
     # @param term [Z3::BoolExpr] The Z3 boolean term to constrain
@@ -458,12 +464,15 @@ module Udb
 
       if schema_hsh.key?("allOf")
         schema_hsh.fetch("allOf").each do |h|
-          assertions += constrain_bool(solver, term, h)
+          assertions += constrain_bool(solver, term, h, assert: false)
         end
       end
 
       if schema_hsh.key?("anyOf")
-        raise "TODO: anyOf not yet implemented for boolean constraints"
+        branches = schema_hsh.fetch("anyOf").map do |h|
+          constrain_bool(solver, term, h, assert: false)
+        end
+        assertions << any_of_constraint(branches)
       end
 
       if schema_hsh.key?("oneOf")
@@ -492,6 +501,7 @@ module Udb
     # Handles JSON schema keywords:
     # - const: exact string value (compared via hash)
     # - enum: one of several string values (compared via hash)
+    # - anyOf: inclusive disjunction of subschemas (at least one must hold)
     #
     # @param solver [Z3Solver] The solver to add assertions to
     # @param term [Z3::IntExpr] The Z3 integer term representing the string hash
@@ -526,7 +536,10 @@ module Udb
       end
 
       if schema_hsh.key?("anyOf")
-        raise "TODO: anyOf not yet implemented for string constraints"
+        branches = schema_hsh.fetch("anyOf").map do |h|
+          constrain_string(solver, term, h, assert: false)
+        end
+        assertions << any_of_constraint(branches)
       end
 
       if schema_hsh.key?("oneOf")
@@ -547,6 +560,15 @@ module Udb
       assertions
     end
 
+    sig { params(branches: T::Array[T::Array[Z3::BoolExpr]]).returns(Z3::BoolExpr) }
+    def self.any_of_constraint(branches)
+      expressions = branches.map do |branch|
+        branch.reduce(Z3.True) { |expression, assertion| expression & assertion }
+      end
+      expressions.reduce(Z3.False) { |expression, branch| expression | branch }
+    end
+    private_class_method :any_of_constraint
+
     # Extract array constraints from JSON schema
     #
     # Processes JSON schema array keywords and returns an ArrayConstraints object