udb 0.1.13 → 0.1.14
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +4 -4
- data/.data/cfgs/example_rv64_with_overlay.yaml +15 -18
- data/.data/cfgs/qc_iu.yaml +5 -1
- data/.data/cfgs/rv32-riscv-tests.yaml +4 -1
- data/.data/cfgs/rv32-vector.yaml +4 -1
- data/.data/cfgs/rv64-riscv-tests.yaml +4 -1
- data/.data/cfgs/rv64-vector.yaml +4 -1
- data/.data/spec/custom/isa/qc_iu/ext/Xqccmi.yaml +107 -36
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmi/qc.cm.ilut.yaml +52 -69
- data/.data/spec/custom/isa/qc_iu/isa/globals.isa +27 -5
- data/.data/spec/schemas/config_schema.json +1 -1
- data/.data/spec/schemas/mmr_schema.json +3 -3
- data/.data/spec/schemas/schema_defs.json +5 -0
- data/.data/spec/std/isa/csr/H/henvcfg.yaml +25 -0
- data/.data/spec/std/isa/csr/I/pmpaddr0.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr1.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr10.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr11.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr12.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr13.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr14.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr15.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr16.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr17.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr18.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr19.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr2.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr20.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr21.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr22.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr23.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr24.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr25.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr26.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr27.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr28.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr29.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr3.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr30.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr31.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr32.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr33.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr34.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr35.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr36.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr37.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr38.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr39.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr4.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr40.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr41.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr42.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr43.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr44.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr45.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr46.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr47.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr48.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr49.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr5.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr50.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr51.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr52.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr53.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr54.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr55.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr56.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr57.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr58.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr59.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr6.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr60.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr61.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr62.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr63.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr7.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr8.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr9.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddrN.layout +6 -4
- data/.data/spec/std/isa/csr/I/pmpcfg0.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg1.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg10.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg11.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg12.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg13.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg14.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg15.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg2.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg3.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg4.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg5.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg6.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg7.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg8.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg9.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfgN.layout +15 -18
- data/.data/spec/std/isa/csr/jvt.yaml +1 -0
- data/.data/spec/std/isa/csr/menvcfg.yaml +20 -0
- data/.data/spec/std/isa/csr/mstatus.yaml +8 -6
- data/.data/spec/std/isa/csr/senvcfg.yaml +26 -0
- data/.data/spec/std/isa/inst/B/andn.yaml +10 -12
- data/.data/spec/std/isa/inst/B/clmul.yaml +9 -11
- data/.data/spec/std/isa/inst/B/clmulh.yaml +9 -11
- data/.data/spec/std/isa/inst/B/orn.yaml +9 -11
- data/.data/spec/std/isa/inst/B/rev8.yaml +1 -1
- data/.data/spec/std/isa/inst/B/rol.yaml +9 -11
- data/.data/spec/std/isa/inst/B/rolw.yaml +9 -11
- data/.data/spec/std/isa/inst/B/ror.yaml +9 -11
- data/.data/spec/std/isa/inst/B/rorw.yaml +9 -11
- data/.data/spec/std/isa/inst/B/xnor.yaml +9 -11
- data/.data/spec/std/isa/inst/C/c.ldsp.yaml +3 -3
- data/.data/spec/std/isa/inst/I/addi.yaml +1 -0
- data/.data/spec/std/isa/inst/I/addiw.yaml +1 -0
- data/.data/spec/std/isa/inst/I/andi.yaml +1 -0
- data/.data/spec/std/isa/inst/I/auipc.yaml +1 -0
- data/.data/spec/std/isa/inst/I/lb.yaml +1 -0
- data/.data/spec/std/isa/inst/I/lbu.yaml +1 -0
- data/.data/spec/std/isa/inst/I/ld.yaml +2 -0
- data/.data/spec/std/isa/inst/I/lh.yaml +1 -0
- data/.data/spec/std/isa/inst/I/lhu.yaml +1 -0
- data/.data/spec/std/isa/inst/I/lui.yaml +1 -0
- data/.data/spec/std/isa/inst/I/lw.yaml +1 -0
- data/.data/spec/std/isa/inst/I/lwu.yaml +1 -0
- data/.data/spec/std/isa/inst/I/ori.yaml +1 -0
- data/.data/spec/std/isa/inst/I/sb.yaml +1 -0
- data/.data/spec/std/isa/inst/I/sd.yaml +1 -0
- data/.data/spec/std/isa/inst/I/sh.yaml +1 -0
- data/.data/spec/std/isa/inst/I/slti.yaml +1 -0
- data/.data/spec/std/isa/inst/I/sltiu.yaml +1 -0
- data/.data/spec/std/isa/inst/I/sw.yaml +1 -0
- data/.data/spec/std/isa/inst/I/xori.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vadc.vim.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vadd.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vand.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vle8.v.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmadc.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmadc.vim.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmerge.vim.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmseq.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmsgt.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmsgtu.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmsle.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmsleu.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmsne.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vor.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vrsub.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vsadd.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vsaddu.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vse8.v.yaml +1 -0
- data/.data/spec/std/isa/inst/Zawrs/wrs.nto.yaml +4 -2
- data/.data/spec/std/isa/inst/Zba/add.uw.yaml +9 -11
- data/.data/spec/std/isa/inst/Zbb/orc.b.yaml +1 -1
- data/.data/spec/std/isa/inst/Zbkb/brev8.yaml +3 -3
- data/.data/spec/std/isa/inst/Zbkb/unzip.yaml +2 -2
- data/.data/spec/std/isa/inst/Zbkb/zip.yaml +2 -2
- data/.data/spec/std/isa/inst/Zbkx/xperm4.yaml +2 -2
- data/.data/spec/std/isa/inst/Zbkx/xperm8.yaml +2 -2
- data/.data/spec/std/isa/inst/Zicbop/prefetch.i.yaml +2 -0
- data/.data/spec/std/isa/inst/Zicbop/prefetch.r.yaml +2 -0
- data/.data/spec/std/isa/inst/Zicbop/prefetch.w.yaml +2 -0
- data/.data/spec/std/isa/inst/Zks/sm3p0.yaml +1 -1
- data/.data/spec/std/isa/inst/Zks/sm3p1.yaml +1 -1
- data/.data/spec/std/isa/inst/Zks/sm4ed.yaml +1 -1
- data/.data/spec/std/isa/inst/Zks/sm4ks.yaml +1 -1
- data/.data/spec/std/isa/isa/builtin_functions.idl +1 -0
- data/.data/spec/std/isa/isa/globals.isa +27 -7
- data/.data/spec/std/isa/isa/interrupts.idl +1 -0
- data/.data/spec/std/isa/param/HSTATEEN_CONTEXT_TYPE.yaml +1 -0
- data/.data/spec/std/isa/param/MSTATEEN_CONTEXT_TYPE.yaml +1 -0
- data/.data/spec/std/isa/param/MTVEC_BASE_ALIGNMENT_DIRECT.yaml +1 -0
- data/.data/spec/std/isa/param/MTVEC_BASE_ALIGNMENT_VECTORED.yaml +1 -0
- data/.data/spec/std/isa/param/NUM_PMP_ENTRIES.yaml +11 -22
- data/.data/spec/std/isa/param/NUM_USABLE_PMP_ENTRIES.yaml +35 -0
- data/.data/spec/std/isa/param/PMP_NA4_SUPPORTED.yaml +23 -0
- data/.data/spec/std/isa/param/PMP_NAPOT_SUPPORTED.yaml +19 -0
- data/.data/spec/std/isa/param/{MSTATUS_TVM_IMPLEMENTED.yaml → PMP_TOR_SUPPORTED.yaml} +6 -6
- data/.data/spec/std/isa/param/PRECISE_SYNCHRONOUS_EXCEPTIONS.yaml +1 -0
- data/.data/spec/std/isa/param/TRAP_ON_EBREAK.yaml +1 -0
- data/.data/spec/std/isa/param/TRAP_ON_ECALL_FROM_M.yaml +1 -0
- data/.data/spec/std/isa/param/TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY.yaml +1 -0
- data/.data/spec/std/isa/param/ZAWRS_NTO_IS_NOP.yaml +19 -0
- data/lib/udb/ESPRESSO_VERSION +1 -1
- data/lib/udb/config.rb +14 -2
- data/lib/udb/doc_link.rb +3 -4
- data/lib/udb/obj/instruction.rb +1 -1
- data/lib/udb/obj/non_isa_specification.rb +22 -100
- data/lib/udb/version.rb +1 -1
- data/lib/udb/z3.rb +2 -2
- metadata +7 -3
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@@ -30,17 +30,19 @@ fields:
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Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 54
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(or, if `pmp55cfg.A` == TOR, for PMP entry 55).
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type(): |
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-
if (
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if (NUM_USABLE_PMP_ENTRIES > 54) {
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return CsrFieldType::RW;
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} else {
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+
# entry is either not implemented or implemented as read-only zero
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return CsrFieldType::RO;
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}
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reset_value(): |
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return 0;
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sw_write(csr_value): |
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-
if (
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-
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if (NUM_USABLE_PMP_ENTRIES <= 54) {
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# entry is not usable (not implemented or read-only zero)
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return 0;
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} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
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return UNDEFINED_LEGAL_DETERMINISTIC;
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} else {
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return csr_value.ADDR;
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@@ -30,17 +30,19 @@ fields:
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Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 55
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(or, if `pmp56cfg.A` == TOR, for PMP entry 56).
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type(): |
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if (
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if (NUM_USABLE_PMP_ENTRIES > 55) {
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return CsrFieldType::RW;
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} else {
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# entry is either not implemented or implemented as read-only zero
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return CsrFieldType::RO;
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}
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reset_value(): |
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return 0;
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sw_write(csr_value): |
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-
if (
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-
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if (NUM_USABLE_PMP_ENTRIES <= 55) {
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# entry is not usable (not implemented or read-only zero)
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return 0;
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} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
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return UNDEFINED_LEGAL_DETERMINISTIC;
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} else {
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return csr_value.ADDR;
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@@ -30,17 +30,19 @@ fields:
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Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 56
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(or, if `pmp57cfg.A` == TOR, for PMP entry 57).
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type(): |
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if (
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if (NUM_USABLE_PMP_ENTRIES > 56) {
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return CsrFieldType::RW;
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} else {
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# entry is either not implemented or implemented as read-only zero
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return CsrFieldType::RO;
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}
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reset_value(): |
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return 0;
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sw_write(csr_value): |
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-
if (
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-
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-
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if (NUM_USABLE_PMP_ENTRIES <= 56) {
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# entry is not usable (not implemented or read-only zero)
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return 0;
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} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
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return UNDEFINED_LEGAL_DETERMINISTIC;
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} else {
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return csr_value.ADDR;
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@@ -30,17 +30,19 @@ fields:
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Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 57
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(or, if `pmp58cfg.A` == TOR, for PMP entry 58).
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type(): |
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if (
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if (NUM_USABLE_PMP_ENTRIES > 57) {
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return CsrFieldType::RW;
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} else {
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# entry is either not implemented or implemented as read-only zero
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return CsrFieldType::RO;
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}
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reset_value(): |
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return 0;
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sw_write(csr_value): |
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-
if (
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-
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-
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if (NUM_USABLE_PMP_ENTRIES <= 57) {
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# entry is not usable (not implemented or read-only zero)
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return 0;
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} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
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return UNDEFINED_LEGAL_DETERMINISTIC;
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} else {
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return csr_value.ADDR;
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@@ -30,17 +30,19 @@ fields:
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Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 58
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31
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(or, if `pmp59cfg.A` == TOR, for PMP entry 59).
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type(): |
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if (
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if (NUM_USABLE_PMP_ENTRIES > 58) {
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return CsrFieldType::RW;
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} else {
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# entry is either not implemented or implemented as read-only zero
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return CsrFieldType::RO;
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}
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reset_value(): |
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return 0;
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sw_write(csr_value): |
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-
if (
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-
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-
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if (NUM_USABLE_PMP_ENTRIES <= 58) {
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# entry is not usable (not implemented or read-only zero)
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return 0;
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} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
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return UNDEFINED_LEGAL_DETERMINISTIC;
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47
|
} else {
|
|
46
48
|
return csr_value.ADDR;
|
|
@@ -30,17 +30,19 @@ fields:
|
|
|
30
30
|
Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 59
|
|
31
31
|
(or, if `pmp60cfg.A` == TOR, for PMP entry 60).
|
|
32
32
|
type(): |
|
|
33
|
-
if (
|
|
33
|
+
if (NUM_USABLE_PMP_ENTRIES > 59) {
|
|
34
34
|
return CsrFieldType::RW;
|
|
35
35
|
} else {
|
|
36
|
+
# entry is either not implemented or implemented as read-only zero
|
|
36
37
|
return CsrFieldType::RO;
|
|
37
38
|
}
|
|
38
39
|
reset_value(): |
|
|
39
40
|
return 0;
|
|
40
41
|
sw_write(csr_value): |
|
|
41
|
-
if (
|
|
42
|
-
|
|
43
|
-
|
|
42
|
+
if (NUM_USABLE_PMP_ENTRIES <= 59) {
|
|
43
|
+
# entry is not usable (not implemented or read-only zero)
|
|
44
|
+
return 0;
|
|
45
|
+
} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
|
|
44
46
|
return UNDEFINED_LEGAL_DETERMINISTIC;
|
|
45
47
|
} else {
|
|
46
48
|
return csr_value.ADDR;
|
|
@@ -30,17 +30,19 @@ fields:
|
|
|
30
30
|
Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 6
|
|
31
31
|
(or, if `pmp7cfg.A` == TOR, for PMP entry 7).
|
|
32
32
|
type(): |
|
|
33
|
-
if (
|
|
33
|
+
if (NUM_USABLE_PMP_ENTRIES > 6) {
|
|
34
34
|
return CsrFieldType::RW;
|
|
35
35
|
} else {
|
|
36
|
+
# entry is either not implemented or implemented as read-only zero
|
|
36
37
|
return CsrFieldType::RO;
|
|
37
38
|
}
|
|
38
39
|
reset_value(): |
|
|
39
40
|
return 0;
|
|
40
41
|
sw_write(csr_value): |
|
|
41
|
-
if (
|
|
42
|
-
|
|
43
|
-
|
|
42
|
+
if (NUM_USABLE_PMP_ENTRIES <= 6) {
|
|
43
|
+
# entry is not usable (not implemented or read-only zero)
|
|
44
|
+
return 0;
|
|
45
|
+
} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
|
|
44
46
|
return UNDEFINED_LEGAL_DETERMINISTIC;
|
|
45
47
|
} else {
|
|
46
48
|
return csr_value.ADDR;
|
|
@@ -30,17 +30,19 @@ fields:
|
|
|
30
30
|
Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 60
|
|
31
31
|
(or, if `pmp61cfg.A` == TOR, for PMP entry 61).
|
|
32
32
|
type(): |
|
|
33
|
-
if (
|
|
33
|
+
if (NUM_USABLE_PMP_ENTRIES > 60) {
|
|
34
34
|
return CsrFieldType::RW;
|
|
35
35
|
} else {
|
|
36
|
+
# entry is either not implemented or implemented as read-only zero
|
|
36
37
|
return CsrFieldType::RO;
|
|
37
38
|
}
|
|
38
39
|
reset_value(): |
|
|
39
40
|
return 0;
|
|
40
41
|
sw_write(csr_value): |
|
|
41
|
-
if (
|
|
42
|
-
|
|
43
|
-
|
|
42
|
+
if (NUM_USABLE_PMP_ENTRIES <= 60) {
|
|
43
|
+
# entry is not usable (not implemented or read-only zero)
|
|
44
|
+
return 0;
|
|
45
|
+
} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
|
|
44
46
|
return UNDEFINED_LEGAL_DETERMINISTIC;
|
|
45
47
|
} else {
|
|
46
48
|
return csr_value.ADDR;
|
|
@@ -30,17 +30,19 @@ fields:
|
|
|
30
30
|
Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 61
|
|
31
31
|
(or, if `pmp62cfg.A` == TOR, for PMP entry 62).
|
|
32
32
|
type(): |
|
|
33
|
-
if (
|
|
33
|
+
if (NUM_USABLE_PMP_ENTRIES > 61) {
|
|
34
34
|
return CsrFieldType::RW;
|
|
35
35
|
} else {
|
|
36
|
+
# entry is either not implemented or implemented as read-only zero
|
|
36
37
|
return CsrFieldType::RO;
|
|
37
38
|
}
|
|
38
39
|
reset_value(): |
|
|
39
40
|
return 0;
|
|
40
41
|
sw_write(csr_value): |
|
|
41
|
-
if (
|
|
42
|
-
|
|
43
|
-
|
|
42
|
+
if (NUM_USABLE_PMP_ENTRIES <= 61) {
|
|
43
|
+
# entry is not usable (not implemented or read-only zero)
|
|
44
|
+
return 0;
|
|
45
|
+
} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
|
|
44
46
|
return UNDEFINED_LEGAL_DETERMINISTIC;
|
|
45
47
|
} else {
|
|
46
48
|
return csr_value.ADDR;
|
|
@@ -30,17 +30,19 @@ fields:
|
|
|
30
30
|
Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 62
|
|
31
31
|
(or, if `pmp63cfg.A` == TOR, for PMP entry 63).
|
|
32
32
|
type(): |
|
|
33
|
-
if (
|
|
33
|
+
if (NUM_USABLE_PMP_ENTRIES > 62) {
|
|
34
34
|
return CsrFieldType::RW;
|
|
35
35
|
} else {
|
|
36
|
+
# entry is either not implemented or implemented as read-only zero
|
|
36
37
|
return CsrFieldType::RO;
|
|
37
38
|
}
|
|
38
39
|
reset_value(): |
|
|
39
40
|
return 0;
|
|
40
41
|
sw_write(csr_value): |
|
|
41
|
-
if (
|
|
42
|
-
|
|
43
|
-
|
|
42
|
+
if (NUM_USABLE_PMP_ENTRIES <= 62) {
|
|
43
|
+
# entry is not usable (not implemented or read-only zero)
|
|
44
|
+
return 0;
|
|
45
|
+
} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
|
|
44
46
|
return UNDEFINED_LEGAL_DETERMINISTIC;
|
|
45
47
|
} else {
|
|
46
48
|
return csr_value.ADDR;
|
|
@@ -30,17 +30,19 @@ fields:
|
|
|
30
30
|
Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 63
|
|
31
31
|
(or, if `pmp64cfg.A` == TOR, for PMP entry 64).
|
|
32
32
|
type(): |
|
|
33
|
-
if (
|
|
33
|
+
if (NUM_USABLE_PMP_ENTRIES > 63) {
|
|
34
34
|
return CsrFieldType::RW;
|
|
35
35
|
} else {
|
|
36
|
+
# entry is either not implemented or implemented as read-only zero
|
|
36
37
|
return CsrFieldType::RO;
|
|
37
38
|
}
|
|
38
39
|
reset_value(): |
|
|
39
40
|
return 0;
|
|
40
41
|
sw_write(csr_value): |
|
|
41
|
-
if (
|
|
42
|
-
|
|
43
|
-
|
|
42
|
+
if (NUM_USABLE_PMP_ENTRIES <= 63) {
|
|
43
|
+
# entry is not usable (not implemented or read-only zero)
|
|
44
|
+
return 0;
|
|
45
|
+
} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
|
|
44
46
|
return UNDEFINED_LEGAL_DETERMINISTIC;
|
|
45
47
|
} else {
|
|
46
48
|
return csr_value.ADDR;
|
|
@@ -30,17 +30,19 @@ fields:
|
|
|
30
30
|
Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 7
|
|
31
31
|
(or, if `pmp8cfg.A` == TOR, for PMP entry 8).
|
|
32
32
|
type(): |
|
|
33
|
-
if (
|
|
33
|
+
if (NUM_USABLE_PMP_ENTRIES > 7) {
|
|
34
34
|
return CsrFieldType::RW;
|
|
35
35
|
} else {
|
|
36
|
+
# entry is either not implemented or implemented as read-only zero
|
|
36
37
|
return CsrFieldType::RO;
|
|
37
38
|
}
|
|
38
39
|
reset_value(): |
|
|
39
40
|
return 0;
|
|
40
41
|
sw_write(csr_value): |
|
|
41
|
-
if (
|
|
42
|
-
|
|
43
|
-
|
|
42
|
+
if (NUM_USABLE_PMP_ENTRIES <= 7) {
|
|
43
|
+
# entry is not usable (not implemented or read-only zero)
|
|
44
|
+
return 0;
|
|
45
|
+
} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
|
|
44
46
|
return UNDEFINED_LEGAL_DETERMINISTIC;
|
|
45
47
|
} else {
|
|
46
48
|
return csr_value.ADDR;
|
|
@@ -30,17 +30,19 @@ fields:
|
|
|
30
30
|
Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 8
|
|
31
31
|
(or, if `pmp9cfg.A` == TOR, for PMP entry 9).
|
|
32
32
|
type(): |
|
|
33
|
-
if (
|
|
33
|
+
if (NUM_USABLE_PMP_ENTRIES > 8) {
|
|
34
34
|
return CsrFieldType::RW;
|
|
35
35
|
} else {
|
|
36
|
+
# entry is either not implemented or implemented as read-only zero
|
|
36
37
|
return CsrFieldType::RO;
|
|
37
38
|
}
|
|
38
39
|
reset_value(): |
|
|
39
40
|
return 0;
|
|
40
41
|
sw_write(csr_value): |
|
|
41
|
-
if (
|
|
42
|
-
|
|
43
|
-
|
|
42
|
+
if (NUM_USABLE_PMP_ENTRIES <= 8) {
|
|
43
|
+
# entry is not usable (not implemented or read-only zero)
|
|
44
|
+
return 0;
|
|
45
|
+
} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
|
|
44
46
|
return UNDEFINED_LEGAL_DETERMINISTIC;
|
|
45
47
|
} else {
|
|
46
48
|
return csr_value.ADDR;
|
|
@@ -30,17 +30,19 @@ fields:
|
|
|
30
30
|
Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry 9
|
|
31
31
|
(or, if `pmp10cfg.A` == TOR, for PMP entry 10).
|
|
32
32
|
type(): |
|
|
33
|
-
if (
|
|
33
|
+
if (NUM_USABLE_PMP_ENTRIES > 9) {
|
|
34
34
|
return CsrFieldType::RW;
|
|
35
35
|
} else {
|
|
36
|
+
# entry is either not implemented or implemented as read-only zero
|
|
36
37
|
return CsrFieldType::RO;
|
|
37
38
|
}
|
|
38
39
|
reset_value(): |
|
|
39
40
|
return 0;
|
|
40
41
|
sw_write(csr_value): |
|
|
41
|
-
if (
|
|
42
|
-
|
|
43
|
-
|
|
42
|
+
if (NUM_USABLE_PMP_ENTRIES <= 9) {
|
|
43
|
+
# entry is not usable (not implemented or read-only zero)
|
|
44
|
+
return 0;
|
|
45
|
+
} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
|
|
44
46
|
return UNDEFINED_LEGAL_DETERMINISTIC;
|
|
45
47
|
} else {
|
|
46
48
|
return csr_value.ADDR;
|
|
@@ -32,17 +32,19 @@ fields:
|
|
|
32
32
|
Bits PHYS_ADDR_WIDTH-1:2 of the address specifier for PMP entry <%= pmpaddr_num %>
|
|
33
33
|
(or, if `pmp<%= pmpaddr_num+1 %>cfg.A` == TOR, for PMP entry <%= pmpaddr_num + 1 %>).
|
|
34
34
|
type(): |
|
|
35
|
-
if (
|
|
35
|
+
if (NUM_USABLE_PMP_ENTRIES > <%= pmpaddr_num %>) {
|
|
36
36
|
return CsrFieldType::RW;
|
|
37
37
|
} else {
|
|
38
|
+
# entry is either not implemented or implemented as read-only zero
|
|
38
39
|
return CsrFieldType::RO;
|
|
39
40
|
}
|
|
40
41
|
reset_value(): |
|
|
41
42
|
return 0;
|
|
42
43
|
sw_write(csr_value): |
|
|
43
|
-
if (
|
|
44
|
-
|
|
45
|
-
|
|
44
|
+
if (NUM_USABLE_PMP_ENTRIES <= <%= pmpaddr_num %>) {
|
|
45
|
+
# entry is not usable (not implemented or read-only zero)
|
|
46
|
+
return 0;
|
|
47
|
+
} else if (csr_value.ADDR >= ((1 `<< (PHYS_ADDR_WIDTH - 2)) - 1)) {
|
|
46
48
|
return UNDEFINED_LEGAL_DETERMINISTIC;
|
|
47
49
|
} else {
|
|
48
50
|
return csr_value.ADDR;
|