udb 0.1.13 → 0.1.14

data/.data/spec/std/isa/csr/I/pmpcfg15.yaml

@@ -38,21 +38,13 @@ fields:
       h! L ! 7   ! Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
       h! MT ! 6:5 ! When the `Smpmpmt` extension is implemented, MT (Memory Type) is a WARL field that overrides the memory type for accesses that match this PMP entry.  See the `Smpmpmt` extension definition for encodings.  When the `Smpmpmt` extension is not implemented, MT is _Reserved_ Writes shall be ignored.
       h! A ! 4:3
-      a! Address matching mode. One of:
+      a! Address matching mode. Encodings:
 
-          [when="PMP_GRANULARITY < 2"]
           * *OFF* (0) - Null region (disabled)
           * *TOR* (1) - Top of range
           * *NA4* (2) - Naturally aligned four-byte region
           * *NAPOT* (3) - Naturally aligned power of two
 
-          [when="PMP_GRANULARITY >= 2"]
-          * *OFF* (0) - Null region (disabled)
-          * *TOR* (1) - Top of range
-          * *NAPOT* (3) - Naturally aligned power of two
-
-      [when="PMP_GRANULARITY >= 2"]
-      Naturally aligned four-byte region, *NA4* (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).
 
       h! X ! 2 ! When clear, instruction fetches cause an `Access Fault` for the matching region and privilege mode.
       h! W ! 1 ! When clear, stores and AMOs cause an `Access Fault` for the matching region and privilege mode.
@@ -61,23 +53,28 @@ fields:
 
       The combination of R = 0, W = 1 is reserved.
     type(): |
-      if (NUM_PMP_ENTRIES > 60) {
+      if (NUM_USABLE_PMP_ENTRIES > 60) {
         return CsrFieldType::RWR;
       } else {
+        # entry is either not implemented or implemented as read-only zero
         return CsrFieldType::RO;
       }
     reset_value(): |
       return 0;
     sw_write(csr_value): |
-      if ((CSR[pmpcfg15].pmp60cfg & 0x80) == 0) {
-        # entry is not locked
-        if (!(((csr_value.pmp60cfg & 0x1) == 0) && ((csr_value.pmp60cfg & 0x2) == 0x2))) {
-          # not R = 0, W =1, which is reserved
-          if ((PMP_GRANULARITY < 2) ||
-              ((csr_value.pmp60cfg & 0x18) != 0x10)) {
-            # NA4 is not allowed when PMP granularity is larger than 4 bytes
-            return csr_value.pmp60cfg;
+      if (NUM_USABLE_PMP_ENTRIES > 60 && (CSR[pmpcfg15].pmp60cfg & 0x80) == 0) {
+        # entry is usable and not locked
+        Bits<8> new_cfg = csr_value.pmp60cfg;
+        Bits<2> a_mode = (new_cfg & 0x18) >> 3;
+        if (!(((new_cfg & 0x1) == 0) && ((new_cfg & 0x2) == 0x2))) {
+          # not R = 0, W = 1, which is reserved
+          if (((a_mode == 0x1) && !PMP_TOR_SUPPORTED) ||
+              ((a_mode == 0x2) && !PMP_NA4_SUPPORTED) ||
+              ((a_mode == 0x3) && !PMP_NAPOT_SUPPORTED)) {
+            # unsupported address matching mode; keep old value
+            return CSR[pmpcfg15].pmp60cfg;
           }
+          return new_cfg;
         }
       }
       # fall through: keep old value
@@ -96,21 +93,13 @@ fields:
       h! L ! 15   ! Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
       h! MT ! 14:13 ! When the `Smpmpmt` extension is implemented, MT (Memory Type) is a WARL field that overrides the memory type for accesses that match this PMP entry.  See the `Smpmpmt` extension definition for encodings.  When the `Smpmpmt` extension is not implemented, MT is _Reserved_ Writes shall be ignored.
       h! A ! 12:11
-      a! Address matching mode. One of:
+      a! Address matching mode. Encodings:
 
-          [when="PMP_GRANULARITY < 2"]
           * *OFF* (0) - Null region (disabled)
           * *TOR* (1) - Top of range
           * *NA4* (2) - Naturally aligned four-byte region
           * *NAPOT* (3) - Naturally aligned power of two
 
-          [when="PMP_GRANULARITY >= 2"]
-          * *OFF* (0) - Null region (disabled)
-          * *TOR* (1) - Top of range
-          * *NAPOT* (3) - Naturally aligned power of two
-
-      [when="PMP_GRANULARITY >= 2"]
-      Naturally aligned four-byte region, *NA4* (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).
 
       h! X ! 10 ! When clear, instruction fetches cause an `Access Fault` for the matching region and privilege mode.
       h! W ! 9 ! When clear, stores and AMOs cause an `Access Fault` for the matching region and privilege mode.
@@ -119,23 +108,28 @@ fields:
 
       The combination of R = 0, W = 1 is reserved.
     type(): |
-      if (NUM_PMP_ENTRIES > 61) {
+      if (NUM_USABLE_PMP_ENTRIES > 61) {
         return CsrFieldType::RWR;
       } else {
+        # entry is either not implemented or implemented as read-only zero
         return CsrFieldType::RO;
       }
     reset_value(): |
       return 0;
     sw_write(csr_value): |
-      if ((CSR[pmpcfg15].pmp61cfg & 0x80) == 0) {
-        # entry is not locked
-        if (!(((csr_value.pmp61cfg & 0x1) == 0) && ((csr_value.pmp61cfg & 0x2) == 0x2))) {
-          # not R = 0, W =1, which is reserved
-          if ((PMP_GRANULARITY < 2) ||
-              ((csr_value.pmp61cfg & 0x18) != 0x10)) {
-            # NA4 is not allowed when PMP granularity is larger than 4 bytes
-            return csr_value.pmp61cfg;
+      if (NUM_USABLE_PMP_ENTRIES > 61 && (CSR[pmpcfg15].pmp61cfg & 0x80) == 0) {
+        # entry is usable and not locked
+        Bits<8> new_cfg = csr_value.pmp61cfg;
+        Bits<2> a_mode = (new_cfg & 0x18) >> 3;
+        if (!(((new_cfg & 0x1) == 0) && ((new_cfg & 0x2) == 0x2))) {
+          # not R = 0, W = 1, which is reserved
+          if (((a_mode == 0x1) && !PMP_TOR_SUPPORTED) ||
+              ((a_mode == 0x2) && !PMP_NA4_SUPPORTED) ||
+              ((a_mode == 0x3) && !PMP_NAPOT_SUPPORTED)) {
+            # unsupported address matching mode; keep old value
+            return CSR[pmpcfg15].pmp61cfg;
           }
+          return new_cfg;
         }
       }
       # fall through: keep old value
@@ -154,21 +148,13 @@ fields:
       h! L ! 23   ! Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
       h! MT ! 22:21 ! When the `Smpmpmt` extension is implemented, MT (Memory Type) is a WARL field that overrides the memory type for accesses that match this PMP entry.  See the `Smpmpmt` extension definition for encodings.  When the `Smpmpmt` extension is not implemented, MT is _Reserved_ Writes shall be ignored.
       h! A ! 20:19
-      a! Address matching mode. One of:
+      a! Address matching mode. Encodings:
 
-          [when="PMP_GRANULARITY < 2"]
           * *OFF* (0) - Null region (disabled)
           * *TOR* (1) - Top of range
           * *NA4* (2) - Naturally aligned four-byte region
           * *NAPOT* (3) - Naturally aligned power of two
 
-          [when="PMP_GRANULARITY >= 2"]
-          * *OFF* (0) - Null region (disabled)
-          * *TOR* (1) - Top of range
-          * *NAPOT* (3) - Naturally aligned power of two
-
-      [when="PMP_GRANULARITY >= 2"]
-      Naturally aligned four-byte region, *NA4* (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).
 
       h! X ! 18 ! When clear, instruction fetches cause an `Access Fault` for the matching region and privilege mode.
       h! W ! 17 ! When clear, stores and AMOs cause an `Access Fault` for the matching region and privilege mode.
@@ -177,23 +163,28 @@ fields:
 
       The combination of R = 0, W = 1 is reserved.
     type(): |
-      if (NUM_PMP_ENTRIES > 62) {
+      if (NUM_USABLE_PMP_ENTRIES > 62) {
         return CsrFieldType::RWR;
       } else {
+        # entry is either not implemented or implemented as read-only zero
         return CsrFieldType::RO;
       }
     reset_value(): |
       return 0;
     sw_write(csr_value): |
-      if ((CSR[pmpcfg15].pmp62cfg & 0x80) == 0) {
-        # entry is not locked
-        if (!(((csr_value.pmp62cfg & 0x1) == 0) && ((csr_value.pmp62cfg & 0x2) == 0x2))) {
-          # not R = 0, W =1, which is reserved
-          if ((PMP_GRANULARITY < 2) ||
-              ((csr_value.pmp62cfg & 0x18) != 0x10)) {
-            # NA4 is not allowed when PMP granularity is larger than 4 bytes
-            return csr_value.pmp62cfg;
+      if (NUM_USABLE_PMP_ENTRIES > 62 && (CSR[pmpcfg15].pmp62cfg & 0x80) == 0) {
+        # entry is usable and not locked
+        Bits<8> new_cfg = csr_value.pmp62cfg;
+        Bits<2> a_mode = (new_cfg & 0x18) >> 3;
+        if (!(((new_cfg & 0x1) == 0) && ((new_cfg & 0x2) == 0x2))) {
+          # not R = 0, W = 1, which is reserved
+          if (((a_mode == 0x1) && !PMP_TOR_SUPPORTED) ||
+              ((a_mode == 0x2) && !PMP_NA4_SUPPORTED) ||
+              ((a_mode == 0x3) && !PMP_NAPOT_SUPPORTED)) {
+            # unsupported address matching mode; keep old value
+            return CSR[pmpcfg15].pmp62cfg;
           }
+          return new_cfg;
         }
       }
       # fall through: keep old value
@@ -212,21 +203,13 @@ fields:
       h! L ! 31   ! Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
       h! MT ! 30:29 ! When the `Smpmpmt` extension is implemented, MT (Memory Type) is a WARL field that overrides the memory type for accesses that match this PMP entry.  See the `Smpmpmt` extension definition for encodings.  When the `Smpmpmt` extension is not implemented, MT is _Reserved_ Writes shall be ignored.
       h! A ! 28:27
-      a! Address matching mode. One of:
+      a! Address matching mode. Encodings:
 
-          [when="PMP_GRANULARITY < 2"]
           * *OFF* (0) - Null region (disabled)
           * *TOR* (1) - Top of range
           * *NA4* (2) - Naturally aligned four-byte region
           * *NAPOT* (3) - Naturally aligned power of two
 
-          [when="PMP_GRANULARITY >= 2"]
-          * *OFF* (0) - Null region (disabled)
-          * *TOR* (1) - Top of range
-          * *NAPOT* (3) - Naturally aligned power of two
-
-      [when="PMP_GRANULARITY >= 2"]
-      Naturally aligned four-byte region, *NA4* (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).
 
       h! X ! 26 ! When clear, instruction fetches cause an `Access Fault` for the matching region and privilege mode.
       h! W ! 25 ! When clear, stores and AMOs cause an `Access Fault` for the matching region and privilege mode.
@@ -235,23 +218,28 @@ fields:
 
       The combination of R = 0, W = 1 is reserved.
     type(): |
-      if (NUM_PMP_ENTRIES > 63) {
+      if (NUM_USABLE_PMP_ENTRIES > 63) {
         return CsrFieldType::RWR;
       } else {
+        # entry is either not implemented or implemented as read-only zero
         return CsrFieldType::RO;
       }
     reset_value(): |
       return 0;
     sw_write(csr_value): |
-      if ((CSR[pmpcfg15].pmp63cfg & 0x80) == 0) {
-        # entry is not locked
-        if (!(((csr_value.pmp63cfg & 0x1) == 0) && ((csr_value.pmp63cfg & 0x2) == 0x2))) {
-          # not R = 0, W =1, which is reserved
-          if ((PMP_GRANULARITY < 2) ||
-              ((csr_value.pmp63cfg & 0x18) != 0x10)) {
-            # NA4 is not allowed when PMP granularity is larger than 4 bytes
-            return csr_value.pmp63cfg;
+      if (NUM_USABLE_PMP_ENTRIES > 63 && (CSR[pmpcfg15].pmp63cfg & 0x80) == 0) {
+        # entry is usable and not locked
+        Bits<8> new_cfg = csr_value.pmp63cfg;
+        Bits<2> a_mode = (new_cfg & 0x18) >> 3;
+        if (!(((new_cfg & 0x1) == 0) && ((new_cfg & 0x2) == 0x2))) {
+          # not R = 0, W = 1, which is reserved
+          if (((a_mode == 0x1) && !PMP_TOR_SUPPORTED) ||
+              ((a_mode == 0x2) && !PMP_NA4_SUPPORTED) ||
+              ((a_mode == 0x3) && !PMP_NAPOT_SUPPORTED)) {
+            # unsupported address matching mode; keep old value
+            return CSR[pmpcfg15].pmp63cfg;
           }
+          return new_cfg;
         }
       }
       # fall through: keep old value