ruby-vpi 7.0.0

data/samp/pipelined_alu/hw5_unit_design.rb

@@ -0,0 +1,18 @@
+
+    # An interface to the design under test.
+    class Hw5_unit
+      attr_reader :clk, :reset, :in_databits, :a, :b, :in_op, :res, :out_databits, :out_op
+
+      def initialize
+        @clk = Vpi::vpi_handle_by_name("hw5_unit_bench.clk", nil)
+@reset = Vpi::vpi_handle_by_name("hw5_unit_bench.reset", nil)
+@in_databits = Vpi::vpi_handle_by_name("hw5_unit_bench.in_databits", nil)
+@a = Vpi::vpi_handle_by_name("hw5_unit_bench.a", nil)
+@b = Vpi::vpi_handle_by_name("hw5_unit_bench.b", nil)
+@in_op = Vpi::vpi_handle_by_name("hw5_unit_bench.in_op", nil)
+@res = Vpi::vpi_handle_by_name("hw5_unit_bench.res", nil)
+@out_databits = Vpi::vpi_handle_by_name("hw5_unit_bench.out_databits", nil)
+@out_op = Vpi::vpi_handle_by_name("hw5_unit_bench.out_op", nil)
+
+      end
+    end

data/samp/pipelined_alu/hw5_unit_runner.rake

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+SIMULATOR_SOURCES = ['hw5_unit_bench.v', 'hw5_unit.v']
+SIMULATOR_TARGET = 'hw5_unit_bench'
+SIMULATOR_ARGS = {
+  :cver => '',
+  :ivl => '',
+  :vcs => '',
+  :vsim => '',
+}
+
+require 'ruby-vpi/runner'

data/samp/pipelined_alu/hw5_unit_spec.rb

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+=begin
+  Copyright 2006 Suraj N. Kurapati
+
+  This file is part of Ruby-VPI.
+
+  Ruby-VPI is free software; you can redistribute it and/or
+  modify it under the terms of the GNU General Public License
+  as published by the Free Software Foundation; either version 2
+  of the License, or (at your option) any later version.
+
+  Ruby-VPI is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  GNU General Public License for more details.
+
+  You should have received a copy of the GNU General Public License
+  along with Ruby-VPI; if not, write to the Free Software Foundation,
+  Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+=end
+
+# A specification which verifies the design under test.
+require 'hw5_unit_design.rb'
+require 'ruby-vpi/vpi_util'
+require 'test/unit'
+
+require 'InputGenerator'
+require 'Hw5UnitModel'
+
+
+
+class Hw5_unit_spec < Test::Unit::TestCase
+  include Vpi
+
+  # Number of input sequences to test.
+  NUM_TESTS = 4000
+
+  # Ruby's native int is 31 bits
+  RUBY_INTEGER_BITS = 31
+
+  # Used to convert VPI integer into Ruby integer
+  VPI_INTEGER_MASK = (2 ** RUBY_INTEGER_BITS.succ) - 1
+
+  # Upper limit of values allowed for an operation's tag.
+  OPERATION_TAG_LIMIT = 2 ** 7
+
+  OPERATION_ENCODINGS = {
+    :nop => 0,
+    :add => 1,
+    :sub => 2,
+    :mul => 3,
+  }
+
+  # Number of cycles needed to reset the DUT
+  DUT_RESET_DELAY = 5
+
+
+  def setup
+    @ig = InputGenerator.new(RUBY_INTEGER_BITS)
+    @design = Hw5_unit.new
+
+    reset
+  end
+
+  def reset
+    @design.reset.intVal = 1
+    DUT_RESET_DELAY.times {relay_verilog}
+
+    @design.reset.intVal = 0
+  end
+
+  def test_pipeline
+    operationQueue = []
+    numOperations = 0
+
+    begin
+      # start a new operation
+      if numOperations < NUM_TESTS
+        op = Hw5UnitModel::Operation.new(
+          Hw5UnitModel::OPERATIONS[rand(Hw5UnitModel::OPERATIONS.size)],
+          numOperations % OPERATION_TAG_LIMIT,
+          @ig.gen.abs,
+          @ig.gen.abs
+        )
+
+
+        @design.a.intVal = op.arg1
+        @design.b.intVal = op.arg2
+        @design.in_op.intVal = OPERATION_ENCODINGS[op.type]
+        @design.in_databits.intVal = op.tag
+
+
+        operationQueue << op
+        numOperations += 1
+      end
+
+
+      # simulate a clock cycle
+      relay_verilog
+
+
+      # verify the output when present
+      unless @design.out_databits.hexStrVal =~ /x/
+        finishedOp = Hw5UnitModel::Operation.new(
+          OPERATION_ENCODINGS.index(@design.out_op.intVal),
+          @design.out_databits.intVal
+        )
+        finishedOp.result = @design.res.intVal & VPI_INTEGER_MASK
+
+        expectedOp = operationQueue.shift
+
+
+        assert_equal expectedOp.type, finishedOp.type, "incorrect operation"
+        assert_equal expectedOp.tag, finishedOp.tag, "incorrect tag"
+
+
+        # ignore the result of a NOP operation
+        unless finishedOp.type == :nop
+          assert_equal expectedOp.compute & VPI_INTEGER_MASK, finishedOp.result, "incorrect result"
+        end
+      end
+    end until operationQueue.empty?
+  end
+end

data/tpl/launcher.rake

@@ -0,0 +1,30 @@
+# A template to simplify running multiple tests for an examples. This file is meant to be embedded in another Rakefile.
+
+=begin
+  Copyright 2006 Suraj N. Kurapati
+
+  This file is part of Ruby-VPI.
+
+  Ruby-VPI is free software; you can redistribute it and/or
+  modify it under the terms of the GNU General Public License
+  as published by the Free Software Foundation; either version 2
+  of the License, or (at your option) any later version.
+
+  Ruby-VPI is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  GNU General Public License for more details.
+
+  You should have received a copy of the GNU General Public License
+  along with Ruby-VPI; if not, write to the Free Software Foundation,
+  Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+=end
+
+# invoke each test runner with the command-line args
+  FileList['*.rake', '*.rk'].each do |runner|
+    sh 'rake', '-f', runner, *ARGV
+  end
+
+# supress errors about non-existant tasks
+  ARGV.each do |t| task t end
+  task :default

data/tpl/runner.rake

@@ -0,0 +1,96 @@
+# A template to simplify building and running examples. This file is meant to be embedded in another Rakefile, which bears the responsibility of defining the following variables.
+#
+# = Required variables
+# SIMULATOR_SOURCES:: Array of paths to source files needed by the simulator.
+# SIMULATOR_TARGET:: Name of the Verilog module to be simulated.
+# SIMULATOR_ARGS:: A hash containing keys for each simulator task (same as Rakefile task names) and values containing command-line arguments for each simulator.
+#
+# = Usage
+# When using one simulator after another, ensure that Ruby-VPI is properly compiled for the new simulator by invoking the _clobber_ cleaning task.
+
+=begin
+  Copyright 2006 Suraj N. Kurapati
+
+  This file is part of Ruby-VPI.
+
+  Ruby-VPI is free software; you can redistribute it and/or
+  modify it under the terms of the GNU General Public License
+  as published by the Free Software Foundation; either version 2
+  of the License, or (at your option) any later version.
+
+  Ruby-VPI is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  GNU General Public License for more details.
+
+  You should have received a copy of the GNU General Public License
+  along with Ruby-VPI; if not, write to the Free Software Foundation,
+  Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+=end
+
+# check for required variables
+  raise ArgumentError, "Required variables are undefined." unless
+    defined?(SIMULATOR_SOURCES) &&
+    defined?(SIMULATOR_TARGET) &&
+    defined?(SIMULATOR_ARGS)
+
+
+require 'rake/clean'
+require 'ruby-vpi/rake'
+
+include RubyVPI
+
+# make Ruby-VPI libraries available to spec
+ENV['RUBYLIB'] = (ENV['RUBYLIB'] && ENV['RUBYLIB'].dup || '') << ":#{LIBRARY_PATH}"
+
+
+# Returns the path to the Ruby-VPI object file for the given simulator.
+def object_file_path aSimId, aShared = false
+  path = File.join(OBJECT_PATH, "ruby-vpi.#{aSimId}.#{aShared ? 'so' : 'o'}")
+  raise "Object file `#{path}' is missing.\n Please build Ruby-VPI to generate the missing file." unless File.exist? path
+  path
+end
+
+task :default do
+  Rake.application.options.show_task_pattern = //
+  Rake.application.display_tasks_and_comments
+end
+
+
+desc "Simulate with GPL Cver."
+task :cver => SIMULATOR_SOURCES do |t|
+  sh 'cver', SIMULATOR_ARGS[t.name.to_sym], "+loadvpi=#{object_file_path(t.name.to_sym, true)}:vlog_startup_routines_bootstrap", SIMULATOR_SOURCES
+end
+
+CLOBBER.include 'verilog.log'
+
+
+desc "Simulate with Icarus Verilog."
+task :ivl => SIMULATOR_SOURCES do |t|
+  cp object_file_path(t.name.to_sym, true), 'ruby-vpi.vpi'
+  sh 'iverilog', SIMULATOR_ARGS[t.name.to_sym], %w(-y. -mruby-vpi), SIMULATOR_SOURCES
+  sh 'vvp -M. a.out'
+end
+
+CLEAN.include 'ruby-vpi.vpi', 'a.out'
+
+
+desc "Simulate with Synopsys VCS."
+task :vcs => collect_args(File.join(TEMPLATE_PATH, 'synopsys_vcs.tab'), SIMULATOR_SOURCES) do |t|
+  require 'rbconfig'
+
+  sh 'vcs', SIMULATOR_ARGS[t.name.to_sym], %w(-R +v2k +vpi -LDFLAGS), File.expand_path(NORMAL_OBJ_PATH), "-L#{Config::CONFIG['libdir']}", Config::CONFIG['LIBRUBYARG'], %w(-lpthread -P), t.prerequisites[1], SIMULATOR_SOURCES
+end
+
+CLEAN.include 'csrc', 'simv*'
+
+
+desc "Simulate with Mentor Modelsim."
+task :vsim => SIMULATOR_SOURCES do |t|
+  sh "vlib work"
+  sh 'vlog', SIMULATOR_ARGS[t.name.to_sym], SIMULATOR_SOURCES
+  sh 'vsim', '-c', SIMULATOR_TARGET, '-pli', object_file_path(t.name.to_sym, true), '-do', 'run -all'
+end
+
+CLEAN.include 'work'
+CLOBBER.include 'transcript'

data/tpl/synopsys_vcs.tab

@@ -0,0 +1,2 @@
+$ruby_init	call=vlog_ruby_init	acc=wn:*
+$ruby_relay	call=vlog_ruby_relay	acc=wn:*