passenger 6.1.0 → 6.1.1

data/src/cxx_supportlib/vendor-modified/boost/atomic/detail/extra_ops_gcc_aarch64.hpp

@@ -3,7 +3,7 @@
  * (See accompanying file LICENSE_1_0.txt or copy at
  * http://www.boost.org/LICENSE_1_0.txt)
  *
- * Copyright (c) 2020 Andrey Semashev
+ * Copyright (c) 2020-2025 Andrey Semashev
  */
 /*!
  * \file   atomic/detail/extra_ops_gcc_aarch64.hpp
@@ -15,7 +15,7 @@
 #define BOOST_ATOMIC_DETAIL_EXTRA_OPS_GCC_AARCH64_HPP_INCLUDED_
 
 #include <cstddef>
-#include <boost/cstdint.hpp>
+#include <cstdint>
 #include <boost/memory_order.hpp>
 #include <boost/atomic/detail/config.hpp>
 #include <boost/atomic/detail/platform.hpp>
@@ -38,79 +38,79 @@ template< typename Base >
 struct extra_operations_gcc_aarch64_common :
     public Base
 {
-    typedef Base base_type;
-    typedef typename base_type::storage_type storage_type;
+    using base_type = Base;
+    using storage_type = typename base_type::storage_type;
 
     // Note: For opaque operations prefer operations returning the resulting values instead of the original values
     //       as these operations require less registers. That is unless LSE is available, in which case
     //       it is better to use the dedicated atomic instructions. The LSE check is done in the base_type,
     //       where needed (e.g. for 128-bit operations there are no LSE instructions).
-    static BOOST_FORCEINLINE void opaque_negate(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE void opaque_negate(storage_type volatile& storage, memory_order order) noexcept
     {
         base_type::negate(storage, order);
     }
 
-    static BOOST_FORCEINLINE void opaque_complement(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE void opaque_complement(storage_type volatile& storage, memory_order order) noexcept
     {
         base_type::bitwise_complement(storage, order);
     }
 
-    static BOOST_FORCEINLINE void opaque_add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE void opaque_add(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
         base_type::add(storage, v, order);
     }
 
-    static BOOST_FORCEINLINE void opaque_sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE void opaque_sub(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
         base_type::sub(storage, v, order);
     }
 
-    static BOOST_FORCEINLINE void opaque_and(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE void opaque_and(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
         base_type::bitwise_and(storage, v, order);
     }
 
-    static BOOST_FORCEINLINE void opaque_or(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE void opaque_or(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
         base_type::bitwise_or(storage, v, order);
     }
 
-    static BOOST_FORCEINLINE void opaque_xor(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE void opaque_xor(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
         base_type::bitwise_xor(storage, v, order);
     }
 
-    static BOOST_FORCEINLINE bool negate_and_test(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE bool negate_and_test(storage_type volatile& storage, memory_order order) noexcept
     {
         return !!base_type::negate(storage, order);
     }
 
-    static BOOST_FORCEINLINE bool add_and_test(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE bool add_and_test(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
         return !!base_type::add(storage, v, order);
     }
 
-    static BOOST_FORCEINLINE bool sub_and_test(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE bool sub_and_test(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
         return !!base_type::sub(storage, v, order);
     }
 
-    static BOOST_FORCEINLINE bool and_and_test(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE bool and_and_test(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
         return !!base_type::bitwise_and(storage, v, order);
     }
 
-    static BOOST_FORCEINLINE bool or_and_test(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE bool or_and_test(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
         return !!base_type::bitwise_or(storage, v, order);
     }
 
-    static BOOST_FORCEINLINE bool xor_and_test(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE bool xor_and_test(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
         return !!base_type::bitwise_xor(storage, v, order);
     }
 
-    static BOOST_FORCEINLINE bool complement_and_test(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE bool complement_and_test(storage_type volatile& storage, memory_order order) noexcept
     {
         return !!base_type::bitwise_complement(storage, order);
     }
@@ -123,13 +123,14 @@ template< typename Base, bool Signed >
 struct extra_operations_gcc_aarch64< Base, 1u, Signed > :
     public extra_operations_generic< Base, 1u, Signed >
 {
-    typedef extra_operations_generic< Base, 1u, Signed > base_type;
-    typedef typename base_type::storage_type storage_type;
+    using base_type = extra_operations_generic< Base, 1u, Signed >;
+    using storage_type = typename base_type::storage_type;
 
-    static BOOST_FORCEINLINE storage_type fetch_negate(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type fetch_negate(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type original, result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -146,14 +147,16 @@ struct extra_operations_gcc_aarch64< Base, 1u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return original;
     }
 
-    static BOOST_FORCEINLINE storage_type negate(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type negate(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -170,16 +173,18 @@ struct extra_operations_gcc_aarch64< Base, 1u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
 #if !defined(BOOST_ATOMIC_DETAIL_AARCH64_HAS_LSE)
 
-    static BOOST_FORCEINLINE storage_type add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type add(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -196,14 +201,16 @@ struct extra_operations_gcc_aarch64< Base, 1u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type sub(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -220,14 +227,16 @@ struct extra_operations_gcc_aarch64< Base, 1u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_and(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_and(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -244,14 +253,16 @@ struct extra_operations_gcc_aarch64< Base, 1u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_or(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_or(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -268,14 +279,16 @@ struct extra_operations_gcc_aarch64< Base, 1u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_xor(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_xor(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -292,14 +305,16 @@ struct extra_operations_gcc_aarch64< Base, 1u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type fetch_complement(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type fetch_complement(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type original, result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -316,14 +331,16 @@ struct extra_operations_gcc_aarch64< Base, 1u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return original;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_complement(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_complement(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -340,6 +357,7 @@ struct extra_operations_gcc_aarch64< Base, 1u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
@@ -358,13 +376,14 @@ template< typename Base, bool Signed >
 struct extra_operations_gcc_aarch64< Base, 2u, Signed > :
     public extra_operations_generic< Base, 2u, Signed >
 {
-    typedef extra_operations_generic< Base, 2u, Signed > base_type;
-    typedef typename base_type::storage_type storage_type;
+    using base_type = extra_operations_generic< Base, 2u, Signed >;
+    using storage_type = typename base_type::storage_type;
 
-    static BOOST_FORCEINLINE storage_type fetch_negate(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type fetch_negate(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type original, result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -381,14 +400,16 @@ struct extra_operations_gcc_aarch64< Base, 2u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return original;
     }
 
-    static BOOST_FORCEINLINE storage_type negate(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type negate(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -405,16 +426,18 @@ struct extra_operations_gcc_aarch64< Base, 2u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
 #if !defined(BOOST_ATOMIC_DETAIL_AARCH64_HAS_LSE)
 
-    static BOOST_FORCEINLINE storage_type add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type add(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -431,14 +454,16 @@ struct extra_operations_gcc_aarch64< Base, 2u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type sub(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -455,14 +480,16 @@ struct extra_operations_gcc_aarch64< Base, 2u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_and(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_and(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -479,14 +506,16 @@ struct extra_operations_gcc_aarch64< Base, 2u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_or(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_or(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -503,14 +532,16 @@ struct extra_operations_gcc_aarch64< Base, 2u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_xor(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_xor(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -527,14 +558,16 @@ struct extra_operations_gcc_aarch64< Base, 2u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type fetch_complement(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type fetch_complement(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type original, result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -551,14 +584,16 @@ struct extra_operations_gcc_aarch64< Base, 2u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return original;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_complement(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_complement(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -575,6 +610,7 @@ struct extra_operations_gcc_aarch64< Base, 2u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
@@ -593,13 +629,14 @@ template< typename Base, bool Signed >
 struct extra_operations_gcc_aarch64< Base, 4u, Signed > :
     public extra_operations_generic< Base, 4u, Signed >
 {
-    typedef extra_operations_generic< Base, 4u, Signed > base_type;
-    typedef typename base_type::storage_type storage_type;
+    using base_type = extra_operations_generic< Base, 4u, Signed >;
+    using storage_type = typename base_type::storage_type;
 
-    static BOOST_FORCEINLINE storage_type fetch_negate(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type fetch_negate(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type original, result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -616,14 +653,16 @@ struct extra_operations_gcc_aarch64< Base, 4u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return original;
     }
 
-    static BOOST_FORCEINLINE storage_type negate(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type negate(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -640,16 +679,18 @@ struct extra_operations_gcc_aarch64< Base, 4u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
 #if !defined(BOOST_ATOMIC_DETAIL_AARCH64_HAS_LSE)
 
-    static BOOST_FORCEINLINE storage_type add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type add(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -666,14 +707,16 @@ struct extra_operations_gcc_aarch64< Base, 4u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type sub(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -690,14 +733,16 @@ struct extra_operations_gcc_aarch64< Base, 4u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_and(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_and(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -714,14 +759,16 @@ struct extra_operations_gcc_aarch64< Base, 4u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_or(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_or(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -738,14 +785,16 @@ struct extra_operations_gcc_aarch64< Base, 4u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_xor(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_xor(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -762,14 +811,16 @@ struct extra_operations_gcc_aarch64< Base, 4u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type fetch_complement(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type fetch_complement(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type original, result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -786,14 +837,16 @@ struct extra_operations_gcc_aarch64< Base, 4u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return original;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_complement(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_complement(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -810,6 +863,7 @@ struct extra_operations_gcc_aarch64< Base, 4u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
@@ -828,13 +882,14 @@ template< typename Base, bool Signed >
 struct extra_operations_gcc_aarch64< Base, 8u, Signed > :
     public extra_operations_generic< Base, 8u, Signed >
 {
-    typedef extra_operations_generic< Base, 8u, Signed > base_type;
-    typedef typename base_type::storage_type storage_type;
+    using base_type = extra_operations_generic< Base, 8u, Signed >;
+    using storage_type = typename base_type::storage_type;
 
-    static BOOST_FORCEINLINE storage_type fetch_negate(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type fetch_negate(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type original, result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -851,14 +906,16 @@ struct extra_operations_gcc_aarch64< Base, 8u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return original;
     }
 
-    static BOOST_FORCEINLINE storage_type negate(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type negate(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -875,16 +932,18 @@ struct extra_operations_gcc_aarch64< Base, 8u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
 #if !defined(BOOST_ATOMIC_DETAIL_AARCH64_HAS_LSE)
 
-    static BOOST_FORCEINLINE storage_type add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type add(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -901,14 +960,16 @@ struct extra_operations_gcc_aarch64< Base, 8u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type sub(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -925,14 +986,16 @@ struct extra_operations_gcc_aarch64< Base, 8u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_and(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_and(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -949,14 +1012,16 @@ struct extra_operations_gcc_aarch64< Base, 8u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_or(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_or(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -973,14 +1038,16 @@ struct extra_operations_gcc_aarch64< Base, 8u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_xor(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_xor(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -997,14 +1064,16 @@ struct extra_operations_gcc_aarch64< Base, 8u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
 
-    static BOOST_FORCEINLINE storage_type fetch_complement(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type fetch_complement(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type original, result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -1021,14 +1090,16 @@ struct extra_operations_gcc_aarch64< Base, 8u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return original;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_complement(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_complement(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_type result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -1045,6 +1116,7 @@ struct extra_operations_gcc_aarch64< Base, 8u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result;
     }
@@ -1063,15 +1135,16 @@ template< typename Base, bool Signed >
 struct extra_operations_gcc_aarch64< Base, 16u, Signed > :
     public extra_operations_generic< Base, 16u, Signed >
 {
-    typedef extra_operations_generic< Base, 16u, Signed > base_type;
-    typedef typename base_type::storage_type storage_type;
-    typedef typename base_type::storage_union storage_union;
+    using base_type = extra_operations_generic< Base, 16u, Signed >;
+    using storage_type = typename base_type::storage_type;
+    using storage_union = typename base_type::storage_union;
 
-    static BOOST_FORCEINLINE storage_type fetch_negate(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type fetch_negate(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_union original;
         storage_union result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -1093,14 +1166,16 @@ struct extra_operations_gcc_aarch64< Base, 16u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return original.as_storage;
     }
 
-    static BOOST_FORCEINLINE storage_type negate(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type negate(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_union result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -1121,15 +1196,17 @@ struct extra_operations_gcc_aarch64< Base, 16u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result.as_storage;
     }
 
-    static BOOST_FORCEINLINE storage_type add(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type add(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_union result;
         storage_union value = { v };
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -1148,15 +1225,17 @@ struct extra_operations_gcc_aarch64< Base, 16u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result.as_storage;
     }
 
-    static BOOST_FORCEINLINE storage_type sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type sub(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_union result;
         storage_union value = { v };
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -1175,15 +1254,17 @@ struct extra_operations_gcc_aarch64< Base, 16u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result.as_storage;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_and(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_and(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_union result;
         storage_union value = { v };
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -1202,15 +1283,17 @@ struct extra_operations_gcc_aarch64< Base, 16u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result.as_storage;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_or(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_or(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_union result;
         storage_union value = { v };
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -1229,15 +1312,17 @@ struct extra_operations_gcc_aarch64< Base, 16u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result.as_storage;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_xor(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_xor(storage_type volatile& storage, storage_type v, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_union result;
         storage_union value = { v };
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -1256,15 +1341,17 @@ struct extra_operations_gcc_aarch64< Base, 16u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result.as_storage;
     }
 
-    static BOOST_FORCEINLINE storage_type fetch_complement(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type fetch_complement(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_union original;
         storage_union result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -1284,14 +1371,16 @@ struct extra_operations_gcc_aarch64< Base, 16u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return original.as_storage;
     }
 
-    static BOOST_FORCEINLINE storage_type bitwise_complement(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
+    static BOOST_FORCEINLINE storage_type bitwise_complement(storage_type volatile& storage, memory_order order) noexcept
     {
+        BOOST_ATOMIC_DETAIL_TSAN_RELEASE(&storage, order);
         storage_union result;
-        uint32_t tmp;
+        std::uint32_t tmp;
 
 #define BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN(ld_mo, st_mo)\
         __asm__ __volatile__\
@@ -1310,6 +1399,7 @@ struct extra_operations_gcc_aarch64< Base, 16u, Signed > :
 
         BOOST_ATOMIC_DETAIL_AARCH64_MO_SWITCH(order)
 #undef BOOST_ATOMIC_DETAIL_AARCH64_MO_INSN
+        BOOST_ATOMIC_DETAIL_TSAN_ACQUIRE(&storage, order);
 
         return result.as_storage;
     }