metasm 1.0.0 → 1.0.5

data/{lib/metasm → metasm/cpu}/x86_64/parse.rb

@@ -4,8 +4,8 @@
 #    Licence is LGPL, see LICENCE in the top-level directory
 
 
-require 'metasm/x86_64/opcodes'
-require 'metasm/x86_64/encode'
+require 'metasm/cpu/x86_64/opcodes'
+require 'metasm/cpu/x86_64/encode'
 require 'metasm/parse'
 
 module Metasm
@@ -29,7 +29,7 @@ class X86_64
 
 	# needed due to how ruby inheritance works wrt constants
 	def parse_argregclasslist
-		[Reg, SimdReg, SegReg, DbgReg, CtrlReg, FpReg]
+		[Reg, SimdReg, SegReg, DbgReg, TstReg, CtrlReg, FpReg]
 	end
 	# same inheritance sh*t
 	def parse_modrm(lex, tok, cpu)
@@ -49,9 +49,11 @@ class X86_64
 
 	# check if the argument matches the opcode's argument spec
 	def parse_arg_valid?(o, spec, arg)
-		return if arg.kind_of? ModRM and ((arg.b and arg.b.val == 16 and arg.i) or (arg.i and arg.i.val == 16 and (arg.b or arg.s != 1)))
+		return if arg.kind_of? ModRM and ((arg.b and arg.b.val == 16 and arg.i) or (arg.i and arg.i.val == 16 and (arg.b or arg.s != 1)))	# cannot encode [rip+base], only [rip+imm]
 		return if arg.kind_of? Reg and arg.sz >= 32 and arg.val == 16	# eip/rip only in modrm
 		return if o.props[:auto64] and arg.respond_to? :sz and arg.sz == 32
+		# vex c4/c5
+		return if o.fields[:vex_r] and not o.fields[:vex_b] and (spec == :modrm or spec == :modrmxmm or spec == :modrmymm) and (((arg.kind_of?(SimdReg) or arg.kind_of?(Reg)) and arg.val >= 8) or (arg.kind_of?(ModRM) and ((arg.b and arg.b.val >= 8) or (arg.i and arg.i.val >= 8))))
 		if o.name == 'movsxd'
 			return if not arg.kind_of? Reg and not arg.kind_of? ModRM
 			arg.sz ||= 32
@@ -62,7 +64,13 @@ class X86_64
 				return arg.sz == 32
 			end
 		end
+		return if o.name == 'xchg' and spec == :reg and o.args.include?(:reg_eax) and arg.kind_of?(Reg) and arg.sz == 32 and arg.val == 0
+
 		super(o, spec, arg)
 	end
+
+	def check_reserved_name(name)
+		Reg.s_to_i[name]
+	end
 end
 end

data/metasm/cpu/x86_64/render.rb

@@ -0,0 +1,35 @@
+#    This file is part of Metasm, the Ruby assembly manipulation suite
+#    Copyright (C) 2006-2009 Yoann GUILLOT
+#
+#    Licence is LGPL, see LICENCE in the top-level directory
+
+
+require 'metasm/cpu/x86_64/opcodes'
+require 'metasm/render'
+
+module Metasm
+class X86_64
+	def gui_hilight_word_regexp_init
+		ret = {}
+
+		%w[a b c d].each { |r|
+			ret["#{r}l"] = "[re]?#{r}x|#{r}l"
+			ret["#{r}h"] = "[re]?#{r}x|#{r}h"
+			ret["#{r}x"] = ret["e#{r}x"] = ret["r#{r}x"] = "[re]?#{r}x|#{r}[hl]"
+		}
+
+		%w[sp bp si di].each { |r|
+			ret["#{r}l"] = ret[r] = ret["e#{r}"] = ret["r#{r}"] = "[re]?#{r}|#{r}l"
+		}
+
+		(8..15).each { |i|
+			r = "r#{i}"
+			ret[r+'b'] = ret[r+'w'] = ret[r+'d'] = ret[r] = "#{r}[bwd]?"
+		}
+
+		ret['eip'] = ret['rip'] = '[re]ip'
+
+		ret
+	end
+end
+end

data/metasm/cpu/z80.rb

@@ -0,0 +1,9 @@
+#    This file is part of Metasm, the Ruby assembly manipulation suite
+#    Copyright (C) 2006-2009 Yoann GUILLOT
+#
+#    Licence is LGPL, see LICENCE in the top-level directory
+
+
+require 'metasm/main'
+require 'metasm/cpu/z80/decode'
+require 'metasm/cpu/z80/render'

data/metasm/cpu/z80/decode.rb

@@ -0,0 +1,286 @@
+#    This file is part of Metasm, the Ruby assembly manipulation suite
+#    Copyright (C) 2006-2009 Yoann GUILLOT
+#
+#    Licence is LGPL, see LICENCE in the top-level directory
+
+
+require 'metasm/cpu/z80/opcodes'
+require 'metasm/decode'
+
+module Metasm
+class Z80
+	def build_opcode_bin_mask(op)
+		# bit = 0 if can be mutated by an field value, 1 if fixed by opcode
+		op.bin_mask = Array.new(op.bin.length, 0)
+		op.fields.each { |f, (oct, off)|
+			op.bin_mask[oct] |= (@fields_mask[f] << off)
+		}
+		op.bin_mask.map! { |v| 255 ^ v }
+	end
+
+	def build_bin_lookaside
+		# sets up a hash byte value => list of opcodes that may match
+		# opcode.bin_mask is built here
+		lookaside = Array.new(256) { [] }
+		opcode_list.each { |op|
+			build_opcode_bin_mask op
+			b   = op.bin[0]
+			msk = op.bin_mask[0]
+			next @unknown_opcode = op if not b
+			for i in b..(b | (255^msk))
+				lookaside[i] << op if i & msk == b & msk
+			end
+		}
+		lookaside
+	end
+
+	def decode_prefix(instr, byte)
+		case byte
+		when 0xDD; instr.prefix = 0xDD
+		when 0xFD; instr.prefix = 0xFD
+		# implicit 'else return false'
+		end
+	end
+
+	# tries to find the opcode encoded at edata.ptr
+	# if no match, tries to match a prefix (update di.instruction.prefix)
+	# on match, edata.ptr points to the first byte of the opcode (after prefixes)
+	def decode_findopcode(edata)
+		di = DecodedInstruction.new self
+		while edata.ptr < edata.data.length
+			byte = edata.data[edata.ptr]
+			byte = byte.unpack('C').first if byte.kind_of?(::String)
+			return di if di.opcode = @bin_lookaside[byte].find { |op|
+				# fetch the relevant bytes from edata
+				bseq = edata.data[edata.ptr, op.bin.length].unpack('C*')
+				# check against full opcode mask
+				op.bin.zip(bseq, op.bin_mask).all? { |b1, b2, m| b2 and ((b1 & m) == (b2 & m)) }
+			}
+
+			if decode_prefix(di.instruction, edata.get_byte)
+				nb = edata.data[edata.ptr]
+				nb = nb.unpack('C').first if nb.kind_of?(::String)
+				case nb
+				when 0xCB
+					# DD CB <disp8> <opcode_pfxCB> [<args>]
+					di.instruction.prefix |= edata.get_byte	<< 8
+					di.bin_length += 2
+					opc = edata.data[edata.ptr+1]
+					opc = opc.unpack('C').first if opc.kind_of?(::String)
+					bseq = [0xCB, opc]
+					# XXX in decode_instr_op, byte[0] is the immediate displacement instead of cb
+					return di if di.opcode = @bin_lookaside[nb].find { |op|
+						op.bin.zip(bseq, op.bin_mask).all? { |b1, b2, m| b2 and ((b1 & m) == (b2 & m)) }
+					}
+				when 0xED
+					di.instruction.prefix = nil
+				end
+			else
+				di.opcode = @unknown_opcode
+				return di
+			end
+			di.bin_length += 1
+		end
+	end
+
+
+	def decode_instr_op(edata, di)
+		before_ptr = edata.ptr
+		op = di.opcode
+		di.instruction.opname = op.name
+		bseq = edata.read(op.bin.length).unpack('C*')		# decode_findopcode ensures that data >= op.length
+		pfx = di.instruction.prefix
+
+		field_val = lambda { |f|
+			if fld = op.fields[f]
+				(bseq[fld[0]] >> fld[1]) & @fields_mask[f]
+			end
+		}
+
+		op.args.each { |a|
+			di.instruction.args << case a
+			when :i8, :u8, :i16, :u16; Expression[edata.decode_imm(a, @endianness)]
+			when :iy; Expression[field_val[a]]
+			when :iy8; Expression[field_val[a]*8]
+
+			when :rp
+				v = field_val[a]
+				Reg.new(16, v)
+			when :rp2
+				v = field_val[a]
+				v = 4 if v == 3
+				Reg.new(16, v)
+			when :ry, :rz
+				v = field_val[a]
+				if v == 6
+					Memref.new(Reg.from_str('HL'), nil, 1)
+				else
+					Reg.new(8, v)
+				end
+
+			when :r_a;   Reg.from_str('A')
+			when :r_af;  Reg.from_str('AF')
+			when :r_hl;  Reg.from_str('HL')
+			when :r_de;  Reg.from_str('DE')
+			when :r_sp;  Reg.from_str('SP')
+			when :r_i;   Reg.from_str('I')
+
+			when :m16;  Memref.new(nil, edata.decode_imm(:u16, @endianness), nil)
+			when :m_bc; Memref.new(Reg.from_str('BC'), nil, 1)
+			when :m_de; Memref.new(Reg.from_str('DE'), nil, 1)
+			when :m_sp; Memref.new(Reg.from_str('SP'), nil, 2)
+			when :m_hl; Memref.new(Reg.from_str('HL'), nil, 1)
+			when :mf8;  Memref.new(nil, 0xff00 + edata.decode_imm(:u8, @endianness), 1)
+			when :mfc;  Memref.new(Reg.from_str('C'), 0xff00, 1)
+
+			else raise SyntaxError, "Internal error: invalid argument #{a} in #{op.name}"
+			end
+		}
+
+		case pfx
+		when 0xDD
+		when 0xFD
+		when 0xCBDD
+		when 0xCBFD
+		end
+
+		di.bin_length += edata.ptr - before_ptr
+
+		return if edata.ptr > edata.length
+
+		di
+	end
+
+	# populate the @backtrace_binding hash with default values
+	def init_backtrace_binding
+		@backtrace_binding ||= {}
+
+		mask = 0xffff
+
+		opcode_list.map { |ol| ol.basename }.uniq.sort.each { |op|
+			binding = case op
+			when 'ld'; lambda { |di, a0, a1, *aa| a2 = aa[0] ; a2 ? { a0 => Expression[a1, :+, a2] } : { a0 => Expression[a1] } }
+			when 'ldi'; lambda { |di, a0, a1| hl = (a0 == :a ? a1 : a0) ; { a0 => Expression[a1], hl => Expression[hl, :+, 1] } }
+			when 'ldd'; lambda { |di, a0, a1| hl = (a0 == :a ? a1 : a0) ; { a0 => Expression[a1], hl => Expression[hl, :-, 1] } }
+			when 'add', 'adc', 'sub', 'sbc', 'and', 'xor', 'or'
+				lambda { |di, a0, a1|
+					e_op = { 'add' => :+, 'adc' => :+, 'sub' => :-, 'sbc' => :-, 'and' => :&, 'xor' => :^, 'or' => :| }[op]
+					ret = Expression[a0, e_op, a1]
+					ret = Expression[ret, e_op, :flag_c] if op == 'adc' or op == 'sbc'
+					ret = Expression[ret.reduce] if not a0.kind_of? Indirection
+					{ a0 => ret }
+				}
+			when 'cp', 'cmp'; lambda { |di, *a| {} }
+			when 'inc'; lambda { |di, a0| { a0 => Expression[a0, :+, 1] } }
+			when 'dec'; lambda { |di, a0| { a0 => Expression[a0, :-, 1] } }
+			when 'not'; lambda { |di, a0| { a0 => Expression[a0, :^, mask] } }
+			when 'push'
+				lambda { |di, a0| { :sp => Expression[:sp, :-, 2],
+					Indirection[:sp, 2, di.address] => Expression[a0] } }
+			when 'pop'
+				lambda { |di, a0| { :sp => Expression[:sp, :+, 2],
+					a0 => Indirection[:sp, 2, di.address] } }
+			when 'call'
+				lambda { |di, a0| { :sp => Expression[:sp, :-, 2],
+					  Indirection[:sp, 2, di.address] => Expression[di.next_addr] }
+				}
+			when 'ret', 'reti'; lambda { |di, *a| { :sp => Expression[:sp, :+, 2] } }
+			# TODO callCC, retCC ...
+			when 'bswap'
+				lambda { |di, a0| { a0 => Expression[
+						[[a0, :&, 0xff00], :>>,  8], :|,
+						[[a0, :&, 0x00ff], :<<,  8]] } }
+			when 'nop', /^j/; lambda { |di, *a| {} }
+			end
+
+			# TODO flags ?
+
+			@backtrace_binding[op] ||= binding if binding
+		}
+		@backtrace_binding
+	end
+
+	# patch a forward binding from the backtrace binding
+	def fix_fwdemu_binding(di, fbd)
+		case di.opcode.name
+		when 'push', 'call'; fbd[Indirection[[:sp, :-, 2], 2]] = fbd.delete(Indirection[:sp, 2])
+		end
+		fbd
+	end
+
+	def get_xrefs_x(dasm, di)
+		return [] if not di.opcode.props[:setip]
+
+		case di.opcode.basename
+		when 'ret', 'reti'
+			return [Indirection[:sp, 2, di.address]]
+		when /^jr|^djnz/
+			# jmp/call are absolute addrs, only jr/djnz are relative
+			# also, the asm source should display the relative offset
+			return [Expression[[di.address, :+, di.bin_length], :+, di.instruction.args.first]]
+		end
+
+		case tg = di.instruction.args.first
+		when Memref; [Expression[tg.symbolic(di)]]
+		when Reg; [Expression[tg.symbolic(di)]]
+		when Expression, ::Integer; [Expression[tg]]
+		else
+			puts "unhandled setip at #{di.address} #{di.instruction}" if $DEBUG
+			[]
+		end
+	end
+
+	# checks if expr is a valid return expression matching the :saveip instruction
+	def backtrace_is_function_return(expr, di=nil)
+		expr = Expression[expr].reduce_rec
+		expr.kind_of?(Indirection) and expr.len == 2 and expr.target == Expression[:sp]
+	end
+
+	# updates the function backtrace_binding
+	# if the function is big and no specific register is given, do nothing (the binding will be lazily updated later, on demand)
+	def backtrace_update_function_binding(dasm, faddr, f, retaddrlist, *wantregs)
+		b = f.backtrace_binding
+
+		bt_val = lambda { |r|
+			next if not retaddrlist
+			b[r] = Expression::Unknown
+			bt = []
+			retaddrlist.each { |retaddr|
+				bt |= dasm.backtrace(Expression[r], retaddr, :include_start => true,
+					     :snapshot_addr => faddr, :origin => retaddr)
+			}
+			if bt.length != 1
+				b[r] = Expression::Unknown
+			else
+				b[r] = bt.first
+			end
+		}
+
+		if not wantregs.empty?
+			wantregs.each(&bt_val)
+		else
+			bt_val[:sp]
+		end
+
+		b
+	end
+
+	# returns true if the expression is an address on the stack
+	def backtrace_is_stack_address(expr)
+		Expression[expr].expr_externals.include?(:sp)
+	end
+
+	# updates an instruction's argument replacing an expression with another (eg label renamed)
+	def replace_instr_arg_immediate(i, old, new)
+		i.args.map! { |a|
+			case a
+			when Expression; a == old ? new : Expression[a.bind(old => new).reduce]
+			when Memref
+				a.offset = (a.offset == old ? new : Expression[a.offset.bind(old => new).reduce]) if a.offset
+				a
+			else a
+			end
+		}
+	end
+end
+end

data/metasm/cpu/z80/main.rb

@@ -0,0 +1,67 @@
+#    This file is part of Metasm, the Ruby assembly manipulation suite
+#    Copyright (C) 2006-2009 Yoann GUILLOT
+#
+#    Licence is LGPL, see LICENCE in the top-level directory
+
+
+require 'metasm/main'
+
+module Metasm
+class Z80 < CPU
+	class Reg
+		class << self
+			attr_accessor :s_to_i, :i_to_s
+		end
+		@i_to_s = { 8 => { 0 => 'B', 1 => 'C', 2 => 'D', 3 => 'E',
+				   4 => 'H', 5 => 'L', 7 => 'A' },
+			   16 => { 0 => 'BC', 1 => 'DE', 2 => 'HL', 3 => 'SP',
+				   4 => 'AF' } }	# AF is 3 too
+		@s_to_i = @i_to_s.inject({}) { |h, (sz, rh)|
+			h.update rh.inject({}) { |hh, (i, n)|
+				hh.update n => [sz, i] } }
+
+		attr_accessor :sz, :i
+		def initialize(sz, i)
+			@sz = sz
+			@i = i
+		end
+
+		def symbolic(di=nil) ; to_s.to_sym ; end
+
+		def self.from_str(s)
+			raise "Bad name #{s.inspect}" if not x = @s_to_i[s]
+			new(*x)
+		end
+	end
+
+	class Memref
+		attr_accessor :base, :offset, :sz
+		def initialize(base, offset, sz=nil)
+			@base = base
+			offset = Expression[offset] if offset
+			@offset = offset
+			@sz = sz
+		end
+
+		def symbolic(di=nil)
+			p = nil
+			p = Expression[p, :+, @base.symbolic] if base
+			p = Expression[p, :+, @offset] if offset
+			Indirection[p.reduce, @sz, (di.address if di)]
+		end
+	end
+
+	def initialize(family = :latest)
+		super()
+		@endianness = :little
+		@size = 16
+		@family = family
+	end
+
+	def init_opcode_list
+		send("init_#@family")
+		@opcode_list
+	end
+end
+end
+

data/metasm/cpu/z80/opcodes.rb

@@ -0,0 +1,224 @@
+#    This file is part of Metasm, the Ruby assembly manipulation suite
+#    Copyright (C) 2006-2009 Yoann GUILLOT
+#
+#    Licence is LGPL, see LICENCE in the top-level directory
+
+require 'metasm/cpu/z80/main'
+
+module Metasm
+
+class Z80
+	def addop(name, bin, *args)
+		o = Opcode.new name, bin
+		args.each { |a|
+			o.args << a if @fields_mask[a] or @valid_args[a]
+			o.props[a] = true if @valid_props[a]
+			o.fields[a] = [bin.length-1, @fields_shift[a]] if @fields_mask[a]
+			raise "wtf #{a.inspect}" unless @valid_args[a] or @valid_props[a] or @fields_mask[a]
+		}
+		@opcode_list << o
+	end
+
+	def addop_macrocc(name, bin, *args)
+		%w[nz z nc c po pe p m].each_with_index { |cc, i|
+			dbin = bin.dup
+			dbin[0] |= i << 3
+			addop name + cc, dbin, *args
+		}
+	end
+
+	# data from http://www.z80.info/decoding.htm
+	def init_z80_common
+		@opcode_list = []
+		@valid_args.update [:i8, :u8, :i16, :u16, :m16,
+			:r_a, :r_af, :r_hl, :r_de, :r_sp, :r_i,
+			:m_bc, :m_de, :m_sp, :m_hl, :mf8, :mfc
+		].inject({}) { |h, v| h.update v => true }
+		@fields_mask.update :rz => 7, :ry => 7, :rp => 3, :rp2 => 3, :iy => 7, :iy8 => 7
+		@fields_shift.update :rz => 0, :ry => 3, :rp => 4, :rp2 => 4, :iy => 3, :iy8 => 3
+
+		# some opcodes are in init_z80 when they are not part of the GB ABI
+		addop 'nop',  [0b00_000_000]
+		addop 'jr',   [0b00_011_000], :setip, :stopexec, :i8
+		%w[nz z nc c].each_with_index { |cc, i|
+			addop 'jr' + cc, [0b00_100_000 | (i << 3)], :setip, :i8
+		}
+		addop 'ld',   [0b00_000_001], :rp, :i16
+		addop 'add',  [0b00_001_001], :r_hl, :rp
+
+		addop 'ld',   [0b00_000_010], :m_bc, :r_a
+		addop 'ld',   [0b00_001_010], :r_a, :m_bc
+		addop 'ld',   [0b00_010_010], :m_de, :r_a
+		addop 'ld',   [0b00_011_010], :r_a, :m_de
+
+		addop 'inc',  [0b00_000_011], :rp
+		addop 'dec',  [0b00_001_011], :rp
+		addop 'inc',  [0b00_000_100], :ry
+		addop 'dec',  [0b00_000_101], :ry
+		addop 'ld',   [0b00_000_110], :ry, :i8
+
+		addop 'rlca', [0b00_000_111]	# rotate
+		addop 'rrca', [0b00_001_111]
+		addop 'rla',  [0b00_010_111]
+		addop 'rra',  [0b00_011_111]
+
+		addop 'daa',  [0b00_100_111]
+		addop 'cpl',  [0b00_101_111]
+		addop 'scf',  [0b00_110_111]
+		addop 'ccf',  [0b00_111_111]
+
+		addop 'halt', [0b01_110_110]	# ld (HL), (HL)
+		addop 'ld',   [0b01_000_000], :ry, :rz
+
+		addop 'add',  [0b10_000_000], :r_a, :rz
+		addop 'adc',  [0b10_001_000], :r_a, :rz
+		addop 'sub',  [0b10_010_000], :r_a, :rz
+		addop 'sbc',  [0b10_011_000], :r_a, :rz
+		addop 'and',  [0b10_100_000], :r_a, :rz
+		addop 'xor',  [0b10_101_000], :r_a, :rz
+		addop 'or',   [0b10_110_000], :r_a, :rz
+		addop 'cmp',  [0b10_111_000], :r_a, :rz	# alias cp
+		addop 'cp',   [0b10_111_000], :r_a, :rz	# compare
+
+		addop_macrocc 'ret', [0b11_000_000], :setip
+		addop 'pop',  [0b11_000_001], :rp2
+		addop 'ret',  [0b11_001_001], :stopexec, :setip
+		addop 'jmp',  [0b11_101_001], :r_hl, :setip, :stopexec	# alias jp
+		addop 'jp',   [0b11_101_001], :r_hl, :setip, :stopexec
+		addop 'ld',   [0b11_111_001], :r_sp, :r_hl
+		addop_macrocc 'j',  [0b11_000_010], :setip, :u16	# alias jp
+		addop_macrocc 'jp', [0b11_000_010], :setip, :u16
+		addop 'jmp',  [0b11_000_011], :setip, :stopexec, :u16	# alias jp
+		addop 'jp',   [0b11_000_011], :setip, :stopexec, :u16
+
+		addop 'di',   [0b11_110_011]				# disable interrupts
+		addop 'ei',   [0b11_111_011]
+		addop_macrocc 'call', [0b11_000_100], :u16, :setip, :saveip
+		addop 'push', [0b11_000_101], :rp2
+		addop 'call', [0b11_001_101], :u16, :setip, :saveip, :stopexec
+
+		addop 'add',  [0b11_000_110], :r_a, :i8
+		addop 'adc',  [0b11_001_110], :r_a, :i8
+		addop 'sub',  [0b11_010_110], :r_a, :i8
+		addop 'sbc',  [0b11_011_110], :r_a, :i8
+		addop 'and',  [0b11_100_110], :r_a, :i8
+		addop 'xor',  [0b11_101_110], :r_a, :i8
+		addop 'or',   [0b11_110_110], :r_a, :i8
+		addop 'cp',   [0b11_111_110], :r_a, :i8
+
+		addop 'rst',  [0b11_000_111], :iy8		# call off in page 0
+
+		addop 'rlc',  [0xCB, 0b00_000_000], :rz		# rotate
+		addop 'rrc',  [0xCB, 0b00_001_000], :rz
+		addop 'rl',   [0xCB, 0b00_010_000], :rz
+		addop 'rr',   [0xCB, 0b00_011_000], :rz
+		addop 'sla',  [0xCB, 0b00_100_000], :rz		# shift
+		addop 'sra',  [0xCB, 0b00_101_000], :rz
+		addop 'srl',  [0xCB, 0b00_111_000], :rz
+		addop 'bit',  [0xCB, 0b01_000_000], :iy, :rz	# bit test
+		addop 'res',  [0xCB, 0b10_000_000], :iy, :rz	# bit reset
+		addop 'set',  [0xCB, 0b11_000_000], :iy, :rz	# bit set
+	end
+
+	# standard z80
+	def init_z80
+		init_z80_common
+
+		addop 'ex',   [0b00_001_000], :r_af		# XXX really ex AF, AF' ...
+		addop 'djnz', [0b00_010_000], :setip, :i8
+
+		addop 'ld',   [0b00_100_010], :m16, :r_hl
+		addop 'ld',   [0b00_101_010], :r_hl, :m16
+		addop 'ld',   [0b00_110_010], :m16, :r_a
+		addop 'ld',   [0b00_111_010], :r_a, :m16
+
+		addop 'exx',  [0b11_011_001]
+		addop 'out',  [0b11_010_011], :i8, :r_a
+		addop 'in',   [0b11_011_011], :r_a, :i8
+
+		addop 'ex',   [0b11_100_011], :m_sp, :r_hl
+		addop 'ex',   [0b11_101_011], :r_de, :r_hl
+
+		addop 'sll',  [0xCB, 0b00_110_000], :rz
+
+		addop 'in',   [0xED, 0b01_110_000], :u16
+		addop 'in',   [0xED, 0b01_000_000], :ry, :u16
+		addop 'out',  [0xED, 0b01_110_001], :u16
+		addop 'out',  [0xED, 0b01_000_001], :u16, :ry
+		addop 'sbc',  [0xED, 0b01_000_010], :r_hl, :rp
+		addop 'adc',  [0xED, 0b01_001_010], :r_hl, :rp
+		addop 'ld',   [0xED, 0b01_000_011], :m16, :rp
+		addop 'ld',   [0xED, 0b01_001_011], :rp, :m16
+		addop 'neg',  [0xED, 0b01_000_100], :r_a, :iy	# dummy int field
+		addop 'retn', [0xED, 0b01_000_101], :stopexec	# dummy int != 1 ? (1 = reti)
+		addop 'reti', [0xED, 0b01_001_101], :stopexec, :setip
+		addop 'im',   [0xED, 0b01_000_110], :iy
+		addop 'ld',   [0xED, 0b01_000_111], :r_i, :r_a
+		addop 'ld',   [0xED, 0b01_001_111], :r_r, :r_a
+		addop 'ld',   [0xED, 0b01_010_111], :r_a, :r_i
+		addop 'ld',   [0xED, 0b01_011_111], :r_a, :r_r
+		addop 'rrd',  [0xED, 0b01_100_111]
+		addop 'rld',  [0xED, 0b01_101_111]
+
+		addop 'ldi',  [0xED, 0b10_100_000]
+		addop 'ldd',  [0xED, 0b10_101_000]
+		addop 'ldir', [0xED, 0b10_110_000]
+		addop 'lddr', [0xED, 0b10_111_000]
+		addop 'cpi',  [0xED, 0b10_100_001]
+		addop 'cpd',  [0xED, 0b10_101_001]
+		addop 'cpir', [0xED, 0b10_110_001]
+		addop 'cpdr', [0xED, 0b10_111_001]
+		addop 'ini',  [0xED, 0b10_100_010]
+		addop 'ind',  [0xED, 0b10_101_010]
+		addop 'inir', [0xED, 0b10_110_010]
+		addop 'indr', [0xED, 0b10_111_010]
+		addop 'outi', [0xED, 0b10_100_011]
+		addop 'outd', [0xED, 0b10_101_011]
+		addop 'otir', [0xED, 0b10_110_011]
+		addop 'otdr', [0xED, 0b10_111_011]
+
+		addop 'unk_ed', [0xED], :i8
+
+		addop 'unk_nop', [], :i8	# undefined opcode = nop
+		@unknown_opcode = @opcode_list.last
+	end
+
+	# gameboy processor
+	# from http://nocash.emubase.de/pandocs.htm#cpucomparisionwithz80
+	def init_gb
+		init_z80_common
+
+		addop 'ld',   [0x08], :m16, :r_sp
+		addop 'stop', [0x10]
+
+		addop 'ldi',  [0x22], :m_hl, :r_a	# (hl++) <- a
+		addop 'ldi',  [0x2A], :r_a, :m_hl
+		addop 'ldd',  [0x32], :m_hl, :r_a	# (hl--) <- a
+		addop 'ldd',  [0x3A], :r_a, :m_hl
+
+		addop 'reti', [0xD9], :setip, :stopexec
+
+		# override retpo/jpo
+		@opcode_list.delete_if { |op| op.bin[0] & 0xE5 == 0xE0 }	# rm E0 E2 E8 EA F0 F2 F8 FA
+		addop 'ld',  [0xE0], :mf8, :r_a	# (0xff00 + :i8)
+		addop 'ld',  [0xE2], :mfc, :r_a	# (0xff00 + :r_c)
+		addop 'add', [0xE8], :r_sp, :i8
+		addop 'ld',  [0xEA], :m16, :r_a
+		addop 'ld',  [0xF0], :r_a, :mf8
+		addop 'ld',  [0xF2], :r_a, :mfc
+		addop 'ld',  [0xF8], :r_hl, :r_sp, :i8	# hl <- sp+:i8
+		addop 'ld',  [0xFA], :r_a, :m16
+
+		addop 'swap', [0xCB, 0x30], :rz
+
+		addop 'inv_dd', [0xDD], :stopexec	# invalid prefixes
+		addop 'inv_ed', [0xED], :stopexec
+		addop 'inv_fd', [0xFD], :stopexec
+
+		addop 'unk_nop', [], :i8	# undefined opcode = nop
+		@unknown_opcode = @opcode_list.last
+	end
+
+	alias init_latest init_z80
+end
+end