ceedling 0.9.0 → 1.0.1

data/vendor/cmock/test/iar/iar_v4/settings/cmock_demo.cspy.bat

@@ -0,0 +1,32 @@
+@REM This bat file has been generated by the IAR Embeddded Workbench
+@REM C-SPY interactive debugger,as an aid to preparing a command
+@REM line for running the cspybat command line utility with the
+@REM appropriate settings.
+@REM
+@REM After making some adjustments to this file, you can launch cspybat
+@REM by typing the name of this file followed by the name of the debug
+@REM file (usually an ubrof file). Note that this file is generated
+@REM every time a new debug session is initialized, so you may want to
+@REM move or rename the file before making changes.
+@REM
+@REM Note: some command line arguments cannot be properly generated
+@REM by this process. Specifically, the plugin which is responsible
+@REM for the Terminal I/O window (and other C runtime functionality)
+@REM comes in a special version for cspybat, and the name of that
+@REM plugin dll is not known when generating this file. It resides in
+@REM the $TOOLKIT_DIR$\bin folder and is usually called XXXbat.dll or
+@REM XXXlibsupportbat.dll, where XXX is the name of the corresponding
+@REM tool chain. Replace the '<libsupport_plugin>' parameter
+@REM below with the appropriate file name. Other plugins loaded by
+@REM C-SPY are usually not needed by, or will not work in, cspybat
+@REM but they are listed at the end of this file for reference.
+
+
+"C:\Program Files\IAR Systems\Embedded Workbench 4.0\common\bin\cspybat" "C:\Program Files\IAR Systems\Embedded Workbench 4.0\ARM\bin\armproc.dll" "C:\Program Files\IAR Systems\Embedded Workbench 4.0\ARM\bin\armjlink.dll"  %1 --plugin "C:\Program Files\IAR Systems\Embedded Workbench 4.0\ARM\bin\<libsupport_plugin>" --macro "C:\svn\cmock\iar\iar_v4\Resource\SAM7_FLASH.mac" --backend -B "--endian" "little" "--cpu" "ARM7TDMI" "--fpu" "None" "--proc_device_desc_file" "C:\Program Files\IAR Systems\Embedded Workbench 4.0\ARM\CONFIG\ioAT91SAM7X256.ddf" "--drv_verify_download" "all" "--proc_driver" "jlink" "--jlink_connection" "USB:0" "--jlink_initial_speed" "32" 
+
+
+@REM loaded plugins:
+@REM    armlibsupport.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 4.0\common\plugins\CodeCoverage\CodeCoverage.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 4.0\common\plugins\Profiling\Profiling.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 4.0\common\plugins\stack\stack.dll

data/vendor/cmock/test/iar/iar_v4/settings/cmock_demo.dbgdt

@@ -0,0 +1,86 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<Project>
+  <Desktop>
+    <Static>
+      <Debug-Log/>
+      <Workspace>
+        <ColumnWidths>
+          
+          
+          
+          
+        <Column0>185</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
+      </Workspace>
+      <Disassembly>
+        
+        
+        
+      <MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly>
+      <Build>
+        <ColumnWidth0>20</ColumnWidth0>
+        <ColumnWidth1>1115</ColumnWidth1>
+        <ColumnWidth2>297</ColumnWidth2>
+        <ColumnWidth3>74</ColumnWidth3>
+      </Build>
+    <TerminalIO><InputSource>1</InputSource><InputMode>10</InputMode><Filename>$PROJ_DIR$\TermIOInput.txt</Filename><InputEcho>1</InputEcho><ShowReset>0</ShowReset></TerminalIO></Static>
+    <Windows>
+      
+      
+      
+    <Wnd0>
+        <Tabs>
+          <Tab>
+            <Identity>TabID-23656-3537</Identity>
+            <TabName>Debug Log</TabName>
+            <Factory>Debug-Log</Factory>
+            <Session/>
+          </Tab>
+          <Tab>
+            <Identity>TabID-22088-3567</Identity>
+            <TabName>Build</TabName>
+            <Factory>Build</Factory>
+            <Session/>
+          </Tab>
+        <Tab><Identity>TabID-16970-5692</Identity><TabName>Terminal I/O</TabName><Factory>TerminalIO</Factory><Session/></Tab></Tabs>
+        
+      <SelectedTab>0</SelectedTab></Wnd0><Wnd1>
+        <Tabs>
+          <Tab>
+            <Identity>TabID-1637-3541</Identity>
+            <TabName>Workspace</TabName>
+            <Factory>Workspace</Factory>
+            <Session>
+              
+            <NodeDict><ExpandedNode>cmock_demo</ExpandedNode><ExpandedNode>cmock_demo/source</ExpandedNode></NodeDict></Session>
+          </Tab>
+        </Tabs>
+        
+      <SelectedTab>0</SelectedTab></Wnd1><Wnd2>
+        <Tabs>
+          <Tab>
+            <Identity>TabID-12385-3544</Identity>
+            <TabName>Disassembly</TabName>
+            <Factory>Disassembly</Factory>
+            <Session/>
+          </Tab>
+        </Tabs>
+        
+      <SelectedTab>0</SelectedTab></Wnd2></Windows>
+    <Editor>
+      
+      
+      
+      
+    <Pane><Tab><Factory>TextEditor</Factory><Filename>C:\svn\cmock\examples\src\Main.c</Filename><XPos>0</XPos><YPos>27</YPos><SelStart>806</SelStart><SelEnd>806</SelEnd></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
+    <Positions>
+      
+      
+      
+      
+      
+    <Top><Row0><Sizes><Toolbar-008fe8c8><key>iaridepm1</key></Toolbar-008fe8c8></Sizes></Row0><Row1><Sizes><Toolbar-02331890><key>debuggergui1</key></Toolbar-02331890></Sizes></Row1></Top><Left><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>509</Bottom><Right>276</Right><x>-2</x><y>-2</y><xscreen>179</xscreen><yscreen>148</yscreen><sizeHorzCX>129149</sizeHorzCX><sizeHorzCY>173302</sizeHorzCY><sizeVertCX>200577</sizeVertCX><sizeVertCY>598361</sizeVertCY></Rect></Wnd1></Sizes></Row0></Left><Right><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>509</Bottom><Right>177</Right><x>-2</x><y>-2</y><xscreen>179</xscreen><yscreen>148</yscreen><sizeHorzCX>129149</sizeHorzCX><sizeHorzCY>173302</sizeHorzCY><sizeVertCX>129149</sizeVertCX><sizeVertCY>598361</sizeVertCY></Rect></Wnd2></Sizes></Row0></Right><Bottom><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>277</Bottom><Right>1388</Right><x>-2</x><y>-2</y><xscreen>1390</xscreen><yscreen>279</yscreen><sizeHorzCX>1002886</sizeHorzCX><sizeHorzCY>326698</sizeHorzCY><sizeVertCX>129149</sizeVertCX><sizeVertCY>173302</sizeVertCY></Rect></Wnd0></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
+  </Desktop>
+</Project>
+
+

data/vendor/cmock/test/iar/iar_v4/settings/cmock_demo.dni

@@ -0,0 +1,42 @@
+[JLinkDriver]
+WatchCond=_ 0
+Watch0=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0
+Watch1=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0
+[DisAssemblyWindow]
+NumStates=_ 1
+State 1=_ 1
+[StackPlugin]
+Enabled=1
+OverflowWarningsEnabled=1
+WarningThreshold=90
+SpWarningsEnabled=1
+WarnHow=0
+UseTrigger=1
+TriggerName=main
+LimitSize=0
+ByteLimit=50
+[Log file]
+LoggingEnabled=_ 0
+LogFile=_ ""
+Category=_ 0
+[TermIOLog]
+LoggingEnabled=_ 0
+LogFile=_ ""
+[Interrupts]
+Enabled=1
+Irq0=_ 0 480549 0 480549 0 0 0 100 0 1 "IRQ 1 0x18 CPSR.I"
+Count=1
+[MemoryMap]
+Enabled=0
+Base=0
+UseAuto=0
+TypeViolation=1
+UnspecRange=1
+ActionState=1
+[Disassemble mode]
+mode=0
+[Breakpoints]
+Count=0
+[TraceHelper]
+Enabled=0
+ShowSource=1

data/vendor/cmock/test/iar/iar_v4/settings/cmock_demo.wsdt

@@ -0,0 +1,76 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<Workspace>
+  <ConfigDictionary>
+    
+  <CurrentConfigs><Project>cmock_demo/Debug</Project></CurrentConfigs></ConfigDictionary>
+  <Desktop>
+    <Static>
+      <Workspace>
+        <ColumnWidths>
+          
+          
+          
+          
+        <Column0>237</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
+      </Workspace>
+      <Build>
+        
+        
+        
+        
+      <ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1115</ColumnWidth1><ColumnWidth2>297</ColumnWidth2><ColumnWidth3>74</ColumnWidth3></Build>
+      <Debug-Log/>
+      <TerminalIO/>
+      <CodeCoveragePlugin/>
+      <Profiling/>
+    <Disassembly><MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly></Static>
+    <Windows>
+      
+      
+    <Wnd1>
+        <Tabs>
+          <Tab>
+            <Identity>TabID-20770-112</Identity>
+            <TabName>Workspace</TabName>
+            <Factory>Workspace</Factory>
+            <Session>
+              
+            <NodeDict><ExpandedNode>cmock_demo</ExpandedNode><ExpandedNode>cmock_demo/Source</ExpandedNode><ExpandedNode>cmock_demo/source</ExpandedNode></NodeDict></Session>
+          </Tab>
+        </Tabs>
+        
+      <SelectedTab>0</SelectedTab></Wnd1><Wnd3>
+        <Tabs>
+          <Tab>
+            <Identity>TabID-10733-1323</Identity>
+            <TabName>Build</TabName>
+            <Factory>Build</Factory>
+            <Session/>
+          </Tab>
+          <Tab>
+            <Identity>TabID-27316-3469</Identity>
+            <TabName>Debug Log</TabName>
+            <Factory>Debug-Log</Factory>
+            <Session/>
+          </Tab>
+        </Tabs>
+        
+      <SelectedTab>0</SelectedTab></Wnd3></Windows>
+    <Editor>
+      
+      
+      
+      
+    <Pane><Tab><Factory>TextEditor</Factory><Filename>C:\svn\cmock\examples\src\Main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>568</SelStart><SelEnd>568</SelEnd></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
+    <Positions>
+      
+      
+      
+      
+      
+    <Top><Row0><Sizes><Toolbar-008fe830><key>iaridepm1</key></Toolbar-008fe830></Sizes></Row0></Top><Left><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>554</Bottom><Right>328</Right><x>-2</x><y>-2</y><xscreen>179</xscreen><yscreen>148</yscreen><sizeHorzCX>129149</sizeHorzCX><sizeHorzCY>173302</sizeHorzCY><sizeVertCX>238095</sizeVertCX><sizeVertCY>651054</sizeVertCY></Rect></Wnd1></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>256</Bottom><Right>1388</Right><x>-2</x><y>-2</y><xscreen>1390</xscreen><yscreen>258</yscreen><sizeHorzCX>1002886</sizeHorzCX><sizeHorzCY>302108</sizeHorzCY><sizeVertCX>129149</sizeVertCX><sizeVertCY>173302</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
+  </Desktop>
+</Workspace>
+
+

data/vendor/cmock/test/iar/iar_v4/srcIAR/Cstartup.s79

@@ -0,0 +1,266 @@
+;-  ----------------------------------------------------------------------------
+;-          ATMEL Microcontroller Software Support  -  ROUSSET  -
+;-  ----------------------------------------------------------------------------
+;-  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+;-  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;-  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+;-  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+;-  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;-  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+;-  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+;-  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+;-  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;-  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;-  ----------------------------------------------------------------------------
+;- File source          : Cstartup.s79
+;- Object               : Generic CStartup
+;- 1.0 01/Sep/05 FBr    : Creation
+;- 1.1 09/Sep/05 JPP    : Change Interrupt management
+;------------------------------------------------------------------------------
+
+;------------------------------------------------------------------------------
+; Include your AT91 Library files
+;------------------------------------------------------------------------------
+#include "AT91SAM7X256_inc.h"
+;------------------------------------------------------------------------------
+
+;------------------------------------------------------------------------------
+; ?RESET
+; Reset Vector.
+; Normally, segment INTVEC is linked at address 0.
+; For debugging purposes, INTVEC may be placed at other addresses.
+; A debugger that honors the entry point will start the
+; program in a normal way even if INTVEC is not at address 0.
+;------------------------------------------------------------------------------
+
+    PROGRAM	?RESET              ;- Begins a program module
+    RSEG	INTRAMEND_REMAP     ;- Begins a relocatable segment
+    RSEG	ICODE:CODE (2)      ;- Begins a relocatable segment : corresponding address is 32-bit aligned
+    CODE32	                    ;- Always ARM mode after reset	
+    ORG	0	                    ;- Sets the location counter: corresponds to the RESET vector address
+
+;------------------------------------------------------------------------------
+;- Exception vectors
+;------------------------------------------------------------------------------
+;- These vectors can be read at address 0 or at RAM address
+;- They ABSOLUTELY requires to be in relative addresssing mode in order to
+;- guarantee a valid jump. For the moment, all are just looping.
+;- If an exception occurs before remap, this would result in an infinite loop.
+;- To ensure if a exeption occurs before start application to infinite loop.
+;------------------------------------------------------------------------------
+
+reset
+                B           InitReset           ; 0x00 Reset handler
+undefvec:
+                B           undefvec            ; 0x04 Undefined Instruction
+swivec:
+                B           swivec              ; 0x08 Software Interrupt
+pabtvec:
+                B           pabtvec             ; 0x0C Prefetch Abort
+dabtvec:
+                B           dabtvec             ; 0x10 Data Abort
+rsvdvec:
+                B           rsvdvec             ; 0x14 reserved
+irqvec:
+                B           IRQ_Handler_Entry   ; 0x18 IRQ
+              				
+fiqvec:               				; 0x1c FIQ
+;------------------------------------------------------------------------------
+;- Function             : FIQ_Handler_Entry
+;- Treatments           : FIQ Controller Interrupt Handler.
+;- Called Functions     : AIC_FVR[interrupt]
+;------------------------------------------------------------------------------
+
+FIQ_Handler_Entry:
+
+;- Switch in SVC/User Mode to allow User Stack access for C code
+; because the FIQ is not yet acknowledged
+
+;- Save and r0 in FIQ_Register
+            mov         r9,r0
+	    ldr         r0 , [r8, #AIC_FVR]
+            msr         CPSR_c,#I_BIT | F_BIT | ARM_MODE_SVC
+;- Save scratch/used registers and LR in User Stack
+            stmfd       sp!, { r1-r3, r12, lr}
+
+;- Branch to the routine pointed by the AIC_FVR
+            mov         r14, pc
+            bx          r0
+
+;- Restore scratch/used registers and LR from User Stack
+            ldmia       sp!, { r1-r3, r12, lr}
+
+;- Leave Interrupts disabled and switch back in FIQ mode
+            msr         CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ
+
+;- Restore the R0 ARM_MODE_SVC register
+            mov         r0,r9
+
+;- Restore the Program Counter using the LR_fiq directly in the PC
+            subs        pc,lr,#4
+
+;------------------------------------------------------------------------------
+;- Manage exception: The exception must be ensure in ARM mode
+;------------------------------------------------------------------------------
+;------------------------------------------------------------------------------
+;- Function             : IRQ_Handler_Entry
+;- Treatments           : IRQ Controller Interrupt Handler.
+;- Called Functions     : AIC_IVR[interrupt]
+;------------------------------------------------------------------------------
+IRQ_Handler_Entry:
+
+;-------------------------
+;- Manage Exception Entry
+;-------------------------
+;- Adjust and save LR_irq in IRQ stack
+    sub         lr, lr, #4
+    stmfd       sp!, {lr}
+
+;- Save r0 and SPSR (need to be saved for nested interrupt)
+    mrs         r14, SPSR
+    stmfd       sp!, {r0,r14}
+
+;- Write in the IVR to support Protect Mode
+;- No effect in Normal Mode
+;- De-assert the NIRQ and clear the source in Protect Mode
+    ldr         r14, =AT91C_BASE_AIC
+    ldr         r0 , [r14, #AIC_IVR]
+    str         r14, [r14, #AIC_IVR]
+
+;- Enable Interrupt and Switch in Supervisor Mode
+    msr         CPSR_c, #ARM_MODE_SVC
+
+;- Save scratch/used registers and LR in User Stack
+    stmfd       sp!, { r1-r3, r12, r14}
+
+;----------------------------------------------
+;- Branch to the routine pointed by the AIC_IVR
+;----------------------------------------------
+    mov         r14, pc
+    bx          r0
+
+;----------------------------------------------
+;- Manage Exception Exit
+;----------------------------------------------
+;- Restore scratch/used registers and LR from User Stack
+    ldmia       sp!, { r1-r3, r12, r14}
+
+;- Disable Interrupt and switch back in IRQ mode
+    msr         CPSR_c, #I_BIT | ARM_MODE_IRQ
+
+;- Mark the End of Interrupt on the AIC
+    ldr         r14, =AT91C_BASE_AIC
+    str         r14, [r14, #AIC_EOICR]
+
+;- Restore SPSR_irq and r0 from IRQ stack
+    ldmia       sp!, {r0,r14}
+    msr         SPSR_cxsf, r14
+
+;- Restore adjusted  LR_irq from IRQ stack directly in the PC
+    ldmia       sp!, {pc}^
+
+
+
+InitReset:
+
+;------------------------------------------------------------------------------
+;- Low level Init is performed in a C function: AT91F_LowLevelInit
+;- Init Stack Pointer to a valid memory area before calling AT91F_LowLevelInit
+;------------------------------------------------------------------------------
+
+;- Retrieve end of RAM address
+__iramend EQU SFB(INTRAMEND_REMAP)      ;- Segment begin
+
+    EXTERN   AT91F_LowLevelInit
+    ldr     r13,=__iramend              ;- Temporary stack in internal RAM for Low Level Init execution
+    ldr	    r0,=AT91F_LowLevelInit
+    mov     lr, pc
+    bx	    r0                          ;- Branch on C function (with interworking)
+
+;------------------------------------------------------------------------------
+;- Top of Stack Definition
+;------------------------------------------------------------------------------
+;- Interrupt and Supervisor Stack are located at the top of internal memory in
+;- order to speed the exception handling context saving and restoring.
+;- ARM_MODE_SVC (Application, C) Stack is located at the top of the external memory.
+;------------------------------------------------------------------------------
+
+IRQ_STACK_SIZE          EQU     (3*8*4)     ; 3 words to be saved per interrupt priority level
+ARM_MODE_FIQ            EQU     0x11
+ARM_MODE_IRQ            EQU     0x12
+ARM_MODE_SVC            EQU     0x13
+I_BIT                   EQU     0x80
+F_BIT                   EQU     0x40
+
+;------------------------------------------------------------------------------
+;- Setup the stack for each mode
+;------------------------------------------------------------------------------
+    ldr     r0, =__iramend
+
+;- Set up Fast Interrupt Mode and set FIQ Mode Stack
+            msr     CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
+;- Init the FIQ register
+            ldr     r8, =AT91C_BASE_AIC
+
+;- Set up Interrupt Mode and set IRQ Mode Stack
+    msr     CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
+    mov     r13, r0                     ; Init stack IRQ
+    sub     r0, r0, #IRQ_STACK_SIZE
+
+;- Enable interrupt & Set up Supervisor Mode and set Supervisor Mode Stack
+    msr     CPSR_c, #ARM_MODE_SVC
+    mov     r13, r0
+
+;------------------------------------------------------------------------------
+; Initialize segments.
+;------------------------------------------------------------------------------
+; __segment_init is assumed to use
+; instruction set and to be reachable by BL from the ICODE segment
+; (it is safest to link them in segment ICODE).
+;------------------------------------------------------------------------------
+    EXTERN	__segment_init
+    ldr	r0,=__segment_init
+    mov     lr, pc
+    bx	r0
+
+;------------------------------------------------------------------------------
+;- Branch on C code Main function (with interworking)
+;------------------------------------------------------------------------------
+    EXTERN	main
+    PUBLIC	__main
+?jump_to_main:
+    ldr	lr,=?call_exit
+    ldr	r0,=main
+__main:
+    bx	r0
+
+;------------------------------------------------------------------------------
+;- Loop for ever
+;------------------------------------------------------------------------------
+;- End of application. Normally, never occur.
+;- Could jump on Software Reset ( B 0x0 ).
+;------------------------------------------------------------------------------
+?call_exit:
+End
+    b       End
+
+;------------------------------------------------------------------------------
+;- Exception Vectors
+;------------------------------------------------------------------------------
+    PUBLIC    AT91F_Default_FIQ_handler
+    PUBLIC    AT91F_Default_IRQ_handler
+    PUBLIC    AT91F_Spurious_handler
+
+    CODE32      ; Always ARM mode after exeption
+
+AT91F_Default_FIQ_handler
+    b         AT91F_Default_FIQ_handler
+
+AT91F_Default_IRQ_handler
+    b         AT91F_Default_IRQ_handler
+
+AT91F_Spurious_handler
+    b         AT91F_Spurious_handler
+
+    ENDMOD      ;- Terminates the assembly of the current module
+    END         ;- Terminates the assembly of the last module in a file

data/vendor/cmock/test/iar/iar_v4/srcIAR/Cstartup_SAM7.c

@@ -0,0 +1,105 @@
+/* =========================================================================
+    CMock - Automatic Mock Generation for C
+    ThrowTheSwitch.org
+    Copyright (c) 2007-25 Mike Karlesky, Mark VanderVoord, & Greg Williams
+    SPDX-License-Identifier: MIT
+========================================================================= */
+
+// ----------------------------------------------------------------------------
+//         ATMEL Microcontroller Software Support  -  ROUSSET  -
+// ----------------------------------------------------------------------------
+// DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+// ----------------------------------------------------------------------------
+// File Name           : Cstartup_SAM7.c
+// Object              : Low level initialisations written in C for IAR Tools
+// Creation            : FBr   01-Sep-2005
+// 1.0 08-Sep-2005 JPP : Suppress Reset
+// ----------------------------------------------------------------------------
+
+#include "AT91SAM7X256.h"
+
+// The following functions must be write in ARM mode this function called directly by exception vector
+extern void AT91F_Spurious_handler(void);
+extern void AT91F_Default_IRQ_handler(void);
+extern void AT91F_Default_FIQ_handler(void);
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_LowLevelInit
+//* \brief This function performs very low level HW initialization
+//*        this function can use a Stack, depending the compilation
+//*        optimization mode
+//*----------------------------------------------------------------------------
+void AT91F_LowLevelInit(void)
+{
+    unsigned char i;
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    // EFC Init
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS;      // 1 Wait State necessary to work at 48MHz
+
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    // Init PMC Step 1. Enable Main Oscillator
+    // Main Oscillator startup time is board specific:
+    // Main Oscillator Startup Time worst case (3MHz) corresponds to 15ms (0x40 for AT91C_CKGR_OSCOUNT field)
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_PMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN ));
+#ifndef SIMULATE
+    // Wait Main Oscillator stabilization
+    while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
+#endif
+
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    // Init PMC Step 2.
+    // Set PLL to 96MHz (96,109MHz) and UDP Clock to 48MHz
+    // PLL Startup time depends on PLL RC filter: worst case is choosen
+    // UDP Clock (48,058MHz) is compliant with the Universal Serial Bus Specification (+/- 0.25% for full speed)
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_PMC->PMC_PLLR = AT91C_CKGR_USBDIV_1 | AT91C_CKGR_OUT_0 | AT91C_CKGR_PLLCOUNT |
+      (AT91C_CKGR_MUL & (72 << 16)) | (AT91C_CKGR_DIV & 14);
+#ifndef SIMULATE
+    // Wait for PLL stabilization
+    while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK) );
+    // Wait until the master clock is established for the case we already turn on the PLL
+    while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
+#endif
+
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    // Init PMC Step 3.
+    // Selection of Master Clock MCK (equal to Processor Clock PCK) equal to PLL/2 = 48MHz
+    // The PMC_MCKR register must not be programmed in a single write operation (see. Product Errata Sheet)
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2;
+#ifndef SIMULATE
+    // Wait until the master clock is established
+    while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
+#endif
+
+    AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
+#ifndef SIMULATE
+    // Wait until the master clock is established
+    while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
+#endif
+
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    //  Disable Watchdog (write once register)
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
+
+    ////////////////////////////////////////////////////////////////////////////////////////////////////
+    //  Init AIC: assign corresponding handler for each interrupt source
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
+    for (i = 1; i < 31; i++) {
+        AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
+    }
+    AT91C_BASE_AIC->AIC_SPU = (unsigned int) AT91F_Spurious_handler;
+}