ceedling 0.13.0.rc1 → 0.13.0

data/vendor/cmock/examples/test/TestUsartTransmitBufferStatus.c

@@ -0,0 +1,22 @@
+#include "unity.h"
+#include "Types.h"
+#include "UsartTransmitBufferStatus.h"
+
+AT91S_USART Usart0Peripheral;
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testReadyToTransmitShouldReturnStatusPerTransmitBufferReadyStatus(void)
+{
+  AT91C_BASE_US0->US_CSR = 0;
+  TEST_ASSERT(!Usart_ReadyToTransmit());
+  
+  AT91C_BASE_US0->US_CSR = AT91C_US_TXRDY;
+  TEST_ASSERT(Usart_ReadyToTransmit());
+}

data/vendor/cmock/iar/iar_v4/Resource/SAM7_FLASH.mac

@@ -0,0 +1,71 @@
+//  ----------------------------------------------------------------------------
+//          ATMEL Microcontroller Software Support  -  ROUSSET  -
+//  ----------------------------------------------------------------------------
+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//  ----------------------------------------------------------------------------
+//  File Name           : SAM7_FLASH.mac
+//  Object              : Generic Macro File for IAR
+//  1.0 17/Aug/05 FBr   : Creation
+//  ----------------------------------------------------------------------------
+
+/*********************************************************************
+*
+*       _InitRSTC()
+*
+* Function description
+*   Initializes the RSTC (Reset controller).
+*   This makes sense since the default is to not allow user resets, which makes it impossible to
+*   apply a second RESET via J-Link
+*/
+_InitRSTC() {
+    __writeMemory32(0xA5000001, 0xFFFFFD08,"Memory");    // Allow user reset
+}
+
+/*********************************************************************
+*
+*       _InitPLL()
+* Function description
+*   Initializes the PMC.
+*   1. Enable the Main Oscillator
+*   2. Configure PLL to 96MHz
+*   3. Switch Master Clock (MCK) on PLL/2 = 48MHz
+*/
+    _InitPLL() {
+
+    __message "Enable Main Oscillator";
+    __writeMemory32(0x00000601,0xFFFFFc20,"Memory");    // MOSC
+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x1)  );
+
+    __message "Set PLL to 96MHz";
+    __writeMemory32(0x10191c05,0xFFFFFc2c,"Memory");    // LOCK
+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x4)  );
+
+    __message "Set Master Clock to 48MHz";
+    __writeMemory32(0x00000004,0xFFFFFc30,"Memory");    // MCKRDY
+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );
+    __writeMemory32(0x00000007,0xFFFFFc30,"Memory");    // MCKRDY
+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );
+}
+
+/*********************************************************************
+*
+*       execUserReset() : JTAG set initially to Full Speed
+*/
+execUserReset() {
+    __message "execUserReset()";
+    __emulatorSpeed(30000);             // Set JTAG speed to 30kHz to make a hardware reset
+    __hwReset(0);                       // Hardware Reset: CPU is automatically halted after the reset (JTAG is already configured to 32kHz)
+    _InitPLL();                         // Allow to debug at JTAG Full Speed
+    _InitRSTC();                        // Enable User Reset to allow execUserReset() execution
+    __emulatorSpeed(0);                 // Set JTAG speed to full speed
+}
+

data/vendor/cmock/iar/iar_v4/Resource/SAM7_RAM.mac

@@ -0,0 +1,94 @@
+//  ----------------------------------------------------------------------------
+//          ATMEL Microcontroller Software Support  -  ROUSSET  -
+//  ----------------------------------------------------------------------------
+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//  ----------------------------------------------------------------------------
+//  File Name           : SAM7_RAM.mac
+//  Object              : Generic Macro File for IAR
+//  1.0 17/Aug/05 FBr   : Creation
+//  ----------------------------------------------------------------------------
+
+/*********************************************************************
+*
+*       _MapRAMAt0()
+*
+* Function description
+*   Maps RAM at 0.
+*/
+_MapRAMAt0(){
+    __message "Changing mapping: RAM mapped to 0";
+    __writeMemory32(0x00000001,0xFFFFFF00,"Memory");
+}
+
+/*********************************************************************
+*
+*       _InitRSTC()
+*
+* Function description
+*   Initializes the RSTC (Reset controller).
+*   This makes sense since the default is to not allow user resets, which makes it impossible to
+*   apply a second RESET via J-Link
+*/
+_InitRSTC() {
+    __writeMemory32(0xA5000001, 0xFFFFFD08,"Memory");    // Allow user reset
+}
+
+/*********************************************************************
+*
+*       _InitPLL()
+* Function description
+*   Initializes the PMC.
+*   1. Enable the Main Oscillator
+*   2. Configure PLL to 96MHz
+*   3. Switch Master Clock (MCK) on PLL/2 = 48MHz
+*/
+    _InitPLL() {
+
+    __message "Set Main Oscillator";
+    __writeMemory32(0x00004001,0xFFFFFc20,"Memory");    // MOSC
+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x1)  );
+
+    __message "Set PLL to 96MHz";
+    __writeMemory32(0x10483f0e,0xFFFFFc2c,"Memory");    // LOCK
+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x4)  );
+
+    __message "Set Master Clock to 48MHz";
+    __writeMemory32(0x00000004,0xFFFFFc30,"Memory");    // MCKRDY
+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );
+    __writeMemory32(0x00000007,0xFFFFFc30,"Memory");    // MCKRDY
+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );
+}
+
+/*********************************************************************
+*
+*       execUserReset() : JTAG set initially to Full Speed
+*/
+execUserReset() {
+    __message "execUserReset()";
+    __emulatorSpeed(30000);             // Set JTAG speed to 30kHz to make a hardware reset
+    __hwReset(0);                       // Hardware Reset: CPU is automatically halted after the reset
+    _InitPLL();                         // Allow to debug at JTAG Full Speed
+    _MapRAMAt0();                       // Remap RAM to address 0
+    __emulatorSpeed(0);                 // Set JTAG speed to full speed
+}
+
+/*********************************************************************
+*
+*       execUserPreload() : JTAG set initially to 32kHz
+*/
+execUserPreload() {
+    __message "execUserPreload()";
+    __hwReset(0);                       // Hardware Reset: CPU is automatically halted after the reset (JTAG is already configured to 32kHz)
+    _InitPLL();                         // Allow to load Code at JTAG Full Speed
+    _MapRAMAt0();                       // Remap RAM to address 0
+    _InitRSTC();                        // Enable User Reset to allow execUserReset() execution
+}

data/vendor/cmock/iar/iar_v4/Resource/SAM7_SIM.mac

@@ -0,0 +1,67 @@
+//=========================================================
+// Simulation setup file for esc07_demo project
+//=========================================================
+
+__var _timer0_interrupt_ID;
+
+irqBreak()
+{
+  __var __AIC_SMR;
+  __var __AIC_IECR;
+  __var __AIC_IVR;
+
+  // read AIC_IECR instead, since not fully supported by simulator
+  __AIC_IECR = __readMemory32(0xFFFFF120, "Memory");
+  if(__AIC_IECR & 0x1000)
+  {
+    __AIC_SMR = __readMemory32(0xFFFFF060, "Memory");
+    __AIC_IVR = __readMemory32(0xFFFFF0B0, "Memory"); //AIC_IVR = AIC_SVR[x]
+    __writeMemory32(__AIC_IVR, 0xFFFFF100, "Memory"); //AIC_IVR
+    __writeMemory32(0x1000, 0xFFFFF10C, "Memory");    //AIC_IPR
+    __writeMemory32(0x2, 0xFFFFF114, "Memory");       //AIC_CISR
+  }
+
+  return 0;
+}
+
+setupProcessorRegisters()
+{
+  // Write TC0_SR.CPCS with correct status for ISR (Clock enabled; RC Compare Flag = TRUE)
+  __writeMemory32(0x00010010, 0xfffa0020, "Memory");
+
+  // Set TX ready flag in USART0 status register
+  // USART0_BASE->US_CSR = AT91C_US_TXRDY
+  __writeMemory32(0x00000002, 0xfffc0014, "Memory");
+}
+
+configureTimer0Interrupt()
+{
+  __var _master_clock_frequency;
+  __var _timer0_period_cycles;
+
+  // Calculate timer0 frequency in master clock cycles
+  _master_clock_frequency = 48054857;
+  _timer0_period_cycles = _master_clock_frequency / 100;
+  if((_master_clock_frequency % 100) >= 50)
+  {
+    _timer0_period_cycles++;
+  }
+
+  __cancelAllInterrupts();
+  __enableInterrupts();
+
+  _timer0_interrupt_ID = __orderInterrupt("IRQ", _timer0_period_cycles, _timer0_period_cycles, 0, 0, 0, 100);
+
+  if(-1 == _timer0_interrupt_ID)
+  {
+    __message "ERROR: failed to order timer 0 interrupt";
+  }
+
+  __setCodeBreak("0x18", 0, "irqBreak()", "TRUE", "");
+}
+
+execUserReset()
+{
+  setupProcessorRegisters();
+  configureTimer0Interrupt();
+}

data/vendor/cmock/iar/iar_v4/Resource/at91SAM7X256_FLASH.xcl

@@ -0,0 +1,185 @@
+//  ----------------------------------------------------------------------------
+//          ATMEL Microcontroller Software Support  -  ROUSSET  -
+//  ----------------------------------------------------------------------------
+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//  ----------------------------------------------------------------------------
+//  File Name           : at91SAM7X256_FLASH.xcl
+//  Object              : Generic Linker Command File for IAR
+//  1.0 30/Aug/05 FBr   : Creation for 4.30A
+//  ----------------------------------------------------------------------------
+
+//*************************************************************************
+// XLINK command file template for EWARM/ICCARM
+//
+// Usage:  xlink  -f lnkarm  <your_object_file(s)>
+//                -s <program start label>  <C/C++ runtime library>
+//*************************************************************************
+//
+// -------------
+// Code segments - may be placed anywhere in memory.
+// -------------
+//
+//   INTVEC     -- Exception vector table.
+//   SWITAB     -- Software interrupt vector table.
+//   ICODE      -- Startup (cstartup) and exception code.
+//   DIFUNCT    -- Dynamic initialization vectors used by C++.
+//   CODE       -- Compiler generated code.
+//   CODE_I     -- Compiler generated code declared __ramfunc (executes in RAM)
+//   CODE_ID    -- Initializer for CODE_I (ROM).
+//
+// -------------
+// Data segments - may be placed anywhere in memory.
+// -------------
+//
+//   CSTACK     -- The stack used by C/C++ programs (system and user mode).
+//   IRQ_STACK  -- The stack used by IRQ service routines.
+//   SVC_STACK  -- The stack used in supervisor mode
+//                 (Define other exception stacks as needed for
+//                 FIQ, ABT, UND).
+//   HEAP       -- The heap used by malloc and free in C and new and
+//                 delete in C++.
+//   INITTAB    -- Table containing addresses and sizes of segments that
+//                 need to be initialized at startup (by cstartup).
+//   CHECKSUM   -- The linker places checksum byte(s) in this segment,
+//                 when the -J linker command line option is used.
+//   DATA_y     -- Data objects.
+//
+// Where _y can be one of:
+//
+//   _AN        -- Holds uninitialized located objects, i.e. objects with
+//                 an absolute location given by the @ operator or the
+//                 #pragma location directive. Since these segments
+//                 contain objects which already have a fixed address,
+//                 they should not be mentioned in this linker command
+//                 file.
+//   _C         -- Constants (ROM).
+//   _I         -- Initialized data (RAM).
+//   _ID        -- The original content of _I (copied to _I by cstartup) (ROM).
+//   _N         -- Uninitialized data (RAM).
+//   _Z         -- Zero initialized data (RAM).
+//
+// Note:  Be sure to use end values for the defined address ranges.
+//        Otherwise, the linker may allocate space outside the
+//        intended memory range.
+//*************************************************************************
+
+//*************************************************************************
+// Inform the linker about the CPU family used.
+// AT91SAM7X256 Memory mapping
+// No remap
+//  ROMSTART
+//  Start address 0x0000 0000
+//  Size 256 Kbo  0x0004 0000
+//  RAMSTART
+//  Start address 0x0020 0000
+//  Size  64 Kbo  0x0001 0000
+// Remap done
+//  RAMSTART
+//  Start address 0x0000 0000
+//  Size  64 Kbo  0x0001 0000
+//  ROMSTART
+//  Start address 0x0010 0000
+//  Size 256 Kbo  0x0004 0000
+
+//*************************************************************************
+-carm
+
+//*************************************************************************
+// Internal Ram segments mapped AFTER REMAP 64 K.
+//*************************************************************************
+-Z(CONST)INTRAMSTART_REMAP=00200000
+-Z(CONST)INTRAMEND_REMAP=0020FFFF
+
+//*************************************************************************
+// Read-only segments mapped to Flash 256 K.
+//*************************************************************************
+-DROMSTART=00000000
+-DROMEND=0003FFFF
+//*************************************************************************
+// Read/write segments mapped to 64 K RAM.
+//*************************************************************************
+-DRAMSTART=00200000
+-DRAMEND=0020FFFF
+
+//*************************************************************************
+// Address range for reset and exception
+// vectors (INTVEC).
+// The vector area is 32 bytes,
+// an additional 32 bytes is allocated for the
+// constant table used by ldr PC in cstartup.s79.
+//*************************************************************************
+-Z(CODE)INTVEC=00-3F
+
+//*************************************************************************
+// Startup code and exception routines (ICODE).
+//*************************************************************************
+-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
+-Z(CODE)SWITAB=ROMSTART-ROMEND
+
+//*************************************************************************
+// Code segments may be placed anywhere.
+//*************************************************************************
+-Z(CODE)CODE=ROMSTART-ROMEND
+
+//*************************************************************************
+// Various constants and initializers.
+//*************************************************************************
+-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
+-Z(CONST)CHECKSUM=ROMSTART-ROMEND
+
+//*************************************************************************
+// Data segments.
+//*************************************************************************
+-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
+
+//*************************************************************************
+// __ramfunc code copied to and executed from RAM.
+//*************************************************************************
+-Z(DATA)CODE_I=RAMSTART-RAMEND
+-Z(CONST)CODE_ID=ROMSTART-ROMEND // Initializer for
+-QCODE_I=CODE_ID
+
+//*************************************************************************
+// ICCARM produces code for __ramfunc functions in
+// CODE_I segments. The -Q XLINK command line
+// option redirects XLINK to emit the code in the
+// debug information associated with the CODE_I
+// segment, where the code will execute.
+//*************************************************************************
+
+//*************************************************************************
+// Stack and heap segments.
+//*************************************************************************
+-D_CSTACK_SIZE=(100*4)
+-D_IRQ_STACK_SIZE=(3*8*4)
+-D_HEAP_SIZE=(1024*1)
+
+-Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
+-Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE=RAMSTART-RAMEND
+-Z(DATA)HEAP+_HEAP_SIZE=RAMSTART-RAMEND
+
+//*************************************************************************
+// ELF/DWARF support.
+//
+// Uncomment the line "-Felf" below to generate ELF/DWARF output.
+// Available format specifiers are:
+//
+//   "-yn": Suppress DWARF debug output
+//   "-yp": Multiple ELF program sections
+//   "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
+//
+// "-Felf" and the format specifiers can also be supplied directly as
+// command line options, or selected from the Xlink Output tab in the
+// IAR Embedded Workbench.
+//*************************************************************************
+
+// -Felf

data/vendor/cmock/iar/iar_v4/Resource/at91SAM7X256_RAM.xcl

@@ -0,0 +1,185 @@
+//  ----------------------------------------------------------------------------
+//          ATMEL Microcontroller Software Support  -  ROUSSET  -
+//  ----------------------------------------------------------------------------
+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//  ----------------------------------------------------------------------------
+//  File Name           : at91SAM7X256_RAM.xcl
+//  Object              : Generic Linker Command File for IAR
+//  1.0 30/Aug/05 FBr   : Creation for 4.30A
+//  ----------------------------------------------------------------------------
+
+//*************************************************************************
+// XLINK command file template for EWARM/ICCARM
+//
+// Usage:  xlink  -f lnkarm  <your_object_file(s)>
+//                -s <program start label>  <C/C++ runtime library>
+//*************************************************************************
+//
+// -------------
+// Code segments - may be placed anywhere in memory.
+// -------------
+//
+//   INTVEC     -- Exception vector table.
+//   SWITAB     -- Software interrupt vector table.
+//   ICODE      -- Startup (cstartup) and exception code.
+//   DIFUNCT    -- Dynamic initialization vectors used by C++.
+//   CODE       -- Compiler generated code.
+//   CODE_I     -- Compiler generated code declared __ramfunc (executes in RAM)
+//   CODE_ID    -- Initializer for CODE_I (ROM).
+//
+// -------------
+// Data segments - may be placed anywhere in memory.
+// -------------
+//
+//   CSTACK     -- The stack used by C/C++ programs (system and user mode).
+//   IRQ_STACK  -- The stack used by IRQ service routines.
+//   SVC_STACK  -- The stack used in supervisor mode
+//                 (Define other exception stacks as needed for
+//                 FIQ, ABT, UND).
+//   HEAP       -- The heap used by malloc and free in C and new and
+//                 delete in C++.
+//   INITTAB    -- Table containing addresses and sizes of segments that
+//                 need to be initialized at startup (by cstartup).
+//   CHECKSUM   -- The linker places checksum byte(s) in this segment,
+//                 when the -J linker command line option is used.
+//   DATA_y     -- Data objects.
+//
+// Where _y can be one of:
+//
+//   _AN        -- Holds uninitialized located objects, i.e. objects with
+//                 an absolute location given by the @ operator or the
+//                 #pragma location directive. Since these segments
+//                 contain objects which already have a fixed address,
+//                 they should not be mentioned in this linker command
+//                 file.
+//   _C         -- Constants (ROM).
+//   _I         -- Initialized data (RAM).
+//   _ID        -- The original content of _I (copied to _I by cstartup) (ROM).
+//   _N         -- Uninitialized data (RAM).
+//   _Z         -- Zero initialized data (RAM).
+//
+// Note:  Be sure to use end values for the defined address ranges.
+//        Otherwise, the linker may allocate space outside the
+//        intended memory range.
+//*************************************************************************
+
+//*************************************************************************
+// Inform the linker about the CPU family used.
+// AT91SAM7X256 Memory mapping
+// No remap
+//  ROMSTART
+//  Start address 0x0000 0000
+//  Size 256 Kbo  0x0004 0000
+//  RAMSTART
+//  Start address 0x0020 0000
+//  Size  64 Kbo  0x0001 0000
+// Remap done
+//  RAMSTART
+//  Start address 0x0000 0000
+//  Size  64 Kbo  0x0001 0000
+//  ROMSTART
+//  Start address 0x0010 0000
+//  Size 256 Kbo  0x0004 0000
+
+//*************************************************************************
+-carm
+
+//*************************************************************************
+// Internal Ram segments mapped AFTER REMAP 64 K.
+//*************************************************************************
+-Z(CONST)INTRAMSTART_REMAP=00000000
+-Z(CONST)INTRAMEND_REMAP=0000FFFF
+
+//*************************************************************************
+// Read-only segments mapped to Flash 256 K.
+//*************************************************************************
+-DROMSTART=00000000
+-DROMEND=0003FFFF
+//*************************************************************************
+// Read/write segments mapped to 64 K RAM.
+//*************************************************************************
+-DRAMSTART=00000000
+-DRAMEND=0000FFFF
+
+//*************************************************************************
+// Address range for reset and exception
+// vectors (INTVEC).
+// The vector area is 32 bytes,
+// an additional 32 bytes is allocated for the
+// constant table used by ldr PC in cstartup.s79.
+//*************************************************************************
+-Z(CODE)INTVEC=00-3F
+
+//*************************************************************************
+// Startup code and exception routines (ICODE).
+//*************************************************************************
+-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
+-Z(CODE)SWITAB=ROMSTART-ROMEND
+
+//*************************************************************************
+// Code segments may be placed anywhere.
+//*************************************************************************
+-Z(CODE)CODE=ROMSTART-ROMEND
+
+//*************************************************************************
+// Various constants and initializers.
+//*************************************************************************
+-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
+-Z(CONST)CHECKSUM=ROMSTART-ROMEND
+
+//*************************************************************************
+// Data segments.
+//*************************************************************************
+-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
+
+//*************************************************************************
+// __ramfunc code copied to and executed from RAM.
+//*************************************************************************
+-Z(DATA)CODE_I=RAMSTART-RAMEND
+-Z(CONST)CODE_ID=ROMSTART-ROMEND // Initializer for
+-QCODE_I=CODE_ID
+
+//*************************************************************************
+// ICCARM produces code for __ramfunc functions in
+// CODE_I segments. The -Q XLINK command line
+// option redirects XLINK to emit the code in the
+// debug information associated with the CODE_I
+// segment, where the code will execute.
+//*************************************************************************
+
+//*************************************************************************
+// Stack and heap segments.
+//*************************************************************************
+-D_CSTACK_SIZE=(100*4)
+-D_IRQ_STACK_SIZE=(3*8*4)
+-D_HEAP_SIZE=(1024*2)
+
+-Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
+-Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE=RAMSTART-RAMEND
+-Z(DATA)HEAP+_HEAP_SIZE=RAMSTART-RAMEND
+
+//*************************************************************************
+// ELF/DWARF support.
+//
+// Uncomment the line "-Felf" below to generate ELF/DWARF output.
+// Available format specifiers are:
+//
+//   "-yn": Suppress DWARF debug output
+//   "-yp": Multiple ELF program sections
+//   "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
+//
+// "-Felf" and the format specifiers can also be supplied directly as
+// command line options, or selected from the Xlink Output tab in the
+// IAR Embedded Workbench.
+//*************************************************************************
+
+// -Felf