asmjit 0.2.0 → 0.2.1
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +4 -4
- data/Gemfile.lock +1 -1
- data/asmjit.gemspec +1 -1
- data/ext/asmjit/asmjit/.editorconfig +10 -0
- data/ext/asmjit/asmjit/.github/FUNDING.yml +1 -0
- data/ext/asmjit/asmjit/.github/workflows/build-config.json +47 -0
- data/ext/asmjit/asmjit/.github/workflows/build.yml +156 -0
- data/ext/asmjit/asmjit/.gitignore +6 -0
- data/ext/asmjit/asmjit/CMakeLists.txt +611 -0
- data/ext/asmjit/asmjit/LICENSE.md +17 -0
- data/ext/asmjit/asmjit/README.md +69 -0
- data/ext/asmjit/asmjit/src/asmjit/a64.h +62 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64archtraits_p.h +81 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64assembler.cpp +5115 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64assembler.h +72 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64builder.cpp +51 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64builder.h +57 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64compiler.cpp +60 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64compiler.h +247 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64emithelper.cpp +464 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64emithelper_p.h +50 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64emitter.h +1228 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64formatter.cpp +298 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64formatter_p.h +59 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64func.cpp +189 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64func_p.h +33 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64globals.h +1894 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64instapi.cpp +278 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64instapi_p.h +41 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64instdb.cpp +1957 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64instdb.h +74 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64instdb_p.h +876 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64operand.cpp +85 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64operand.h +312 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64rapass.cpp +852 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64rapass_p.h +105 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/a64utils.h +179 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/armformatter.cpp +143 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/armformatter_p.h +44 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/armglobals.h +21 -0
- data/ext/asmjit/asmjit/src/asmjit/arm/armoperand.h +621 -0
- data/ext/asmjit/asmjit/src/asmjit/arm.h +62 -0
- data/ext/asmjit/asmjit/src/asmjit/asmjit-scope-begin.h +17 -0
- data/ext/asmjit/asmjit/src/asmjit/asmjit-scope-end.h +9 -0
- data/ext/asmjit/asmjit/src/asmjit/asmjit.h +33 -0
- data/ext/asmjit/asmjit/src/asmjit/core/api-build_p.h +55 -0
- data/ext/asmjit/asmjit/src/asmjit/core/api-config.h +613 -0
- data/ext/asmjit/asmjit/src/asmjit/core/archcommons.h +229 -0
- data/ext/asmjit/asmjit/src/asmjit/core/archtraits.cpp +160 -0
- data/ext/asmjit/asmjit/src/asmjit/core/archtraits.h +290 -0
- data/ext/asmjit/asmjit/src/asmjit/core/assembler.cpp +406 -0
- data/ext/asmjit/asmjit/src/asmjit/core/assembler.h +129 -0
- data/ext/asmjit/asmjit/src/asmjit/core/builder.cpp +889 -0
- data/ext/asmjit/asmjit/src/asmjit/core/builder.h +1391 -0
- data/ext/asmjit/asmjit/src/asmjit/core/codebuffer.h +113 -0
- data/ext/asmjit/asmjit/src/asmjit/core/codeholder.cpp +1149 -0
- data/ext/asmjit/asmjit/src/asmjit/core/codeholder.h +1035 -0
- data/ext/asmjit/asmjit/src/asmjit/core/codewriter.cpp +175 -0
- data/ext/asmjit/asmjit/src/asmjit/core/codewriter_p.h +179 -0
- data/ext/asmjit/asmjit/src/asmjit/core/compiler.cpp +582 -0
- data/ext/asmjit/asmjit/src/asmjit/core/compiler.h +737 -0
- data/ext/asmjit/asmjit/src/asmjit/core/compilerdefs.h +173 -0
- data/ext/asmjit/asmjit/src/asmjit/core/constpool.cpp +363 -0
- data/ext/asmjit/asmjit/src/asmjit/core/constpool.h +250 -0
- data/ext/asmjit/asmjit/src/asmjit/core/cpuinfo.cpp +1162 -0
- data/ext/asmjit/asmjit/src/asmjit/core/cpuinfo.h +813 -0
- data/ext/asmjit/asmjit/src/asmjit/core/emithelper.cpp +323 -0
- data/ext/asmjit/asmjit/src/asmjit/core/emithelper_p.h +58 -0
- data/ext/asmjit/asmjit/src/asmjit/core/emitter.cpp +333 -0
- data/ext/asmjit/asmjit/src/asmjit/core/emitter.h +741 -0
- data/ext/asmjit/asmjit/src/asmjit/core/emitterutils.cpp +129 -0
- data/ext/asmjit/asmjit/src/asmjit/core/emitterutils_p.h +89 -0
- data/ext/asmjit/asmjit/src/asmjit/core/environment.cpp +46 -0
- data/ext/asmjit/asmjit/src/asmjit/core/environment.h +508 -0
- data/ext/asmjit/asmjit/src/asmjit/core/errorhandler.cpp +14 -0
- data/ext/asmjit/asmjit/src/asmjit/core/errorhandler.h +228 -0
- data/ext/asmjit/asmjit/src/asmjit/core/formatter.cpp +584 -0
- data/ext/asmjit/asmjit/src/asmjit/core/formatter.h +247 -0
- data/ext/asmjit/asmjit/src/asmjit/core/formatter_p.h +34 -0
- data/ext/asmjit/asmjit/src/asmjit/core/func.cpp +286 -0
- data/ext/asmjit/asmjit/src/asmjit/core/func.h +1445 -0
- data/ext/asmjit/asmjit/src/asmjit/core/funcargscontext.cpp +293 -0
- data/ext/asmjit/asmjit/src/asmjit/core/funcargscontext_p.h +199 -0
- data/ext/asmjit/asmjit/src/asmjit/core/globals.cpp +133 -0
- data/ext/asmjit/asmjit/src/asmjit/core/globals.h +393 -0
- data/ext/asmjit/asmjit/src/asmjit/core/inst.cpp +113 -0
- data/ext/asmjit/asmjit/src/asmjit/core/inst.h +772 -0
- data/ext/asmjit/asmjit/src/asmjit/core/jitallocator.cpp +1242 -0
- data/ext/asmjit/asmjit/src/asmjit/core/jitallocator.h +261 -0
- data/ext/asmjit/asmjit/src/asmjit/core/jitruntime.cpp +80 -0
- data/ext/asmjit/asmjit/src/asmjit/core/jitruntime.h +89 -0
- data/ext/asmjit/asmjit/src/asmjit/core/logger.cpp +69 -0
- data/ext/asmjit/asmjit/src/asmjit/core/logger.h +198 -0
- data/ext/asmjit/asmjit/src/asmjit/core/misc_p.h +33 -0
- data/ext/asmjit/asmjit/src/asmjit/core/operand.cpp +132 -0
- data/ext/asmjit/asmjit/src/asmjit/core/operand.h +1611 -0
- data/ext/asmjit/asmjit/src/asmjit/core/osutils.cpp +84 -0
- data/ext/asmjit/asmjit/src/asmjit/core/osutils.h +61 -0
- data/ext/asmjit/asmjit/src/asmjit/core/osutils_p.h +68 -0
- data/ext/asmjit/asmjit/src/asmjit/core/raassignment_p.h +418 -0
- data/ext/asmjit/asmjit/src/asmjit/core/rabuilders_p.h +612 -0
- data/ext/asmjit/asmjit/src/asmjit/core/radefs_p.h +1204 -0
- data/ext/asmjit/asmjit/src/asmjit/core/ralocal.cpp +1166 -0
- data/ext/asmjit/asmjit/src/asmjit/core/ralocal_p.h +254 -0
- data/ext/asmjit/asmjit/src/asmjit/core/rapass.cpp +1969 -0
- data/ext/asmjit/asmjit/src/asmjit/core/rapass_p.h +1183 -0
- data/ext/asmjit/asmjit/src/asmjit/core/rastack.cpp +184 -0
- data/ext/asmjit/asmjit/src/asmjit/core/rastack_p.h +171 -0
- data/ext/asmjit/asmjit/src/asmjit/core/string.cpp +559 -0
- data/ext/asmjit/asmjit/src/asmjit/core/string.h +372 -0
- data/ext/asmjit/asmjit/src/asmjit/core/support.cpp +494 -0
- data/ext/asmjit/asmjit/src/asmjit/core/support.h +1773 -0
- data/ext/asmjit/asmjit/src/asmjit/core/target.cpp +14 -0
- data/ext/asmjit/asmjit/src/asmjit/core/target.h +53 -0
- data/ext/asmjit/asmjit/src/asmjit/core/type.cpp +74 -0
- data/ext/asmjit/asmjit/src/asmjit/core/type.h +419 -0
- data/ext/asmjit/asmjit/src/asmjit/core/virtmem.cpp +722 -0
- data/ext/asmjit/asmjit/src/asmjit/core/virtmem.h +242 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zone.cpp +353 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zone.h +615 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zonehash.cpp +309 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zonehash.h +186 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zonelist.cpp +163 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zonelist.h +209 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zonestack.cpp +176 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zonestack.h +239 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zonestring.h +120 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zonetree.cpp +99 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zonetree.h +380 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zonevector.cpp +356 -0
- data/ext/asmjit/asmjit/src/asmjit/core/zonevector.h +690 -0
- data/ext/asmjit/asmjit/src/asmjit/core.h +1861 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86archtraits_p.h +148 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86assembler.cpp +5110 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86assembler.h +685 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86builder.cpp +52 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86builder.h +351 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86compiler.cpp +61 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86compiler.h +721 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86emithelper.cpp +619 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86emithelper_p.h +60 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86emitter.h +4315 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86formatter.cpp +944 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86formatter_p.h +58 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86func.cpp +503 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86func_p.h +33 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86globals.h +2169 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86instapi.cpp +1732 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86instapi_p.h +41 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86instdb.cpp +4427 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86instdb.h +563 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86instdb_p.h +311 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86opcode_p.h +436 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86operand.cpp +231 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86operand.h +1085 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86rapass.cpp +1509 -0
- data/ext/asmjit/asmjit/src/asmjit/x86/x86rapass_p.h +94 -0
- data/ext/asmjit/asmjit/src/asmjit/x86.h +93 -0
- data/ext/asmjit/asmjit/src/asmjit.natvis +245 -0
- data/ext/asmjit/asmjit/test/asmjit_test_assembler.cpp +84 -0
- data/ext/asmjit/asmjit/test/asmjit_test_assembler.h +85 -0
- data/ext/asmjit/asmjit/test/asmjit_test_assembler_a64.cpp +4006 -0
- data/ext/asmjit/asmjit/test/asmjit_test_assembler_x64.cpp +17833 -0
- data/ext/asmjit/asmjit/test/asmjit_test_assembler_x86.cpp +8300 -0
- data/ext/asmjit/asmjit/test/asmjit_test_compiler.cpp +253 -0
- data/ext/asmjit/asmjit/test/asmjit_test_compiler.h +73 -0
- data/ext/asmjit/asmjit/test/asmjit_test_compiler_a64.cpp +690 -0
- data/ext/asmjit/asmjit/test/asmjit_test_compiler_x86.cpp +4317 -0
- data/ext/asmjit/asmjit/test/asmjit_test_emitters.cpp +197 -0
- data/ext/asmjit/asmjit/test/asmjit_test_instinfo.cpp +181 -0
- data/ext/asmjit/asmjit/test/asmjit_test_misc.h +257 -0
- data/ext/asmjit/asmjit/test/asmjit_test_perf.cpp +62 -0
- data/ext/asmjit/asmjit/test/asmjit_test_perf.h +61 -0
- data/ext/asmjit/asmjit/test/asmjit_test_perf_a64.cpp +699 -0
- data/ext/asmjit/asmjit/test/asmjit_test_perf_x86.cpp +5032 -0
- data/ext/asmjit/asmjit/test/asmjit_test_unit.cpp +172 -0
- data/ext/asmjit/asmjit/test/asmjit_test_x86_sections.cpp +172 -0
- data/ext/asmjit/asmjit/test/asmjitutils.h +38 -0
- data/ext/asmjit/asmjit/test/broken.cpp +312 -0
- data/ext/asmjit/asmjit/test/broken.h +148 -0
- data/ext/asmjit/asmjit/test/cmdline.h +61 -0
- data/ext/asmjit/asmjit/test/performancetimer.h +41 -0
- data/ext/asmjit/asmjit/tools/configure-makefiles.sh +13 -0
- data/ext/asmjit/asmjit/tools/configure-ninja.sh +13 -0
- data/ext/asmjit/asmjit/tools/configure-sanitizers.sh +13 -0
- data/ext/asmjit/asmjit/tools/configure-vs2019-x64.bat +2 -0
- data/ext/asmjit/asmjit/tools/configure-vs2019-x86.bat +2 -0
- data/ext/asmjit/asmjit/tools/configure-vs2022-x64.bat +2 -0
- data/ext/asmjit/asmjit/tools/configure-vs2022-x86.bat +2 -0
- data/ext/asmjit/asmjit/tools/configure-xcode.sh +8 -0
- data/ext/asmjit/asmjit/tools/enumgen.js +417 -0
- data/ext/asmjit/asmjit/tools/enumgen.sh +3 -0
- data/ext/asmjit/asmjit/tools/tablegen-arm.js +365 -0
- data/ext/asmjit/asmjit/tools/tablegen-arm.sh +3 -0
- data/ext/asmjit/asmjit/tools/tablegen-x86.js +2638 -0
- data/ext/asmjit/asmjit/tools/tablegen-x86.sh +3 -0
- data/ext/asmjit/asmjit/tools/tablegen.js +947 -0
- data/ext/asmjit/asmjit/tools/tablegen.sh +4 -0
- data/ext/asmjit/asmjit.cc +18 -0
- data/lib/asmjit/version.rb +1 -1
- metadata +197 -2
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// This file is part of AsmJit project <https://asmjit.com>
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//
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// See asmjit.h or LICENSE.md for license and copyright information
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// SPDX-License-Identifier: Zlib
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#include "../core/api-build_p.h"
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#if !defined(ASMJIT_NO_AARCH64)
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#include "../core/codeholder.h"
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#include "../core/support.h"
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#include "../arm/a64instdb_p.h"
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#include "../arm/a64operand.h"
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ASMJIT_BEGIN_SUB_NAMESPACE(a64)
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namespace InstDB {
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// a64::InstDB - InstInfoTable
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// ===========================
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// Don't store `_nameDataIndex` if instruction names are disabled. Since some
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// APIs can use `_nameDataIndex` it's much safer if it's zero if it's not used.
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#if defined(ASMJIT_NO_TEXT)
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#define NAME_DATA_INDEX(x) 0
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#else
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#define NAME_DATA_INDEX(x) x
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#endif
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// Defines an ARM/AArch64 instruction.
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#define INST(id, opcodeEncoding, opcodeData, rwInfoIndex, flags, opcodeDataIndex, nameDataIndex) { \
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uint32_t(kEncoding##opcodeEncoding), \
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uint32_t(opcodeDataIndex), \
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0, \
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uint32_t(NAME_DATA_INDEX(nameDataIndex)), \
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uint16_t(rwInfoIndex), \
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uint16_t(flags) \
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}
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#define F(flag) kInstFlag##flag
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// TODO: [ARM] Missing Instructions:
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/*
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BLRAA, BLRAAZ, BLRAB, BLRABZ: Branch with Link to Register, with pointer authentication.
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BRAA, BRAAZ, BRAB, BRABZ: Branch to Register, with pointer authentication.
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CFP: Control Flow Prediction Restriction by Context: an alias of SYS.
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CPP: Cache Prefetch Prediction Restriction by Context: an alias of SYS.
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DVP: Data Value Prediction Restriction by Context: an alias of SYS.
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PSB CSYNC: Profiling Synchronization Barrier.
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ERETAA, ERETAB: Exception Return, with pointer authentication.
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LDAPxxx
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PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA: Pointer Authentication Code for Instruction address, using key A.
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PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB: Pointer Authentication Code for Instruction address, using key B.
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PRFM (immediate): Prefetch Memory (immediate).
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PRFM (literal): Prefetch Memory (literal).
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PRFM (register): Prefetch Memory (register).
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PRFUM: Prefetch Memory (unscaled offset).
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RETAA, RETAB: Return from subroutine, with pointer authentication.
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RMIF: Rotate, Mask Insert Flags.
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SYSL
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IRG: Insert Random Tag.
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INST_(Irg , BaseRRR , (0b1001101011000000000100, kX , kSP, kX , kSP, kX , kZR, true) , kRWI_W , 0 , 0 , 1 ), // #1
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*/
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const InstInfo _instInfoTable[] = {
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// +------------------+---------------------+--------------------------------------------------------------------------------------+-----------+---------------------------+----+-----+
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// | Instruction Id | Encoding | Opcode Data | RW Info | Instruction Flags |DatX|NameX|
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// +------------------+---------------------+--------------------------------------------------------------------------------------+-----------+---------------------------+----+-----+
|
|
69
|
+
// ${InstInfo:Begin}
|
|
70
|
+
INST(None , None , (_) , 0 , 0 , 0 , 0 ), // #0
|
|
71
|
+
INST(Adc , BaseRRR , (0b0001101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true) , kRWI_W , 0 , 0 , 1 ), // #1
|
|
72
|
+
INST(Adcs , BaseRRR , (0b0011101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true) , kRWI_W , 0 , 1 , 5 ), // #2
|
|
73
|
+
INST(Add , BaseAddSub , (0b0001011000, 0b0001011001, 0b0010001) , kRWI_W , 0 , 0 , 978 ), // #3
|
|
74
|
+
INST(Addg , BaseRRII , (0b1001000110000000000000, kX, kSP, kX, kSP, 6, 4, 16, 4, 0, 10) , kRWI_W , 0 , 0 , 10 ), // #4
|
|
75
|
+
INST(Adds , BaseAddSub , (0b0101011000, 0b0101011001, 0b0110001) , kRWI_W , 0 , 1 , 15 ), // #5
|
|
76
|
+
INST(Adr , BaseAdr , (0b0001000000000000000000, OffsetType::kAArch64_ADR) , kRWI_W , 0 , 0 , 25 ), // #6
|
|
77
|
+
INST(Adrp , BaseAdr , (0b1001000000000000000000, OffsetType::kAArch64_ADRP) , kRWI_W , 0 , 1 , 29 ), // #7
|
|
78
|
+
INST(And , BaseLogical , (0b0001010000, 0b00100100, 0) , kRWI_W , 0 , 0 , 57 ), // #8
|
|
79
|
+
INST(Ands , BaseLogical , (0b1101010000, 0b11100100, 0) , kRWI_W , 0 , 1 , 61 ), // #9
|
|
80
|
+
INST(Asr , BaseShift , (0b0001101011000000001010, 0b0001001100000000011111, 0) , kRWI_W , 0 , 0 , 66 ), // #10
|
|
81
|
+
INST(Asrv , BaseShift , (0b0001101011000000001010, 0b0000000000000000000000, 0) , kRWI_W , 0 , 1 , 70 ), // #11
|
|
82
|
+
INST(At , BaseAtDcIcTlbi , (0b00011111110000, 0b00001111000000, true) , kRWI_RX , 0 , 0 , 75 ), // #12
|
|
83
|
+
INST(Autda , BaseRR , (0b11011010110000010001100000000000, kX, kZR, 0, kX, kSP, 5, true) , kRWI_X , 0 , 0 , 78 ), // #13
|
|
84
|
+
INST(Autdza , BaseR , (0b11011010110000010011101111100000, kX, kZR, 0) , kRWI_X , 0 , 0 , 90 ), // #14
|
|
85
|
+
INST(Autdb , BaseRR , (0b11011010110000010001110000000000, kX, kZR, 0, kX, kSP, 5, true) , kRWI_X , 0 , 1 , 84 ), // #15
|
|
86
|
+
INST(Autdzb , BaseR , (0b11011010110000010011111111100000, kX, kZR, 0) , kRWI_X , 0 , 1 , 97 ), // #16
|
|
87
|
+
INST(Autia , BaseRR , (0b11011010110000010001000000000000, kX, kZR, 0, kX, kSP, 5, true) , kRWI_X , 0 , 2 , 104 ), // #17
|
|
88
|
+
INST(Autia1716 , BaseOp , (0b11010101000000110010000110011111) , 0 , 0 , 0 , 110 ), // #18
|
|
89
|
+
INST(Autiasp , BaseOp , (0b11010101000000110010001110111111) , 0 , 0 , 1 , 120 ), // #19
|
|
90
|
+
INST(Autiaz , BaseOp , (0b11010101000000110010001110011111) , 0 , 0 , 2 , 128 ), // #20
|
|
91
|
+
INST(Autib , BaseRR , (0b11011010110000010001010000000000, kX, kZR, 0, kX, kSP, 5, true) , kRWI_X , 0 , 3 , 135 ), // #21
|
|
92
|
+
INST(Autib1716 , BaseOp , (0b11010101000000110010000111011111) , 0 , 0 , 3 , 141 ), // #22
|
|
93
|
+
INST(Autibsp , BaseOp , (0b11010101000000110010001111111111) , 0 , 0 , 4 , 151 ), // #23
|
|
94
|
+
INST(Autibz , BaseOp , (0b11010101000000110010001111011111) , 0 , 0 , 5 , 159 ), // #24
|
|
95
|
+
INST(Autiza , BaseR , (0b11011010110000010011001111100000, kX, kZR, 0) , kRWI_X , 0 , 2 , 166 ), // #25
|
|
96
|
+
INST(Autizb , BaseR , (0b11011010110000010011011111100000, kX, kZR, 0) , kRWI_X , 0 , 3 , 173 ), // #26
|
|
97
|
+
INST(Axflag , BaseOp , (0b11010101000000000100000001011111) , 0 , 0 , 6 , 180 ), // #27
|
|
98
|
+
INST(B , BaseBranchRel , (0b00010100000000000000000000000000) , 0 , F(Cond) , 0 , 1738), // #28
|
|
99
|
+
INST(Bfc , BaseBfc , (0b00110011000000000000001111100000) , kRWI_X , 0 , 0 , 192 ), // #29
|
|
100
|
+
INST(Bfi , BaseBfi , (0b00110011000000000000000000000000) , kRWI_X , 0 , 0 , 223 ), // #30
|
|
101
|
+
INST(Bfm , BaseBfm , (0b00110011000000000000000000000000) , kRWI_X , 0 , 0 , 2514), // #31
|
|
102
|
+
INST(Bfxil , BaseBfx , (0b00110011000000000000000000000000) , kRWI_X , 0 , 0 , 250 ), // #32
|
|
103
|
+
INST(Bic , BaseLogical , (0b0001010001, 0b00100100, 1) , kRWI_W , 0 , 2 , 256 ), // #33
|
|
104
|
+
INST(Bics , BaseLogical , (0b1101010001, 0b11100100, 1) , kRWI_W , 0 , 3 , 260 ), // #34
|
|
105
|
+
INST(Bl , BaseBranchRel , (0b10010100000000000000000000000000) , 0 , 0 , 1 , 2831), // #35
|
|
106
|
+
INST(Blr , BaseBranchReg , (0b11010110001111110000000000000000) , kRWI_R , 0 , 0 , 269 ), // #36
|
|
107
|
+
INST(Br , BaseBranchReg , (0b11010110000111110000000000000000) , kRWI_R , 0 , 1 , 273 ), // #37
|
|
108
|
+
INST(Brk , BaseOpImm , (0b11010100001000000000000000000000, 16, 5) , 0 , 0 , 0 , 276 ), // #38
|
|
109
|
+
INST(Cas , BaseAtomicOp , (0b1000100010100000011111, kWX, 30, 0) , kRWI_XRX , 0 , 0 , 284 ), // #39
|
|
110
|
+
INST(Casa , BaseAtomicOp , (0b1000100011100000011111, kWX, 30, 1) , kRWI_XRX , 0 , 1 , 288 ), // #40
|
|
111
|
+
INST(Casab , BaseAtomicOp , (0b0000100011100000011111, kW , 0 , 1) , kRWI_XRX , 0 , 2 , 293 ), // #41
|
|
112
|
+
INST(Casah , BaseAtomicOp , (0b0100100011100000011111, kW , 0 , 1) , kRWI_XRX , 0 , 3 , 299 ), // #42
|
|
113
|
+
INST(Casal , BaseAtomicOp , (0b1000100011100000111111, kWX, 30, 1) , kRWI_XRX , 0 , 4 , 305 ), // #43
|
|
114
|
+
INST(Casalb , BaseAtomicOp , (0b0000100011100000111111, kW , 0 , 1) , kRWI_XRX , 0 , 5 , 311 ), // #44
|
|
115
|
+
INST(Casalh , BaseAtomicOp , (0b0100100011100000111111, kW , 0 , 1) , kRWI_XRX , 0 , 6 , 318 ), // #45
|
|
116
|
+
INST(Casb , BaseAtomicOp , (0b0000100010100000011111, kW , 0 , 0) , kRWI_XRX , 0 , 7 , 325 ), // #46
|
|
117
|
+
INST(Cash , BaseAtomicOp , (0b0100100010100000011111, kW , 0 , 0) , kRWI_XRX , 0 , 8 , 330 ), // #47
|
|
118
|
+
INST(Casl , BaseAtomicOp , (0b1000100010100000111111, kWX, 30, 0) , kRWI_XRX , 0 , 9 , 335 ), // #48
|
|
119
|
+
INST(Caslb , BaseAtomicOp , (0b0000100010100000111111, kW , 0 , 0) , kRWI_XRX , 0 , 10 , 340 ), // #49
|
|
120
|
+
INST(Caslh , BaseAtomicOp , (0b0100100010100000111111, kW , 0 , 0) , kRWI_XRX , 0 , 11 , 346 ), // #50
|
|
121
|
+
INST(Casp , BaseAtomicCasp , (0b0000100000100000011111, kWX, 30) , kRWI_XXRRX, 0 , 0 , 352 ), // #51
|
|
122
|
+
INST(Caspa , BaseAtomicCasp , (0b0000100001100000011111, kWX, 30) , kRWI_XXRRX, 0 , 1 , 357 ), // #52
|
|
123
|
+
INST(Caspal , BaseAtomicCasp , (0b0000100001100000111111, kWX, 30) , kRWI_XXRRX, 0 , 2 , 363 ), // #53
|
|
124
|
+
INST(Caspl , BaseAtomicCasp , (0b0000100000100000111111, kWX, 30) , kRWI_XXRRX, 0 , 3 , 370 ), // #54
|
|
125
|
+
INST(Cbnz , BaseBranchCmp , (0b00110101000000000000000000000000) , kRWI_R , 0 , 0 , 376 ), // #55
|
|
126
|
+
INST(Cbz , BaseBranchCmp , (0b00110100000000000000000000000000) , kRWI_R , 0 , 1 , 381 ), // #56
|
|
127
|
+
INST(Ccmn , BaseCCmp , (0b00111010010000000000000000000000) , kRWI_R , 0 , 0 , 385 ), // #57
|
|
128
|
+
INST(Ccmp , BaseCCmp , (0b01111010010000000000000000000000) , kRWI_R , 0 , 1 , 650 ), // #58
|
|
129
|
+
INST(Cfinv , BaseOp , (0b11010101000000000100000000011111) , 0 , 0 , 7 , 390 ), // #59
|
|
130
|
+
INST(Cinc , BaseCInc , (0b00011010100000000000010000000000) , kRWI_W , 0 , 0 , 396 ), // #60
|
|
131
|
+
INST(Cinv , BaseCInc , (0b01011010100000000000000000000000) , kRWI_W , 0 , 1 , 401 ), // #61
|
|
132
|
+
INST(Clrex , BaseOpImm , (0b11010101000000110011000001011111, 4, 8) , 0 , 0 , 1 , 406 ), // #62
|
|
133
|
+
INST(Cls , BaseRR , (0b01011010110000000001010000000000, kWX, kZR, 0, kWX, kZR, 5, true) , kRWI_W , 0 , 4 , 412 ), // #63
|
|
134
|
+
INST(Clz , BaseRR , (0b01011010110000000001000000000000, kWX, kZR, 0, kWX, kZR, 5, true) , kRWI_W , 0 , 5 , 416 ), // #64
|
|
135
|
+
INST(Cmn , BaseCmpCmn , (0b0101011000, 0b0101011001, 0b0110001) , kRWI_R , 0 , 0 , 386 ), // #65
|
|
136
|
+
INST(Cmp , BaseCmpCmn , (0b1101011000, 0b1101011001, 0b1110001) , kRWI_R , 0 , 1 , 651 ), // #66
|
|
137
|
+
INST(Cmpp , BaseRR , (0b10111010110000000000000000011111, kX, kSP, 5, kX, kSP, 16, true) , kRWI_R , 0 , 6 , 430 ), // #67
|
|
138
|
+
INST(Cneg , BaseCInc , (0b01011010100000000000010000000000) , kRWI_W , 0 , 2 , 441 ), // #68
|
|
139
|
+
INST(Crc32b , BaseRRR , (0b0001101011000000010000, kW, kZR, kW, kZR, kW, kZR, false) , kRWI_W , 0 , 2 , 450 ), // #69
|
|
140
|
+
INST(Crc32cb , BaseRRR , (0b0001101011000000010100, kW, kZR, kW, kZR, kW, kZR, false) , kRWI_W , 0 , 3 , 457 ), // #70
|
|
141
|
+
INST(Crc32ch , BaseRRR , (0b0001101011000000010101, kW, kZR, kW, kZR, kW, kZR, false) , kRWI_W , 0 , 4 , 465 ), // #71
|
|
142
|
+
INST(Crc32cw , BaseRRR , (0b0001101011000000010110, kW, kZR, kW, kZR, kW, kZR, false) , kRWI_W , 0 , 5 , 473 ), // #72
|
|
143
|
+
INST(Crc32cx , BaseRRR , (0b1001101011000000010111, kW, kZR, kW, kZR, kX, kZR, false) , kRWI_W , 0 , 6 , 481 ), // #73
|
|
144
|
+
INST(Crc32h , BaseRRR , (0b0001101011000000010001, kW, kZR, kW, kZR, kW, kZR, false) , kRWI_W , 0 , 7 , 489 ), // #74
|
|
145
|
+
INST(Crc32w , BaseRRR , (0b0001101011000000010010, kW, kZR, kW, kZR, kW, kZR, false) , kRWI_W , 0 , 8 , 496 ), // #75
|
|
146
|
+
INST(Crc32x , BaseRRR , (0b1001101011000000010011, kW, kZR, kW, kZR, kX, kZR, false) , kRWI_W , 0 , 9 , 503 ), // #76
|
|
147
|
+
INST(Csdb , BaseOp , (0b11010101000000110010001010011111) , 0 , 0 , 8 , 510 ), // #77
|
|
148
|
+
INST(Csel , BaseCSel , (0b00011010100000000000000000000000) , kRWI_W , 0 , 0 , 710 ), // #78
|
|
149
|
+
INST(Cset , BaseCSet , (0b00011010100111110000011111100000) , kRWI_W , 0 , 0 , 515 ), // #79
|
|
150
|
+
INST(Csetm , BaseCSet , (0b01011010100111110000001111100000) , kRWI_W , 0 , 1 , 520 ), // #80
|
|
151
|
+
INST(Csinc , BaseCSel , (0b00011010100000000000010000000000) , kRWI_W , 0 , 1 , 526 ), // #81
|
|
152
|
+
INST(Csinv , BaseCSel , (0b01011010100000000000000000000000) , kRWI_W , 0 , 2 , 532 ), // #82
|
|
153
|
+
INST(Csneg , BaseCSel , (0b01011010100000000000010000000000) , kRWI_W , 0 , 3 , 538 ), // #83
|
|
154
|
+
INST(Dc , BaseAtDcIcTlbi , (0b00011110000000, 0b00001110000000, true) , kRWI_RX , 0 , 1 , 2 ), // #84
|
|
155
|
+
INST(Dcps1 , BaseOpImm , (0b11010100101000000000000000000001, 16, 5) , 0 , 0 , 2 , 544 ), // #85
|
|
156
|
+
INST(Dcps2 , BaseOpImm , (0b11010100101000000000000000000010, 16, 5) , 0 , 0 , 3 , 550 ), // #86
|
|
157
|
+
INST(Dcps3 , BaseOpImm , (0b11010100101000000000000000000011, 16, 5) , 0 , 0 , 4 , 556 ), // #87
|
|
158
|
+
INST(Dgh , BaseOp , (0b11010101000000110010000011011111) , 0 , 0 , 9 , 562 ), // #88
|
|
159
|
+
INST(Dmb , BaseOpImm , (0b11010101000000110011000010111111, 4, 8) , 0 , 0 , 5 , 566 ), // #89
|
|
160
|
+
INST(Drps , BaseOp , (0b11010110101111110000001111100000) , 0 , 0 , 10 , 570 ), // #90
|
|
161
|
+
INST(Dsb , BaseOpImm , (0b11010101000000110011000010011111, 4, 8) , 0 , 0 , 6 , 575 ), // #91
|
|
162
|
+
INST(Eon , BaseLogical , (0b1001010001, 0b10100100, 1) , kRWI_W , 0 , 4 , 583 ), // #92
|
|
163
|
+
INST(Eor , BaseLogical , (0b1001010000, 0b10100100, 0) , kRWI_W , 0 , 5 , 1418), // #93
|
|
164
|
+
INST(Esb , BaseOp , (0b11010101000000110010001000011111) , 0 , 0 , 11 , 597 ), // #94
|
|
165
|
+
INST(Extr , BaseExtract , (0b00010011100000000000000000000000) , kRWI_W , 0 , 0 , 605 ), // #95
|
|
166
|
+
INST(Eret , BaseOp , (0b11010110100111110000001111100000) , 0 , 0 , 12 , 592 ), // #96
|
|
167
|
+
INST(Gmi , BaseRRR , (0b1001101011000000000101, kX , kZR, kX , kSP, kX , kZR, true) , kRWI_W , 0 , 10 , 1128), // #97
|
|
168
|
+
INST(Hint , BaseOpImm , (0b11010101000000110010000000011111, 7, 5) , 0 , 0 , 7 , 1132), // #98
|
|
169
|
+
INST(Hlt , BaseOpImm , (0b11010100010000000000000000000000, 16, 5) , 0 , 0 , 8 , 1137), // #99
|
|
170
|
+
INST(Hvc , BaseOpImm , (0b11010100000000000000000000000010, 16, 5) , 0 , 0 , 9 , 1141), // #100
|
|
171
|
+
INST(Ic , BaseAtDcIcTlbi , (0b00011110000000, 0b00001110000000, false) , kRWI_RX , 0 , 2 , 257 ), // #101
|
|
172
|
+
INST(Isb , BaseOpImm , (0b11010101000000110011000011011111, 4, 8) , 0 , 0 , 10 , 1149), // #102
|
|
173
|
+
INST(Ldadd , BaseAtomicOp , (0b1011100000100000000000, kWX, 30, 0) , kRWI_WRX , 0 , 12 , 1189), // #103
|
|
174
|
+
INST(Ldadda , BaseAtomicOp , (0b1011100010100000000000, kWX, 30, 1) , kRWI_WRX , 0 , 13 , 1195), // #104
|
|
175
|
+
INST(Ldaddab , BaseAtomicOp , (0b0011100010100000000000, kW , 0 , 1) , kRWI_WRX , 0 , 14 , 1202), // #105
|
|
176
|
+
INST(Ldaddah , BaseAtomicOp , (0b0111100010100000000000, kW , 0 , 1) , kRWI_WRX , 0 , 15 , 1210), // #106
|
|
177
|
+
INST(Ldaddal , BaseAtomicOp , (0b1011100011100000000000, kWX, 30, 1) , kRWI_WRX , 0 , 16 , 1218), // #107
|
|
178
|
+
INST(Ldaddalb , BaseAtomicOp , (0b0011100011100000000000, kW , 0 , 1) , kRWI_WRX , 0 , 17 , 1226), // #108
|
|
179
|
+
INST(Ldaddalh , BaseAtomicOp , (0b0111100011100000000000, kW , 0 , 1) , kRWI_WRX , 0 , 18 , 1235), // #109
|
|
180
|
+
INST(Ldaddb , BaseAtomicOp , (0b0011100000100000000000, kW , 0 , 0) , kRWI_WRX , 0 , 19 , 1244), // #110
|
|
181
|
+
INST(Ldaddh , BaseAtomicOp , (0b0111100000100000000000, kW , 0 , 0) , kRWI_WRX , 0 , 20 , 1251), // #111
|
|
182
|
+
INST(Ldaddl , BaseAtomicOp , (0b1011100001100000000000, kWX, 30, 0) , kRWI_WRX , 0 , 21 , 1258), // #112
|
|
183
|
+
INST(Ldaddlb , BaseAtomicOp , (0b0011100001100000000000, kW , 0 , 0) , kRWI_WRX , 0 , 22 , 1265), // #113
|
|
184
|
+
INST(Ldaddlh , BaseAtomicOp , (0b0111100001100000000000, kW , 0 , 0) , kRWI_WRX , 0 , 23 , 1273), // #114
|
|
185
|
+
INST(Ldar , BaseRM_NoImm , (0b1000100011011111111111, kWX, kZR, 30) , kRWI_W , 0 , 0 , 1281), // #115
|
|
186
|
+
INST(Ldarb , BaseRM_NoImm , (0b0000100011011111111111, kW , kZR, 0 ) , kRWI_W , 0 , 1 , 1286), // #116
|
|
187
|
+
INST(Ldarh , BaseRM_NoImm , (0b0100100011011111111111, kW , kZR, 0 ) , kRWI_W , 0 , 2 , 1292), // #117
|
|
188
|
+
INST(Ldaxp , BaseLdxp , (0b1000100001111111100000, kWX, 30) , kRWI_WW , 0 , 0 , 1298), // #118
|
|
189
|
+
INST(Ldaxr , BaseRM_NoImm , (0b1000100001011111111111, kWX, kZR, 30) , kRWI_W , 0 , 3 , 1304), // #119
|
|
190
|
+
INST(Ldaxrb , BaseRM_NoImm , (0b0000100001011111111111, kW , kZR, 0 ) , kRWI_W , 0 , 4 , 1310), // #120
|
|
191
|
+
INST(Ldaxrh , BaseRM_NoImm , (0b0100100001011111111111, kW , kZR, 0 ) , kRWI_W , 0 , 5 , 1317), // #121
|
|
192
|
+
INST(Ldclr , BaseAtomicOp , (0b1011100000100000000100, kWX, 30, 0) , kRWI_WRX , 0 , 24 , 1324), // #122
|
|
193
|
+
INST(Ldclra , BaseAtomicOp , (0b1011100010100000000100, kWX, 30, 1) , kRWI_WRX , 0 , 25 , 1330), // #123
|
|
194
|
+
INST(Ldclrab , BaseAtomicOp , (0b0011100010100000000100, kW , 0 , 1) , kRWI_WRX , 0 , 26 , 1337), // #124
|
|
195
|
+
INST(Ldclrah , BaseAtomicOp , (0b0111100010100000000100, kW , 0 , 1) , kRWI_WRX , 0 , 27 , 1345), // #125
|
|
196
|
+
INST(Ldclral , BaseAtomicOp , (0b1011100011100000000100, kWX, 30, 1) , kRWI_WRX , 0 , 28 , 1353), // #126
|
|
197
|
+
INST(Ldclralb , BaseAtomicOp , (0b0011100011100000000100, kW , 0 , 1) , kRWI_WRX , 0 , 29 , 1361), // #127
|
|
198
|
+
INST(Ldclralh , BaseAtomicOp , (0b0111100011100000000100, kW , 0 , 1) , kRWI_WRX , 0 , 30 , 1370), // #128
|
|
199
|
+
INST(Ldclrb , BaseAtomicOp , (0b0011100000100000000100, kW , 0 , 0) , kRWI_WRX , 0 , 31 , 1379), // #129
|
|
200
|
+
INST(Ldclrh , BaseAtomicOp , (0b0111100000100000000100, kW , 0 , 0) , kRWI_WRX , 0 , 32 , 1386), // #130
|
|
201
|
+
INST(Ldclrl , BaseAtomicOp , (0b1011100001100000000100, kWX, 30, 0) , kRWI_WRX , 0 , 33 , 1393), // #131
|
|
202
|
+
INST(Ldclrlb , BaseAtomicOp , (0b0011100001100000000100, kW , 0 , 0) , kRWI_WRX , 0 , 34 , 1400), // #132
|
|
203
|
+
INST(Ldclrlh , BaseAtomicOp , (0b0111100001100000000100, kW , 0 , 0) , kRWI_WRX , 0 , 35 , 1408), // #133
|
|
204
|
+
INST(Ldeor , BaseAtomicOp , (0b1011100000100000001000, kWX, 30, 0) , kRWI_WRX , 0 , 36 , 1416), // #134
|
|
205
|
+
INST(Ldeora , BaseAtomicOp , (0b1011100010100000001000, kWX, 30, 1) , kRWI_WRX , 0 , 37 , 1422), // #135
|
|
206
|
+
INST(Ldeorab , BaseAtomicOp , (0b0011100010100000001000, kW , 0 , 1) , kRWI_WRX , 0 , 38 , 1429), // #136
|
|
207
|
+
INST(Ldeorah , BaseAtomicOp , (0b0111100010100000001000, kW , 0 , 1) , kRWI_WRX , 0 , 39 , 1437), // #137
|
|
208
|
+
INST(Ldeoral , BaseAtomicOp , (0b1011100011100000001000, kWX, 30, 1) , kRWI_WRX , 0 , 40 , 1445), // #138
|
|
209
|
+
INST(Ldeoralb , BaseAtomicOp , (0b0011100011100000001000, kW , 0 , 1) , kRWI_WRX , 0 , 41 , 1453), // #139
|
|
210
|
+
INST(Ldeoralh , BaseAtomicOp , (0b0111100011100000001000, kW , 0 , 1) , kRWI_WRX , 0 , 42 , 1462), // #140
|
|
211
|
+
INST(Ldeorb , BaseAtomicOp , (0b0011100000100000001000, kW , 0 , 0) , kRWI_WRX , 0 , 43 , 1471), // #141
|
|
212
|
+
INST(Ldeorh , BaseAtomicOp , (0b0111100000100000001000, kW , 0 , 0) , kRWI_WRX , 0 , 44 , 1478), // #142
|
|
213
|
+
INST(Ldeorl , BaseAtomicOp , (0b1011100001100000001000, kWX, 30, 0) , kRWI_WRX , 0 , 45 , 1485), // #143
|
|
214
|
+
INST(Ldeorlb , BaseAtomicOp , (0b0011100001100000001000, kW , 0 , 0) , kRWI_WRX , 0 , 46 , 1492), // #144
|
|
215
|
+
INST(Ldeorlh , BaseAtomicOp , (0b0111100001100000001000, kW , 0 , 0) , kRWI_WRX , 0 , 47 , 1500), // #145
|
|
216
|
+
INST(Ldg , BaseRM_SImm9 , (0b1101100101100000000000, 0b0000000000000000000000, kX , kZR, 0, 4) , kRWI_W , 0 , 0 , 1508), // #146
|
|
217
|
+
INST(Ldgm , BaseRM_NoImm , (0b1101100111100000000000, kX , kZR, 0 ) , kRWI_W , 0 , 6 , 1512), // #147
|
|
218
|
+
INST(Ldlar , BaseRM_NoImm , (0b1000100011011111011111, kWX, kZR, 30) , kRWI_W , 0 , 7 , 1517), // #148
|
|
219
|
+
INST(Ldlarb , BaseRM_NoImm , (0b0000100011011111011111, kW , kZR, 0 ) , kRWI_W , 0 , 8 , 1523), // #149
|
|
220
|
+
INST(Ldlarh , BaseRM_NoImm , (0b0100100011011111011111, kW , kZR, 0 ) , kRWI_W , 0 , 9 , 1530), // #150
|
|
221
|
+
INST(Ldnp , BaseLdpStp , (0b0010100001, 0 , kWX, 31, 2) , kRWI_WW , 0 , 0 , 1537), // #151
|
|
222
|
+
INST(Ldp , BaseLdpStp , (0b0010100101, 0b0010100011, kWX, 31, 2) , kRWI_W , 0 , 1 , 1542), // #152
|
|
223
|
+
INST(Ldpsw , BaseLdpStp , (0b0110100101, 0b0110100011, kX , 0 , 2) , kRWI_WW , 0 , 2 , 1546), // #153
|
|
224
|
+
INST(Ldr , BaseLdSt , (0b1011100101, 0b10111000010, 0b10111000011, 0b00011000, kWX, 30, 2, Inst::kIdLdur) , kRWI_W , 0 , 0 , 1552), // #154
|
|
225
|
+
INST(Ldraa , BaseRM_SImm10 , (0b1111100000100000000001, kX , kZR, 0, 3) , kRWI_W , 0 , 0 , 1556), // #155
|
|
226
|
+
INST(Ldrab , BaseRM_SImm10 , (0b1111100010100000000001, kX , kZR, 0, 3) , kRWI_W , 0 , 1 , 1562), // #156
|
|
227
|
+
INST(Ldrb , BaseLdSt , (0b0011100101, 0b00111000010, 0b00111000011, 0 , kW , 0 , 0, Inst::kIdLdurb) , kRWI_W , 0 , 1 , 1568), // #157
|
|
228
|
+
INST(Ldrh , BaseLdSt , (0b0111100101, 0b01111000010, 0b01111000011, 0 , kW , 0 , 1, Inst::kIdLdurh) , kRWI_W , 0 , 2 , 1573), // #158
|
|
229
|
+
INST(Ldrsb , BaseLdSt , (0b0011100111, 0b00111000100, 0b00111000101, 0 , kWX, 22, 0, Inst::kIdLdursb) , kRWI_W , 0 , 3 , 1578), // #159
|
|
230
|
+
INST(Ldrsh , BaseLdSt , (0b0111100110, 0b01111000100, 0b01111000101, 0 , kWX, 22, 1, Inst::kIdLdursh) , kRWI_W , 0 , 4 , 1584), // #160
|
|
231
|
+
INST(Ldrsw , BaseLdSt , (0b1011100110, 0b10111000100, 0b10111000101, 0b10011000, kX , 0 , 2, Inst::kIdLdursw) , kRWI_W , 0 , 5 , 1590), // #161
|
|
232
|
+
INST(Ldset , BaseAtomicOp , (0b1011100000100000001100, kWX, 30, 0) , kRWI_WRX , 0 , 48 , 1596), // #162
|
|
233
|
+
INST(Ldseta , BaseAtomicOp , (0b1011100010100000001100, kWX, 30, 1) , kRWI_WRX , 0 , 49 , 1602), // #163
|
|
234
|
+
INST(Ldsetab , BaseAtomicOp , (0b0011100010100000001100, kW , 0 , 1) , kRWI_WRX , 0 , 50 , 1609), // #164
|
|
235
|
+
INST(Ldsetah , BaseAtomicOp , (0b0111100010100000001100, kW , 0 , 1) , kRWI_WRX , 0 , 51 , 1617), // #165
|
|
236
|
+
INST(Ldsetal , BaseAtomicOp , (0b1011100011100000001100, kWX, 30, 1) , kRWI_WRX , 0 , 52 , 1625), // #166
|
|
237
|
+
INST(Ldsetalb , BaseAtomicOp , (0b0011100011100000001100, kW , 0 , 1) , kRWI_WRX , 0 , 53 , 1633), // #167
|
|
238
|
+
INST(Ldsetalh , BaseAtomicOp , (0b0111100011100000001100, kW , 0 , 1) , kRWI_WRX , 0 , 54 , 1642), // #168
|
|
239
|
+
INST(Ldsetb , BaseAtomicOp , (0b0011100000100000001100, kW , 0 , 0) , kRWI_WRX , 0 , 55 , 1651), // #169
|
|
240
|
+
INST(Ldseth , BaseAtomicOp , (0b0111100000100000001100, kW , 0 , 0) , kRWI_WRX , 0 , 56 , 1658), // #170
|
|
241
|
+
INST(Ldsetl , BaseAtomicOp , (0b1011100001100000001100, kWX, 30, 0) , kRWI_WRX , 0 , 57 , 1665), // #171
|
|
242
|
+
INST(Ldsetlb , BaseAtomicOp , (0b0011100001100000001100, kW , 0 , 0) , kRWI_WRX , 0 , 58 , 1672), // #172
|
|
243
|
+
INST(Ldsetlh , BaseAtomicOp , (0b0111100001100000001100, kW , 0 , 0) , kRWI_WRX , 0 , 59 , 1680), // #173
|
|
244
|
+
INST(Ldsmax , BaseAtomicOp , (0b1011100000100000010000, kWX, 30, 0) , kRWI_WRX , 0 , 60 , 1688), // #174
|
|
245
|
+
INST(Ldsmaxa , BaseAtomicOp , (0b1011100010100000010000, kWX, 30, 1) , kRWI_WRX , 0 , 61 , 1695), // #175
|
|
246
|
+
INST(Ldsmaxab , BaseAtomicOp , (0b0011100010100000010000, kW , 0 , 1) , kRWI_WRX , 0 , 62 , 1703), // #176
|
|
247
|
+
INST(Ldsmaxah , BaseAtomicOp , (0b0111100010100000010000, kW , 0 , 1) , kRWI_WRX , 0 , 63 , 1712), // #177
|
|
248
|
+
INST(Ldsmaxal , BaseAtomicOp , (0b1011100011100000010000, kWX, 30, 1) , kRWI_WRX , 0 , 64 , 1721), // #178
|
|
249
|
+
INST(Ldsmaxalb , BaseAtomicOp , (0b0011100011100000010000, kW , 0 , 1) , kRWI_WRX , 0 , 65 , 1730), // #179
|
|
250
|
+
INST(Ldsmaxalh , BaseAtomicOp , (0b0111100011100000010000, kW , 0 , 1) , kRWI_WRX , 0 , 66 , 1740), // #180
|
|
251
|
+
INST(Ldsmaxb , BaseAtomicOp , (0b0011100000100000010000, kW , 0 , 0) , kRWI_WRX , 0 , 67 , 1750), // #181
|
|
252
|
+
INST(Ldsmaxh , BaseAtomicOp , (0b0111100000100000010000, kW , 0 , 0) , kRWI_WRX , 0 , 68 , 1758), // #182
|
|
253
|
+
INST(Ldsmaxl , BaseAtomicOp , (0b1011100001100000010000, kWX, 30, 0) , kRWI_WRX , 0 , 69 , 1766), // #183
|
|
254
|
+
INST(Ldsmaxlb , BaseAtomicOp , (0b0011100001100000010000, kW , 0 , 0) , kRWI_WRX , 0 , 70 , 1774), // #184
|
|
255
|
+
INST(Ldsmaxlh , BaseAtomicOp , (0b0111100001100000010000, kW , 0 , 0) , kRWI_WRX , 0 , 71 , 1783), // #185
|
|
256
|
+
INST(Ldsmin , BaseAtomicOp , (0b1011100000100000010100, kWX, 30, 0) , kRWI_WRX , 0 , 72 , 1792), // #186
|
|
257
|
+
INST(Ldsmina , BaseAtomicOp , (0b1011100010100000010100, kWX, 30, 1) , kRWI_WRX , 0 , 73 , 1799), // #187
|
|
258
|
+
INST(Ldsminab , BaseAtomicOp , (0b0011100010100000010100, kW , 0 , 1) , kRWI_WRX , 0 , 74 , 1807), // #188
|
|
259
|
+
INST(Ldsminah , BaseAtomicOp , (0b0111100010100000010100, kW , 0 , 1) , kRWI_WRX , 0 , 75 , 1816), // #189
|
|
260
|
+
INST(Ldsminal , BaseAtomicOp , (0b1011100011100000010100, kWX, 30, 1) , kRWI_WRX , 0 , 76 , 1825), // #190
|
|
261
|
+
INST(Ldsminalb , BaseAtomicOp , (0b0011100011100000010100, kW , 0 , 1) , kRWI_WRX , 0 , 77 , 1834), // #191
|
|
262
|
+
INST(Ldsminalh , BaseAtomicOp , (0b0111100011100000010100, kW , 0 , 1) , kRWI_WRX , 0 , 78 , 1844), // #192
|
|
263
|
+
INST(Ldsminb , BaseAtomicOp , (0b0011100000100000010100, kW , 0 , 0) , kRWI_WRX , 0 , 79 , 1854), // #193
|
|
264
|
+
INST(Ldsminh , BaseAtomicOp , (0b0111100000100000010100, kW , 0 , 0) , kRWI_WRX , 0 , 80 , 1862), // #194
|
|
265
|
+
INST(Ldsminl , BaseAtomicOp , (0b1011100001100000010100, kWX, 30, 0) , kRWI_WRX , 0 , 81 , 1870), // #195
|
|
266
|
+
INST(Ldsminlb , BaseAtomicOp , (0b0011100001100000010100, kW , 0 , 0) , kRWI_WRX , 0 , 82 , 1878), // #196
|
|
267
|
+
INST(Ldsminlh , BaseAtomicOp , (0b0111100001100000010100, kW , 0 , 0) , kRWI_WRX , 0 , 83 , 1887), // #197
|
|
268
|
+
INST(Ldtr , BaseRM_SImm9 , (0b1011100001000000000010, 0b0000000000000000000000, kWX, kZR, 30, 0) , kRWI_W , 0 , 1 , 1896), // #198
|
|
269
|
+
INST(Ldtrb , BaseRM_SImm9 , (0b0011100001000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0) , kRWI_W , 0 , 2 , 1901), // #199
|
|
270
|
+
INST(Ldtrh , BaseRM_SImm9 , (0b0111100001000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0) , kRWI_W , 0 , 3 , 1907), // #200
|
|
271
|
+
INST(Ldtrsb , BaseRM_SImm9 , (0b0011100011000000000010, 0b0000000000000000000000, kWX, kZR, 22, 0) , kRWI_W , 0 , 4 , 1913), // #201
|
|
272
|
+
INST(Ldtrsh , BaseRM_SImm9 , (0b0111100011000000000010, 0b0000000000000000000000, kWX, kZR, 22, 0) , kRWI_W , 0 , 5 , 1920), // #202
|
|
273
|
+
INST(Ldtrsw , BaseRM_SImm9 , (0b1011100010000000000010, 0b0000000000000000000000, kX , kZR, 0 , 0) , kRWI_W , 0 , 6 , 1927), // #203
|
|
274
|
+
INST(Ldumax , BaseAtomicOp , (0b1011100000100000011000, kWX, 30, 0) , kRWI_WRX , 0 , 84 , 1934), // #204
|
|
275
|
+
INST(Ldumaxa , BaseAtomicOp , (0b1011100010100000011000, kWX, 30, 1) , kRWI_WRX , 0 , 85 , 1941), // #205
|
|
276
|
+
INST(Ldumaxab , BaseAtomicOp , (0b0011100010100000011000, kW , 0 , 1) , kRWI_WRX , 0 , 86 , 1949), // #206
|
|
277
|
+
INST(Ldumaxah , BaseAtomicOp , (0b0111100010100000011000, kW , 0 , 1) , kRWI_WRX , 0 , 87 , 1958), // #207
|
|
278
|
+
INST(Ldumaxal , BaseAtomicOp , (0b1011100011100000011000, kWX, 30, 1) , kRWI_WRX , 0 , 88 , 1967), // #208
|
|
279
|
+
INST(Ldumaxalb , BaseAtomicOp , (0b0011100011100000011000, kW , 0 , 1) , kRWI_WRX , 0 , 89 , 1976), // #209
|
|
280
|
+
INST(Ldumaxalh , BaseAtomicOp , (0b0111100011100000011000, kW , 0 , 1) , kRWI_WRX , 0 , 90 , 1986), // #210
|
|
281
|
+
INST(Ldumaxb , BaseAtomicOp , (0b0011100000100000011000, kW , 0 , 0) , kRWI_WRX , 0 , 91 , 1996), // #211
|
|
282
|
+
INST(Ldumaxh , BaseAtomicOp , (0b0111100000100000011000, kW , 0 , 0) , kRWI_WRX , 0 , 92 , 2004), // #212
|
|
283
|
+
INST(Ldumaxl , BaseAtomicOp , (0b1011100001100000011000, kWX, 30, 0) , kRWI_WRX , 0 , 93 , 2012), // #213
|
|
284
|
+
INST(Ldumaxlb , BaseAtomicOp , (0b0011100001100000011000, kW , 0 , 0) , kRWI_WRX , 0 , 94 , 2020), // #214
|
|
285
|
+
INST(Ldumaxlh , BaseAtomicOp , (0b0111100001100000011000, kW , 0 , 0) , kRWI_WRX , 0 , 95 , 2029), // #215
|
|
286
|
+
INST(Ldumin , BaseAtomicOp , (0b1011100000100000011100, kWX, 30, 0) , kRWI_WRX , 0 , 96 , 2038), // #216
|
|
287
|
+
INST(Ldumina , BaseAtomicOp , (0b1011100010100000011100, kWX, 30, 1) , kRWI_WRX , 0 , 97 , 2045), // #217
|
|
288
|
+
INST(Lduminab , BaseAtomicOp , (0b0011100010100000011100, kW , 0 , 1) , kRWI_WRX , 0 , 98 , 2053), // #218
|
|
289
|
+
INST(Lduminah , BaseAtomicOp , (0b0111100010100000011100, kW , 0 , 1) , kRWI_WRX , 0 , 99 , 2062), // #219
|
|
290
|
+
INST(Lduminal , BaseAtomicOp , (0b1011100011100000011100, kWX, 30, 1) , kRWI_WRX , 0 , 100, 2071), // #220
|
|
291
|
+
INST(Lduminalb , BaseAtomicOp , (0b0011100011100000011100, kW , 0 , 1) , kRWI_WRX , 0 , 101, 2080), // #221
|
|
292
|
+
INST(Lduminalh , BaseAtomicOp , (0b0111100011100000011100, kW , 0 , 1) , kRWI_WRX , 0 , 102, 2090), // #222
|
|
293
|
+
INST(Lduminb , BaseAtomicOp , (0b0011100000100000011100, kW , 0 , 0) , kRWI_WRX , 0 , 103, 2100), // #223
|
|
294
|
+
INST(Lduminh , BaseAtomicOp , (0b0111100000100000011100, kW , 0 , 0) , kRWI_WRX , 0 , 104, 2108), // #224
|
|
295
|
+
INST(Lduminl , BaseAtomicOp , (0b1011100001100000011100, kWX, 30, 0) , kRWI_WRX , 0 , 105, 2116), // #225
|
|
296
|
+
INST(Lduminlb , BaseAtomicOp , (0b0011100001100000011100, kW , 0 , 0) , kRWI_WRX , 0 , 106, 2124), // #226
|
|
297
|
+
INST(Lduminlh , BaseAtomicOp , (0b0111100001100000011100, kW , 0 , 0) , kRWI_WRX , 0 , 107, 2133), // #227
|
|
298
|
+
INST(Ldur , BaseRM_SImm9 , (0b1011100001000000000000, 0b0000000000000000000000, kWX, kZR, 30, 0) , kRWI_W , 0 , 7 , 2142), // #228
|
|
299
|
+
INST(Ldurb , BaseRM_SImm9 , (0b0011100001000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0) , kRWI_W , 0 , 8 , 2147), // #229
|
|
300
|
+
INST(Ldurh , BaseRM_SImm9 , (0b0111100001000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0) , kRWI_W , 0 , 9 , 2153), // #230
|
|
301
|
+
INST(Ldursb , BaseRM_SImm9 , (0b0011100011000000000000, 0b0000000000000000000000, kWX, kZR, 22, 0) , kRWI_W , 0 , 10 , 2159), // #231
|
|
302
|
+
INST(Ldursh , BaseRM_SImm9 , (0b0111100011000000000000, 0b0000000000000000000000, kWX, kZR, 22, 0) , kRWI_W , 0 , 11 , 2166), // #232
|
|
303
|
+
INST(Ldursw , BaseRM_SImm9 , (0b1011100010000000000000, 0b0000000000000000000000, kWX, kZR, 0 , 0) , kRWI_W , 0 , 12 , 2173), // #233
|
|
304
|
+
INST(Ldxp , BaseLdxp , (0b1000100001111111000000, kWX, 30) , kRWI_WW , 0 , 1 , 2180), // #234
|
|
305
|
+
INST(Ldxr , BaseRM_NoImm , (0b1000100001011111011111, kWX, kZR, 30) , kRWI_W , 0 , 10 , 2185), // #235
|
|
306
|
+
INST(Ldxrb , BaseRM_NoImm , (0b0000100001011111011111, kW , kZR, 0 ) , kRWI_W , 0 , 11 , 2190), // #236
|
|
307
|
+
INST(Ldxrh , BaseRM_NoImm , (0b0100100001011111011111, kW , kZR, 0 ) , kRWI_W , 0 , 12 , 2196), // #237
|
|
308
|
+
INST(Lsl , BaseShift , (0b0001101011000000001000, 0b0101001100000000000000, 0) , kRWI_W , 0 , 2 , 2880), // #238
|
|
309
|
+
INST(Lslv , BaseShift , (0b0001101011000000001000, 0b0000000000000000000000, 0) , kRWI_W , 0 , 3 , 2202), // #239
|
|
310
|
+
INST(Lsr , BaseShift , (0b0001101011000000001001, 0b0101001100000000011111, 0) , kRWI_W , 0 , 4 , 2207), // #240
|
|
311
|
+
INST(Lsrv , BaseShift , (0b0001101011000000001001, 0b0000000000000000000000, 0) , kRWI_W , 0 , 5 , 2211), // #241
|
|
312
|
+
INST(Madd , BaseRRRR , (0b0001101100000000000000, kWX, kZR, kWX, kZR, kWX, kZR, kWX, kZR, true) , kRWI_W , 0 , 0 , 977 ), // #242
|
|
313
|
+
INST(Mneg , BaseRRR , (0b0001101100000000111111, kWX, kZR, kWX, kZR, kWX, kZR, true) , kRWI_W , 0 , 11 , 2216), // #243
|
|
314
|
+
INST(Mov , BaseMov , (_) , kRWI_W , 0 , 0 , 949 ), // #244
|
|
315
|
+
INST(Movk , BaseMovKNZ , (0b01110010100000000000000000000000) , kRWI_X , 0 , 0 , 2226), // #245
|
|
316
|
+
INST(Movn , BaseMovKNZ , (0b00010010100000000000000000000000) , kRWI_W , 0 , 1 , 2231), // #246
|
|
317
|
+
INST(Movz , BaseMovKNZ , (0b01010010100000000000000000000000) , kRWI_W , 0 , 2 , 2236), // #247
|
|
318
|
+
INST(Mrs , BaseMrs , (_) , kRWI_W , 0 , 0 , 2241), // #248
|
|
319
|
+
INST(Msr , BaseMsr , (_) , kRWI_W , 0 , 0 , 2245), // #249
|
|
320
|
+
INST(Msub , BaseRRRR , (0b0001101100000000100000, kWX, kZR, kWX, kZR, kWX, kZR, kWX, kZR, true) , kRWI_W , 0 , 1 , 984 ), // #250
|
|
321
|
+
INST(Mul , BaseRRR , (0b0001101100000000011111, kWX, kZR, kWX, kZR, kWX, kZR, true) , kRWI_W , 0 , 12 , 991 ), // #251
|
|
322
|
+
INST(Mvn , BaseMvnNeg , (0b00101010001000000000001111100000) , kRWI_W , 0 , 0 , 2249), // #252
|
|
323
|
+
INST(Neg , BaseMvnNeg , (0b01001011000000000000001111100000) , kRWI_W , 0 , 1 , 540 ), // #253
|
|
324
|
+
INST(Negs , BaseMvnNeg , (0b01101011000000000000001111100000) , kRWI_W , 0 , 2 , 2258), // #254
|
|
325
|
+
INST(Ngc , BaseRR , (0b01011010000000000000001111100000, kWX, kZR, 0, kWX, kZR, 16, true) , kRWI_W , 0 , 7 , 2263), // #255
|
|
326
|
+
INST(Ngcs , BaseRR , (0b01111010000000000000001111100000, kWX, kZR, 0, kWX, kZR, 16, true) , kRWI_W , 0 , 8 , 2267), // #256
|
|
327
|
+
INST(Nop , BaseOp , (0b11010101000000110010000000011111) , 0 , 0 , 13 , 2272), // #257
|
|
328
|
+
INST(Orn , BaseLogical , (0b0101010001, 0b01100100, 1) , kRWI_W , 0 , 6 , 2280), // #258
|
|
329
|
+
INST(Orr , BaseLogical , (0b0101010000, 0b01100100, 0) , kRWI_W , 0 , 7 , 2284), // #259
|
|
330
|
+
INST(Pacda , BaseRR , (0b11011010110000010000100000000000, kX, kZR, 0, kX, kSP, 5, true) , kRWI_X , 0 , 9 , 2288), // #260
|
|
331
|
+
INST(Pacdb , BaseRR , (0b11011010110000010000110000000000, kX, kZR, 0, kX, kSP, 5, true) , kRWI_X , 0 , 10 , 2294), // #261
|
|
332
|
+
INST(Pacdza , BaseR , (0b11011010110000010010101111100000, kX, kZR, 0) , kRWI_X , 0 , 4 , 2300), // #262
|
|
333
|
+
INST(Pacdzb , BaseR , (0b11011010110000010010111111100000, kX, kZR, 0) , kRWI_X , 0 , 5 , 2307), // #263
|
|
334
|
+
INST(Pacga , BaseRRR , (0b1001101011000000001100, kX, kZR, kX, kZR, kX, kSP, false) , kRWI_W , 0 , 13 , 2314), // #264
|
|
335
|
+
INST(Pssbb , BaseOp , (0b11010101000000110011010010011111) , 0 , 0 , 14 , 2338), // #265
|
|
336
|
+
INST(Rbit , BaseRR , (0b01011010110000000000000000000000, kWX, kZR, 0, kWX, kZR, 5, true) , kRWI_W , 0 , 11 , 2364), // #266
|
|
337
|
+
INST(Ret , BaseBranchReg , (0b11010110010111110000000000000000) , kRWI_R , 0 , 2 , 593 ), // #267
|
|
338
|
+
INST(Rev , BaseRev , (_) , kRWI_W , 0 , 0 , 2369), // #268
|
|
339
|
+
INST(Rev16 , BaseRR , (0b01011010110000000000010000000000, kWX, kZR, 0, kWX, kZR, 5, true) , kRWI_W , 0 , 12 , 2373), // #269
|
|
340
|
+
INST(Rev32 , BaseRR , (0b11011010110000000000100000000000, kWX, kZR, 0, kWX, kZR, 5, true) , kRWI_W , 0 , 13 , 2379), // #270
|
|
341
|
+
INST(Rev64 , BaseRR , (0b11011010110000000000110000000000, kWX, kZR, 0, kWX, kZR, 5, true) , kRWI_W , 0 , 14 , 2385), // #271
|
|
342
|
+
INST(Ror , BaseShift , (0b0001101011000000001011, 0b0001001110000000000000, 1) , kRWI_W , 0 , 6 , 2391), // #272
|
|
343
|
+
INST(Rorv , BaseShift , (0b0001101011000000001011, 0b0000000000000000000000, 1) , kRWI_W , 0 , 7 , 2395), // #273
|
|
344
|
+
INST(Sbc , BaseRRR , (0b0101101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true) , kRWI_W , 0 , 14 , 2498), // #274
|
|
345
|
+
INST(Sbcs , BaseRRR , (0b0111101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true) , kRWI_W , 0 , 15 , 2502), // #275
|
|
346
|
+
INST(Sbfiz , BaseBfi , (0b00010011000000000000000000000000) , kRWI_W , 0 , 1 , 2507), // #276
|
|
347
|
+
INST(Sbfm , BaseBfm , (0b00010011000000000000000000000000) , kRWI_W , 0 , 1 , 2513), // #277
|
|
348
|
+
INST(Sbfx , BaseBfx , (0b00010011000000000000000000000000) , kRWI_W , 0 , 1 , 2518), // #278
|
|
349
|
+
INST(Sdiv , BaseRRR , (0b0001101011000000000011, kWX, kZR, kWX, kZR, kWX, kZR, true) , kRWI_W , 0 , 16 , 2529), // #279
|
|
350
|
+
INST(Setf8 , BaseR , (0b00111010000000000000100000001101, kW, kZR, 5) , 0 , 0 , 6 , 2541), // #280
|
|
351
|
+
INST(Setf16 , BaseR , (0b00111010000000000100100000001101, kW, kZR, 5) , 0 , 0 , 7 , 2534), // #281
|
|
352
|
+
INST(Sev , BaseOp , (0b11010101000000110010000010011111) , 0 , 0 , 15 , 2547), // #282
|
|
353
|
+
INST(Sevl , BaseOp , (0b11010101000000110010000010111111) , 0 , 0 , 16 , 2551), // #283
|
|
354
|
+
INST(Smaddl , BaseRRRR , (0b1001101100100000000000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false) , kRWI_W , 0 , 2 , 2758), // #284
|
|
355
|
+
INST(Smc , BaseOpImm , (0b11010100000000000000000000000011, 16, 5) , 0 , 0 , 11 , 53 ), // #285
|
|
356
|
+
INST(Smnegl , BaseRRR , (0b1001101100100000111111, kX , kZR, kW , kZR, kW , kZR, false) , kRWI_W , 0 , 17 , 2815), // #286
|
|
357
|
+
INST(Smsubl , BaseRRRR , (0b1001101100100000100000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false) , kRWI_W , 0 , 3 , 2827), // #287
|
|
358
|
+
INST(Smulh , BaseRRR , (0b1001101101000000011111, kX , kZR, kX , kZR, kX , kZR, true) , kRWI_W , 0 , 18 , 2834), // #288
|
|
359
|
+
INST(Smull , BaseRRR , (0b1001101100100000011111, kX , kZR, kW , kZR, kW , kZR, false) , kRWI_W , 0 , 19 , 2840), // #289
|
|
360
|
+
INST(Ssbb , BaseOp , (0b11010101000000110011000010011111) , 0 , 0 , 17 , 2339), // #290
|
|
361
|
+
INST(St2g , BaseRM_SImm9 , (0b1101100110100000000010, 0b1101100110100000000001, kX, kSP, 0, 4) , kRWI_RW , 0 , 13 , 3164), // #291
|
|
362
|
+
INST(Stadd , BaseAtomicSt , (0b1011100000100000000000, kWX, 30) , kRWI_RX , 0 , 0 , 3177), // #292
|
|
363
|
+
INST(Staddl , BaseAtomicSt , (0b1011100001100000000000, kWX, 30) , kRWI_RX , 0 , 1 , 3197), // #293
|
|
364
|
+
INST(Staddb , BaseAtomicSt , (0b0011100000100000000000, kW , 0 ) , kRWI_RX , 0 , 2 , 3183), // #294
|
|
365
|
+
INST(Staddlb , BaseAtomicSt , (0b0011100001100000000000, kW , 0 ) , kRWI_RX , 0 , 3 , 3204), // #295
|
|
366
|
+
INST(Staddh , BaseAtomicSt , (0b0111100000100000000000, kW , 0 ) , kRWI_RX , 0 , 4 , 3190), // #296
|
|
367
|
+
INST(Staddlh , BaseAtomicSt , (0b0111100001100000000000, kW , 0 ) , kRWI_RX , 0 , 5 , 3212), // #297
|
|
368
|
+
INST(Stclr , BaseAtomicSt , (0b1011100000100000000100, kWX, 30) , kRWI_RX , 0 , 6 , 3220), // #298
|
|
369
|
+
INST(Stclrl , BaseAtomicSt , (0b1011100001100000000100, kWX, 30) , kRWI_RX , 0 , 7 , 3240), // #299
|
|
370
|
+
INST(Stclrb , BaseAtomicSt , (0b0011100000100000000100, kW , 0 ) , kRWI_RX , 0 , 8 , 3226), // #300
|
|
371
|
+
INST(Stclrlb , BaseAtomicSt , (0b0011100001100000000100, kW , 0 ) , kRWI_RX , 0 , 9 , 3247), // #301
|
|
372
|
+
INST(Stclrh , BaseAtomicSt , (0b0111100000100000000100, kW , 0 ) , kRWI_RX , 0 , 10 , 3233), // #302
|
|
373
|
+
INST(Stclrlh , BaseAtomicSt , (0b0111100001100000000100, kW , 0 ) , kRWI_RX , 0 , 11 , 3255), // #303
|
|
374
|
+
INST(Steor , BaseAtomicSt , (0b1011100000100000001000, kWX, 30) , kRWI_RX , 0 , 12 , 3263), // #304
|
|
375
|
+
INST(Steorl , BaseAtomicSt , (0b1011100001100000001000, kWX, 30) , kRWI_RX , 0 , 13 , 3283), // #305
|
|
376
|
+
INST(Steorb , BaseAtomicSt , (0b0011100000100000001000, kW , 0 ) , kRWI_RX , 0 , 14 , 3269), // #306
|
|
377
|
+
INST(Steorlb , BaseAtomicSt , (0b0011100001100000001000, kW , 0 ) , kRWI_RX , 0 , 15 , 3290), // #307
|
|
378
|
+
INST(Steorh , BaseAtomicSt , (0b0111100000100000001000, kW , 0 ) , kRWI_RX , 0 , 16 , 3276), // #308
|
|
379
|
+
INST(Steorlh , BaseAtomicSt , (0b0111100001100000001000, kW , 0 ) , kRWI_RX , 0 , 17 , 3298), // #309
|
|
380
|
+
INST(Stg , BaseRM_SImm9 , (0b1101100100100000000010, 0b1101100100100000000001, kX, kSP, 0, 4) , kRWI_RW , 0 , 14 , 3306), // #310
|
|
381
|
+
INST(Stgm , BaseRM_NoImm , (0b1101100110100000000000, kX , kZR, 0 ) , kRWI_RW , 0 , 13 , 3310), // #311
|
|
382
|
+
INST(Stgp , BaseLdpStp , (0b0110100100, 0b0110100010, kX, 0, 4) , kRWI_RRW , 0 , 3 , 3315), // #312
|
|
383
|
+
INST(Stllr , BaseRM_NoImm , (0b1000100010011111011111, kWX, kZR, 30) , kRWI_RW , 0 , 14 , 3320), // #313
|
|
384
|
+
INST(Stllrb , BaseRM_NoImm , (0b0000100010011111011111, kW , kZR, 0 ) , kRWI_RW , 0 , 15 , 3326), // #314
|
|
385
|
+
INST(Stllrh , BaseRM_NoImm , (0b0100100010011111011111, kW , kZR, 0 ) , kRWI_RW , 0 , 16 , 3333), // #315
|
|
386
|
+
INST(Stlr , BaseRM_NoImm , (0b1000100010011111111111, kWX, kZR, 30) , kRWI_RW , 0 , 17 , 3340), // #316
|
|
387
|
+
INST(Stlrb , BaseRM_NoImm , (0b0000100010011111111111, kW , kZR, 0 ) , kRWI_RW , 0 , 18 , 3345), // #317
|
|
388
|
+
INST(Stlrh , BaseRM_NoImm , (0b0100100010011111111111, kW , kZR, 0 ) , kRWI_RW , 0 , 19 , 3351), // #318
|
|
389
|
+
INST(Stlxp , BaseStxp , (0b1000100000100000100000, kWX, 30) , kRWI_WRRX , 0 , 0 , 3357), // #319
|
|
390
|
+
INST(Stlxr , BaseAtomicOp , (0b1000100000000000111111, kWX, 30, 1) , kRWI_WRX , 0 , 108, 3363), // #320
|
|
391
|
+
INST(Stlxrb , BaseAtomicOp , (0b0000100000000000111111, kW , 0 , 1) , kRWI_WRX , 0 , 109, 3369), // #321
|
|
392
|
+
INST(Stlxrh , BaseAtomicOp , (0b0100100000000000111111, kW , 0 , 1) , kRWI_WRX , 0 , 110, 3376), // #322
|
|
393
|
+
INST(Stnp , BaseLdpStp , (0b0010100000, 0 , kWX, 31, 2) , kRWI_RRW , 0 , 4 , 3383), // #323
|
|
394
|
+
INST(Stp , BaseLdpStp , (0b0010100100, 0b0010100010, kWX, 31, 2) , kRWI_RRW , 0 , 5 , 3388), // #324
|
|
395
|
+
INST(Str , BaseLdSt , (0b1011100100, 0b10111000000, 0b10111000001, 0 , kWX, 30, 2, Inst::kIdStur) , kRWI_RW , 0 , 6 , 3392), // #325
|
|
396
|
+
INST(Strb , BaseLdSt , (0b0011100100, 0b00111000000, 0b00111000001, 0 , kW , 30, 0, Inst::kIdSturb) , kRWI_RW , 0 , 7 , 3396), // #326
|
|
397
|
+
INST(Strh , BaseLdSt , (0b0111100100, 0b01111000000, 0b01111000001, 0 , kWX, 30, 1, Inst::kIdSturh) , kRWI_RW , 0 , 8 , 3401), // #327
|
|
398
|
+
INST(Stset , BaseAtomicSt , (0b1011100000100000001100, kWX, 30) , kRWI_RX , 0 , 18 , 3406), // #328
|
|
399
|
+
INST(Stsetl , BaseAtomicSt , (0b1011100001100000001100, kWX, 30) , kRWI_RX , 0 , 19 , 3426), // #329
|
|
400
|
+
INST(Stsetb , BaseAtomicSt , (0b0011100000100000001100, kW , 0 ) , kRWI_RX , 0 , 20 , 3412), // #330
|
|
401
|
+
INST(Stsetlb , BaseAtomicSt , (0b0011100001100000001100, kW , 0 ) , kRWI_RX , 0 , 21 , 3433), // #331
|
|
402
|
+
INST(Stseth , BaseAtomicSt , (0b0111100000100000001100, kW , 0 ) , kRWI_RX , 0 , 22 , 3419), // #332
|
|
403
|
+
INST(Stsetlh , BaseAtomicSt , (0b0111100001100000001100, kW , 0 ) , kRWI_RX , 0 , 23 , 3441), // #333
|
|
404
|
+
INST(Stsmax , BaseAtomicSt , (0b1011100000100000010000, kWX, 30) , kRWI_RX , 0 , 24 , 3449), // #334
|
|
405
|
+
INST(Stsmaxl , BaseAtomicSt , (0b1011100001100000010000, kWX, 30) , kRWI_RX , 0 , 25 , 3472), // #335
|
|
406
|
+
INST(Stsmaxb , BaseAtomicSt , (0b0011100000100000010000, kW , 0 ) , kRWI_RX , 0 , 26 , 3456), // #336
|
|
407
|
+
INST(Stsmaxlb , BaseAtomicSt , (0b0011100001100000010000, kW , 0 ) , kRWI_RX , 0 , 27 , 3480), // #337
|
|
408
|
+
INST(Stsmaxh , BaseAtomicSt , (0b0111100000100000010000, kW , 0 ) , kRWI_RX , 0 , 28 , 3464), // #338
|
|
409
|
+
INST(Stsmaxlh , BaseAtomicSt , (0b0111100001100000010000, kW , 0 ) , kRWI_RX , 0 , 29 , 3489), // #339
|
|
410
|
+
INST(Stsmin , BaseAtomicSt , (0b1011100000100000010100, kWX, 30) , kRWI_RX , 0 , 30 , 3498), // #340
|
|
411
|
+
INST(Stsminl , BaseAtomicSt , (0b1011100001100000010100, kWX, 30) , kRWI_RX , 0 , 31 , 3521), // #341
|
|
412
|
+
INST(Stsminb , BaseAtomicSt , (0b0011100000100000010100, kW , 0 ) , kRWI_RX , 0 , 32 , 3505), // #342
|
|
413
|
+
INST(Stsminlb , BaseAtomicSt , (0b0011100001100000010100, kW , 0 ) , kRWI_RX , 0 , 33 , 3529), // #343
|
|
414
|
+
INST(Stsminh , BaseAtomicSt , (0b0111100000100000010100, kW , 0 ) , kRWI_RX , 0 , 34 , 3513), // #344
|
|
415
|
+
INST(Stsminlh , BaseAtomicSt , (0b0111100001100000010100, kW , 0 ) , kRWI_RX , 0 , 35 , 3538), // #345
|
|
416
|
+
INST(Sttr , BaseRM_SImm9 , (0b1011100000000000000010, 0b0000000000000000000000, kWX, kZR, 30, 0) , kRWI_RW , 0 , 15 , 3547), // #346
|
|
417
|
+
INST(Sttrb , BaseRM_SImm9 , (0b0011100000000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0) , kRWI_RW , 0 , 16 , 3552), // #347
|
|
418
|
+
INST(Sttrh , BaseRM_SImm9 , (0b0111100000000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0) , kRWI_RW , 0 , 17 , 3558), // #348
|
|
419
|
+
INST(Stumax , BaseAtomicSt , (0b1011100000100000011000, kWX, 30) , kRWI_RX , 0 , 36 , 3564), // #349
|
|
420
|
+
INST(Stumaxl , BaseAtomicSt , (0b1011100001100000011000, kWX, 30) , kRWI_RX , 0 , 37 , 3587), // #350
|
|
421
|
+
INST(Stumaxb , BaseAtomicSt , (0b0011100000100000011000, kW , 0 ) , kRWI_RX , 0 , 38 , 3571), // #351
|
|
422
|
+
INST(Stumaxlb , BaseAtomicSt , (0b0011100001100000011000, kW , 0 ) , kRWI_RX , 0 , 39 , 3595), // #352
|
|
423
|
+
INST(Stumaxh , BaseAtomicSt , (0b0111100000100000011000, kW , 0 ) , kRWI_RX , 0 , 40 , 3579), // #353
|
|
424
|
+
INST(Stumaxlh , BaseAtomicSt , (0b0111100001100000011000, kW , 0 ) , kRWI_RX , 0 , 41 , 3604), // #354
|
|
425
|
+
INST(Stumin , BaseAtomicSt , (0b1011100000100000011100, kWX, 30) , kRWI_RX , 0 , 42 , 3613), // #355
|
|
426
|
+
INST(Stuminl , BaseAtomicSt , (0b1011100001100000011100, kWX, 30) , kRWI_RX , 0 , 43 , 3636), // #356
|
|
427
|
+
INST(Stuminb , BaseAtomicSt , (0b0011100000100000011100, kW , 0 ) , kRWI_RX , 0 , 44 , 3620), // #357
|
|
428
|
+
INST(Stuminlb , BaseAtomicSt , (0b0011100001100000011100, kW , 0 ) , kRWI_RX , 0 , 45 , 3644), // #358
|
|
429
|
+
INST(Stuminh , BaseAtomicSt , (0b0111100000100000011100, kW , 0 ) , kRWI_RX , 0 , 46 , 3628), // #359
|
|
430
|
+
INST(Stuminlh , BaseAtomicSt , (0b0111100001100000011100, kW , 0 ) , kRWI_RX , 0 , 47 , 3653), // #360
|
|
431
|
+
INST(Stur , BaseRM_SImm9 , (0b1011100000000000000000, 0b0000000000000000000000, kWX, kZR, 30, 0) , kRWI_RW , 0 , 18 , 3662), // #361
|
|
432
|
+
INST(Sturb , BaseRM_SImm9 , (0b0011100000000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0) , kRWI_RW , 0 , 19 , 3667), // #362
|
|
433
|
+
INST(Sturh , BaseRM_SImm9 , (0b0111100000000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0) , kRWI_RW , 0 , 20 , 3673), // #363
|
|
434
|
+
INST(Stxp , BaseStxp , (0b1000100000100000000000, kWX, 30) , kRWI_WRRW , 0 , 1 , 3679), // #364
|
|
435
|
+
INST(Stxr , BaseStx , (0b1000100000000000011111, kWX, 30) , kRWI_WRW , 0 , 0 , 3684), // #365
|
|
436
|
+
INST(Stxrb , BaseStx , (0b0000100000000000011111, kW , 0 ) , kRWI_WRW , 0 , 1 , 3689), // #366
|
|
437
|
+
INST(Stxrh , BaseStx , (0b0100100000000000011111, kW , 0 ) , kRWI_WRW , 0 , 2 , 3695), // #367
|
|
438
|
+
INST(Stz2g , BaseRM_SImm9 , (0b1101100111100000000010, 0b1101100111100000000001, kX , kSP, 0, 4) , kRWI_RW , 0 , 21 , 3701), // #368
|
|
439
|
+
INST(Stzg , BaseRM_SImm9 , (0b1101100101100000000010, 0b1101100101100000000001, kX , kSP, 0, 4) , kRWI_RW , 0 , 22 , 3707), // #369
|
|
440
|
+
INST(Stzgm , BaseRM_NoImm , (0b1101100100100000000000, kX , kZR, 0) , kRWI_RW , 0 , 20 , 3712), // #370
|
|
441
|
+
INST(Sub , BaseAddSub , (0b1001011000, 0b1001011001, 0b1010001) , kRWI_X , 0 , 2 , 985 ), // #371
|
|
442
|
+
INST(Subg , BaseRRII , (0b1101000110000000000000, kX, kSP, kX, kSP, 6, 4, 16, 4, 0, 10) , kRWI_W , 0 , 1 , 3718), // #372
|
|
443
|
+
INST(Subp , BaseRRR , (0b1001101011000000000000, kX, kZR, kX, kSP, kX, kSP, false) , kRWI_W , 0 , 20 , 3723), // #373
|
|
444
|
+
INST(Subps , BaseRRR , (0b1011101011000000000000, kX, kZR, kX, kSP, kX, kSP, false) , kRWI_W , 0 , 21 , 3728), // #374
|
|
445
|
+
INST(Subs , BaseAddSub , (0b1101011000, 0b1101011001, 0b1110001) , kRWI_X , 0 , 3 , 3734), // #375
|
|
446
|
+
INST(Svc , BaseOpImm , (0b11010100000000000000000000000001, 16, 5) , 0 , 0 , 12 , 3752), // #376
|
|
447
|
+
INST(Swp , BaseAtomicOp , (0b1011100000100000100000, kWX, 30, 1) , kRWI_RWX , 0 , 111, 3756), // #377
|
|
448
|
+
INST(Swpa , BaseAtomicOp , (0b1011100010100000100000, kWX, 30, 1) , kRWI_RWX , 0 , 112, 3760), // #378
|
|
449
|
+
INST(Swpab , BaseAtomicOp , (0b0011100010100000100000, kW , 0 , 1) , kRWI_RWX , 0 , 113, 3765), // #379
|
|
450
|
+
INST(Swpah , BaseAtomicOp , (0b0111100010100000100000, kW , 0 , 1) , kRWI_RWX , 0 , 114, 3771), // #380
|
|
451
|
+
INST(Swpal , BaseAtomicOp , (0b1011100011100000100000, kWX, 30, 1) , kRWI_RWX , 0 , 115, 3777), // #381
|
|
452
|
+
INST(Swpalb , BaseAtomicOp , (0b0011100011100000100000, kW , 0 , 1) , kRWI_RWX , 0 , 116, 3783), // #382
|
|
453
|
+
INST(Swpalh , BaseAtomicOp , (0b0111100011100000100000, kW , 0 , 1) , kRWI_RWX , 0 , 117, 3790), // #383
|
|
454
|
+
INST(Swpb , BaseAtomicOp , (0b0011100000100000100000, kW , 0 , 1) , kRWI_RWX , 0 , 118, 3797), // #384
|
|
455
|
+
INST(Swph , BaseAtomicOp , (0b0111100000100000100000, kW , 0 , 1) , kRWI_RWX , 0 , 119, 3802), // #385
|
|
456
|
+
INST(Swpl , BaseAtomicOp , (0b1011100001100000100000, kWX, 30, 1) , kRWI_RWX , 0 , 120, 3807), // #386
|
|
457
|
+
INST(Swplb , BaseAtomicOp , (0b0011100001100000100000, kW , 0 , 1) , kRWI_RWX , 0 , 121, 3812), // #387
|
|
458
|
+
INST(Swplh , BaseAtomicOp , (0b0111100001100000100000, kW , 0 , 1) , kRWI_RWX , 0 , 122, 3818), // #388
|
|
459
|
+
INST(Sxtb , BaseExtend , (0b0001001100000000000111, kWX, 0) , kRWI_W , 0 , 0 , 3824), // #389
|
|
460
|
+
INST(Sxth , BaseExtend , (0b0001001100000000001111, kWX, 0) , kRWI_W , 0 , 1 , 3829), // #390
|
|
461
|
+
INST(Sxtw , BaseExtend , (0b1001001101000000011111, kX , 0) , kRWI_W , 0 , 2 , 3845), // #391
|
|
462
|
+
INST(Sys , BaseSys , (_) , kRWI_W , 0 , 0 , 3850), // #392
|
|
463
|
+
INST(Tlbi , BaseAtDcIcTlbi , (0b00011110000000, 0b00010000000000, false) , kRWI_RX , 0 , 3 , 3871), // #393
|
|
464
|
+
INST(Tst , BaseTst , (0b1101010000, 0b111001000) , kRWI_R , 0 , 0 , 437 ), // #394
|
|
465
|
+
INST(Tbnz , BaseBranchTst , (0b00110111000000000000000000000000) , kRWI_R , 0 , 0 , 3858), // #395
|
|
466
|
+
INST(Tbz , BaseBranchTst , (0b00110110000000000000000000000000) , kRWI_R , 0 , 1 , 3867), // #396
|
|
467
|
+
INST(Ubfiz , BaseBfi , (0b01010011000000000000000000000000) , kRWI_W , 0 , 2 , 3969), // #397
|
|
468
|
+
INST(Ubfm , BaseBfm , (0b01010011000000000000000000000000) , kRWI_W , 0 , 2 , 3975), // #398
|
|
469
|
+
INST(Ubfx , BaseBfx , (0b01010011000000000000000000000000) , kRWI_W , 0 , 2 , 3980), // #399
|
|
470
|
+
INST(Udf , BaseOpImm , (0b00000000000000000000000000000000, 16, 0) , 0 , 0 , 13 , 3991), // #400
|
|
471
|
+
INST(Udiv , BaseRRR , (0b0001101011000000000010, kWX, kZR, kWX, kZR, kWX, kZR, true) , kRWI_W , 0 , 22 , 3995), // #401
|
|
472
|
+
INST(Umaddl , BaseRRRR , (0b1001101110100000000000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false) , kRWI_W , 0 , 4 , 4012), // #402
|
|
473
|
+
INST(Umnegl , BaseRRR , (0b1001101110100000111111, kX , kZR, kW , kZR, kW , kZR, false) , kRWI_W , 0 , 23 , 4075), // #403
|
|
474
|
+
INST(Umull , BaseRRR , (0b1001101110100000011111, kX , kZR, kW , kZR, kW , kZR, false) , kRWI_W , 0 , 24 , 4100), // #404
|
|
475
|
+
INST(Umulh , BaseRRR , (0b1001101111000000011111, kX , kZR, kX , kZR, kX , kZR, false) , kRWI_W , 0 , 25 , 4094), // #405
|
|
476
|
+
INST(Umsubl , BaseRRRR , (0b1001101110100000100000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false) , kRWI_W , 0 , 5 , 4087), // #406
|
|
477
|
+
INST(Uxtb , BaseExtend , (0b0101001100000000000111, kW, 1) , kRWI_W , 0 , 3 , 4291), // #407
|
|
478
|
+
INST(Uxth , BaseExtend , (0b0101001100000000001111, kW, 1) , kRWI_W , 0 , 4 , 4296), // #408
|
|
479
|
+
INST(Wfe , BaseOp , (0b11010101000000110010000001011111) , 0 , 0 , 18 , 4322), // #409
|
|
480
|
+
INST(Wfi , BaseOp , (0b11010101000000110010000001111111) , 0 , 0 , 19 , 4326), // #410
|
|
481
|
+
INST(Xaflag , BaseOp , (0b11010101000000000100000000111111) , 0 , 0 , 20 , 4330), // #411
|
|
482
|
+
INST(Xpacd , BaseR , (0b11011010110000010100011111100000, kX, kZR, 0) , kRWI_X , 0 , 8 , 4341), // #412
|
|
483
|
+
INST(Xpaci , BaseR , (0b11011010110000010100001111100000, kX, kZR, 0) , kRWI_X , 0 , 9 , 4347), // #413
|
|
484
|
+
INST(Xpaclri , BaseOp , (0b11010101000000110010000011111111) , kRWI_X , 0 , 21 , 4353), // #414
|
|
485
|
+
INST(Yield , BaseOp , (0b11010101000000110010000000111111) , 0 , 0 , 22 , 4361), // #415
|
|
486
|
+
INST(Abs_v , ISimdVV , (0b0000111000100000101110, kVO_V_Any) , kRWI_W , 0 , 0 , 2855), // #416
|
|
487
|
+
INST(Add_v , ISimdVVV , (0b0000111000100000100001, kVO_V_Any) , kRWI_W , 0 , 0 , 978 ), // #417
|
|
488
|
+
INST(Addhn_v , ISimdVVV , (0b0000111000100000010000, kVO_V_B8H4S2) , kRWI_W , F(Narrow) , 1 , 2345), // #418
|
|
489
|
+
INST(Addhn2_v , ISimdVVV , (0b0100111000100000010000, kVO_V_B16H8S4) , kRWI_W , F(Narrow) , 2 , 2352), // #419
|
|
490
|
+
INST(Addp_v , ISimdPair , (0b0101111000110001101110, 0b0000111000100000101111, kVO_V_Any) , kRWI_W , F(Pair) , 0 , 638 ), // #420
|
|
491
|
+
INST(Addv_v , ISimdSV , (0b0000111000110001101110, kVO_V_BH_4S) , kRWI_W , 0 , 0 , 20 ), // #421
|
|
492
|
+
INST(Aesd_v , ISimdVVx , (0b0100111000101000010110, kOp_V16B, kOp_V16B) , kRWI_X , 0 , 0 , 34 ), // #422
|
|
493
|
+
INST(Aese_v , ISimdVVx , (0b0100111000101000010010, kOp_V16B, kOp_V16B) , kRWI_X , 0 , 1 , 39 ), // #423
|
|
494
|
+
INST(Aesimc_v , ISimdVVx , (0b0100111000101000011110, kOp_V16B, kOp_V16B) , kRWI_W , 0 , 2 , 44 ), // #424
|
|
495
|
+
INST(Aesmc_v , ISimdVVx , (0b0100111000101000011010, kOp_V16B, kOp_V16B) , kRWI_W , 0 , 3 , 51 ), // #425
|
|
496
|
+
INST(And_v , ISimdVVV , (0b0000111000100000000111, kVO_V_B) , kRWI_W , 0 , 3 , 57 ), // #426
|
|
497
|
+
INST(Bcax_v , ISimdVVVV , (0b1100111000100000000000, kVO_V_B16) , kRWI_W , 0 , 0 , 187 ), // #427
|
|
498
|
+
INST(Bfcvt_v , ISimdVVx , (0b0001111001100011010000, kOp_H, kOp_S) , kRWI_W , 0 , 4 , 196 ), // #428
|
|
499
|
+
INST(Bfcvtn_v , ISimdVVx , (0b0000111010100001011010, kOp_V4H, kOp_V4S) , kRWI_W , F(Narrow) , 5 , 202 ), // #429
|
|
500
|
+
INST(Bfcvtn2_v , ISimdVVx , (0b0100111010100001011010, kOp_V8H, kOp_V4S) , kRWI_W , F(Narrow) , 6 , 209 ), // #430
|
|
501
|
+
INST(Bfdot_v , SimdDot , (0b0010111001000000111111, 0b0000111101000000111100, kET_S, kET_H, kET_2H) , kRWI_X , 0 , 0 , 217 ), // #431
|
|
502
|
+
INST(Bfmlalb_v , SimdFmlal , (0b0010111011000000111111, 0b0000111111000000111100, 0, kET_S, kET_H, kET_H) , kRWI_X , F(VH0_15) , 0 , 227 ), // #432
|
|
503
|
+
INST(Bfmlalt_v , SimdFmlal , (0b0110111011000000111111, 0b0100111111000000111100, 0, kET_S, kET_H, kET_H) , kRWI_X , F(VH0_15) , 1 , 235 ), // #433
|
|
504
|
+
INST(Bfmmla_v , ISimdVVVx , (0b0110111001000000111011, kOp_V4S, kOp_V8H, kOp_V8H) , kRWI_X , F(Long) , 0 , 243 ), // #434
|
|
505
|
+
INST(Bic_v , SimdBicOrr , (0b0000111001100000000111, 0b0010111100000000000001) , kRWI_W , 0 , 0 , 256 ), // #435
|
|
506
|
+
INST(Bif_v , ISimdVVV , (0b0010111011100000000111, kVO_V_B) , kRWI_X , 0 , 4 , 265 ), // #436
|
|
507
|
+
INST(Bit_v , ISimdVVV , (0b0010111010100000000111, kVO_V_B) , kRWI_X , 0 , 5 , 2365), // #437
|
|
508
|
+
INST(Bsl_v , ISimdVVV , (0b0010111001100000000111, kVO_V_B) , kRWI_X , 0 , 6 , 280 ), // #438
|
|
509
|
+
INST(Cls_v , ISimdVV , (0b0000111000100000010010, kVO_V_BHS) , kRWI_W , 0 , 1 , 412 ), // #439
|
|
510
|
+
INST(Clz_v , ISimdVV , (0b0010111000100000010010, kVO_V_BHS) , kRWI_W , 0 , 2 , 416 ), // #440
|
|
511
|
+
INST(Cmeq_v , SimdCmp , (0b0010111000100000100011, 0b0000111000100000100110, kVO_V_Any) , kRWI_W , 0 , 0 , 663 ), // #441
|
|
512
|
+
INST(Cmge_v , SimdCmp , (0b0000111000100000001111, 0b0010111000100000100010, kVO_V_Any) , kRWI_W , 0 , 1 , 669 ), // #442
|
|
513
|
+
INST(Cmgt_v , SimdCmp , (0b0000111000100000001101, 0b0000111000100000100010, kVO_V_Any) , kRWI_W , 0 , 2 , 675 ), // #443
|
|
514
|
+
INST(Cmhi_v , SimdCmp , (0b0010111000100000001101, 0b0000000000000000000000, kVO_V_Any) , kRWI_W , 0 , 3 , 420 ), // #444
|
|
515
|
+
INST(Cmhs_v , SimdCmp , (0b0010111000100000001111, 0b0000000000000000000000, kVO_V_Any) , kRWI_W , 0 , 4 , 425 ), // #445
|
|
516
|
+
INST(Cmle_v , SimdCmp , (0b0000000000000000000000, 0b0010111000100000100110, kVO_V_Any) , kRWI_W , 0 , 5 , 687 ), // #446
|
|
517
|
+
INST(Cmlt_v , SimdCmp , (0b0000000000000000000000, 0b0000111000100000101010, kVO_V_Any) , kRWI_W , 0 , 6 , 693 ), // #447
|
|
518
|
+
INST(Cmtst_v , ISimdVVV , (0b0000111000100000100011, kVO_V_Any) , kRWI_W , 0 , 7 , 435 ), // #448
|
|
519
|
+
INST(Cnt_v , ISimdVV , (0b0000111000100000010110, kVO_V_B) , kRWI_W , 0 , 3 , 446 ), // #449
|
|
520
|
+
INST(Dup_v , SimdDup , (_) , kRWI_W , 0 , 0 , 579 ), // #450
|
|
521
|
+
INST(Eor_v , ISimdVVV , (0b0010111000100000000111, kVO_V_B) , kRWI_W , 0 , 8 , 1418), // #451
|
|
522
|
+
INST(Eor3_v , ISimdVVVV , (0b1100111000000000000000, kVO_V_B16) , kRWI_W , 0 , 1 , 587 ), // #452
|
|
523
|
+
INST(Ext_v , ISimdVVVI , (0b0010111000000000000000, kVO_V_B, 4, 11, 1) , kRWI_W , 0 , 0 , 601 ), // #453
|
|
524
|
+
INST(Fabd_v , FSimdVVV , (0b0111111010100000110101, kHF_C, 0b0010111010100000110101, kHF_C) , kRWI_W , 0 , 0 , 610 ), // #454
|
|
525
|
+
INST(Fabs_v , FSimdVV , (0b0001111000100000110000, kHF_A, 0b0000111010100000111110, kHF_B) , kRWI_W , 0 , 0 , 615 ), // #455
|
|
526
|
+
INST(Facge_v , FSimdVVV , (0b0111111000100000111011, kHF_C, 0b0010111000100000111011, kHF_C) , kRWI_W , 0 , 1 , 620 ), // #456
|
|
527
|
+
INST(Facgt_v , FSimdVVV , (0b0111111010100000111011, kHF_C, 0b0010111010100000111011, kHF_C) , kRWI_W , 0 , 2 , 626 ), // #457
|
|
528
|
+
INST(Fadd_v , FSimdVVV , (0b0001111000100000001010, kHF_A, 0b0000111000100000110101, kHF_C) , kRWI_W , 0 , 3 , 632 ), // #458
|
|
529
|
+
INST(Faddp_v , FSimdPair , (0b0111111000110000110110, 0b0010111000100000110101) , kRWI_W , 0 , 0 , 637 ), // #459
|
|
530
|
+
INST(Fcadd_v , SimdFcadd , (0b0010111000000000111001) , kRWI_W , 0 , 0 , 643 ), // #460
|
|
531
|
+
INST(Fccmp_v , SimdFccmpFccmpe , (0b00011110001000000000010000000000) , kRWI_R , 0 , 0 , 649 ), // #461
|
|
532
|
+
INST(Fccmpe_v , SimdFccmpFccmpe , (0b00011110001000000000010000010000) , kRWI_R , 0 , 1 , 655 ), // #462
|
|
533
|
+
INST(Fcmeq_v , SimdFcm , (0b0000111000100000111001, kHF_C, 0b0000111010100000110110) , kRWI_W , 0 , 0 , 662 ), // #463
|
|
534
|
+
INST(Fcmge_v , SimdFcm , (0b0010111000100000111001, kHF_C, 0b0010111010100000110010) , kRWI_W , 0 , 1 , 668 ), // #464
|
|
535
|
+
INST(Fcmgt_v , SimdFcm , (0b0010111010100000111001, kHF_C, 0b0000111010100000110010) , kRWI_W , 0 , 2 , 674 ), // #465
|
|
536
|
+
INST(Fcmla_v , SimdFcmla , (0b0010111000000000110001, 0b0010111100000000000100) , kRWI_X , 0 , 0 , 680 ), // #466
|
|
537
|
+
INST(Fcmle_v , SimdFcm , (0b0000000000000000000000, kHF_C, 0b0010111010100000110110) , kRWI_W , 0 , 3 , 686 ), // #467
|
|
538
|
+
INST(Fcmlt_v , SimdFcm , (0b0000000000000000000000, kHF_C, 0b0000111010100000111010) , kRWI_W , 0 , 4 , 692 ), // #468
|
|
539
|
+
INST(Fcmp_v , SimdFcmpFcmpe , (0b00011110001000000010000000000000) , kRWI_R , 0 , 0 , 698 ), // #469
|
|
540
|
+
INST(Fcmpe_v , SimdFcmpFcmpe , (0b00011110001000000010000000010000) , kRWI_R , 0 , 1 , 703 ), // #470
|
|
541
|
+
INST(Fcsel_v , SimdFcsel , (_) , kRWI_W , 0 , 0 , 709 ), // #471
|
|
542
|
+
INST(Fcvt_v , SimdFcvt , (_) , kRWI_W , 0 , 0 , 197 ), // #472
|
|
543
|
+
INST(Fcvtas_v , SimdFcvtSV , (0b0000111000100001110010, 0b0000000000000000000000, 0b0001111000100100000000, 1) , kRWI_W , 0 , 0 , 715 ), // #473
|
|
544
|
+
INST(Fcvtau_v , SimdFcvtSV , (0b0010111000100001110010, 0b0000000000000000000000, 0b0001111000100101000000, 1) , kRWI_W , 0 , 1 , 722 ), // #474
|
|
545
|
+
INST(Fcvtl_v , SimdFcvtLN , (0b0000111000100001011110, 0, 0) , kRWI_W , F(Long) , 0 , 729 ), // #475
|
|
546
|
+
INST(Fcvtl2_v , SimdFcvtLN , (0b0100111000100001011110, 0, 0) , kRWI_W , F(Long) , 1 , 735 ), // #476
|
|
547
|
+
INST(Fcvtms_v , SimdFcvtSV , (0b0000111000100001101110, 0b0000000000000000000000, 0b0001111000110000000000, 1) , kRWI_W , 0 , 2 , 742 ), // #477
|
|
548
|
+
INST(Fcvtmu_v , SimdFcvtSV , (0b0010111000100001101110, 0b0000000000000000000000, 0b0001111000110001000000, 1) , kRWI_W , 0 , 3 , 749 ), // #478
|
|
549
|
+
INST(Fcvtn_v , SimdFcvtLN , (0b0000111000100001011010, 0, 0) , kRWI_W , F(Narrow) , 2 , 203 ), // #479
|
|
550
|
+
INST(Fcvtn2_v , SimdFcvtLN , (0b0100111000100001011010, 0, 0) , kRWI_X , F(Narrow) , 3 , 210 ), // #480
|
|
551
|
+
INST(Fcvtns_v , SimdFcvtSV , (0b0000111000100001101010, 0b0000000000000000000000, 0b0001111000100000000000, 1) , kRWI_W , 0 , 4 , 756 ), // #481
|
|
552
|
+
INST(Fcvtnu_v , SimdFcvtSV , (0b0010111000100001101010, 0b0000000000000000000000, 0b0001111000100001000000, 1) , kRWI_W , 0 , 5 , 763 ), // #482
|
|
553
|
+
INST(Fcvtps_v , SimdFcvtSV , (0b0000111010100001101010, 0b0000000000000000000000, 0b0001111000101000000000, 1) , kRWI_W , 0 , 6 , 770 ), // #483
|
|
554
|
+
INST(Fcvtpu_v , SimdFcvtSV , (0b0010111010100001101010, 0b0000000000000000000000, 0b0001111000101001000000, 1) , kRWI_W , 0 , 7 , 777 ), // #484
|
|
555
|
+
INST(Fcvtxn_v , SimdFcvtLN , (0b0010111000100001011010, 1, 1) , kRWI_W , F(Narrow) , 4 , 784 ), // #485
|
|
556
|
+
INST(Fcvtxn2_v , SimdFcvtLN , (0b0110111000100001011010, 1, 0) , kRWI_X , F(Narrow) , 5 , 791 ), // #486
|
|
557
|
+
INST(Fcvtzs_v , SimdFcvtSV , (0b0000111010100001101110, 0b0000111100000000111111, 0b0001111000111000000000, 1) , kRWI_W , 0 , 8 , 799 ), // #487
|
|
558
|
+
INST(Fcvtzu_v , SimdFcvtSV , (0b0010111010100001101110, 0b0010111100000000111111, 0b0001111000111001000000, 1) , kRWI_W , 0 , 9 , 806 ), // #488
|
|
559
|
+
INST(Fdiv_v , FSimdVVV , (0b0001111000100000000110, kHF_A, 0b0010111000100000111111, kHF_C) , kRWI_W , 0 , 4 , 813 ), // #489
|
|
560
|
+
INST(Fjcvtzs_v , ISimdVVx , (0b0001111001111110000000, kOp_GpW, kOp_D) , kRWI_W , 0 , 7 , 818 ), // #490
|
|
561
|
+
INST(Fmadd_v , FSimdVVVV , (0b0001111100000000000000, kHF_A, 0b0000000000000000000000, kHF_N) , kRWI_W , 0 , 0 , 826 ), // #491
|
|
562
|
+
INST(Fmax_v , FSimdVVV , (0b0001111000100000010010, kHF_A, 0b0000111000100000111101, kHF_C) , kRWI_W , 0 , 5 , 832 ), // #492
|
|
563
|
+
INST(Fmaxnm_v , FSimdVVV , (0b0001111000100000011010, kHF_A, 0b0000111000100000110001, kHF_C) , kRWI_W , 0 , 6 , 837 ), // #493
|
|
564
|
+
INST(Fmaxnmp_v , FSimdPair , (0b0111111000110000110010, 0b0010111000100000110001) , kRWI_W , 0 , 1 , 844 ), // #494
|
|
565
|
+
INST(Fmaxnmv_v , FSimdSV , (0b0010111000110000110010) , kRWI_W , 0 , 0 , 852 ), // #495
|
|
566
|
+
INST(Fmaxp_v , FSimdPair , (0b0111111000110000111110, 0b0010111000100000111101) , kRWI_W , 0 , 2 , 860 ), // #496
|
|
567
|
+
INST(Fmaxv_v , FSimdSV , (0b0010111000110000111110) , kRWI_W , 0 , 1 , 866 ), // #497
|
|
568
|
+
INST(Fmin_v , FSimdVVV , (0b0001111000100000010110, kHF_A, 0b0000111010100000111101, kHF_C) , kRWI_W , 0 , 7 , 872 ), // #498
|
|
569
|
+
INST(Fminnm_v , FSimdVVV , (0b0001111000100000011110, kHF_A, 0b0000111010100000110001, kHF_C) , kRWI_W , 0 , 8 , 877 ), // #499
|
|
570
|
+
INST(Fminnmp_v , FSimdPair , (0b0111111010110000110010, 0b0010111010100000110001) , kRWI_W , 0 , 3 , 884 ), // #500
|
|
571
|
+
INST(Fminnmv_v , FSimdSV , (0b0010111010110000110010) , kRWI_W , 0 , 2 , 892 ), // #501
|
|
572
|
+
INST(Fminp_v , FSimdPair , (0b0111111010110000111110, 0b0010111010100000111101) , kRWI_W , 0 , 4 , 900 ), // #502
|
|
573
|
+
INST(Fminv_v , FSimdSV , (0b0010111010110000111110) , kRWI_W , 0 , 3 , 906 ), // #503
|
|
574
|
+
INST(Fmla_v , FSimdVVVe , (0b0000000000000000000000, kHF_N, 0b0000111000100000110011, 0b0000111110000000000100) , kRWI_X , F(VH0_15) , 0 , 912 ), // #504
|
|
575
|
+
INST(Fmlal_v , SimdFmlal , (0b0000111000100000111011, 0b0000111110000000000000, 1, kET_S, kET_H, kET_H) , kRWI_X , F(VH0_15) , 2 , 917 ), // #505
|
|
576
|
+
INST(Fmlal2_v , SimdFmlal , (0b0010111000100000110011, 0b0010111110000000100000, 1, kET_S, kET_H, kET_H) , kRWI_X , F(VH0_15) , 3 , 923 ), // #506
|
|
577
|
+
INST(Fmls_v , FSimdVVVe , (0b0000000000000000000000, kHF_N, 0b0000111010100000110011, 0b0000111110000000010100) , kRWI_X , F(VH0_15) , 1 , 930 ), // #507
|
|
578
|
+
INST(Fmlsl_v , SimdFmlal , (0b0000111010100000111011, 0b0000111110000000010000, 1, kET_S, kET_H, kET_H) , kRWI_X , F(VH0_15) , 4 , 935 ), // #508
|
|
579
|
+
INST(Fmlsl2_v , SimdFmlal , (0b0010111010100000110011, 0b0010111110000000110000, 1, kET_S, kET_H, kET_H) , kRWI_X , F(VH0_15) , 5 , 941 ), // #509
|
|
580
|
+
INST(Fmov_v , SimdFmov , (_) , kRWI_W , 0 , 0 , 948 ), // #510
|
|
581
|
+
INST(Fmsub_v , FSimdVVVV , (0b0001111100000000100000, kHF_A, 0b0000000000000000000000, kHF_N) , kRWI_W , 0 , 1 , 953 ), // #511
|
|
582
|
+
INST(Fmul_v , FSimdVVVe , (0b0001111000100000000010, kHF_A, 0b0010111000100000110111, 0b0000111110000000100100) , kRWI_W , F(VH0_15) , 2 , 959 ), // #512
|
|
583
|
+
INST(Fmulx_v , FSimdVVVe , (0b0101111000100000110111, kHF_C, 0b0000111000100000110111, 0b0010111110000000100100) , kRWI_W , F(VH0_15) , 3 , 964 ), // #513
|
|
584
|
+
INST(Fneg_v , FSimdVV , (0b0001111000100001010000, kHF_A, 0b0010111010100000111110, kHF_B) , kRWI_W , 0 , 1 , 970 ), // #514
|
|
585
|
+
INST(Fnmadd_v , FSimdVVVV , (0b0001111100100000000000, kHF_A, 0b0000000000000000000000, kHF_N) , kRWI_W , 0 , 2 , 975 ), // #515
|
|
586
|
+
INST(Fnmsub_v , FSimdVVVV , (0b0001111100100000100000, kHF_A, 0b0000000000000000000000, kHF_N) , kRWI_W , 0 , 3 , 982 ), // #516
|
|
587
|
+
INST(Fnmul_v , FSimdVVV , (0b0001111000100000100010, kHF_A, 0b0000000000000000000000, kHF_N) , kRWI_W , 0 , 9 , 989 ), // #517
|
|
588
|
+
INST(Frecpe_v , FSimdVV , (0b0101111010100001110110, kHF_B, 0b0000111010100001110110, kHF_B) , kRWI_W , 0 , 2 , 995 ), // #518
|
|
589
|
+
INST(Frecps_v , FSimdVVV , (0b0101111000100000111111, kHF_C, 0b0000111000100000111111, kHF_C) , kRWI_W , 0 , 10 , 1002), // #519
|
|
590
|
+
INST(Frecpx_v , FSimdVV , (0b0101111010100001111110, kHF_B, 0b0000000000000000000000, kHF_N) , kRWI_W , 0 , 3 , 1009), // #520
|
|
591
|
+
INST(Frint32x_v , FSimdVV , (0b0001111000101000110000, kHF_N, 0b0010111000100001111010, kHF_N) , kRWI_W , 0 , 4 , 1016), // #521
|
|
592
|
+
INST(Frint32z_v , FSimdVV , (0b0001111000101000010000, kHF_N, 0b0000111000100001111010, kHF_N) , kRWI_W , 0 , 5 , 1025), // #522
|
|
593
|
+
INST(Frint64x_v , FSimdVV , (0b0001111000101001110000, kHF_N, 0b0010111000100001111110, kHF_N) , kRWI_W , 0 , 6 , 1034), // #523
|
|
594
|
+
INST(Frint64z_v , FSimdVV , (0b0001111000101001010000, kHF_N, 0b0000111000100001111110, kHF_N) , kRWI_W , 0 , 7 , 1043), // #524
|
|
595
|
+
INST(Frinta_v , FSimdVV , (0b0001111000100110010000, kHF_A, 0b0010111000100001100010, kHF_B) , kRWI_W , 0 , 8 , 1052), // #525
|
|
596
|
+
INST(Frinti_v , FSimdVV , (0b0001111000100111110000, kHF_A, 0b0010111010100001100110, kHF_B) , kRWI_W , 0 , 9 , 1059), // #526
|
|
597
|
+
INST(Frintm_v , FSimdVV , (0b0001111000100101010000, kHF_A, 0b0000111000100001100110, kHF_B) , kRWI_W , 0 , 10 , 1066), // #527
|
|
598
|
+
INST(Frintn_v , FSimdVV , (0b0001111000100100010000, kHF_A, 0b0000111000100001100010, kHF_B) , kRWI_W , 0 , 11 , 1073), // #528
|
|
599
|
+
INST(Frintp_v , FSimdVV , (0b0001111000100100110000, kHF_A, 0b0000111010100001100010, kHF_B) , kRWI_W , 0 , 12 , 1080), // #529
|
|
600
|
+
INST(Frintx_v , FSimdVV , (0b0001111000100111010000, kHF_A, 0b0010111000100001100110, kHF_B) , kRWI_W , 0 , 13 , 1087), // #530
|
|
601
|
+
INST(Frintz_v , FSimdVV , (0b0001111000100101110000, kHF_A, 0b0000111010100001100110, kHF_B) , kRWI_W , 0 , 14 , 1094), // #531
|
|
602
|
+
INST(Frsqrte_v , FSimdVV , (0b0111111010100001110110, kHF_B, 0b0010111010100001110110, kHF_B) , kRWI_W , 0 , 15 , 1101), // #532
|
|
603
|
+
INST(Frsqrts_v , FSimdVVV , (0b0101111010100000111111, kHF_C, 0b0000111010100000111111, kHF_C) , kRWI_W , 0 , 11 , 1109), // #533
|
|
604
|
+
INST(Fsqrt_v , FSimdVV , (0b0001111000100001110000, kHF_A, 0b0010111010100001111110, kHF_B) , kRWI_W , 0 , 16 , 1117), // #534
|
|
605
|
+
INST(Fsub_v , FSimdVVV , (0b0001111000100000001110, kHF_A, 0b0000111010100000110101, kHF_C) , kRWI_W , 0 , 12 , 1123), // #535
|
|
606
|
+
INST(Ins_v , SimdIns , (_) , kRWI_X , 0 , 0 , 1145), // #536
|
|
607
|
+
INST(Ld1_v , SimdLdNStN , (0b0000110101000000000000, 0b0000110001000000001000, 1, 0) , kRWI_LDn , F(Consecutive) , 0 , 1153), // #537
|
|
608
|
+
INST(Ld1r_v , SimdLdNStN , (0b0000110101000000110000, 0b0000000000000000000000, 1, 1) , kRWI_LDn , F(Consecutive) , 1 , 1157), // #538
|
|
609
|
+
INST(Ld2_v , SimdLdNStN , (0b0000110101100000000000, 0b0000110001000000100000, 2, 0) , kRWI_LDn , F(Consecutive) , 2 , 1162), // #539
|
|
610
|
+
INST(Ld2r_v , SimdLdNStN , (0b0000110101100000110000, 0b0000000000000000000000, 2, 1) , kRWI_LDn , F(Consecutive) , 3 , 1166), // #540
|
|
611
|
+
INST(Ld3_v , SimdLdNStN , (0b0000110101000000001000, 0b0000110001000000010000, 3, 0) , kRWI_LDn , F(Consecutive) , 4 , 1171), // #541
|
|
612
|
+
INST(Ld3r_v , SimdLdNStN , (0b0000110101000000111000, 0b0000000000000000000000, 3, 1) , kRWI_LDn , F(Consecutive) , 5 , 1175), // #542
|
|
613
|
+
INST(Ld4_v , SimdLdNStN , (0b0000110101100000001000, 0b0000110001000000000000, 4, 0) , kRWI_LDn , F(Consecutive) , 6 , 1180), // #543
|
|
614
|
+
INST(Ld4r_v , SimdLdNStN , (0b0000110101100000111000, 0b0000000000000000000000, 4, 1) , kRWI_LDn , F(Consecutive) , 7 , 1184), // #544
|
|
615
|
+
INST(Ldnp_v , SimdLdpStp , (0b0010110001, 0b0000000000) , kRWI_WW , 0 , 0 , 1537), // #545
|
|
616
|
+
INST(Ldp_v , SimdLdpStp , (0b0010110101, 0b0010110011) , kRWI_WW , 0 , 1 , 1542), // #546
|
|
617
|
+
INST(Ldr_v , SimdLdSt , (0b0011110101, 0b00111100010, 0b00111100011, 0b00011100, Inst::kIdLdur_v) , kRWI_W , 0 , 0 , 1552), // #547
|
|
618
|
+
INST(Ldur_v , SimdLdurStur , (0b0011110001000000000000) , kRWI_W , 0 , 0 , 2142), // #548
|
|
619
|
+
INST(Mla_v , ISimdVVVe , (0b0000111000100000100101, kVO_V_BHS, 0b0010111100000000000000, kVO_V_HS) , kRWI_X , F(VH0_15) , 0 , 246 ), // #549
|
|
620
|
+
INST(Mls_v , ISimdVVVe , (0b0010111000100000100101, kVO_V_BHS, 0b0010111100000000010000, kVO_V_HS) , kRWI_X , F(VH0_15) , 1 , 931 ), // #550
|
|
621
|
+
INST(Mov_v , SimdMov , (_) , kRWI_W , 0 , 0 , 949 ), // #551
|
|
622
|
+
INST(Movi_v , SimdMoviMvni , (0b0000111100000000000001, 0) , kRWI_W , 0 , 0 , 2221), // #552
|
|
623
|
+
INST(Mul_v , ISimdVVVe , (0b0000111000100000100111, kVO_V_BHS, 0b0000111100000000100000, kVO_V_HS) , kRWI_W , F(VH0_15) , 2 , 991 ), // #553
|
|
624
|
+
INST(Mvn_v , ISimdVV , (0b0010111000100000010110, kVO_V_B) , kRWI_W , 0 , 4 , 2249), // #554
|
|
625
|
+
INST(Mvni_v , SimdMoviMvni , (0b0000111100000000000001, 1) , kRWI_W , 0 , 1 , 2253), // #555
|
|
626
|
+
INST(Neg_v , ISimdVV , (0b0010111000100000101110, kVO_V_Any) , kRWI_W , 0 , 5 , 540 ), // #556
|
|
627
|
+
INST(Not_v , ISimdVV , (0b0010111000100000010110, kVO_V_B) , kRWI_W , 0 , 6 , 2276), // #557
|
|
628
|
+
INST(Orn_v , ISimdVVV , (0b0000111011100000000111, kVO_V_B) , kRWI_W , 0 , 9 , 2280), // #558
|
|
629
|
+
INST(Orr_v , SimdBicOrr , (0b0000111010100000000111, 0b0000111100000000000001) , kRWI_W , 0 , 1 , 2284), // #559
|
|
630
|
+
INST(Pmul_v , ISimdVVV , (0b0010111000100000100111, kVO_V_B) , kRWI_W , 0 , 10 , 2320), // #560
|
|
631
|
+
INST(Pmull_v , ISimdVVV , (0b0000111000100000111000, kVO_V_B8D1) , kRWI_W , F(Long) , 11 , 2325), // #561
|
|
632
|
+
INST(Pmull2_v , ISimdVVV , (0b0100111000100000111000, kVO_V_B16D2) , kRWI_W , F(Long) , 12 , 2331), // #562
|
|
633
|
+
INST(Raddhn_v , ISimdVVV , (0b0010111000100000010000, kVO_V_B8H4S2) , kRWI_W , F(Narrow) , 13 , 2344), // #563
|
|
634
|
+
INST(Raddhn2_v , ISimdVVV , (0b0110111000100000010000, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 14 , 2351), // #564
|
|
635
|
+
INST(Rax1_v , ISimdVVV , (0b1100111001100000100011, kVO_V_D2) , kRWI_W , 0 , 15 , 2359), // #565
|
|
636
|
+
INST(Rbit_v , ISimdVV , (0b0010111001100000010110, kVO_V_B) , kRWI_W , 0 , 7 , 2364), // #566
|
|
637
|
+
INST(Rev16_v , ISimdVV , (0b0000111000100000000110, kVO_V_B) , kRWI_W , 0 , 8 , 2373), // #567
|
|
638
|
+
INST(Rev32_v , ISimdVV , (0b0010111000100000000010, kVO_V_BH) , kRWI_W , 0 , 9 , 2379), // #568
|
|
639
|
+
INST(Rev64_v , ISimdVV , (0b0000111000100000000010, kVO_V_BHS) , kRWI_W , 0 , 10 , 2385), // #569
|
|
640
|
+
INST(Rshrn_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000100011, 1, kVO_V_B8H4S2) , kRWI_W , F(Narrow) , 0 , 2960), // #570
|
|
641
|
+
INST(Rshrn2_v , SimdShift , (0b0000000000000000000000, 0b0100111100000000100011, 1, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 1 , 2968), // #571
|
|
642
|
+
INST(Rsubhn_v , ISimdVVV , (0b0010111000100000011000, kVO_V_B8H4S2) , kRWI_W , F(Narrow) , 16 , 2400), // #572
|
|
643
|
+
INST(Rsubhn2_v , ISimdVVV , (0b0110111000100000011000, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 17 , 2407), // #573
|
|
644
|
+
INST(Saba_v , ISimdVVV , (0b0000111000100000011111, kVO_V_BHS) , kRWI_X , 0 , 18 , 2415), // #574
|
|
645
|
+
INST(Sabal_v , ISimdVVV , (0b0000111000100000010100, kVO_V_B8H4S2) , kRWI_X , F(Long) , 19 , 2420), // #575
|
|
646
|
+
INST(Sabal2_v , ISimdVVV , (0b0100111000100000010100, kVO_V_B16H8S4) , kRWI_X , F(Long) , 20 , 2426), // #576
|
|
647
|
+
INST(Sabd_v , ISimdVVV , (0b0000111000100000011101, kVO_V_BHS) , kRWI_W , 0 , 21 , 2433), // #577
|
|
648
|
+
INST(Sabdl_v , ISimdVVV , (0b0000111000100000011100, kVO_V_B8H4S2) , kRWI_W , F(Long) , 22 , 2438), // #578
|
|
649
|
+
INST(Sabdl2_v , ISimdVVV , (0b0100111000100000011100, kVO_V_B16H8S4) , kRWI_W , F(Long) , 23 , 2444), // #579
|
|
650
|
+
INST(Sadalp_v , ISimdVV , (0b0000111000100000011010, kVO_V_BHS) , kRWI_X , F(Long) | F(Pair) , 11 , 2451), // #580
|
|
651
|
+
INST(Saddl_v , ISimdVVV , (0b0000111000100000000000, kVO_V_B8H4S2) , kRWI_W , F(Long) , 24 , 2458), // #581
|
|
652
|
+
INST(Saddl2_v , ISimdVVV , (0b0100111000100000000000, kVO_V_B16H8S4) , kRWI_W , F(Long) , 25 , 2464), // #582
|
|
653
|
+
INST(Saddlp_v , ISimdVV , (0b0000111000100000001010, kVO_V_BHS) , kRWI_W , F(Long) | F(Pair) , 12 , 2471), // #583
|
|
654
|
+
INST(Saddlv_v , ISimdSV , (0b0000111000110000001110, kVO_V_BH_4S) , kRWI_W , F(Long) , 1 , 2478), // #584
|
|
655
|
+
INST(Saddw_v , ISimdWWV , (0b0000111000100000000100, kVO_V_B8H4S2) , kRWI_W , 0 , 0 , 2485), // #585
|
|
656
|
+
INST(Saddw2_v , ISimdWWV , (0b0000111000100000000100, kVO_V_B16H8S4) , kRWI_W , 0 , 1 , 2491), // #586
|
|
657
|
+
INST(Scvtf_v , SimdFcvtSV , (0b0000111000100001110110, 0b0000111100000000111001, 0b0001111000100010000000, 0) , kRWI_W , 0 , 10 , 2523), // #587
|
|
658
|
+
INST(Sdot_v , SimdDot , (0b0000111010000000100101, 0b0000111110000000111000, kET_S, kET_B, kET_4B) , kRWI_X , 0 , 1 , 4218), // #588
|
|
659
|
+
INST(Sha1c_v , ISimdVVVx , (0b0101111000000000000000, kOp_Q, kOp_S, kOp_V4S) , kRWI_X , 0 , 1 , 2556), // #589
|
|
660
|
+
INST(Sha1h_v , ISimdVVx , (0b0101111000101000000010, kOp_S, kOp_S) , kRWI_W , 0 , 8 , 2562), // #590
|
|
661
|
+
INST(Sha1m_v , ISimdVVVx , (0b0101111000000000001000, kOp_Q, kOp_S, kOp_V4S) , kRWI_X , 0 , 2 , 2568), // #591
|
|
662
|
+
INST(Sha1p_v , ISimdVVVx , (0b0101111000000000000100, kOp_Q, kOp_S, kOp_V4S) , kRWI_X , 0 , 3 , 2574), // #592
|
|
663
|
+
INST(Sha1su0_v , ISimdVVVx , (0b0101111000000000001100, kOp_V4S, kOp_V4S, kOp_V4S) , kRWI_X , 0 , 4 , 2580), // #593
|
|
664
|
+
INST(Sha1su1_v , ISimdVVx , (0b0101111000101000000110, kOp_V4S, kOp_V4S) , kRWI_X , 0 , 9 , 2588), // #594
|
|
665
|
+
INST(Sha256h_v , ISimdVVVx , (0b0101111000000000010000, kOp_Q, kOp_Q, kOp_V4S) , kRWI_X , 0 , 5 , 2596), // #595
|
|
666
|
+
INST(Sha256h2_v , ISimdVVVx , (0b0101111000000000010100, kOp_Q, kOp_Q, kOp_V4S) , kRWI_X , 0 , 6 , 2604), // #596
|
|
667
|
+
INST(Sha256su0_v , ISimdVVx , (0b0101111000101000001010, kOp_V4S, kOp_V4S) , kRWI_X , 0 , 10 , 2613), // #597
|
|
668
|
+
INST(Sha256su1_v , ISimdVVVx , (0b0101111000000000011000, kOp_V4S, kOp_V4S, kOp_V4S) , kRWI_X , 0 , 7 , 2623), // #598
|
|
669
|
+
INST(Sha512h_v , ISimdVVVx , (0b1100111001100000100000, kOp_Q, kOp_Q, kOp_V2D) , kRWI_X , 0 , 8 , 2633), // #599
|
|
670
|
+
INST(Sha512h2_v , ISimdVVVx , (0b1100111001100000100001, kOp_Q, kOp_Q, kOp_V2D) , kRWI_X , 0 , 9 , 2641), // #600
|
|
671
|
+
INST(Sha512su0_v , ISimdVVx , (0b1100111011000000100000, kOp_V2D, kOp_V2D) , kRWI_X , 0 , 11 , 2650), // #601
|
|
672
|
+
INST(Sha512su1_v , ISimdVVVx , (0b1100111001100000100010, kOp_V2D, kOp_V2D, kOp_V2D) , kRWI_X , 0 , 10 , 2660), // #602
|
|
673
|
+
INST(Shadd_v , ISimdVVV , (0b0000111000100000000001, kVO_V_BHS) , kRWI_W , 0 , 26 , 2670), // #603
|
|
674
|
+
INST(Shl_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000010101, 0, kVO_V_Any) , kRWI_W , 0 , 2 , 2954), // #604
|
|
675
|
+
INST(Shll_v , SimdShiftES , (0b0010111000100001001110, kVO_V_B8H4S2) , kRWI_W , F(Long) , 0 , 3108), // #605
|
|
676
|
+
INST(Shll2_v , SimdShiftES , (0b0110111000100001001110, kVO_V_B16H8S4) , kRWI_W , F(Long) , 1 , 3114), // #606
|
|
677
|
+
INST(Shrn_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000100001, 1, kVO_V_B8H4S2) , kRWI_W , F(Narrow) , 3 , 2961), // #607
|
|
678
|
+
INST(Shrn2_v , SimdShift , (0b0000000000000000000000, 0b0100111100000000100001, 1, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 4 , 2969), // #608
|
|
679
|
+
INST(Shsub_v , ISimdVVV , (0b0000111000100000001001, kVO_V_BHS) , kRWI_W , 0 , 27 , 2676), // #609
|
|
680
|
+
INST(Sli_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000010101, 0, kVO_V_Any) , kRWI_X , 0 , 5 , 2682), // #610
|
|
681
|
+
INST(Sm3partw1_v , ISimdVVVx , (0b1100111001100000110000, kOp_V4S, kOp_V4S, kOp_V4S) , kRWI_X , 0 , 11 , 2686), // #611
|
|
682
|
+
INST(Sm3partw2_v , ISimdVVVx , (0b1100111001100000110001, kOp_V4S, kOp_V4S, kOp_V4S) , kRWI_X , 0 , 12 , 2696), // #612
|
|
683
|
+
INST(Sm3ss1_v , ISimdVVVVx , (0b1100111001000000000000, kOp_V4S, kOp_V4S, kOp_V4S, kOp_V4S) , kRWI_W , 0 , 0 , 2706), // #613
|
|
684
|
+
INST(Sm3tt1a_v , SimdSm3tt , (0b1100111001000000100000) , kRWI_X , 0 , 0 , 2713), // #614
|
|
685
|
+
INST(Sm3tt1b_v , SimdSm3tt , (0b1100111001000000100001) , kRWI_X , 0 , 1 , 2721), // #615
|
|
686
|
+
INST(Sm3tt2a_v , SimdSm3tt , (0b1100111001000000100010) , kRWI_X , 0 , 2 , 2729), // #616
|
|
687
|
+
INST(Sm3tt2b_v , SimdSm3tt , (0b1100111001000000100011) , kRWI_X , 0 , 3 , 2737), // #617
|
|
688
|
+
INST(Sm4e_v , ISimdVVx , (0b1100111011000000100001, kOp_V4S, kOp_V4S) , kRWI_X , 0 , 12 , 2745), // #618
|
|
689
|
+
INST(Sm4ekey_v , ISimdVVVx , (0b1100111001100000110010, kOp_V4S, kOp_V4S, kOp_V4S) , kRWI_X , 0 , 13 , 2750), // #619
|
|
690
|
+
INST(Smax_v , ISimdVVV , (0b0000111000100000011001, kVO_V_BHS) , kRWI_W , 0 , 28 , 1690), // #620
|
|
691
|
+
INST(Smaxp_v , ISimdVVV , (0b0000111000100000101001, kVO_V_BHS) , kRWI_W , 0 , 29 , 2765), // #621
|
|
692
|
+
INST(Smaxv_v , ISimdSV , (0b0000111000110000101010, kVO_V_BH_4S) , kRWI_W , 0 , 2 , 2771), // #622
|
|
693
|
+
INST(Smin_v , ISimdVVV , (0b0000111000100000011011, kVO_V_BHS) , kRWI_W , 0 , 30 , 1794), // #623
|
|
694
|
+
INST(Sminp_v , ISimdVVV , (0b0000111000100000101011, kVO_V_BHS) , kRWI_W , 0 , 31 , 2777), // #624
|
|
695
|
+
INST(Sminv_v , ISimdSV , (0b0000111000110001101010, kVO_V_BH_4S) , kRWI_W , 0 , 3 , 2783), // #625
|
|
696
|
+
INST(Smlal_v , ISimdVVVe , (0b0000111000100000100000, kVO_V_B8H4S2, 0b0000111100000000001000, kVO_V_H4S2) , kRWI_X , F(Long) | F(VH0_15) , 3 , 2789), // #626
|
|
697
|
+
INST(Smlal2_v , ISimdVVVe , (0b0100111000100000100000, kVO_V_B16H8S4, 0b0100111100000000001000, kVO_V_H8S4) , kRWI_X , F(Long) | F(VH0_15) , 4 , 2795), // #627
|
|
698
|
+
INST(Smlsl_v , ISimdVVVe , (0b0000111000100000101000, kVO_V_B8H4S2, 0b0000111100000000011000, kVO_V_H4S2) , kRWI_X , F(Long) | F(VH0_15) , 5 , 2802), // #628
|
|
699
|
+
INST(Smlsl2_v , ISimdVVVe , (0b0100111000100000101000, kVO_V_B16H8S4, 0b0100111100000000011000, kVO_V_H8S4) , kRWI_X , F(Long) | F(VH0_15) , 6 , 2808), // #629
|
|
700
|
+
INST(Smmla_v , ISimdVVVx , (0b0100111010000000101001, kOp_V4S, kOp_V16B, kOp_V16B) , kRWI_X , 0 , 14 , 4247), // #630
|
|
701
|
+
INST(Smov_v , SimdSmovUmov , (0b0000111000000000001011, kVO_V_BHS, 1) , kRWI_W , 0 , 0 , 2822), // #631
|
|
702
|
+
INST(Smull_v , ISimdVVVe , (0b0000111000100000110000, kVO_V_B8H4S2, 0b0000111100000000101000, kVO_V_H4S2) , kRWI_W , F(Long) | F(VH0_15) , 7 , 2840), // #632
|
|
703
|
+
INST(Smull2_v , ISimdVVVe , (0b0100111000100000110000, kVO_V_B16H8S4, 0b0100111100000000101000, kVO_V_H8S4) , kRWI_W , F(Long) | F(VH0_15) , 8 , 2846), // #633
|
|
704
|
+
INST(Sqabs_v , ISimdVV , (0b0000111000100000011110, kVO_SV_Any) , kRWI_W , 0 , 13 , 2853), // #634
|
|
705
|
+
INST(Sqadd_v , ISimdVVV , (0b0000111000100000000011, kVO_SV_Any) , kRWI_W , 0 , 32 , 4254), // #635
|
|
706
|
+
INST(Sqdmlal_v , ISimdVVVe , (0b0000111000100000100100, kVO_SV_BHS, 0b0000111100000000001100, kVO_V_H4S2) , kRWI_X , F(Long) | F(VH0_15) , 9 , 2859), // #636
|
|
707
|
+
INST(Sqdmlal2_v , ISimdVVVe , (0b0100111000100000100100, kVO_V_B16H8S4, 0b0100111100000000001100, kVO_V_H8S4) , kRWI_X , F(Long) | F(VH0_15) , 10 , 2867), // #637
|
|
708
|
+
INST(Sqdmlsl_v , ISimdVVVe , (0b0000111000100000101100, kVO_SV_BHS, 0b0000111100000000011100, kVO_V_H4S2) , kRWI_X , F(Long) | F(VH0_15) , 11 , 2876), // #638
|
|
709
|
+
INST(Sqdmlsl2_v , ISimdVVVe , (0b0100111000100000101100, kVO_V_B16H8S4, 0b0100111100000000011100, kVO_V_H8S4) , kRWI_X , F(Long) | F(VH0_15) , 12 , 2884), // #639
|
|
710
|
+
INST(Sqdmulh_v , ISimdVVVe , (0b0000111000100000101101, kVO_SV_HS, 0b0000111100000000110000, kVO_SV_HS) , kRWI_W , F(VH0_15) , 13 , 2893), // #640
|
|
711
|
+
INST(Sqdmull_v , ISimdVVVe , (0b0000111000100000110100, kVO_SV_BHS, 0b0000111100000000101100, kVO_V_H4S2) , kRWI_W , F(Long) | F(VH0_15) , 14 , 2901), // #641
|
|
712
|
+
INST(Sqdmull2_v , ISimdVVVe , (0b0100111000100000110100, kVO_V_B16H8S4, 0b0100111100000000101100, kVO_V_H8S4) , kRWI_W , F(Long) | F(VH0_15) , 15 , 2909), // #642
|
|
713
|
+
INST(Sqneg_v , ISimdVV , (0b0010111000100000011110, kVO_SV_Any) , kRWI_W , 0 , 14 , 2918), // #643
|
|
714
|
+
INST(Sqrdmlah_v , ISimdVVVe , (0b0010111000000000100001, kVO_SV_HS, 0b0010111100000000110100, kVO_SV_HS) , kRWI_X , F(VH0_15) , 16 , 2924), // #644
|
|
715
|
+
INST(Sqrdmlsh_v , ISimdVVVe , (0b0010111000000000100011, kVO_SV_HS, 0b0010111100000000111100, kVO_SV_HS) , kRWI_X , F(VH0_15) , 17 , 2933), // #645
|
|
716
|
+
INST(Sqrdmulh_v , ISimdVVVe , (0b0010111000100000101101, kVO_SV_HS, 0b0000111100000000110100, kVO_SV_HS) , kRWI_W , F(VH0_15) , 18 , 2942), // #646
|
|
717
|
+
INST(Sqrshl_v , SimdShift , (0b0000111000100000010111, 0b0000000000000000000000, 1, kVO_SV_Any) , kRWI_W , 0 , 6 , 2951), // #647
|
|
718
|
+
INST(Sqrshrn_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000100111, 1, kVO_SV_B8H4S2) , kRWI_W , F(Narrow) , 7 , 2958), // #648
|
|
719
|
+
INST(Sqrshrn2_v , SimdShift , (0b0000000000000000000000, 0b0100111100000000100111, 1, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 8 , 2966), // #649
|
|
720
|
+
INST(Sqrshrun_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000100011, 1, kVO_SV_B8H4S2) , kRWI_W , F(Narrow) , 9 , 2975), // #650
|
|
721
|
+
INST(Sqrshrun2_v , SimdShift , (0b0000000000000000000000, 0b0110111100000000100011, 1, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 10 , 2984), // #651
|
|
722
|
+
INST(Sqshl_v , SimdShift , (0b0000111000100000010011, 0b0000111100000000011101, 0, kVO_SV_Any) , kRWI_W , 0 , 11 , 2994), // #652
|
|
723
|
+
INST(Sqshlu_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000011001, 0, kVO_SV_Any) , kRWI_W , 0 , 12 , 3000), // #653
|
|
724
|
+
INST(Sqshrn_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000100101, 1, kVO_SV_B8H4S2) , kRWI_W , F(Narrow) , 13 , 3007), // #654
|
|
725
|
+
INST(Sqshrn2_v , SimdShift , (0b0000000000000000000000, 0b0100111100000000100101, 1, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 14 , 3014), // #655
|
|
726
|
+
INST(Sqshrun_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000100001, 1, kVO_SV_B8H4S2) , kRWI_W , F(Narrow) , 15 , 3022), // #656
|
|
727
|
+
INST(Sqshrun2_v , SimdShift , (0b0000000000000000000000, 0b0110111100000000100001, 1, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 16 , 3030), // #657
|
|
728
|
+
INST(Sqsub_v , ISimdVVV , (0b0000111000100000001011, kVO_SV_Any) , kRWI_W , 0 , 33 , 3039), // #658
|
|
729
|
+
INST(Sqxtn_v , ISimdVV , (0b0000111000100001010010, kVO_SV_B8H4S2) , kRWI_W , F(Narrow) , 15 , 3045), // #659
|
|
730
|
+
INST(Sqxtn2_v , ISimdVV , (0b0100111000100001010010, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 16 , 3051), // #660
|
|
731
|
+
INST(Sqxtun_v , ISimdVV , (0b0010111000100001001010, kVO_SV_B8H4S2) , kRWI_W , F(Narrow) , 17 , 3058), // #661
|
|
732
|
+
INST(Sqxtun2_v , ISimdVV , (0b0110111000100001001010, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 18 , 3065), // #662
|
|
733
|
+
INST(Srhadd_v , ISimdVVV , (0b0000111000100000000101, kVO_V_BHS) , kRWI_W , 0 , 34 , 3073), // #663
|
|
734
|
+
INST(Sri_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000010001, 1, kVO_V_Any) , kRWI_W , 0 , 17 , 3080), // #664
|
|
735
|
+
INST(Srshl_v , SimdShift , (0b0000111000100000010101, 0b0000000000000000000000, 0, kVO_V_Any) , kRWI_W , 0 , 18 , 3084), // #665
|
|
736
|
+
INST(Srshr_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000001001, 1, kVO_V_Any) , kRWI_W , 0 , 19 , 3090), // #666
|
|
737
|
+
INST(Srsra_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000001101, 1, kVO_V_Any) , kRWI_X , 0 , 20 , 3096), // #667
|
|
738
|
+
INST(Sshl_v , SimdShift , (0b0000111000100000010001, 0b0000000000000000000000, 0, kVO_V_Any) , kRWI_W , 0 , 21 , 3102), // #668
|
|
739
|
+
INST(Sshll_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000101001, 0, kVO_V_B8H4S2) , kRWI_W , F(Long) , 22 , 3107), // #669
|
|
740
|
+
INST(Sshll2_v , SimdShift , (0b0000000000000000000000, 0b0100111100000000101001, 0, kVO_V_B16H8S4) , kRWI_W , F(Long) , 23 , 3113), // #670
|
|
741
|
+
INST(Sshr_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000000001, 1, kVO_V_Any) , kRWI_W , 0 , 24 , 3120), // #671
|
|
742
|
+
INST(Ssra_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000000101, 1, kVO_V_Any) , kRWI_X , 0 , 25 , 3125), // #672
|
|
743
|
+
INST(Ssubl_v , ISimdVVV , (0b0000111000100000001000, kVO_V_B8H4S2) , kRWI_W , F(Long) , 35 , 3130), // #673
|
|
744
|
+
INST(Ssubl2_v , ISimdVVV , (0b0100111000100000001000, kVO_V_B16H8S4) , kRWI_W , F(Long) , 36 , 3136), // #674
|
|
745
|
+
INST(Ssubw_v , ISimdWWV , (0b0000111000100000001100, kVO_V_B8H4S2) , kRWI_W , 0 , 2 , 3143), // #675
|
|
746
|
+
INST(Ssubw2_v , ISimdWWV , (0b0000111000100000001100, kVO_V_B16H8S4) , kRWI_X , 0 , 3 , 3149), // #676
|
|
747
|
+
INST(St1_v , SimdLdNStN , (0b0000110100000000000000, 0b0000110000000000001000, 1, 0) , kRWI_STn , F(Consecutive) , 8 , 3156), // #677
|
|
748
|
+
INST(St2_v , SimdLdNStN , (0b0000110100100000000000, 0b0000110000000000100000, 2, 0) , kRWI_STn , F(Consecutive) , 9 , 3160), // #678
|
|
749
|
+
INST(St3_v , SimdLdNStN , (0b0000110100000000001000, 0b0000110000000000010000, 3, 0) , kRWI_STn , F(Consecutive) , 10 , 3169), // #679
|
|
750
|
+
INST(St4_v , SimdLdNStN , (0b0000110100100000001000, 0b0000110000000000000000, 4, 0) , kRWI_STn , F(Consecutive) , 11 , 3173), // #680
|
|
751
|
+
INST(Stnp_v , SimdLdpStp , (0b0010110000, 0b0000000000) , kRWI_RRW , 0 , 2 , 3383), // #681
|
|
752
|
+
INST(Stp_v , SimdLdpStp , (0b0010110100, 0b0010110010) , kRWI_RRW , 0 , 3 , 3388), // #682
|
|
753
|
+
INST(Str_v , SimdLdSt , (0b0011110100, 0b00111100000, 0b00111100001, 0b00000000, Inst::kIdStur_v) , kRWI_RW , 0 , 1 , 3392), // #683
|
|
754
|
+
INST(Stur_v , SimdLdurStur , (0b0011110000000000000000) , kRWI_RW , 0 , 1 , 3662), // #684
|
|
755
|
+
INST(Sub_v , ISimdVVV , (0b0010111000100000100001, kVO_V_Any) , kRWI_W , 0 , 37 , 985 ), // #685
|
|
756
|
+
INST(Subhn_v , ISimdVVV , (0b0000111000100000011000, kVO_V_B8H4S2) , kRWI_W , F(Narrow) , 38 , 2401), // #686
|
|
757
|
+
INST(Subhn2_v , ISimdVVV , (0b0000111000100000011000, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 39 , 2408), // #687
|
|
758
|
+
INST(Sudot_v , SimdDot , (0b0000000000000000000000, 0b0000111100000000111100, kET_S, kET_B, kET_4B) , kRWI_X , 0 , 2 , 3739), // #688
|
|
759
|
+
INST(Suqadd_v , ISimdVV , (0b0000111000100000001110, kVO_SV_Any) , kRWI_X , 0 , 19 , 3745), // #689
|
|
760
|
+
INST(Sxtl_v , SimdSxtlUxtl , (0b0000111100000000101001, kVO_V_B8H4S2) , kRWI_W , F(Long) , 0 , 3834), // #690
|
|
761
|
+
INST(Sxtl2_v , SimdSxtlUxtl , (0b0100111100000000101001, kVO_V_B16H8S4) , kRWI_W , F(Long) , 1 , 3839), // #691
|
|
762
|
+
INST(Tbl_v , SimdTblTbx , (0b0000111000000000000000) , kRWI_W , 0 , 0 , 3854), // #692
|
|
763
|
+
INST(Tbx_v , SimdTblTbx , (0b0000111000000000000100) , kRWI_W , 0 , 1 , 3863), // #693
|
|
764
|
+
INST(Trn1_v , ISimdVVV , (0b0000111000000000001010, kVO_V_BHS_D2) , kRWI_W , 0 , 40 , 3876), // #694
|
|
765
|
+
INST(Trn2_v , ISimdVVV , (0b0000111000000000011010, kVO_V_BHS_D2) , kRWI_W , 0 , 41 , 3881), // #695
|
|
766
|
+
INST(Uaba_v , ISimdVVV , (0b0010111000100000011111, kVO_V_BHS) , kRWI_X , 0 , 42 , 3886), // #696
|
|
767
|
+
INST(Uabal_v , ISimdVVV , (0b0010111000100000010100, kVO_V_B8H4S2) , kRWI_X , F(Long) , 43 , 3891), // #697
|
|
768
|
+
INST(Uabal2_v , ISimdVVV , (0b0110111000100000010100, kVO_V_B16H8S4) , kRWI_X , F(Long) , 44 , 3897), // #698
|
|
769
|
+
INST(Uabd_v , ISimdVVV , (0b0010111000100000011101, kVO_V_BHS) , kRWI_W , 0 , 45 , 3904), // #699
|
|
770
|
+
INST(Uabdl_v , ISimdVVV , (0b0010111000100000011100, kVO_V_B8H4S2) , kRWI_W , F(Long) , 46 , 3909), // #700
|
|
771
|
+
INST(Uabdl2_v , ISimdVVV , (0b0110111000100000011100, kVO_V_B16H8S4) , kRWI_W , F(Long) , 47 , 3915), // #701
|
|
772
|
+
INST(Uadalp_v , ISimdVV , (0b0010111000100000011010, kVO_V_BHS) , kRWI_X , F(Long) | F(Pair) , 20 , 3922), // #702
|
|
773
|
+
INST(Uaddl_v , ISimdVVV , (0b0010111000100000000000, kVO_V_B8H4S2) , kRWI_W , F(Long) , 48 , 3929), // #703
|
|
774
|
+
INST(Uaddl2_v , ISimdVVV , (0b0110111000100000000000, kVO_V_B16H8S4) , kRWI_W , F(Long) , 49 , 3935), // #704
|
|
775
|
+
INST(Uaddlp_v , ISimdVV , (0b0010111000100000001010, kVO_V_BHS) , kRWI_W , F(Long) | F(Pair) , 21 , 3942), // #705
|
|
776
|
+
INST(Uaddlv_v , ISimdSV , (0b0010111000110000001110, kVO_V_BH_4S) , kRWI_W , F(Long) , 4 , 3949), // #706
|
|
777
|
+
INST(Uaddw_v , ISimdWWV , (0b0010111000100000000100, kVO_V_B8H4S2) , kRWI_W , 0 , 4 , 3956), // #707
|
|
778
|
+
INST(Uaddw2_v , ISimdWWV , (0b0010111000100000000100, kVO_V_B16H8S4) , kRWI_W , 0 , 5 , 3962), // #708
|
|
779
|
+
INST(Ucvtf_v , SimdFcvtSV , (0b0010111000100001110110, 0b0010111100000000111001, 0b0001111000100011000000, 0) , kRWI_W , 0 , 11 , 3985), // #709
|
|
780
|
+
INST(Udot_v , SimdDot , (0b0010111010000000100101, 0b0010111110000000111000, kET_S, kET_B, kET_4B) , kRWI_X , 0 , 3 , 3740), // #710
|
|
781
|
+
INST(Uhadd_v , ISimdVVV , (0b0010111000100000000001, kVO_V_BHS) , kRWI_W , 0 , 50 , 4000), // #711
|
|
782
|
+
INST(Uhsub_v , ISimdVVV , (0b0010111000100000001001, kVO_V_BHS) , kRWI_W , 0 , 51 , 4006), // #712
|
|
783
|
+
INST(Umax_v , ISimdVVV , (0b0010111000100000011001, kVO_V_BHS) , kRWI_W , 0 , 52 , 1936), // #713
|
|
784
|
+
INST(Umaxp_v , ISimdVVV , (0b0010111000100000101001, kVO_V_BHS) , kRWI_W , 0 , 53 , 4019), // #714
|
|
785
|
+
INST(Umaxv_v , ISimdSV , (0b0010111000110000101010, kVO_V_BH_4S) , kRWI_W , 0 , 5 , 4025), // #715
|
|
786
|
+
INST(Umin_v , ISimdVVV , (0b0010111000100000011011, kVO_V_BHS) , kRWI_W , 0 , 54 , 2040), // #716
|
|
787
|
+
INST(Uminp_v , ISimdVVV , (0b0010111000100000101011, kVO_V_BHS) , kRWI_W , 0 , 55 , 4031), // #717
|
|
788
|
+
INST(Uminv_v , ISimdSV , (0b0010111000110001101010, kVO_V_BH_4S) , kRWI_W , 0 , 6 , 4037), // #718
|
|
789
|
+
INST(Umlal_v , ISimdVVVe , (0b0010111000100000100000, kVO_V_B8H4S2, 0b0010111100000000001000, kVO_V_H4S2) , kRWI_X , F(Long) | F(VH0_15) , 19 , 4043), // #719
|
|
790
|
+
INST(Umlal2_v , ISimdVVVe , (0b0110111000100000100000, kVO_V_B16H8S4, 0b0010111100000000001000, kVO_V_H8S4) , kRWI_X , F(Long) | F(VH0_15) , 20 , 4049), // #720
|
|
791
|
+
INST(Umlsl_v , ISimdVVVe , (0b0010111000100000101000, kVO_V_B8H4S2, 0b0010111100000000011000, kVO_V_H4S2) , kRWI_X , F(Long) | F(VH0_15) , 21 , 4056), // #721
|
|
792
|
+
INST(Umlsl2_v , ISimdVVVe , (0b0110111000100000101000, kVO_V_B16H8S4, 0b0110111100000000011000, kVO_V_H8S4) , kRWI_X , F(Long) | F(VH0_15) , 22 , 4062), // #722
|
|
793
|
+
INST(Ummla_v , ISimdVVVx , (0b0110111010000000101001, kOp_V4S, kOp_V16B, kOp_V16B) , kRWI_X , 0 , 15 , 4069), // #723
|
|
794
|
+
INST(Umov_v , SimdSmovUmov , (0b0000111000000000001111, kVO_V_Any, 0) , kRWI_W , 0 , 1 , 4082), // #724
|
|
795
|
+
INST(Umull_v , ISimdVVVe , (0b0010111000100000110000, kVO_V_B8H4S2, 0b0010111100000000101000, kVO_V_H4S2) , kRWI_W , F(Long) | F(VH0_15) , 23 , 4100), // #725
|
|
796
|
+
INST(Umull2_v , ISimdVVVe , (0b0110111000100000110000, kVO_V_B16H8S4, 0b0110111100000000101000, kVO_V_H8S4) , kRWI_W , F(Long) | F(VH0_15) , 24 , 4106), // #726
|
|
797
|
+
INST(Uqadd_v , ISimdVVV , (0b0010111000100000000011, kVO_SV_Any) , kRWI_W , 0 , 56 , 3746), // #727
|
|
798
|
+
INST(Uqrshl_v , SimdShift , (0b0010111000100000010111, 0b0000000000000000000000, 0, kVO_SV_Any) , kRWI_W , 0 , 26 , 4113), // #728
|
|
799
|
+
INST(Uqrshrn_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000100111, 1, kVO_SV_B8H4S2) , kRWI_W , F(Narrow) , 27 , 4120), // #729
|
|
800
|
+
INST(Uqrshrn2_v , SimdShift , (0b0000000000000000000000, 0b0110111100000000100111, 1, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 28 , 4128), // #730
|
|
801
|
+
INST(Uqshl_v , SimdShift , (0b0010111000100000010011, 0b0010111100000000011101, 0, kVO_SV_Any) , kRWI_W , 0 , 29 , 4137), // #731
|
|
802
|
+
INST(Uqshrn_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000100101, 1, kVO_SV_B8H4S2) , kRWI_W , F(Narrow) , 30 , 4143), // #732
|
|
803
|
+
INST(Uqshrn2_v , SimdShift , (0b0000000000000000000000, 0b0110111100000000100101, 1, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 31 , 4150), // #733
|
|
804
|
+
INST(Uqsub_v , ISimdVVV , (0b0010111000100000001011, kVO_SV_Any) , kRWI_W , 0 , 57 , 4158), // #734
|
|
805
|
+
INST(Uqxtn_v , ISimdVV , (0b0010111000100001010010, kVO_SV_B8H4S2) , kRWI_W , F(Narrow) , 22 , 4164), // #735
|
|
806
|
+
INST(Uqxtn2_v , ISimdVV , (0b0110111000100001010010, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 23 , 4170), // #736
|
|
807
|
+
INST(Urecpe_v , ISimdVV , (0b0000111010100001110010, kVO_V_S) , kRWI_W , 0 , 24 , 4177), // #737
|
|
808
|
+
INST(Urhadd_v , ISimdVVV , (0b0010111000100000000101, kVO_V_BHS) , kRWI_W , 0 , 58 , 4184), // #738
|
|
809
|
+
INST(Urshl_v , SimdShift , (0b0010111000100000010101, 0b0000000000000000000000, 0, kVO_V_Any) , kRWI_W , 0 , 32 , 4191), // #739
|
|
810
|
+
INST(Urshr_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000001001, 1, kVO_V_Any) , kRWI_W , 0 , 33 , 4197), // #740
|
|
811
|
+
INST(Ursqrte_v , ISimdVV , (0b0010111010100001110010, kVO_V_S) , kRWI_W , 0 , 25 , 4203), // #741
|
|
812
|
+
INST(Ursra_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000001101, 1, kVO_V_Any) , kRWI_X , 0 , 34 , 4211), // #742
|
|
813
|
+
INST(Usdot_v , SimdDot , (0b0000111010000000100111, 0b0000111110000000111100, kET_S, kET_B, kET_4B) , kRWI_X , 0 , 4 , 4217), // #743
|
|
814
|
+
INST(Ushl_v , SimdShift , (0b0010111000100000010001, 0b0000000000000000000000, 0, kVO_V_Any) , kRWI_W , 0 , 35 , 4223), // #744
|
|
815
|
+
INST(Ushll_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000101001, 0, kVO_V_B8H4S2) , kRWI_W , F(Long) , 36 , 4228), // #745
|
|
816
|
+
INST(Ushll2_v , SimdShift , (0b0000000000000000000000, 0b0110111100000000101001, 0, kVO_V_B16H8S4) , kRWI_W , F(Long) , 37 , 4234), // #746
|
|
817
|
+
INST(Ushr_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000000001, 1, kVO_V_Any) , kRWI_W , 0 , 38 , 4241), // #747
|
|
818
|
+
INST(Usmmla_v , ISimdVVVx , (0b0100111010000000101011, kOp_V4S, kOp_V16B, kOp_V16B) , kRWI_X , 0 , 16 , 4246), // #748
|
|
819
|
+
INST(Usqadd_v , ISimdVV , (0b0010111000100000001110, kVO_SV_Any) , kRWI_X , 0 , 26 , 4253), // #749
|
|
820
|
+
INST(Usra_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000000101, 1, kVO_V_Any) , kRWI_X , 0 , 39 , 4260), // #750
|
|
821
|
+
INST(Usubl_v , ISimdVVV , (0b0010111000100000001000, kVO_V_B8H4S2) , kRWI_W , F(Long) , 59 , 4265), // #751
|
|
822
|
+
INST(Usubl2_v , ISimdVVV , (0b0110111000100000001000, kVO_V_B16H8S4) , kRWI_W , F(Long) , 60 , 4271), // #752
|
|
823
|
+
INST(Usubw_v , ISimdWWV , (0b0010111000100000001100, kVO_V_B8H4S2) , kRWI_W , 0 , 6 , 4278), // #753
|
|
824
|
+
INST(Usubw2_v , ISimdWWV , (0b0010111000100000001100, kVO_V_B16H8S4) , kRWI_W , 0 , 7 , 4284), // #754
|
|
825
|
+
INST(Uxtl_v , SimdSxtlUxtl , (0b0010111100000000101001, kVO_V_B8H4S2) , kRWI_W , F(Long) , 2 , 4301), // #755
|
|
826
|
+
INST(Uxtl2_v , SimdSxtlUxtl , (0b0110111100000000101001, kVO_V_B16H8S4) , kRWI_W , F(Long) , 3 , 4306), // #756
|
|
827
|
+
INST(Uzp1_v , ISimdVVV , (0b0000111000000000000110, kVO_V_BHS_D2) , kRWI_W , 0 , 61 , 4312), // #757
|
|
828
|
+
INST(Uzp2_v , ISimdVVV , (0b0000111000000000010110, kVO_V_BHS_D2) , kRWI_W , 0 , 62 , 4317), // #758
|
|
829
|
+
INST(Xar_v , ISimdVVVI , (0b1100111001100000100011, kVO_V_D2, 6, 10, 0) , kRWI_W , 0 , 1 , 4337), // #759
|
|
830
|
+
INST(Xtn_v , ISimdVV , (0b0000111000100001001010, kVO_V_B8H4S2) , kRWI_W , F(Narrow) , 27 , 3047), // #760
|
|
831
|
+
INST(Xtn2_v , ISimdVV , (0b0100111000100001001010, kVO_V_B16H8S4) , kRWI_X , F(Narrow) , 28 , 3053), // #761
|
|
832
|
+
INST(Zip1_v , ISimdVVV , (0b0000111000000000001110, kVO_V_BHS_D2) , kRWI_W , 0 , 63 , 4367), // #762
|
|
833
|
+
INST(Zip2_v , ISimdVVV , (0b0000111000000000011110, kVO_V_BHS_D2) , kRWI_W , 0 , 64 , 4372) // #763
|
|
834
|
+
// ${InstInfo:End}
|
|
835
|
+
};
|
|
836
|
+
|
|
837
|
+
#undef F
|
|
838
|
+
#undef INST
|
|
839
|
+
#undef NAME_DATA_INDEX
|
|
840
|
+
|
|
841
|
+
namespace EncodingData {
|
|
842
|
+
|
|
843
|
+
// ${EncodingData:Begin}
|
|
844
|
+
// ------------------- Automatically generated, do not edit -------------------
|
|
845
|
+
const BaseAddSub baseAddSub[4] = {
|
|
846
|
+
{ 0b0001011000, 0b0001011001, 0b0010001 }, // add
|
|
847
|
+
{ 0b0101011000, 0b0101011001, 0b0110001 }, // adds
|
|
848
|
+
{ 0b1001011000, 0b1001011001, 0b1010001 }, // sub
|
|
849
|
+
{ 0b1101011000, 0b1101011001, 0b1110001 } // subs
|
|
850
|
+
};
|
|
851
|
+
|
|
852
|
+
const BaseAdr baseAdr[2] = {
|
|
853
|
+
{ 0b0001000000000000000000, OffsetType::kAArch64_ADR }, // adr
|
|
854
|
+
{ 0b1001000000000000000000, OffsetType::kAArch64_ADRP } // adrp
|
|
855
|
+
};
|
|
856
|
+
|
|
857
|
+
const BaseAtDcIcTlbi baseAtDcIcTlbi[4] = {
|
|
858
|
+
{ 0b00011111110000, 0b00001111000000, true }, // at
|
|
859
|
+
{ 0b00011110000000, 0b00001110000000, true }, // dc
|
|
860
|
+
{ 0b00011110000000, 0b00001110000000, false }, // ic
|
|
861
|
+
{ 0b00011110000000, 0b00010000000000, false } // tlbi
|
|
862
|
+
};
|
|
863
|
+
|
|
864
|
+
const BaseAtomicCasp baseAtomicCasp[4] = {
|
|
865
|
+
{ 0b0000100000100000011111, kWX, 30 }, // casp
|
|
866
|
+
{ 0b0000100001100000011111, kWX, 30 }, // caspa
|
|
867
|
+
{ 0b0000100001100000111111, kWX, 30 }, // caspal
|
|
868
|
+
{ 0b0000100000100000111111, kWX, 30 } // caspl
|
|
869
|
+
};
|
|
870
|
+
|
|
871
|
+
const BaseAtomicOp baseAtomicOp[123] = {
|
|
872
|
+
{ 0b1000100010100000011111, kWX, 30, 0 }, // cas
|
|
873
|
+
{ 0b1000100011100000011111, kWX, 30, 1 }, // casa
|
|
874
|
+
{ 0b0000100011100000011111, kW , 0 , 1 }, // casab
|
|
875
|
+
{ 0b0100100011100000011111, kW , 0 , 1 }, // casah
|
|
876
|
+
{ 0b1000100011100000111111, kWX, 30, 1 }, // casal
|
|
877
|
+
{ 0b0000100011100000111111, kW , 0 , 1 }, // casalb
|
|
878
|
+
{ 0b0100100011100000111111, kW , 0 , 1 }, // casalh
|
|
879
|
+
{ 0b0000100010100000011111, kW , 0 , 0 }, // casb
|
|
880
|
+
{ 0b0100100010100000011111, kW , 0 , 0 }, // cash
|
|
881
|
+
{ 0b1000100010100000111111, kWX, 30, 0 }, // casl
|
|
882
|
+
{ 0b0000100010100000111111, kW , 0 , 0 }, // caslb
|
|
883
|
+
{ 0b0100100010100000111111, kW , 0 , 0 }, // caslh
|
|
884
|
+
{ 0b1011100000100000000000, kWX, 30, 0 }, // ldadd
|
|
885
|
+
{ 0b1011100010100000000000, kWX, 30, 1 }, // ldadda
|
|
886
|
+
{ 0b0011100010100000000000, kW , 0 , 1 }, // ldaddab
|
|
887
|
+
{ 0b0111100010100000000000, kW , 0 , 1 }, // ldaddah
|
|
888
|
+
{ 0b1011100011100000000000, kWX, 30, 1 }, // ldaddal
|
|
889
|
+
{ 0b0011100011100000000000, kW , 0 , 1 }, // ldaddalb
|
|
890
|
+
{ 0b0111100011100000000000, kW , 0 , 1 }, // ldaddalh
|
|
891
|
+
{ 0b0011100000100000000000, kW , 0 , 0 }, // ldaddb
|
|
892
|
+
{ 0b0111100000100000000000, kW , 0 , 0 }, // ldaddh
|
|
893
|
+
{ 0b1011100001100000000000, kWX, 30, 0 }, // ldaddl
|
|
894
|
+
{ 0b0011100001100000000000, kW , 0 , 0 }, // ldaddlb
|
|
895
|
+
{ 0b0111100001100000000000, kW , 0 , 0 }, // ldaddlh
|
|
896
|
+
{ 0b1011100000100000000100, kWX, 30, 0 }, // ldclr
|
|
897
|
+
{ 0b1011100010100000000100, kWX, 30, 1 }, // ldclra
|
|
898
|
+
{ 0b0011100010100000000100, kW , 0 , 1 }, // ldclrab
|
|
899
|
+
{ 0b0111100010100000000100, kW , 0 , 1 }, // ldclrah
|
|
900
|
+
{ 0b1011100011100000000100, kWX, 30, 1 }, // ldclral
|
|
901
|
+
{ 0b0011100011100000000100, kW , 0 , 1 }, // ldclralb
|
|
902
|
+
{ 0b0111100011100000000100, kW , 0 , 1 }, // ldclralh
|
|
903
|
+
{ 0b0011100000100000000100, kW , 0 , 0 }, // ldclrb
|
|
904
|
+
{ 0b0111100000100000000100, kW , 0 , 0 }, // ldclrh
|
|
905
|
+
{ 0b1011100001100000000100, kWX, 30, 0 }, // ldclrl
|
|
906
|
+
{ 0b0011100001100000000100, kW , 0 , 0 }, // ldclrlb
|
|
907
|
+
{ 0b0111100001100000000100, kW , 0 , 0 }, // ldclrlh
|
|
908
|
+
{ 0b1011100000100000001000, kWX, 30, 0 }, // ldeor
|
|
909
|
+
{ 0b1011100010100000001000, kWX, 30, 1 }, // ldeora
|
|
910
|
+
{ 0b0011100010100000001000, kW , 0 , 1 }, // ldeorab
|
|
911
|
+
{ 0b0111100010100000001000, kW , 0 , 1 }, // ldeorah
|
|
912
|
+
{ 0b1011100011100000001000, kWX, 30, 1 }, // ldeoral
|
|
913
|
+
{ 0b0011100011100000001000, kW , 0 , 1 }, // ldeoralb
|
|
914
|
+
{ 0b0111100011100000001000, kW , 0 , 1 }, // ldeoralh
|
|
915
|
+
{ 0b0011100000100000001000, kW , 0 , 0 }, // ldeorb
|
|
916
|
+
{ 0b0111100000100000001000, kW , 0 , 0 }, // ldeorh
|
|
917
|
+
{ 0b1011100001100000001000, kWX, 30, 0 }, // ldeorl
|
|
918
|
+
{ 0b0011100001100000001000, kW , 0 , 0 }, // ldeorlb
|
|
919
|
+
{ 0b0111100001100000001000, kW , 0 , 0 }, // ldeorlh
|
|
920
|
+
{ 0b1011100000100000001100, kWX, 30, 0 }, // ldset
|
|
921
|
+
{ 0b1011100010100000001100, kWX, 30, 1 }, // ldseta
|
|
922
|
+
{ 0b0011100010100000001100, kW , 0 , 1 }, // ldsetab
|
|
923
|
+
{ 0b0111100010100000001100, kW , 0 , 1 }, // ldsetah
|
|
924
|
+
{ 0b1011100011100000001100, kWX, 30, 1 }, // ldsetal
|
|
925
|
+
{ 0b0011100011100000001100, kW , 0 , 1 }, // ldsetalb
|
|
926
|
+
{ 0b0111100011100000001100, kW , 0 , 1 }, // ldsetalh
|
|
927
|
+
{ 0b0011100000100000001100, kW , 0 , 0 }, // ldsetb
|
|
928
|
+
{ 0b0111100000100000001100, kW , 0 , 0 }, // ldseth
|
|
929
|
+
{ 0b1011100001100000001100, kWX, 30, 0 }, // ldsetl
|
|
930
|
+
{ 0b0011100001100000001100, kW , 0 , 0 }, // ldsetlb
|
|
931
|
+
{ 0b0111100001100000001100, kW , 0 , 0 }, // ldsetlh
|
|
932
|
+
{ 0b1011100000100000010000, kWX, 30, 0 }, // ldsmax
|
|
933
|
+
{ 0b1011100010100000010000, kWX, 30, 1 }, // ldsmaxa
|
|
934
|
+
{ 0b0011100010100000010000, kW , 0 , 1 }, // ldsmaxab
|
|
935
|
+
{ 0b0111100010100000010000, kW , 0 , 1 }, // ldsmaxah
|
|
936
|
+
{ 0b1011100011100000010000, kWX, 30, 1 }, // ldsmaxal
|
|
937
|
+
{ 0b0011100011100000010000, kW , 0 , 1 }, // ldsmaxalb
|
|
938
|
+
{ 0b0111100011100000010000, kW , 0 , 1 }, // ldsmaxalh
|
|
939
|
+
{ 0b0011100000100000010000, kW , 0 , 0 }, // ldsmaxb
|
|
940
|
+
{ 0b0111100000100000010000, kW , 0 , 0 }, // ldsmaxh
|
|
941
|
+
{ 0b1011100001100000010000, kWX, 30, 0 }, // ldsmaxl
|
|
942
|
+
{ 0b0011100001100000010000, kW , 0 , 0 }, // ldsmaxlb
|
|
943
|
+
{ 0b0111100001100000010000, kW , 0 , 0 }, // ldsmaxlh
|
|
944
|
+
{ 0b1011100000100000010100, kWX, 30, 0 }, // ldsmin
|
|
945
|
+
{ 0b1011100010100000010100, kWX, 30, 1 }, // ldsmina
|
|
946
|
+
{ 0b0011100010100000010100, kW , 0 , 1 }, // ldsminab
|
|
947
|
+
{ 0b0111100010100000010100, kW , 0 , 1 }, // ldsminah
|
|
948
|
+
{ 0b1011100011100000010100, kWX, 30, 1 }, // ldsminal
|
|
949
|
+
{ 0b0011100011100000010100, kW , 0 , 1 }, // ldsminalb
|
|
950
|
+
{ 0b0111100011100000010100, kW , 0 , 1 }, // ldsminalh
|
|
951
|
+
{ 0b0011100000100000010100, kW , 0 , 0 }, // ldsminb
|
|
952
|
+
{ 0b0111100000100000010100, kW , 0 , 0 }, // ldsminh
|
|
953
|
+
{ 0b1011100001100000010100, kWX, 30, 0 }, // ldsminl
|
|
954
|
+
{ 0b0011100001100000010100, kW , 0 , 0 }, // ldsminlb
|
|
955
|
+
{ 0b0111100001100000010100, kW , 0 , 0 }, // ldsminlh
|
|
956
|
+
{ 0b1011100000100000011000, kWX, 30, 0 }, // ldumax
|
|
957
|
+
{ 0b1011100010100000011000, kWX, 30, 1 }, // ldumaxa
|
|
958
|
+
{ 0b0011100010100000011000, kW , 0 , 1 }, // ldumaxab
|
|
959
|
+
{ 0b0111100010100000011000, kW , 0 , 1 }, // ldumaxah
|
|
960
|
+
{ 0b1011100011100000011000, kWX, 30, 1 }, // ldumaxal
|
|
961
|
+
{ 0b0011100011100000011000, kW , 0 , 1 }, // ldumaxalb
|
|
962
|
+
{ 0b0111100011100000011000, kW , 0 , 1 }, // ldumaxalh
|
|
963
|
+
{ 0b0011100000100000011000, kW , 0 , 0 }, // ldumaxb
|
|
964
|
+
{ 0b0111100000100000011000, kW , 0 , 0 }, // ldumaxh
|
|
965
|
+
{ 0b1011100001100000011000, kWX, 30, 0 }, // ldumaxl
|
|
966
|
+
{ 0b0011100001100000011000, kW , 0 , 0 }, // ldumaxlb
|
|
967
|
+
{ 0b0111100001100000011000, kW , 0 , 0 }, // ldumaxlh
|
|
968
|
+
{ 0b1011100000100000011100, kWX, 30, 0 }, // ldumin
|
|
969
|
+
{ 0b1011100010100000011100, kWX, 30, 1 }, // ldumina
|
|
970
|
+
{ 0b0011100010100000011100, kW , 0 , 1 }, // lduminab
|
|
971
|
+
{ 0b0111100010100000011100, kW , 0 , 1 }, // lduminah
|
|
972
|
+
{ 0b1011100011100000011100, kWX, 30, 1 }, // lduminal
|
|
973
|
+
{ 0b0011100011100000011100, kW , 0 , 1 }, // lduminalb
|
|
974
|
+
{ 0b0111100011100000011100, kW , 0 , 1 }, // lduminalh
|
|
975
|
+
{ 0b0011100000100000011100, kW , 0 , 0 }, // lduminb
|
|
976
|
+
{ 0b0111100000100000011100, kW , 0 , 0 }, // lduminh
|
|
977
|
+
{ 0b1011100001100000011100, kWX, 30, 0 }, // lduminl
|
|
978
|
+
{ 0b0011100001100000011100, kW , 0 , 0 }, // lduminlb
|
|
979
|
+
{ 0b0111100001100000011100, kW , 0 , 0 }, // lduminlh
|
|
980
|
+
{ 0b1000100000000000111111, kWX, 30, 1 }, // stlxr
|
|
981
|
+
{ 0b0000100000000000111111, kW , 0 , 1 }, // stlxrb
|
|
982
|
+
{ 0b0100100000000000111111, kW , 0 , 1 }, // stlxrh
|
|
983
|
+
{ 0b1011100000100000100000, kWX, 30, 1 }, // swp
|
|
984
|
+
{ 0b1011100010100000100000, kWX, 30, 1 }, // swpa
|
|
985
|
+
{ 0b0011100010100000100000, kW , 0 , 1 }, // swpab
|
|
986
|
+
{ 0b0111100010100000100000, kW , 0 , 1 }, // swpah
|
|
987
|
+
{ 0b1011100011100000100000, kWX, 30, 1 }, // swpal
|
|
988
|
+
{ 0b0011100011100000100000, kW , 0 , 1 }, // swpalb
|
|
989
|
+
{ 0b0111100011100000100000, kW , 0 , 1 }, // swpalh
|
|
990
|
+
{ 0b0011100000100000100000, kW , 0 , 1 }, // swpb
|
|
991
|
+
{ 0b0111100000100000100000, kW , 0 , 1 }, // swph
|
|
992
|
+
{ 0b1011100001100000100000, kWX, 30, 1 }, // swpl
|
|
993
|
+
{ 0b0011100001100000100000, kW , 0 , 1 }, // swplb
|
|
994
|
+
{ 0b0111100001100000100000, kW , 0 , 1 } // swplh
|
|
995
|
+
};
|
|
996
|
+
|
|
997
|
+
const BaseAtomicSt baseAtomicSt[48] = {
|
|
998
|
+
{ 0b1011100000100000000000, kWX, 30 }, // stadd
|
|
999
|
+
{ 0b1011100001100000000000, kWX, 30 }, // staddl
|
|
1000
|
+
{ 0b0011100000100000000000, kW , 0 }, // staddb
|
|
1001
|
+
{ 0b0011100001100000000000, kW , 0 }, // staddlb
|
|
1002
|
+
{ 0b0111100000100000000000, kW , 0 }, // staddh
|
|
1003
|
+
{ 0b0111100001100000000000, kW , 0 }, // staddlh
|
|
1004
|
+
{ 0b1011100000100000000100, kWX, 30 }, // stclr
|
|
1005
|
+
{ 0b1011100001100000000100, kWX, 30 }, // stclrl
|
|
1006
|
+
{ 0b0011100000100000000100, kW , 0 }, // stclrb
|
|
1007
|
+
{ 0b0011100001100000000100, kW , 0 }, // stclrlb
|
|
1008
|
+
{ 0b0111100000100000000100, kW , 0 }, // stclrh
|
|
1009
|
+
{ 0b0111100001100000000100, kW , 0 }, // stclrlh
|
|
1010
|
+
{ 0b1011100000100000001000, kWX, 30 }, // steor
|
|
1011
|
+
{ 0b1011100001100000001000, kWX, 30 }, // steorl
|
|
1012
|
+
{ 0b0011100000100000001000, kW , 0 }, // steorb
|
|
1013
|
+
{ 0b0011100001100000001000, kW , 0 }, // steorlb
|
|
1014
|
+
{ 0b0111100000100000001000, kW , 0 }, // steorh
|
|
1015
|
+
{ 0b0111100001100000001000, kW , 0 }, // steorlh
|
|
1016
|
+
{ 0b1011100000100000001100, kWX, 30 }, // stset
|
|
1017
|
+
{ 0b1011100001100000001100, kWX, 30 }, // stsetl
|
|
1018
|
+
{ 0b0011100000100000001100, kW , 0 }, // stsetb
|
|
1019
|
+
{ 0b0011100001100000001100, kW , 0 }, // stsetlb
|
|
1020
|
+
{ 0b0111100000100000001100, kW , 0 }, // stseth
|
|
1021
|
+
{ 0b0111100001100000001100, kW , 0 }, // stsetlh
|
|
1022
|
+
{ 0b1011100000100000010000, kWX, 30 }, // stsmax
|
|
1023
|
+
{ 0b1011100001100000010000, kWX, 30 }, // stsmaxl
|
|
1024
|
+
{ 0b0011100000100000010000, kW , 0 }, // stsmaxb
|
|
1025
|
+
{ 0b0011100001100000010000, kW , 0 }, // stsmaxlb
|
|
1026
|
+
{ 0b0111100000100000010000, kW , 0 }, // stsmaxh
|
|
1027
|
+
{ 0b0111100001100000010000, kW , 0 }, // stsmaxlh
|
|
1028
|
+
{ 0b1011100000100000010100, kWX, 30 }, // stsmin
|
|
1029
|
+
{ 0b1011100001100000010100, kWX, 30 }, // stsminl
|
|
1030
|
+
{ 0b0011100000100000010100, kW , 0 }, // stsminb
|
|
1031
|
+
{ 0b0011100001100000010100, kW , 0 }, // stsminlb
|
|
1032
|
+
{ 0b0111100000100000010100, kW , 0 }, // stsminh
|
|
1033
|
+
{ 0b0111100001100000010100, kW , 0 }, // stsminlh
|
|
1034
|
+
{ 0b1011100000100000011000, kWX, 30 }, // stumax
|
|
1035
|
+
{ 0b1011100001100000011000, kWX, 30 }, // stumaxl
|
|
1036
|
+
{ 0b0011100000100000011000, kW , 0 }, // stumaxb
|
|
1037
|
+
{ 0b0011100001100000011000, kW , 0 }, // stumaxlb
|
|
1038
|
+
{ 0b0111100000100000011000, kW , 0 }, // stumaxh
|
|
1039
|
+
{ 0b0111100001100000011000, kW , 0 }, // stumaxlh
|
|
1040
|
+
{ 0b1011100000100000011100, kWX, 30 }, // stumin
|
|
1041
|
+
{ 0b1011100001100000011100, kWX, 30 }, // stuminl
|
|
1042
|
+
{ 0b0011100000100000011100, kW , 0 }, // stuminb
|
|
1043
|
+
{ 0b0011100001100000011100, kW , 0 }, // stuminlb
|
|
1044
|
+
{ 0b0111100000100000011100, kW , 0 }, // stuminh
|
|
1045
|
+
{ 0b0111100001100000011100, kW , 0 } // stuminlh
|
|
1046
|
+
};
|
|
1047
|
+
|
|
1048
|
+
const BaseBfc baseBfc[1] = {
|
|
1049
|
+
{ 0b00110011000000000000001111100000 } // bfc
|
|
1050
|
+
};
|
|
1051
|
+
|
|
1052
|
+
const BaseBfi baseBfi[3] = {
|
|
1053
|
+
{ 0b00110011000000000000000000000000 }, // bfi
|
|
1054
|
+
{ 0b00010011000000000000000000000000 }, // sbfiz
|
|
1055
|
+
{ 0b01010011000000000000000000000000 } // ubfiz
|
|
1056
|
+
};
|
|
1057
|
+
|
|
1058
|
+
const BaseBfm baseBfm[3] = {
|
|
1059
|
+
{ 0b00110011000000000000000000000000 }, // bfm
|
|
1060
|
+
{ 0b00010011000000000000000000000000 }, // sbfm
|
|
1061
|
+
{ 0b01010011000000000000000000000000 } // ubfm
|
|
1062
|
+
};
|
|
1063
|
+
|
|
1064
|
+
const BaseBfx baseBfx[3] = {
|
|
1065
|
+
{ 0b00110011000000000000000000000000 }, // bfxil
|
|
1066
|
+
{ 0b00010011000000000000000000000000 }, // sbfx
|
|
1067
|
+
{ 0b01010011000000000000000000000000 } // ubfx
|
|
1068
|
+
};
|
|
1069
|
+
|
|
1070
|
+
const BaseBranchCmp baseBranchCmp[2] = {
|
|
1071
|
+
{ 0b00110101000000000000000000000000 }, // cbnz
|
|
1072
|
+
{ 0b00110100000000000000000000000000 } // cbz
|
|
1073
|
+
};
|
|
1074
|
+
|
|
1075
|
+
const BaseBranchReg baseBranchReg[3] = {
|
|
1076
|
+
{ 0b11010110001111110000000000000000 }, // blr
|
|
1077
|
+
{ 0b11010110000111110000000000000000 }, // br
|
|
1078
|
+
{ 0b11010110010111110000000000000000 } // ret
|
|
1079
|
+
};
|
|
1080
|
+
|
|
1081
|
+
const BaseBranchRel baseBranchRel[2] = {
|
|
1082
|
+
{ 0b00010100000000000000000000000000 }, // b
|
|
1083
|
+
{ 0b10010100000000000000000000000000 } // bl
|
|
1084
|
+
};
|
|
1085
|
+
|
|
1086
|
+
const BaseBranchTst baseBranchTst[2] = {
|
|
1087
|
+
{ 0b00110111000000000000000000000000 }, // tbnz
|
|
1088
|
+
{ 0b00110110000000000000000000000000 } // tbz
|
|
1089
|
+
};
|
|
1090
|
+
|
|
1091
|
+
const BaseCCmp baseCCmp[2] = {
|
|
1092
|
+
{ 0b00111010010000000000000000000000 }, // ccmn
|
|
1093
|
+
{ 0b01111010010000000000000000000000 } // ccmp
|
|
1094
|
+
};
|
|
1095
|
+
|
|
1096
|
+
const BaseCInc baseCInc[3] = {
|
|
1097
|
+
{ 0b00011010100000000000010000000000 }, // cinc
|
|
1098
|
+
{ 0b01011010100000000000000000000000 }, // cinv
|
|
1099
|
+
{ 0b01011010100000000000010000000000 } // cneg
|
|
1100
|
+
};
|
|
1101
|
+
|
|
1102
|
+
const BaseCSel baseCSel[4] = {
|
|
1103
|
+
{ 0b00011010100000000000000000000000 }, // csel
|
|
1104
|
+
{ 0b00011010100000000000010000000000 }, // csinc
|
|
1105
|
+
{ 0b01011010100000000000000000000000 }, // csinv
|
|
1106
|
+
{ 0b01011010100000000000010000000000 } // csneg
|
|
1107
|
+
};
|
|
1108
|
+
|
|
1109
|
+
const BaseCSet baseCSet[2] = {
|
|
1110
|
+
{ 0b00011010100111110000011111100000 }, // cset
|
|
1111
|
+
{ 0b01011010100111110000001111100000 } // csetm
|
|
1112
|
+
};
|
|
1113
|
+
|
|
1114
|
+
const BaseCmpCmn baseCmpCmn[2] = {
|
|
1115
|
+
{ 0b0101011000, 0b0101011001, 0b0110001 }, // cmn
|
|
1116
|
+
{ 0b1101011000, 0b1101011001, 0b1110001 } // cmp
|
|
1117
|
+
};
|
|
1118
|
+
|
|
1119
|
+
const BaseExtend baseExtend[5] = {
|
|
1120
|
+
{ 0b0001001100000000000111, kWX, 0 }, // sxtb
|
|
1121
|
+
{ 0b0001001100000000001111, kWX, 0 }, // sxth
|
|
1122
|
+
{ 0b1001001101000000011111, kX , 0 }, // sxtw
|
|
1123
|
+
{ 0b0101001100000000000111, kW, 1 }, // uxtb
|
|
1124
|
+
{ 0b0101001100000000001111, kW, 1 } // uxth
|
|
1125
|
+
};
|
|
1126
|
+
|
|
1127
|
+
const BaseExtract baseExtract[1] = {
|
|
1128
|
+
{ 0b00010011100000000000000000000000 } // extr
|
|
1129
|
+
};
|
|
1130
|
+
|
|
1131
|
+
const BaseLdSt baseLdSt[9] = {
|
|
1132
|
+
{ 0b1011100101, 0b10111000010, 0b10111000011, 0b00011000, kWX, 30, 2, Inst::kIdLdur }, // ldr
|
|
1133
|
+
{ 0b0011100101, 0b00111000010, 0b00111000011, 0 , kW , 0 , 0, Inst::kIdLdurb }, // ldrb
|
|
1134
|
+
{ 0b0111100101, 0b01111000010, 0b01111000011, 0 , kW , 0 , 1, Inst::kIdLdurh }, // ldrh
|
|
1135
|
+
{ 0b0011100111, 0b00111000100, 0b00111000101, 0 , kWX, 22, 0, Inst::kIdLdursb }, // ldrsb
|
|
1136
|
+
{ 0b0111100110, 0b01111000100, 0b01111000101, 0 , kWX, 22, 1, Inst::kIdLdursh }, // ldrsh
|
|
1137
|
+
{ 0b1011100110, 0b10111000100, 0b10111000101, 0b10011000, kX , 0 , 2, Inst::kIdLdursw }, // ldrsw
|
|
1138
|
+
{ 0b1011100100, 0b10111000000, 0b10111000001, 0 , kWX, 30, 2, Inst::kIdStur }, // str
|
|
1139
|
+
{ 0b0011100100, 0b00111000000, 0b00111000001, 0 , kW , 30, 0, Inst::kIdSturb }, // strb
|
|
1140
|
+
{ 0b0111100100, 0b01111000000, 0b01111000001, 0 , kWX, 30, 1, Inst::kIdSturh } // strh
|
|
1141
|
+
};
|
|
1142
|
+
|
|
1143
|
+
const BaseLdpStp baseLdpStp[6] = {
|
|
1144
|
+
{ 0b0010100001, 0 , kWX, 31, 2 }, // ldnp
|
|
1145
|
+
{ 0b0010100101, 0b0010100011, kWX, 31, 2 }, // ldp
|
|
1146
|
+
{ 0b0110100101, 0b0110100011, kX , 0 , 2 }, // ldpsw
|
|
1147
|
+
{ 0b0110100100, 0b0110100010, kX, 0, 4 }, // stgp
|
|
1148
|
+
{ 0b0010100000, 0 , kWX, 31, 2 }, // stnp
|
|
1149
|
+
{ 0b0010100100, 0b0010100010, kWX, 31, 2 } // stp
|
|
1150
|
+
};
|
|
1151
|
+
|
|
1152
|
+
const BaseLdxp baseLdxp[2] = {
|
|
1153
|
+
{ 0b1000100001111111100000, kWX, 30 }, // ldaxp
|
|
1154
|
+
{ 0b1000100001111111000000, kWX, 30 } // ldxp
|
|
1155
|
+
};
|
|
1156
|
+
|
|
1157
|
+
const BaseLogical baseLogical[8] = {
|
|
1158
|
+
{ 0b0001010000, 0b00100100, 0 }, // and
|
|
1159
|
+
{ 0b1101010000, 0b11100100, 0 }, // ands
|
|
1160
|
+
{ 0b0001010001, 0b00100100, 1 }, // bic
|
|
1161
|
+
{ 0b1101010001, 0b11100100, 1 }, // bics
|
|
1162
|
+
{ 0b1001010001, 0b10100100, 1 }, // eon
|
|
1163
|
+
{ 0b1001010000, 0b10100100, 0 }, // eor
|
|
1164
|
+
{ 0b0101010001, 0b01100100, 1 }, // orn
|
|
1165
|
+
{ 0b0101010000, 0b01100100, 0 } // orr
|
|
1166
|
+
};
|
|
1167
|
+
|
|
1168
|
+
const BaseMovKNZ baseMovKNZ[3] = {
|
|
1169
|
+
{ 0b01110010100000000000000000000000 }, // movk
|
|
1170
|
+
{ 0b00010010100000000000000000000000 }, // movn
|
|
1171
|
+
{ 0b01010010100000000000000000000000 } // movz
|
|
1172
|
+
};
|
|
1173
|
+
|
|
1174
|
+
const BaseMvnNeg baseMvnNeg[3] = {
|
|
1175
|
+
{ 0b00101010001000000000001111100000 }, // mvn
|
|
1176
|
+
{ 0b01001011000000000000001111100000 }, // neg
|
|
1177
|
+
{ 0b01101011000000000000001111100000 } // negs
|
|
1178
|
+
};
|
|
1179
|
+
|
|
1180
|
+
const BaseOp baseOp[23] = {
|
|
1181
|
+
{ 0b11010101000000110010000110011111 }, // autia1716
|
|
1182
|
+
{ 0b11010101000000110010001110111111 }, // autiasp
|
|
1183
|
+
{ 0b11010101000000110010001110011111 }, // autiaz
|
|
1184
|
+
{ 0b11010101000000110010000111011111 }, // autib1716
|
|
1185
|
+
{ 0b11010101000000110010001111111111 }, // autibsp
|
|
1186
|
+
{ 0b11010101000000110010001111011111 }, // autibz
|
|
1187
|
+
{ 0b11010101000000000100000001011111 }, // axflag
|
|
1188
|
+
{ 0b11010101000000000100000000011111 }, // cfinv
|
|
1189
|
+
{ 0b11010101000000110010001010011111 }, // csdb
|
|
1190
|
+
{ 0b11010101000000110010000011011111 }, // dgh
|
|
1191
|
+
{ 0b11010110101111110000001111100000 }, // drps
|
|
1192
|
+
{ 0b11010101000000110010001000011111 }, // esb
|
|
1193
|
+
{ 0b11010110100111110000001111100000 }, // eret
|
|
1194
|
+
{ 0b11010101000000110010000000011111 }, // nop
|
|
1195
|
+
{ 0b11010101000000110011010010011111 }, // pssbb
|
|
1196
|
+
{ 0b11010101000000110010000010011111 }, // sev
|
|
1197
|
+
{ 0b11010101000000110010000010111111 }, // sevl
|
|
1198
|
+
{ 0b11010101000000110011000010011111 }, // ssbb
|
|
1199
|
+
{ 0b11010101000000110010000001011111 }, // wfe
|
|
1200
|
+
{ 0b11010101000000110010000001111111 }, // wfi
|
|
1201
|
+
{ 0b11010101000000000100000000111111 }, // xaflag
|
|
1202
|
+
{ 0b11010101000000110010000011111111 }, // xpaclri
|
|
1203
|
+
{ 0b11010101000000110010000000111111 } // yield
|
|
1204
|
+
};
|
|
1205
|
+
|
|
1206
|
+
const BaseOpImm baseOpImm[14] = {
|
|
1207
|
+
{ 0b11010100001000000000000000000000, 16, 5 }, // brk
|
|
1208
|
+
{ 0b11010101000000110011000001011111, 4, 8 }, // clrex
|
|
1209
|
+
{ 0b11010100101000000000000000000001, 16, 5 }, // dcps1
|
|
1210
|
+
{ 0b11010100101000000000000000000010, 16, 5 }, // dcps2
|
|
1211
|
+
{ 0b11010100101000000000000000000011, 16, 5 }, // dcps3
|
|
1212
|
+
{ 0b11010101000000110011000010111111, 4, 8 }, // dmb
|
|
1213
|
+
{ 0b11010101000000110011000010011111, 4, 8 }, // dsb
|
|
1214
|
+
{ 0b11010101000000110010000000011111, 7, 5 }, // hint
|
|
1215
|
+
{ 0b11010100010000000000000000000000, 16, 5 }, // hlt
|
|
1216
|
+
{ 0b11010100000000000000000000000010, 16, 5 }, // hvc
|
|
1217
|
+
{ 0b11010101000000110011000011011111, 4, 8 }, // isb
|
|
1218
|
+
{ 0b11010100000000000000000000000011, 16, 5 }, // smc
|
|
1219
|
+
{ 0b11010100000000000000000000000001, 16, 5 }, // svc
|
|
1220
|
+
{ 0b00000000000000000000000000000000, 16, 0 } // udf
|
|
1221
|
+
};
|
|
1222
|
+
|
|
1223
|
+
const BaseR baseR[10] = {
|
|
1224
|
+
{ 0b11011010110000010011101111100000, kX, kZR, 0 }, // autdza
|
|
1225
|
+
{ 0b11011010110000010011111111100000, kX, kZR, 0 }, // autdzb
|
|
1226
|
+
{ 0b11011010110000010011001111100000, kX, kZR, 0 }, // autiza
|
|
1227
|
+
{ 0b11011010110000010011011111100000, kX, kZR, 0 }, // autizb
|
|
1228
|
+
{ 0b11011010110000010010101111100000, kX, kZR, 0 }, // pacdza
|
|
1229
|
+
{ 0b11011010110000010010111111100000, kX, kZR, 0 }, // pacdzb
|
|
1230
|
+
{ 0b00111010000000000000100000001101, kW, kZR, 5 }, // setf8
|
|
1231
|
+
{ 0b00111010000000000100100000001101, kW, kZR, 5 }, // setf16
|
|
1232
|
+
{ 0b11011010110000010100011111100000, kX, kZR, 0 }, // xpacd
|
|
1233
|
+
{ 0b11011010110000010100001111100000, kX, kZR, 0 } // xpaci
|
|
1234
|
+
};
|
|
1235
|
+
|
|
1236
|
+
const BaseRM_NoImm baseRM_NoImm[21] = {
|
|
1237
|
+
{ 0b1000100011011111111111, kWX, kZR, 30 }, // ldar
|
|
1238
|
+
{ 0b0000100011011111111111, kW , kZR, 0 }, // ldarb
|
|
1239
|
+
{ 0b0100100011011111111111, kW , kZR, 0 }, // ldarh
|
|
1240
|
+
{ 0b1000100001011111111111, kWX, kZR, 30 }, // ldaxr
|
|
1241
|
+
{ 0b0000100001011111111111, kW , kZR, 0 }, // ldaxrb
|
|
1242
|
+
{ 0b0100100001011111111111, kW , kZR, 0 }, // ldaxrh
|
|
1243
|
+
{ 0b1101100111100000000000, kX , kZR, 0 }, // ldgm
|
|
1244
|
+
{ 0b1000100011011111011111, kWX, kZR, 30 }, // ldlar
|
|
1245
|
+
{ 0b0000100011011111011111, kW , kZR, 0 }, // ldlarb
|
|
1246
|
+
{ 0b0100100011011111011111, kW , kZR, 0 }, // ldlarh
|
|
1247
|
+
{ 0b1000100001011111011111, kWX, kZR, 30 }, // ldxr
|
|
1248
|
+
{ 0b0000100001011111011111, kW , kZR, 0 }, // ldxrb
|
|
1249
|
+
{ 0b0100100001011111011111, kW , kZR, 0 }, // ldxrh
|
|
1250
|
+
{ 0b1101100110100000000000, kX , kZR, 0 }, // stgm
|
|
1251
|
+
{ 0b1000100010011111011111, kWX, kZR, 30 }, // stllr
|
|
1252
|
+
{ 0b0000100010011111011111, kW , kZR, 0 }, // stllrb
|
|
1253
|
+
{ 0b0100100010011111011111, kW , kZR, 0 }, // stllrh
|
|
1254
|
+
{ 0b1000100010011111111111, kWX, kZR, 30 }, // stlr
|
|
1255
|
+
{ 0b0000100010011111111111, kW , kZR, 0 }, // stlrb
|
|
1256
|
+
{ 0b0100100010011111111111, kW , kZR, 0 }, // stlrh
|
|
1257
|
+
{ 0b1101100100100000000000, kX , kZR, 0 } // stzgm
|
|
1258
|
+
};
|
|
1259
|
+
|
|
1260
|
+
const BaseRM_SImm10 baseRM_SImm10[2] = {
|
|
1261
|
+
{ 0b1111100000100000000001, kX , kZR, 0, 3 }, // ldraa
|
|
1262
|
+
{ 0b1111100010100000000001, kX , kZR, 0, 3 } // ldrab
|
|
1263
|
+
};
|
|
1264
|
+
|
|
1265
|
+
const BaseRM_SImm9 baseRM_SImm9[23] = {
|
|
1266
|
+
{ 0b1101100101100000000000, 0b0000000000000000000000, kX , kZR, 0, 4 }, // ldg
|
|
1267
|
+
{ 0b1011100001000000000010, 0b0000000000000000000000, kWX, kZR, 30, 0 }, // ldtr
|
|
1268
|
+
{ 0b0011100001000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0 }, // ldtrb
|
|
1269
|
+
{ 0b0111100001000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0 }, // ldtrh
|
|
1270
|
+
{ 0b0011100011000000000010, 0b0000000000000000000000, kWX, kZR, 22, 0 }, // ldtrsb
|
|
1271
|
+
{ 0b0111100011000000000010, 0b0000000000000000000000, kWX, kZR, 22, 0 }, // ldtrsh
|
|
1272
|
+
{ 0b1011100010000000000010, 0b0000000000000000000000, kX , kZR, 0 , 0 }, // ldtrsw
|
|
1273
|
+
{ 0b1011100001000000000000, 0b0000000000000000000000, kWX, kZR, 30, 0 }, // ldur
|
|
1274
|
+
{ 0b0011100001000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0 }, // ldurb
|
|
1275
|
+
{ 0b0111100001000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0 }, // ldurh
|
|
1276
|
+
{ 0b0011100011000000000000, 0b0000000000000000000000, kWX, kZR, 22, 0 }, // ldursb
|
|
1277
|
+
{ 0b0111100011000000000000, 0b0000000000000000000000, kWX, kZR, 22, 0 }, // ldursh
|
|
1278
|
+
{ 0b1011100010000000000000, 0b0000000000000000000000, kWX, kZR, 0 , 0 }, // ldursw
|
|
1279
|
+
{ 0b1101100110100000000010, 0b1101100110100000000001, kX, kSP, 0, 4 }, // st2g
|
|
1280
|
+
{ 0b1101100100100000000010, 0b1101100100100000000001, kX, kSP, 0, 4 }, // stg
|
|
1281
|
+
{ 0b1011100000000000000010, 0b0000000000000000000000, kWX, kZR, 30, 0 }, // sttr
|
|
1282
|
+
{ 0b0011100000000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0 }, // sttrb
|
|
1283
|
+
{ 0b0111100000000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0 }, // sttrh
|
|
1284
|
+
{ 0b1011100000000000000000, 0b0000000000000000000000, kWX, kZR, 30, 0 }, // stur
|
|
1285
|
+
{ 0b0011100000000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0 }, // sturb
|
|
1286
|
+
{ 0b0111100000000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0 }, // sturh
|
|
1287
|
+
{ 0b1101100111100000000010, 0b1101100111100000000001, kX , kSP, 0, 4 }, // stz2g
|
|
1288
|
+
{ 0b1101100101100000000010, 0b1101100101100000000001, kX , kSP, 0, 4 } // stzg
|
|
1289
|
+
};
|
|
1290
|
+
|
|
1291
|
+
const BaseRR baseRR[15] = {
|
|
1292
|
+
{ 0b11011010110000010001100000000000, kX, kZR, 0, kX, kSP, 5, true }, // autda
|
|
1293
|
+
{ 0b11011010110000010001110000000000, kX, kZR, 0, kX, kSP, 5, true }, // autdb
|
|
1294
|
+
{ 0b11011010110000010001000000000000, kX, kZR, 0, kX, kSP, 5, true }, // autia
|
|
1295
|
+
{ 0b11011010110000010001010000000000, kX, kZR, 0, kX, kSP, 5, true }, // autib
|
|
1296
|
+
{ 0b01011010110000000001010000000000, kWX, kZR, 0, kWX, kZR, 5, true }, // cls
|
|
1297
|
+
{ 0b01011010110000000001000000000000, kWX, kZR, 0, kWX, kZR, 5, true }, // clz
|
|
1298
|
+
{ 0b10111010110000000000000000011111, kX, kSP, 5, kX, kSP, 16, true }, // cmpp
|
|
1299
|
+
{ 0b01011010000000000000001111100000, kWX, kZR, 0, kWX, kZR, 16, true }, // ngc
|
|
1300
|
+
{ 0b01111010000000000000001111100000, kWX, kZR, 0, kWX, kZR, 16, true }, // ngcs
|
|
1301
|
+
{ 0b11011010110000010000100000000000, kX, kZR, 0, kX, kSP, 5, true }, // pacda
|
|
1302
|
+
{ 0b11011010110000010000110000000000, kX, kZR, 0, kX, kSP, 5, true }, // pacdb
|
|
1303
|
+
{ 0b01011010110000000000000000000000, kWX, kZR, 0, kWX, kZR, 5, true }, // rbit
|
|
1304
|
+
{ 0b01011010110000000000010000000000, kWX, kZR, 0, kWX, kZR, 5, true }, // rev16
|
|
1305
|
+
{ 0b11011010110000000000100000000000, kWX, kZR, 0, kWX, kZR, 5, true }, // rev32
|
|
1306
|
+
{ 0b11011010110000000000110000000000, kWX, kZR, 0, kWX, kZR, 5, true } // rev64
|
|
1307
|
+
};
|
|
1308
|
+
|
|
1309
|
+
const BaseRRII baseRRII[2] = {
|
|
1310
|
+
{ 0b1001000110000000000000, kX, kSP, kX, kSP, 6, 4, 16, 4, 0, 10 }, // addg
|
|
1311
|
+
{ 0b1101000110000000000000, kX, kSP, kX, kSP, 6, 4, 16, 4, 0, 10 } // subg
|
|
1312
|
+
};
|
|
1313
|
+
|
|
1314
|
+
const BaseRRR baseRRR[26] = {
|
|
1315
|
+
{ 0b0001101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true }, // adc
|
|
1316
|
+
{ 0b0011101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true }, // adcs
|
|
1317
|
+
{ 0b0001101011000000010000, kW, kZR, kW, kZR, kW, kZR, false }, // crc32b
|
|
1318
|
+
{ 0b0001101011000000010100, kW, kZR, kW, kZR, kW, kZR, false }, // crc32cb
|
|
1319
|
+
{ 0b0001101011000000010101, kW, kZR, kW, kZR, kW, kZR, false }, // crc32ch
|
|
1320
|
+
{ 0b0001101011000000010110, kW, kZR, kW, kZR, kW, kZR, false }, // crc32cw
|
|
1321
|
+
{ 0b1001101011000000010111, kW, kZR, kW, kZR, kX, kZR, false }, // crc32cx
|
|
1322
|
+
{ 0b0001101011000000010001, kW, kZR, kW, kZR, kW, kZR, false }, // crc32h
|
|
1323
|
+
{ 0b0001101011000000010010, kW, kZR, kW, kZR, kW, kZR, false }, // crc32w
|
|
1324
|
+
{ 0b1001101011000000010011, kW, kZR, kW, kZR, kX, kZR, false }, // crc32x
|
|
1325
|
+
{ 0b1001101011000000000101, kX , kZR, kX , kSP, kX , kZR, true }, // gmi
|
|
1326
|
+
{ 0b0001101100000000111111, kWX, kZR, kWX, kZR, kWX, kZR, true }, // mneg
|
|
1327
|
+
{ 0b0001101100000000011111, kWX, kZR, kWX, kZR, kWX, kZR, true }, // mul
|
|
1328
|
+
{ 0b1001101011000000001100, kX, kZR, kX, kZR, kX, kSP, false }, // pacga
|
|
1329
|
+
{ 0b0101101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true }, // sbc
|
|
1330
|
+
{ 0b0111101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true }, // sbcs
|
|
1331
|
+
{ 0b0001101011000000000011, kWX, kZR, kWX, kZR, kWX, kZR, true }, // sdiv
|
|
1332
|
+
{ 0b1001101100100000111111, kX , kZR, kW , kZR, kW , kZR, false }, // smnegl
|
|
1333
|
+
{ 0b1001101101000000011111, kX , kZR, kX , kZR, kX , kZR, true }, // smulh
|
|
1334
|
+
{ 0b1001101100100000011111, kX , kZR, kW , kZR, kW , kZR, false }, // smull
|
|
1335
|
+
{ 0b1001101011000000000000, kX, kZR, kX, kSP, kX, kSP, false }, // subp
|
|
1336
|
+
{ 0b1011101011000000000000, kX, kZR, kX, kSP, kX, kSP, false }, // subps
|
|
1337
|
+
{ 0b0001101011000000000010, kWX, kZR, kWX, kZR, kWX, kZR, true }, // udiv
|
|
1338
|
+
{ 0b1001101110100000111111, kX , kZR, kW , kZR, kW , kZR, false }, // umnegl
|
|
1339
|
+
{ 0b1001101110100000011111, kX , kZR, kW , kZR, kW , kZR, false }, // umull
|
|
1340
|
+
{ 0b1001101111000000011111, kX , kZR, kX , kZR, kX , kZR, false } // umulh
|
|
1341
|
+
};
|
|
1342
|
+
|
|
1343
|
+
const BaseRRRR baseRRRR[6] = {
|
|
1344
|
+
{ 0b0001101100000000000000, kWX, kZR, kWX, kZR, kWX, kZR, kWX, kZR, true }, // madd
|
|
1345
|
+
{ 0b0001101100000000100000, kWX, kZR, kWX, kZR, kWX, kZR, kWX, kZR, true }, // msub
|
|
1346
|
+
{ 0b1001101100100000000000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false }, // smaddl
|
|
1347
|
+
{ 0b1001101100100000100000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false }, // smsubl
|
|
1348
|
+
{ 0b1001101110100000000000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false }, // umaddl
|
|
1349
|
+
{ 0b1001101110100000100000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false } // umsubl
|
|
1350
|
+
};
|
|
1351
|
+
|
|
1352
|
+
const BaseShift baseShift[8] = {
|
|
1353
|
+
{ 0b0001101011000000001010, 0b0001001100000000011111, 0 }, // asr
|
|
1354
|
+
{ 0b0001101011000000001010, 0b0000000000000000000000, 0 }, // asrv
|
|
1355
|
+
{ 0b0001101011000000001000, 0b0101001100000000000000, 0 }, // lsl
|
|
1356
|
+
{ 0b0001101011000000001000, 0b0000000000000000000000, 0 }, // lslv
|
|
1357
|
+
{ 0b0001101011000000001001, 0b0101001100000000011111, 0 }, // lsr
|
|
1358
|
+
{ 0b0001101011000000001001, 0b0000000000000000000000, 0 }, // lsrv
|
|
1359
|
+
{ 0b0001101011000000001011, 0b0001001110000000000000, 1 }, // ror
|
|
1360
|
+
{ 0b0001101011000000001011, 0b0000000000000000000000, 1 } // rorv
|
|
1361
|
+
};
|
|
1362
|
+
|
|
1363
|
+
const BaseStx baseStx[3] = {
|
|
1364
|
+
{ 0b1000100000000000011111, kWX, 30 }, // stxr
|
|
1365
|
+
{ 0b0000100000000000011111, kW , 0 }, // stxrb
|
|
1366
|
+
{ 0b0100100000000000011111, kW , 0 } // stxrh
|
|
1367
|
+
};
|
|
1368
|
+
|
|
1369
|
+
const BaseStxp baseStxp[2] = {
|
|
1370
|
+
{ 0b1000100000100000100000, kWX, 30 }, // stlxp
|
|
1371
|
+
{ 0b1000100000100000000000, kWX, 30 } // stxp
|
|
1372
|
+
};
|
|
1373
|
+
|
|
1374
|
+
const BaseTst baseTst[1] = {
|
|
1375
|
+
{ 0b1101010000, 0b111001000 } // tst
|
|
1376
|
+
};
|
|
1377
|
+
|
|
1378
|
+
const FSimdPair fSimdPair[5] = {
|
|
1379
|
+
{ 0b0111111000110000110110, 0b0010111000100000110101 }, // faddp_v
|
|
1380
|
+
{ 0b0111111000110000110010, 0b0010111000100000110001 }, // fmaxnmp_v
|
|
1381
|
+
{ 0b0111111000110000111110, 0b0010111000100000111101 }, // fmaxp_v
|
|
1382
|
+
{ 0b0111111010110000110010, 0b0010111010100000110001 }, // fminnmp_v
|
|
1383
|
+
{ 0b0111111010110000111110, 0b0010111010100000111101 } // fminp_v
|
|
1384
|
+
};
|
|
1385
|
+
|
|
1386
|
+
const FSimdSV fSimdSV[4] = {
|
|
1387
|
+
{ 0b0010111000110000110010 }, // fmaxnmv_v
|
|
1388
|
+
{ 0b0010111000110000111110 }, // fmaxv_v
|
|
1389
|
+
{ 0b0010111010110000110010 }, // fminnmv_v
|
|
1390
|
+
{ 0b0010111010110000111110 } // fminv_v
|
|
1391
|
+
};
|
|
1392
|
+
|
|
1393
|
+
const FSimdVV fSimdVV[17] = {
|
|
1394
|
+
{ 0b0001111000100000110000, kHF_A, 0b0000111010100000111110, kHF_B }, // fabs_v
|
|
1395
|
+
{ 0b0001111000100001010000, kHF_A, 0b0010111010100000111110, kHF_B }, // fneg_v
|
|
1396
|
+
{ 0b0101111010100001110110, kHF_B, 0b0000111010100001110110, kHF_B }, // frecpe_v
|
|
1397
|
+
{ 0b0101111010100001111110, kHF_B, 0b0000000000000000000000, kHF_N }, // frecpx_v
|
|
1398
|
+
{ 0b0001111000101000110000, kHF_N, 0b0010111000100001111010, kHF_N }, // frint32x_v
|
|
1399
|
+
{ 0b0001111000101000010000, kHF_N, 0b0000111000100001111010, kHF_N }, // frint32z_v
|
|
1400
|
+
{ 0b0001111000101001110000, kHF_N, 0b0010111000100001111110, kHF_N }, // frint64x_v
|
|
1401
|
+
{ 0b0001111000101001010000, kHF_N, 0b0000111000100001111110, kHF_N }, // frint64z_v
|
|
1402
|
+
{ 0b0001111000100110010000, kHF_A, 0b0010111000100001100010, kHF_B }, // frinta_v
|
|
1403
|
+
{ 0b0001111000100111110000, kHF_A, 0b0010111010100001100110, kHF_B }, // frinti_v
|
|
1404
|
+
{ 0b0001111000100101010000, kHF_A, 0b0000111000100001100110, kHF_B }, // frintm_v
|
|
1405
|
+
{ 0b0001111000100100010000, kHF_A, 0b0000111000100001100010, kHF_B }, // frintn_v
|
|
1406
|
+
{ 0b0001111000100100110000, kHF_A, 0b0000111010100001100010, kHF_B }, // frintp_v
|
|
1407
|
+
{ 0b0001111000100111010000, kHF_A, 0b0010111000100001100110, kHF_B }, // frintx_v
|
|
1408
|
+
{ 0b0001111000100101110000, kHF_A, 0b0000111010100001100110, kHF_B }, // frintz_v
|
|
1409
|
+
{ 0b0111111010100001110110, kHF_B, 0b0010111010100001110110, kHF_B }, // frsqrte_v
|
|
1410
|
+
{ 0b0001111000100001110000, kHF_A, 0b0010111010100001111110, kHF_B } // fsqrt_v
|
|
1411
|
+
};
|
|
1412
|
+
|
|
1413
|
+
const FSimdVVV fSimdVVV[13] = {
|
|
1414
|
+
{ 0b0111111010100000110101, kHF_C, 0b0010111010100000110101, kHF_C }, // fabd_v
|
|
1415
|
+
{ 0b0111111000100000111011, kHF_C, 0b0010111000100000111011, kHF_C }, // facge_v
|
|
1416
|
+
{ 0b0111111010100000111011, kHF_C, 0b0010111010100000111011, kHF_C }, // facgt_v
|
|
1417
|
+
{ 0b0001111000100000001010, kHF_A, 0b0000111000100000110101, kHF_C }, // fadd_v
|
|
1418
|
+
{ 0b0001111000100000000110, kHF_A, 0b0010111000100000111111, kHF_C }, // fdiv_v
|
|
1419
|
+
{ 0b0001111000100000010010, kHF_A, 0b0000111000100000111101, kHF_C }, // fmax_v
|
|
1420
|
+
{ 0b0001111000100000011010, kHF_A, 0b0000111000100000110001, kHF_C }, // fmaxnm_v
|
|
1421
|
+
{ 0b0001111000100000010110, kHF_A, 0b0000111010100000111101, kHF_C }, // fmin_v
|
|
1422
|
+
{ 0b0001111000100000011110, kHF_A, 0b0000111010100000110001, kHF_C }, // fminnm_v
|
|
1423
|
+
{ 0b0001111000100000100010, kHF_A, 0b0000000000000000000000, kHF_N }, // fnmul_v
|
|
1424
|
+
{ 0b0101111000100000111111, kHF_C, 0b0000111000100000111111, kHF_C }, // frecps_v
|
|
1425
|
+
{ 0b0101111010100000111111, kHF_C, 0b0000111010100000111111, kHF_C }, // frsqrts_v
|
|
1426
|
+
{ 0b0001111000100000001110, kHF_A, 0b0000111010100000110101, kHF_C } // fsub_v
|
|
1427
|
+
};
|
|
1428
|
+
|
|
1429
|
+
const FSimdVVVV fSimdVVVV[4] = {
|
|
1430
|
+
{ 0b0001111100000000000000, kHF_A, 0b0000000000000000000000, kHF_N }, // fmadd_v
|
|
1431
|
+
{ 0b0001111100000000100000, kHF_A, 0b0000000000000000000000, kHF_N }, // fmsub_v
|
|
1432
|
+
{ 0b0001111100100000000000, kHF_A, 0b0000000000000000000000, kHF_N }, // fnmadd_v
|
|
1433
|
+
{ 0b0001111100100000100000, kHF_A, 0b0000000000000000000000, kHF_N } // fnmsub_v
|
|
1434
|
+
};
|
|
1435
|
+
|
|
1436
|
+
const FSimdVVVe fSimdVVVe[4] = {
|
|
1437
|
+
{ 0b0000000000000000000000, kHF_N, 0b0000111000100000110011, 0b0000111110000000000100 }, // fmla_v
|
|
1438
|
+
{ 0b0000000000000000000000, kHF_N, 0b0000111010100000110011, 0b0000111110000000010100 }, // fmls_v
|
|
1439
|
+
{ 0b0001111000100000000010, kHF_A, 0b0010111000100000110111, 0b0000111110000000100100 }, // fmul_v
|
|
1440
|
+
{ 0b0101111000100000110111, kHF_C, 0b0000111000100000110111, 0b0010111110000000100100 } // fmulx_v
|
|
1441
|
+
};
|
|
1442
|
+
|
|
1443
|
+
const ISimdPair iSimdPair[1] = {
|
|
1444
|
+
{ 0b0101111000110001101110, 0b0000111000100000101111, kVO_V_Any } // addp_v
|
|
1445
|
+
};
|
|
1446
|
+
|
|
1447
|
+
const ISimdSV iSimdSV[7] = {
|
|
1448
|
+
{ 0b0000111000110001101110, kVO_V_BH_4S }, // addv_v
|
|
1449
|
+
{ 0b0000111000110000001110, kVO_V_BH_4S }, // saddlv_v
|
|
1450
|
+
{ 0b0000111000110000101010, kVO_V_BH_4S }, // smaxv_v
|
|
1451
|
+
{ 0b0000111000110001101010, kVO_V_BH_4S }, // sminv_v
|
|
1452
|
+
{ 0b0010111000110000001110, kVO_V_BH_4S }, // uaddlv_v
|
|
1453
|
+
{ 0b0010111000110000101010, kVO_V_BH_4S }, // umaxv_v
|
|
1454
|
+
{ 0b0010111000110001101010, kVO_V_BH_4S } // uminv_v
|
|
1455
|
+
};
|
|
1456
|
+
|
|
1457
|
+
const ISimdVV iSimdVV[29] = {
|
|
1458
|
+
{ 0b0000111000100000101110, kVO_V_Any }, // abs_v
|
|
1459
|
+
{ 0b0000111000100000010010, kVO_V_BHS }, // cls_v
|
|
1460
|
+
{ 0b0010111000100000010010, kVO_V_BHS }, // clz_v
|
|
1461
|
+
{ 0b0000111000100000010110, kVO_V_B }, // cnt_v
|
|
1462
|
+
{ 0b0010111000100000010110, kVO_V_B }, // mvn_v
|
|
1463
|
+
{ 0b0010111000100000101110, kVO_V_Any }, // neg_v
|
|
1464
|
+
{ 0b0010111000100000010110, kVO_V_B }, // not_v
|
|
1465
|
+
{ 0b0010111001100000010110, kVO_V_B }, // rbit_v
|
|
1466
|
+
{ 0b0000111000100000000110, kVO_V_B }, // rev16_v
|
|
1467
|
+
{ 0b0010111000100000000010, kVO_V_BH }, // rev32_v
|
|
1468
|
+
{ 0b0000111000100000000010, kVO_V_BHS }, // rev64_v
|
|
1469
|
+
{ 0b0000111000100000011010, kVO_V_BHS }, // sadalp_v
|
|
1470
|
+
{ 0b0000111000100000001010, kVO_V_BHS }, // saddlp_v
|
|
1471
|
+
{ 0b0000111000100000011110, kVO_SV_Any }, // sqabs_v
|
|
1472
|
+
{ 0b0010111000100000011110, kVO_SV_Any }, // sqneg_v
|
|
1473
|
+
{ 0b0000111000100001010010, kVO_SV_B8H4S2 }, // sqxtn_v
|
|
1474
|
+
{ 0b0100111000100001010010, kVO_V_B16H8S4 }, // sqxtn2_v
|
|
1475
|
+
{ 0b0010111000100001001010, kVO_SV_B8H4S2 }, // sqxtun_v
|
|
1476
|
+
{ 0b0110111000100001001010, kVO_V_B16H8S4 }, // sqxtun2_v
|
|
1477
|
+
{ 0b0000111000100000001110, kVO_SV_Any }, // suqadd_v
|
|
1478
|
+
{ 0b0010111000100000011010, kVO_V_BHS }, // uadalp_v
|
|
1479
|
+
{ 0b0010111000100000001010, kVO_V_BHS }, // uaddlp_v
|
|
1480
|
+
{ 0b0010111000100001010010, kVO_SV_B8H4S2 }, // uqxtn_v
|
|
1481
|
+
{ 0b0110111000100001010010, kVO_V_B16H8S4 }, // uqxtn2_v
|
|
1482
|
+
{ 0b0000111010100001110010, kVO_V_S }, // urecpe_v
|
|
1483
|
+
{ 0b0010111010100001110010, kVO_V_S }, // ursqrte_v
|
|
1484
|
+
{ 0b0010111000100000001110, kVO_SV_Any }, // usqadd_v
|
|
1485
|
+
{ 0b0000111000100001001010, kVO_V_B8H4S2 }, // xtn_v
|
|
1486
|
+
{ 0b0100111000100001001010, kVO_V_B16H8S4 } // xtn2_v
|
|
1487
|
+
};
|
|
1488
|
+
|
|
1489
|
+
const ISimdVVV iSimdVVV[65] = {
|
|
1490
|
+
{ 0b0000111000100000100001, kVO_V_Any }, // add_v
|
|
1491
|
+
{ 0b0000111000100000010000, kVO_V_B8H4S2 }, // addhn_v
|
|
1492
|
+
{ 0b0100111000100000010000, kVO_V_B16H8S4 }, // addhn2_v
|
|
1493
|
+
{ 0b0000111000100000000111, kVO_V_B }, // and_v
|
|
1494
|
+
{ 0b0010111011100000000111, kVO_V_B }, // bif_v
|
|
1495
|
+
{ 0b0010111010100000000111, kVO_V_B }, // bit_v
|
|
1496
|
+
{ 0b0010111001100000000111, kVO_V_B }, // bsl_v
|
|
1497
|
+
{ 0b0000111000100000100011, kVO_V_Any }, // cmtst_v
|
|
1498
|
+
{ 0b0010111000100000000111, kVO_V_B }, // eor_v
|
|
1499
|
+
{ 0b0000111011100000000111, kVO_V_B }, // orn_v
|
|
1500
|
+
{ 0b0010111000100000100111, kVO_V_B }, // pmul_v
|
|
1501
|
+
{ 0b0000111000100000111000, kVO_V_B8D1 }, // pmull_v
|
|
1502
|
+
{ 0b0100111000100000111000, kVO_V_B16D2 }, // pmull2_v
|
|
1503
|
+
{ 0b0010111000100000010000, kVO_V_B8H4S2 }, // raddhn_v
|
|
1504
|
+
{ 0b0110111000100000010000, kVO_V_B16H8S4 }, // raddhn2_v
|
|
1505
|
+
{ 0b1100111001100000100011, kVO_V_D2 }, // rax1_v
|
|
1506
|
+
{ 0b0010111000100000011000, kVO_V_B8H4S2 }, // rsubhn_v
|
|
1507
|
+
{ 0b0110111000100000011000, kVO_V_B16H8S4 }, // rsubhn2_v
|
|
1508
|
+
{ 0b0000111000100000011111, kVO_V_BHS }, // saba_v
|
|
1509
|
+
{ 0b0000111000100000010100, kVO_V_B8H4S2 }, // sabal_v
|
|
1510
|
+
{ 0b0100111000100000010100, kVO_V_B16H8S4 }, // sabal2_v
|
|
1511
|
+
{ 0b0000111000100000011101, kVO_V_BHS }, // sabd_v
|
|
1512
|
+
{ 0b0000111000100000011100, kVO_V_B8H4S2 }, // sabdl_v
|
|
1513
|
+
{ 0b0100111000100000011100, kVO_V_B16H8S4 }, // sabdl2_v
|
|
1514
|
+
{ 0b0000111000100000000000, kVO_V_B8H4S2 }, // saddl_v
|
|
1515
|
+
{ 0b0100111000100000000000, kVO_V_B16H8S4 }, // saddl2_v
|
|
1516
|
+
{ 0b0000111000100000000001, kVO_V_BHS }, // shadd_v
|
|
1517
|
+
{ 0b0000111000100000001001, kVO_V_BHS }, // shsub_v
|
|
1518
|
+
{ 0b0000111000100000011001, kVO_V_BHS }, // smax_v
|
|
1519
|
+
{ 0b0000111000100000101001, kVO_V_BHS }, // smaxp_v
|
|
1520
|
+
{ 0b0000111000100000011011, kVO_V_BHS }, // smin_v
|
|
1521
|
+
{ 0b0000111000100000101011, kVO_V_BHS }, // sminp_v
|
|
1522
|
+
{ 0b0000111000100000000011, kVO_SV_Any }, // sqadd_v
|
|
1523
|
+
{ 0b0000111000100000001011, kVO_SV_Any }, // sqsub_v
|
|
1524
|
+
{ 0b0000111000100000000101, kVO_V_BHS }, // srhadd_v
|
|
1525
|
+
{ 0b0000111000100000001000, kVO_V_B8H4S2 }, // ssubl_v
|
|
1526
|
+
{ 0b0100111000100000001000, kVO_V_B16H8S4 }, // ssubl2_v
|
|
1527
|
+
{ 0b0010111000100000100001, kVO_V_Any }, // sub_v
|
|
1528
|
+
{ 0b0000111000100000011000, kVO_V_B8H4S2 }, // subhn_v
|
|
1529
|
+
{ 0b0000111000100000011000, kVO_V_B16H8S4 }, // subhn2_v
|
|
1530
|
+
{ 0b0000111000000000001010, kVO_V_BHS_D2 }, // trn1_v
|
|
1531
|
+
{ 0b0000111000000000011010, kVO_V_BHS_D2 }, // trn2_v
|
|
1532
|
+
{ 0b0010111000100000011111, kVO_V_BHS }, // uaba_v
|
|
1533
|
+
{ 0b0010111000100000010100, kVO_V_B8H4S2 }, // uabal_v
|
|
1534
|
+
{ 0b0110111000100000010100, kVO_V_B16H8S4 }, // uabal2_v
|
|
1535
|
+
{ 0b0010111000100000011101, kVO_V_BHS }, // uabd_v
|
|
1536
|
+
{ 0b0010111000100000011100, kVO_V_B8H4S2 }, // uabdl_v
|
|
1537
|
+
{ 0b0110111000100000011100, kVO_V_B16H8S4 }, // uabdl2_v
|
|
1538
|
+
{ 0b0010111000100000000000, kVO_V_B8H4S2 }, // uaddl_v
|
|
1539
|
+
{ 0b0110111000100000000000, kVO_V_B16H8S4 }, // uaddl2_v
|
|
1540
|
+
{ 0b0010111000100000000001, kVO_V_BHS }, // uhadd_v
|
|
1541
|
+
{ 0b0010111000100000001001, kVO_V_BHS }, // uhsub_v
|
|
1542
|
+
{ 0b0010111000100000011001, kVO_V_BHS }, // umax_v
|
|
1543
|
+
{ 0b0010111000100000101001, kVO_V_BHS }, // umaxp_v
|
|
1544
|
+
{ 0b0010111000100000011011, kVO_V_BHS }, // umin_v
|
|
1545
|
+
{ 0b0010111000100000101011, kVO_V_BHS }, // uminp_v
|
|
1546
|
+
{ 0b0010111000100000000011, kVO_SV_Any }, // uqadd_v
|
|
1547
|
+
{ 0b0010111000100000001011, kVO_SV_Any }, // uqsub_v
|
|
1548
|
+
{ 0b0010111000100000000101, kVO_V_BHS }, // urhadd_v
|
|
1549
|
+
{ 0b0010111000100000001000, kVO_V_B8H4S2 }, // usubl_v
|
|
1550
|
+
{ 0b0110111000100000001000, kVO_V_B16H8S4 }, // usubl2_v
|
|
1551
|
+
{ 0b0000111000000000000110, kVO_V_BHS_D2 }, // uzp1_v
|
|
1552
|
+
{ 0b0000111000000000010110, kVO_V_BHS_D2 }, // uzp2_v
|
|
1553
|
+
{ 0b0000111000000000001110, kVO_V_BHS_D2 }, // zip1_v
|
|
1554
|
+
{ 0b0000111000000000011110, kVO_V_BHS_D2 } // zip2_v
|
|
1555
|
+
};
|
|
1556
|
+
|
|
1557
|
+
const ISimdVVVI iSimdVVVI[2] = {
|
|
1558
|
+
{ 0b0010111000000000000000, kVO_V_B, 4, 11, 1 }, // ext_v
|
|
1559
|
+
{ 0b1100111001100000100011, kVO_V_D2, 6, 10, 0 } // xar_v
|
|
1560
|
+
};
|
|
1561
|
+
|
|
1562
|
+
const ISimdVVVV iSimdVVVV[2] = {
|
|
1563
|
+
{ 0b1100111000100000000000, kVO_V_B16 }, // bcax_v
|
|
1564
|
+
{ 0b1100111000000000000000, kVO_V_B16 } // eor3_v
|
|
1565
|
+
};
|
|
1566
|
+
|
|
1567
|
+
const ISimdVVVVx iSimdVVVVx[1] = {
|
|
1568
|
+
{ 0b1100111001000000000000, kOp_V4S, kOp_V4S, kOp_V4S, kOp_V4S } // sm3ss1_v
|
|
1569
|
+
};
|
|
1570
|
+
|
|
1571
|
+
const ISimdVVVe iSimdVVVe[25] = {
|
|
1572
|
+
{ 0b0000111000100000100101, kVO_V_BHS, 0b0010111100000000000000, kVO_V_HS }, // mla_v
|
|
1573
|
+
{ 0b0010111000100000100101, kVO_V_BHS, 0b0010111100000000010000, kVO_V_HS }, // mls_v
|
|
1574
|
+
{ 0b0000111000100000100111, kVO_V_BHS, 0b0000111100000000100000, kVO_V_HS }, // mul_v
|
|
1575
|
+
{ 0b0000111000100000100000, kVO_V_B8H4S2, 0b0000111100000000001000, kVO_V_H4S2 }, // smlal_v
|
|
1576
|
+
{ 0b0100111000100000100000, kVO_V_B16H8S4, 0b0100111100000000001000, kVO_V_H8S4 }, // smlal2_v
|
|
1577
|
+
{ 0b0000111000100000101000, kVO_V_B8H4S2, 0b0000111100000000011000, kVO_V_H4S2 }, // smlsl_v
|
|
1578
|
+
{ 0b0100111000100000101000, kVO_V_B16H8S4, 0b0100111100000000011000, kVO_V_H8S4 }, // smlsl2_v
|
|
1579
|
+
{ 0b0000111000100000110000, kVO_V_B8H4S2, 0b0000111100000000101000, kVO_V_H4S2 }, // smull_v
|
|
1580
|
+
{ 0b0100111000100000110000, kVO_V_B16H8S4, 0b0100111100000000101000, kVO_V_H8S4 }, // smull2_v
|
|
1581
|
+
{ 0b0000111000100000100100, kVO_SV_BHS, 0b0000111100000000001100, kVO_V_H4S2 }, // sqdmlal_v
|
|
1582
|
+
{ 0b0100111000100000100100, kVO_V_B16H8S4, 0b0100111100000000001100, kVO_V_H8S4 }, // sqdmlal2_v
|
|
1583
|
+
{ 0b0000111000100000101100, kVO_SV_BHS, 0b0000111100000000011100, kVO_V_H4S2 }, // sqdmlsl_v
|
|
1584
|
+
{ 0b0100111000100000101100, kVO_V_B16H8S4, 0b0100111100000000011100, kVO_V_H8S4 }, // sqdmlsl2_v
|
|
1585
|
+
{ 0b0000111000100000101101, kVO_SV_HS, 0b0000111100000000110000, kVO_SV_HS }, // sqdmulh_v
|
|
1586
|
+
{ 0b0000111000100000110100, kVO_SV_BHS, 0b0000111100000000101100, kVO_V_H4S2 }, // sqdmull_v
|
|
1587
|
+
{ 0b0100111000100000110100, kVO_V_B16H8S4, 0b0100111100000000101100, kVO_V_H8S4 }, // sqdmull2_v
|
|
1588
|
+
{ 0b0010111000000000100001, kVO_SV_HS, 0b0010111100000000110100, kVO_SV_HS }, // sqrdmlah_v
|
|
1589
|
+
{ 0b0010111000000000100011, kVO_SV_HS, 0b0010111100000000111100, kVO_SV_HS }, // sqrdmlsh_v
|
|
1590
|
+
{ 0b0010111000100000101101, kVO_SV_HS, 0b0000111100000000110100, kVO_SV_HS }, // sqrdmulh_v
|
|
1591
|
+
{ 0b0010111000100000100000, kVO_V_B8H4S2, 0b0010111100000000001000, kVO_V_H4S2 }, // umlal_v
|
|
1592
|
+
{ 0b0110111000100000100000, kVO_V_B16H8S4, 0b0010111100000000001000, kVO_V_H8S4 }, // umlal2_v
|
|
1593
|
+
{ 0b0010111000100000101000, kVO_V_B8H4S2, 0b0010111100000000011000, kVO_V_H4S2 }, // umlsl_v
|
|
1594
|
+
{ 0b0110111000100000101000, kVO_V_B16H8S4, 0b0110111100000000011000, kVO_V_H8S4 }, // umlsl2_v
|
|
1595
|
+
{ 0b0010111000100000110000, kVO_V_B8H4S2, 0b0010111100000000101000, kVO_V_H4S2 }, // umull_v
|
|
1596
|
+
{ 0b0110111000100000110000, kVO_V_B16H8S4, 0b0110111100000000101000, kVO_V_H8S4 } // umull2_v
|
|
1597
|
+
};
|
|
1598
|
+
|
|
1599
|
+
const ISimdVVVx iSimdVVVx[17] = {
|
|
1600
|
+
{ 0b0110111001000000111011, kOp_V4S, kOp_V8H, kOp_V8H }, // bfmmla_v
|
|
1601
|
+
{ 0b0101111000000000000000, kOp_Q, kOp_S, kOp_V4S }, // sha1c_v
|
|
1602
|
+
{ 0b0101111000000000001000, kOp_Q, kOp_S, kOp_V4S }, // sha1m_v
|
|
1603
|
+
{ 0b0101111000000000000100, kOp_Q, kOp_S, kOp_V4S }, // sha1p_v
|
|
1604
|
+
{ 0b0101111000000000001100, kOp_V4S, kOp_V4S, kOp_V4S }, // sha1su0_v
|
|
1605
|
+
{ 0b0101111000000000010000, kOp_Q, kOp_Q, kOp_V4S }, // sha256h_v
|
|
1606
|
+
{ 0b0101111000000000010100, kOp_Q, kOp_Q, kOp_V4S }, // sha256h2_v
|
|
1607
|
+
{ 0b0101111000000000011000, kOp_V4S, kOp_V4S, kOp_V4S }, // sha256su1_v
|
|
1608
|
+
{ 0b1100111001100000100000, kOp_Q, kOp_Q, kOp_V2D }, // sha512h_v
|
|
1609
|
+
{ 0b1100111001100000100001, kOp_Q, kOp_Q, kOp_V2D }, // sha512h2_v
|
|
1610
|
+
{ 0b1100111001100000100010, kOp_V2D, kOp_V2D, kOp_V2D }, // sha512su1_v
|
|
1611
|
+
{ 0b1100111001100000110000, kOp_V4S, kOp_V4S, kOp_V4S }, // sm3partw1_v
|
|
1612
|
+
{ 0b1100111001100000110001, kOp_V4S, kOp_V4S, kOp_V4S }, // sm3partw2_v
|
|
1613
|
+
{ 0b1100111001100000110010, kOp_V4S, kOp_V4S, kOp_V4S }, // sm4ekey_v
|
|
1614
|
+
{ 0b0100111010000000101001, kOp_V4S, kOp_V16B, kOp_V16B }, // smmla_v
|
|
1615
|
+
{ 0b0110111010000000101001, kOp_V4S, kOp_V16B, kOp_V16B }, // ummla_v
|
|
1616
|
+
{ 0b0100111010000000101011, kOp_V4S, kOp_V16B, kOp_V16B } // usmmla_v
|
|
1617
|
+
};
|
|
1618
|
+
|
|
1619
|
+
const ISimdVVx iSimdVVx[13] = {
|
|
1620
|
+
{ 0b0100111000101000010110, kOp_V16B, kOp_V16B }, // aesd_v
|
|
1621
|
+
{ 0b0100111000101000010010, kOp_V16B, kOp_V16B }, // aese_v
|
|
1622
|
+
{ 0b0100111000101000011110, kOp_V16B, kOp_V16B }, // aesimc_v
|
|
1623
|
+
{ 0b0100111000101000011010, kOp_V16B, kOp_V16B }, // aesmc_v
|
|
1624
|
+
{ 0b0001111001100011010000, kOp_H, kOp_S }, // bfcvt_v
|
|
1625
|
+
{ 0b0000111010100001011010, kOp_V4H, kOp_V4S }, // bfcvtn_v
|
|
1626
|
+
{ 0b0100111010100001011010, kOp_V8H, kOp_V4S }, // bfcvtn2_v
|
|
1627
|
+
{ 0b0001111001111110000000, kOp_GpW, kOp_D }, // fjcvtzs_v
|
|
1628
|
+
{ 0b0101111000101000000010, kOp_S, kOp_S }, // sha1h_v
|
|
1629
|
+
{ 0b0101111000101000000110, kOp_V4S, kOp_V4S }, // sha1su1_v
|
|
1630
|
+
{ 0b0101111000101000001010, kOp_V4S, kOp_V4S }, // sha256su0_v
|
|
1631
|
+
{ 0b1100111011000000100000, kOp_V2D, kOp_V2D }, // sha512su0_v
|
|
1632
|
+
{ 0b1100111011000000100001, kOp_V4S, kOp_V4S } // sm4e_v
|
|
1633
|
+
};
|
|
1634
|
+
|
|
1635
|
+
const ISimdWWV iSimdWWV[8] = {
|
|
1636
|
+
{ 0b0000111000100000000100, kVO_V_B8H4S2 }, // saddw_v
|
|
1637
|
+
{ 0b0000111000100000000100, kVO_V_B16H8S4 }, // saddw2_v
|
|
1638
|
+
{ 0b0000111000100000001100, kVO_V_B8H4S2 }, // ssubw_v
|
|
1639
|
+
{ 0b0000111000100000001100, kVO_V_B16H8S4 }, // ssubw2_v
|
|
1640
|
+
{ 0b0010111000100000000100, kVO_V_B8H4S2 }, // uaddw_v
|
|
1641
|
+
{ 0b0010111000100000000100, kVO_V_B16H8S4 }, // uaddw2_v
|
|
1642
|
+
{ 0b0010111000100000001100, kVO_V_B8H4S2 }, // usubw_v
|
|
1643
|
+
{ 0b0010111000100000001100, kVO_V_B16H8S4 } // usubw2_v
|
|
1644
|
+
};
|
|
1645
|
+
|
|
1646
|
+
const SimdBicOrr simdBicOrr[2] = {
|
|
1647
|
+
{ 0b0000111001100000000111, 0b0010111100000000000001 }, // bic_v
|
|
1648
|
+
{ 0b0000111010100000000111, 0b0000111100000000000001 } // orr_v
|
|
1649
|
+
};
|
|
1650
|
+
|
|
1651
|
+
const SimdCmp simdCmp[7] = {
|
|
1652
|
+
{ 0b0010111000100000100011, 0b0000111000100000100110, kVO_V_Any }, // cmeq_v
|
|
1653
|
+
{ 0b0000111000100000001111, 0b0010111000100000100010, kVO_V_Any }, // cmge_v
|
|
1654
|
+
{ 0b0000111000100000001101, 0b0000111000100000100010, kVO_V_Any }, // cmgt_v
|
|
1655
|
+
{ 0b0010111000100000001101, 0b0000000000000000000000, kVO_V_Any }, // cmhi_v
|
|
1656
|
+
{ 0b0010111000100000001111, 0b0000000000000000000000, kVO_V_Any }, // cmhs_v
|
|
1657
|
+
{ 0b0000000000000000000000, 0b0010111000100000100110, kVO_V_Any }, // cmle_v
|
|
1658
|
+
{ 0b0000000000000000000000, 0b0000111000100000101010, kVO_V_Any } // cmlt_v
|
|
1659
|
+
};
|
|
1660
|
+
|
|
1661
|
+
const SimdDot simdDot[5] = {
|
|
1662
|
+
{ 0b0010111001000000111111, 0b0000111101000000111100, kET_S, kET_H, kET_2H }, // bfdot_v
|
|
1663
|
+
{ 0b0000111010000000100101, 0b0000111110000000111000, kET_S, kET_B, kET_4B }, // sdot_v
|
|
1664
|
+
{ 0b0000000000000000000000, 0b0000111100000000111100, kET_S, kET_B, kET_4B }, // sudot_v
|
|
1665
|
+
{ 0b0010111010000000100101, 0b0010111110000000111000, kET_S, kET_B, kET_4B }, // udot_v
|
|
1666
|
+
{ 0b0000111010000000100111, 0b0000111110000000111100, kET_S, kET_B, kET_4B } // usdot_v
|
|
1667
|
+
};
|
|
1668
|
+
|
|
1669
|
+
const SimdFcadd simdFcadd[1] = {
|
|
1670
|
+
{ 0b0010111000000000111001 } // fcadd_v
|
|
1671
|
+
};
|
|
1672
|
+
|
|
1673
|
+
const SimdFccmpFccmpe simdFccmpFccmpe[2] = {
|
|
1674
|
+
{ 0b00011110001000000000010000000000 }, // fccmp_v
|
|
1675
|
+
{ 0b00011110001000000000010000010000 } // fccmpe_v
|
|
1676
|
+
};
|
|
1677
|
+
|
|
1678
|
+
const SimdFcm simdFcm[5] = {
|
|
1679
|
+
{ 0b0000111000100000111001, kHF_C, 0b0000111010100000110110 }, // fcmeq_v
|
|
1680
|
+
{ 0b0010111000100000111001, kHF_C, 0b0010111010100000110010 }, // fcmge_v
|
|
1681
|
+
{ 0b0010111010100000111001, kHF_C, 0b0000111010100000110010 }, // fcmgt_v
|
|
1682
|
+
{ 0b0000000000000000000000, kHF_C, 0b0010111010100000110110 }, // fcmle_v
|
|
1683
|
+
{ 0b0000000000000000000000, kHF_C, 0b0000111010100000111010 } // fcmlt_v
|
|
1684
|
+
};
|
|
1685
|
+
|
|
1686
|
+
const SimdFcmla simdFcmla[1] = {
|
|
1687
|
+
{ 0b0010111000000000110001, 0b0010111100000000000100 } // fcmla_v
|
|
1688
|
+
};
|
|
1689
|
+
|
|
1690
|
+
const SimdFcmpFcmpe simdFcmpFcmpe[2] = {
|
|
1691
|
+
{ 0b00011110001000000010000000000000 }, // fcmp_v
|
|
1692
|
+
{ 0b00011110001000000010000000010000 } // fcmpe_v
|
|
1693
|
+
};
|
|
1694
|
+
|
|
1695
|
+
const SimdFcvtLN simdFcvtLN[6] = {
|
|
1696
|
+
{ 0b0000111000100001011110, 0, 0 }, // fcvtl_v
|
|
1697
|
+
{ 0b0100111000100001011110, 0, 0 }, // fcvtl2_v
|
|
1698
|
+
{ 0b0000111000100001011010, 0, 0 }, // fcvtn_v
|
|
1699
|
+
{ 0b0100111000100001011010, 0, 0 }, // fcvtn2_v
|
|
1700
|
+
{ 0b0010111000100001011010, 1, 1 }, // fcvtxn_v
|
|
1701
|
+
{ 0b0110111000100001011010, 1, 0 } // fcvtxn2_v
|
|
1702
|
+
};
|
|
1703
|
+
|
|
1704
|
+
const SimdFcvtSV simdFcvtSV[12] = {
|
|
1705
|
+
{ 0b0000111000100001110010, 0b0000000000000000000000, 0b0001111000100100000000, 1 }, // fcvtas_v
|
|
1706
|
+
{ 0b0010111000100001110010, 0b0000000000000000000000, 0b0001111000100101000000, 1 }, // fcvtau_v
|
|
1707
|
+
{ 0b0000111000100001101110, 0b0000000000000000000000, 0b0001111000110000000000, 1 }, // fcvtms_v
|
|
1708
|
+
{ 0b0010111000100001101110, 0b0000000000000000000000, 0b0001111000110001000000, 1 }, // fcvtmu_v
|
|
1709
|
+
{ 0b0000111000100001101010, 0b0000000000000000000000, 0b0001111000100000000000, 1 }, // fcvtns_v
|
|
1710
|
+
{ 0b0010111000100001101010, 0b0000000000000000000000, 0b0001111000100001000000, 1 }, // fcvtnu_v
|
|
1711
|
+
{ 0b0000111010100001101010, 0b0000000000000000000000, 0b0001111000101000000000, 1 }, // fcvtps_v
|
|
1712
|
+
{ 0b0010111010100001101010, 0b0000000000000000000000, 0b0001111000101001000000, 1 }, // fcvtpu_v
|
|
1713
|
+
{ 0b0000111010100001101110, 0b0000111100000000111111, 0b0001111000111000000000, 1 }, // fcvtzs_v
|
|
1714
|
+
{ 0b0010111010100001101110, 0b0010111100000000111111, 0b0001111000111001000000, 1 }, // fcvtzu_v
|
|
1715
|
+
{ 0b0000111000100001110110, 0b0000111100000000111001, 0b0001111000100010000000, 0 }, // scvtf_v
|
|
1716
|
+
{ 0b0010111000100001110110, 0b0010111100000000111001, 0b0001111000100011000000, 0 } // ucvtf_v
|
|
1717
|
+
};
|
|
1718
|
+
|
|
1719
|
+
const SimdFmlal simdFmlal[6] = {
|
|
1720
|
+
{ 0b0010111011000000111111, 0b0000111111000000111100, 0, kET_S, kET_H, kET_H }, // bfmlalb_v
|
|
1721
|
+
{ 0b0110111011000000111111, 0b0100111111000000111100, 0, kET_S, kET_H, kET_H }, // bfmlalt_v
|
|
1722
|
+
{ 0b0000111000100000111011, 0b0000111110000000000000, 1, kET_S, kET_H, kET_H }, // fmlal_v
|
|
1723
|
+
{ 0b0010111000100000110011, 0b0010111110000000100000, 1, kET_S, kET_H, kET_H }, // fmlal2_v
|
|
1724
|
+
{ 0b0000111010100000111011, 0b0000111110000000010000, 1, kET_S, kET_H, kET_H }, // fmlsl_v
|
|
1725
|
+
{ 0b0010111010100000110011, 0b0010111110000000110000, 1, kET_S, kET_H, kET_H } // fmlsl2_v
|
|
1726
|
+
};
|
|
1727
|
+
|
|
1728
|
+
const SimdLdNStN simdLdNStN[12] = {
|
|
1729
|
+
{ 0b0000110101000000000000, 0b0000110001000000001000, 1, 0 }, // ld1_v
|
|
1730
|
+
{ 0b0000110101000000110000, 0b0000000000000000000000, 1, 1 }, // ld1r_v
|
|
1731
|
+
{ 0b0000110101100000000000, 0b0000110001000000100000, 2, 0 }, // ld2_v
|
|
1732
|
+
{ 0b0000110101100000110000, 0b0000000000000000000000, 2, 1 }, // ld2r_v
|
|
1733
|
+
{ 0b0000110101000000001000, 0b0000110001000000010000, 3, 0 }, // ld3_v
|
|
1734
|
+
{ 0b0000110101000000111000, 0b0000000000000000000000, 3, 1 }, // ld3r_v
|
|
1735
|
+
{ 0b0000110101100000001000, 0b0000110001000000000000, 4, 0 }, // ld4_v
|
|
1736
|
+
{ 0b0000110101100000111000, 0b0000000000000000000000, 4, 1 }, // ld4r_v
|
|
1737
|
+
{ 0b0000110100000000000000, 0b0000110000000000001000, 1, 0 }, // st1_v
|
|
1738
|
+
{ 0b0000110100100000000000, 0b0000110000000000100000, 2, 0 }, // st2_v
|
|
1739
|
+
{ 0b0000110100000000001000, 0b0000110000000000010000, 3, 0 }, // st3_v
|
|
1740
|
+
{ 0b0000110100100000001000, 0b0000110000000000000000, 4, 0 } // st4_v
|
|
1741
|
+
};
|
|
1742
|
+
|
|
1743
|
+
const SimdLdSt simdLdSt[2] = {
|
|
1744
|
+
{ 0b0011110101, 0b00111100010, 0b00111100011, 0b00011100, Inst::kIdLdur_v }, // ldr_v
|
|
1745
|
+
{ 0b0011110100, 0b00111100000, 0b00111100001, 0b00000000, Inst::kIdStur_v } // str_v
|
|
1746
|
+
};
|
|
1747
|
+
|
|
1748
|
+
const SimdLdpStp simdLdpStp[4] = {
|
|
1749
|
+
{ 0b0010110001, 0b0000000000 }, // ldnp_v
|
|
1750
|
+
{ 0b0010110101, 0b0010110011 }, // ldp_v
|
|
1751
|
+
{ 0b0010110000, 0b0000000000 }, // stnp_v
|
|
1752
|
+
{ 0b0010110100, 0b0010110010 } // stp_v
|
|
1753
|
+
};
|
|
1754
|
+
|
|
1755
|
+
const SimdLdurStur simdLdurStur[2] = {
|
|
1756
|
+
{ 0b0011110001000000000000 }, // ldur_v
|
|
1757
|
+
{ 0b0011110000000000000000 } // stur_v
|
|
1758
|
+
};
|
|
1759
|
+
|
|
1760
|
+
const SimdMoviMvni simdMoviMvni[2] = {
|
|
1761
|
+
{ 0b0000111100000000000001, 0 }, // movi_v
|
|
1762
|
+
{ 0b0000111100000000000001, 1 } // mvni_v
|
|
1763
|
+
};
|
|
1764
|
+
|
|
1765
|
+
const SimdShift simdShift[40] = {
|
|
1766
|
+
{ 0b0000000000000000000000, 0b0000111100000000100011, 1, kVO_V_B8H4S2 }, // rshrn_v
|
|
1767
|
+
{ 0b0000000000000000000000, 0b0100111100000000100011, 1, kVO_V_B16H8S4 }, // rshrn2_v
|
|
1768
|
+
{ 0b0000000000000000000000, 0b0000111100000000010101, 0, kVO_V_Any }, // shl_v
|
|
1769
|
+
{ 0b0000000000000000000000, 0b0000111100000000100001, 1, kVO_V_B8H4S2 }, // shrn_v
|
|
1770
|
+
{ 0b0000000000000000000000, 0b0100111100000000100001, 1, kVO_V_B16H8S4 }, // shrn2_v
|
|
1771
|
+
{ 0b0000000000000000000000, 0b0010111100000000010101, 0, kVO_V_Any }, // sli_v
|
|
1772
|
+
{ 0b0000111000100000010111, 0b0000000000000000000000, 1, kVO_SV_Any }, // sqrshl_v
|
|
1773
|
+
{ 0b0000000000000000000000, 0b0000111100000000100111, 1, kVO_SV_B8H4S2 }, // sqrshrn_v
|
|
1774
|
+
{ 0b0000000000000000000000, 0b0100111100000000100111, 1, kVO_V_B16H8S4 }, // sqrshrn2_v
|
|
1775
|
+
{ 0b0000000000000000000000, 0b0010111100000000100011, 1, kVO_SV_B8H4S2 }, // sqrshrun_v
|
|
1776
|
+
{ 0b0000000000000000000000, 0b0110111100000000100011, 1, kVO_V_B16H8S4 }, // sqrshrun2_v
|
|
1777
|
+
{ 0b0000111000100000010011, 0b0000111100000000011101, 0, kVO_SV_Any }, // sqshl_v
|
|
1778
|
+
{ 0b0000000000000000000000, 0b0010111100000000011001, 0, kVO_SV_Any }, // sqshlu_v
|
|
1779
|
+
{ 0b0000000000000000000000, 0b0000111100000000100101, 1, kVO_SV_B8H4S2 }, // sqshrn_v
|
|
1780
|
+
{ 0b0000000000000000000000, 0b0100111100000000100101, 1, kVO_V_B16H8S4 }, // sqshrn2_v
|
|
1781
|
+
{ 0b0000000000000000000000, 0b0010111100000000100001, 1, kVO_SV_B8H4S2 }, // sqshrun_v
|
|
1782
|
+
{ 0b0000000000000000000000, 0b0110111100000000100001, 1, kVO_V_B16H8S4 }, // sqshrun2_v
|
|
1783
|
+
{ 0b0000000000000000000000, 0b0010111100000000010001, 1, kVO_V_Any }, // sri_v
|
|
1784
|
+
{ 0b0000111000100000010101, 0b0000000000000000000000, 0, kVO_V_Any }, // srshl_v
|
|
1785
|
+
{ 0b0000000000000000000000, 0b0000111100000000001001, 1, kVO_V_Any }, // srshr_v
|
|
1786
|
+
{ 0b0000000000000000000000, 0b0000111100000000001101, 1, kVO_V_Any }, // srsra_v
|
|
1787
|
+
{ 0b0000111000100000010001, 0b0000000000000000000000, 0, kVO_V_Any }, // sshl_v
|
|
1788
|
+
{ 0b0000000000000000000000, 0b0000111100000000101001, 0, kVO_V_B8H4S2 }, // sshll_v
|
|
1789
|
+
{ 0b0000000000000000000000, 0b0100111100000000101001, 0, kVO_V_B16H8S4 }, // sshll2_v
|
|
1790
|
+
{ 0b0000000000000000000000, 0b0000111100000000000001, 1, kVO_V_Any }, // sshr_v
|
|
1791
|
+
{ 0b0000000000000000000000, 0b0000111100000000000101, 1, kVO_V_Any }, // ssra_v
|
|
1792
|
+
{ 0b0010111000100000010111, 0b0000000000000000000000, 0, kVO_SV_Any }, // uqrshl_v
|
|
1793
|
+
{ 0b0000000000000000000000, 0b0010111100000000100111, 1, kVO_SV_B8H4S2 }, // uqrshrn_v
|
|
1794
|
+
{ 0b0000000000000000000000, 0b0110111100000000100111, 1, kVO_V_B16H8S4 }, // uqrshrn2_v
|
|
1795
|
+
{ 0b0010111000100000010011, 0b0010111100000000011101, 0, kVO_SV_Any }, // uqshl_v
|
|
1796
|
+
{ 0b0000000000000000000000, 0b0010111100000000100101, 1, kVO_SV_B8H4S2 }, // uqshrn_v
|
|
1797
|
+
{ 0b0000000000000000000000, 0b0110111100000000100101, 1, kVO_V_B16H8S4 }, // uqshrn2_v
|
|
1798
|
+
{ 0b0010111000100000010101, 0b0000000000000000000000, 0, kVO_V_Any }, // urshl_v
|
|
1799
|
+
{ 0b0000000000000000000000, 0b0010111100000000001001, 1, kVO_V_Any }, // urshr_v
|
|
1800
|
+
{ 0b0000000000000000000000, 0b0010111100000000001101, 1, kVO_V_Any }, // ursra_v
|
|
1801
|
+
{ 0b0010111000100000010001, 0b0000000000000000000000, 0, kVO_V_Any }, // ushl_v
|
|
1802
|
+
{ 0b0000000000000000000000, 0b0010111100000000101001, 0, kVO_V_B8H4S2 }, // ushll_v
|
|
1803
|
+
{ 0b0000000000000000000000, 0b0110111100000000101001, 0, kVO_V_B16H8S4 }, // ushll2_v
|
|
1804
|
+
{ 0b0000000000000000000000, 0b0010111100000000000001, 1, kVO_V_Any }, // ushr_v
|
|
1805
|
+
{ 0b0000000000000000000000, 0b0010111100000000000101, 1, kVO_V_Any } // usra_v
|
|
1806
|
+
};
|
|
1807
|
+
|
|
1808
|
+
const SimdShiftES simdShiftES[2] = {
|
|
1809
|
+
{ 0b0010111000100001001110, kVO_V_B8H4S2 }, // shll_v
|
|
1810
|
+
{ 0b0110111000100001001110, kVO_V_B16H8S4 } // shll2_v
|
|
1811
|
+
};
|
|
1812
|
+
|
|
1813
|
+
const SimdSm3tt simdSm3tt[4] = {
|
|
1814
|
+
{ 0b1100111001000000100000 }, // sm3tt1a_v
|
|
1815
|
+
{ 0b1100111001000000100001 }, // sm3tt1b_v
|
|
1816
|
+
{ 0b1100111001000000100010 }, // sm3tt2a_v
|
|
1817
|
+
{ 0b1100111001000000100011 } // sm3tt2b_v
|
|
1818
|
+
};
|
|
1819
|
+
|
|
1820
|
+
const SimdSmovUmov simdSmovUmov[2] = {
|
|
1821
|
+
{ 0b0000111000000000001011, kVO_V_BHS, 1 }, // smov_v
|
|
1822
|
+
{ 0b0000111000000000001111, kVO_V_Any, 0 } // umov_v
|
|
1823
|
+
};
|
|
1824
|
+
|
|
1825
|
+
const SimdSxtlUxtl simdSxtlUxtl[4] = {
|
|
1826
|
+
{ 0b0000111100000000101001, kVO_V_B8H4S2 }, // sxtl_v
|
|
1827
|
+
{ 0b0100111100000000101001, kVO_V_B16H8S4 }, // sxtl2_v
|
|
1828
|
+
{ 0b0010111100000000101001, kVO_V_B8H4S2 }, // uxtl_v
|
|
1829
|
+
{ 0b0110111100000000101001, kVO_V_B16H8S4 } // uxtl2_v
|
|
1830
|
+
};
|
|
1831
|
+
|
|
1832
|
+
const SimdTblTbx simdTblTbx[2] = {
|
|
1833
|
+
{ 0b0000111000000000000000 }, // tbl_v
|
|
1834
|
+
{ 0b0000111000000000000100 } // tbx_v
|
|
1835
|
+
};
|
|
1836
|
+
// ----------------------------------------------------------------------------
|
|
1837
|
+
// ${EncodingData:End}
|
|
1838
|
+
|
|
1839
|
+
} // {EncodingData}
|
|
1840
|
+
} // {InstDB}
|
|
1841
|
+
|
|
1842
|
+
/*
|
|
1843
|
+
// ${CommonData:Begin}
|
|
1844
|
+
// ------------------- Automatically generated, do not edit -------------------
|
|
1845
|
+
const InstDB::CommonInfo InstDB::commonData[] = {
|
|
1846
|
+
{ 0} // #0 [ref=440x]
|
|
1847
|
+
};
|
|
1848
|
+
// ----------------------------------------------------------------------------
|
|
1849
|
+
// ${CommonData:End}
|
|
1850
|
+
*/
|
|
1851
|
+
|
|
1852
|
+
// ArmUtil - Id <-> Name
|
|
1853
|
+
// =====================
|
|
1854
|
+
|
|
1855
|
+
#ifndef ASMJIT_DISABLE_TEXT
|
|
1856
|
+
// ${NameData:Begin}
|
|
1857
|
+
// ------------------- Automatically generated, do not edit -------------------
|
|
1858
|
+
const char InstDB::_nameData[] =
|
|
1859
|
+
"\0" "adc\0" "adcs\0" "addg\0" "adds\0" "addv\0" "adr\0" "adrp\0" "aesd\0" "aese\0" "aesimc\0" "aesmc\0" "and\0"
|
|
1860
|
+
"ands\0" "asr\0" "asrv\0" "at\0" "autda\0" "autdb\0" "autdza\0" "autdzb\0" "autia\0" "autia1716\0" "autiasp\0"
|
|
1861
|
+
"autiaz\0" "autib\0" "autib1716\0" "autibsp\0" "autibz\0" "autiza\0" "autizb\0" "axflag\0" "bcax\0" "bfc\0" "bfcvt\0"
|
|
1862
|
+
"bfcvtn\0" "bfcvtn2\0" "bfdot\0" "bfi\0" "bfmlalb\0" "bfmlalt\0" "bfmmla\0" "bfxil\0" "bic\0" "bics\0" "bif\0"
|
|
1863
|
+
"blr\0" "br\0" "brk\0" "bsl\0" "cas\0" "casa\0" "casab\0" "casah\0" "casal\0" "casalb\0" "casalh\0" "casb\0" "cash\0"
|
|
1864
|
+
"casl\0" "caslb\0" "caslh\0" "casp\0" "caspa\0" "caspal\0" "caspl\0" "cbnz\0" "cbz\0" "ccmn\0" "cfinv\0" "cinc\0"
|
|
1865
|
+
"cinv\0" "clrex\0" "cls\0" "clz\0" "cmhi\0" "cmhs\0" "cmpp\0" "cmtst\0" "cneg\0" "cnt\0" "crc32b\0" "crc32cb\0"
|
|
1866
|
+
"crc32ch\0" "crc32cw\0" "crc32cx\0" "crc32h\0" "crc32w\0" "crc32x\0" "csdb\0" "cset\0" "csetm\0" "csinc\0" "csinv\0"
|
|
1867
|
+
"csneg\0" "dcps1\0" "dcps2\0" "dcps3\0" "dgh\0" "dmb\0" "drps\0" "dsb\0" "dup\0" "eon\0" "eor3\0" "eret\0" "esb\0"
|
|
1868
|
+
"ext\0" "extr\0" "fabd\0" "fabs\0" "facge\0" "facgt\0" "fadd\0" "faddp\0" "fcadd\0" "fccmp\0" "fccmpe\0" "fcmeq\0"
|
|
1869
|
+
"fcmge\0" "fcmgt\0" "fcmla\0" "fcmle\0" "fcmlt\0" "fcmp\0" "fcmpe\0" "fcsel\0" "fcvtas\0" "fcvtau\0" "fcvtl\0"
|
|
1870
|
+
"fcvtl2\0" "fcvtms\0" "fcvtmu\0" "fcvtns\0" "fcvtnu\0" "fcvtps\0" "fcvtpu\0" "fcvtxn\0" "fcvtxn2\0" "fcvtzs\0"
|
|
1871
|
+
"fcvtzu\0" "fdiv\0" "fjcvtzs\0" "fmadd\0" "fmax\0" "fmaxnm\0" "fmaxnmp\0" "fmaxnmv\0" "fmaxp\0" "fmaxv\0" "fmin\0"
|
|
1872
|
+
"fminnm\0" "fminnmp\0" "fminnmv\0" "fminp\0" "fminv\0" "fmla\0" "fmlal\0" "fmlal2\0" "fmls\0" "fmlsl\0" "fmlsl2\0"
|
|
1873
|
+
"fmov\0" "fmsub\0" "fmul\0" "fmulx\0" "fneg\0" "fnmadd\0" "fnmsub\0" "fnmul\0" "frecpe\0" "frecps\0" "frecpx\0"
|
|
1874
|
+
"frint32x\0" "frint32z\0" "frint64x\0" "frint64z\0" "frinta\0" "frinti\0" "frintm\0" "frintn\0" "frintp\0" "frintx\0"
|
|
1875
|
+
"frintz\0" "frsqrte\0" "frsqrts\0" "fsqrt\0" "fsub\0" "gmi\0" "hint\0" "hlt\0" "hvc\0" "ins\0" "isb\0" "ld1\0"
|
|
1876
|
+
"ld1r\0" "ld2\0" "ld2r\0" "ld3\0" "ld3r\0" "ld4\0" "ld4r\0" "ldadd\0" "ldadda\0" "ldaddab\0" "ldaddah\0" "ldaddal\0"
|
|
1877
|
+
"ldaddalb\0" "ldaddalh\0" "ldaddb\0" "ldaddh\0" "ldaddl\0" "ldaddlb\0" "ldaddlh\0" "ldar\0" "ldarb\0" "ldarh\0"
|
|
1878
|
+
"ldaxp\0" "ldaxr\0" "ldaxrb\0" "ldaxrh\0" "ldclr\0" "ldclra\0" "ldclrab\0" "ldclrah\0" "ldclral\0" "ldclralb\0"
|
|
1879
|
+
"ldclralh\0" "ldclrb\0" "ldclrh\0" "ldclrl\0" "ldclrlb\0" "ldclrlh\0" "ldeor\0" "ldeora\0" "ldeorab\0" "ldeorah\0"
|
|
1880
|
+
"ldeoral\0" "ldeoralb\0" "ldeoralh\0" "ldeorb\0" "ldeorh\0" "ldeorl\0" "ldeorlb\0" "ldeorlh\0" "ldg\0" "ldgm\0"
|
|
1881
|
+
"ldlar\0" "ldlarb\0" "ldlarh\0" "ldnp\0" "ldp\0" "ldpsw\0" "ldr\0" "ldraa\0" "ldrab\0" "ldrb\0" "ldrh\0" "ldrsb\0"
|
|
1882
|
+
"ldrsh\0" "ldrsw\0" "ldset\0" "ldseta\0" "ldsetab\0" "ldsetah\0" "ldsetal\0" "ldsetalb\0" "ldsetalh\0" "ldsetb\0"
|
|
1883
|
+
"ldseth\0" "ldsetl\0" "ldsetlb\0" "ldsetlh\0" "ldsmax\0" "ldsmaxa\0" "ldsmaxab\0" "ldsmaxah\0" "ldsmaxal\0"
|
|
1884
|
+
"ldsmaxalb\0" "ldsmaxalh\0" "ldsmaxb\0" "ldsmaxh\0" "ldsmaxl\0" "ldsmaxlb\0" "ldsmaxlh\0" "ldsmin\0" "ldsmina\0"
|
|
1885
|
+
"ldsminab\0" "ldsminah\0" "ldsminal\0" "ldsminalb\0" "ldsminalh\0" "ldsminb\0" "ldsminh\0" "ldsminl\0" "ldsminlb\0"
|
|
1886
|
+
"ldsminlh\0" "ldtr\0" "ldtrb\0" "ldtrh\0" "ldtrsb\0" "ldtrsh\0" "ldtrsw\0" "ldumax\0" "ldumaxa\0" "ldumaxab\0"
|
|
1887
|
+
"ldumaxah\0" "ldumaxal\0" "ldumaxalb\0" "ldumaxalh\0" "ldumaxb\0" "ldumaxh\0" "ldumaxl\0" "ldumaxlb\0" "ldumaxlh\0"
|
|
1888
|
+
"ldumin\0" "ldumina\0" "lduminab\0" "lduminah\0" "lduminal\0" "lduminalb\0" "lduminalh\0" "lduminb\0" "lduminh\0"
|
|
1889
|
+
"lduminl\0" "lduminlb\0" "lduminlh\0" "ldur\0" "ldurb\0" "ldurh\0" "ldursb\0" "ldursh\0" "ldursw\0" "ldxp\0" "ldxr\0"
|
|
1890
|
+
"ldxrb\0" "ldxrh\0" "lslv\0" "lsr\0" "lsrv\0" "mneg\0" "movi\0" "movk\0" "movn\0" "movz\0" "mrs\0" "msr\0" "mvn\0"
|
|
1891
|
+
"mvni\0" "negs\0" "ngc\0" "ngcs\0" "nop\0" "not\0" "orn\0" "orr\0" "pacda\0" "pacdb\0" "pacdza\0" "pacdzb\0"
|
|
1892
|
+
"pacga\0" "pmul\0" "pmull\0" "pmull2\0" "pssbb\0" "raddhn\0" "raddhn2\0" "rax1\0" "rbit\0" "rev\0" "rev16\0"
|
|
1893
|
+
"rev32\0" "rev64\0" "ror\0" "rorv\0" "rsubhn\0" "rsubhn2\0" "saba\0" "sabal\0" "sabal2\0" "sabd\0" "sabdl\0"
|
|
1894
|
+
"sabdl2\0" "sadalp\0" "saddl\0" "saddl2\0" "saddlp\0" "saddlv\0" "saddw\0" "saddw2\0" "sbc\0" "sbcs\0" "sbfiz\0"
|
|
1895
|
+
"sbfm\0" "sbfx\0" "scvtf\0" "sdiv\0" "setf16\0" "setf8\0" "sev\0" "sevl\0" "sha1c\0" "sha1h\0" "sha1m\0" "sha1p\0"
|
|
1896
|
+
"sha1su0\0" "sha1su1\0" "sha256h\0" "sha256h2\0" "sha256su0\0" "sha256su1\0" "sha512h\0" "sha512h2\0" "sha512su0\0"
|
|
1897
|
+
"sha512su1\0" "shadd\0" "shsub\0" "sli\0" "sm3partw1\0" "sm3partw2\0" "sm3ss1\0" "sm3tt1a\0" "sm3tt1b\0" "sm3tt2a\0"
|
|
1898
|
+
"sm3tt2b\0" "sm4e\0" "sm4ekey\0" "smaddl\0" "smaxp\0" "smaxv\0" "sminp\0" "sminv\0" "smlal\0" "smlal2\0" "smlsl\0"
|
|
1899
|
+
"smlsl2\0" "smnegl\0" "smov\0" "smsubl\0" "smulh\0" "smull\0" "smull2\0" "sqabs\0" "sqdmlal\0" "sqdmlal2\0"
|
|
1900
|
+
"sqdmlsl\0" "sqdmlsl2\0" "sqdmulh\0" "sqdmull\0" "sqdmull2\0" "sqneg\0" "sqrdmlah\0" "sqrdmlsh\0" "sqrdmulh\0"
|
|
1901
|
+
"sqrshl\0" "sqrshrn\0" "sqrshrn2\0" "sqrshrun\0" "sqrshrun2\0" "sqshl\0" "sqshlu\0" "sqshrn\0" "sqshrn2\0"
|
|
1902
|
+
"sqshrun\0" "sqshrun2\0" "sqsub\0" "sqxtn\0" "sqxtn2\0" "sqxtun\0" "sqxtun2\0" "srhadd\0" "sri\0" "srshl\0" "srshr\0"
|
|
1903
|
+
"srsra\0" "sshl\0" "sshll\0" "sshll2\0" "sshr\0" "ssra\0" "ssubl\0" "ssubl2\0" "ssubw\0" "ssubw2\0" "st1\0" "st2\0"
|
|
1904
|
+
"st2g\0" "st3\0" "st4\0" "stadd\0" "staddb\0" "staddh\0" "staddl\0" "staddlb\0" "staddlh\0" "stclr\0" "stclrb\0"
|
|
1905
|
+
"stclrh\0" "stclrl\0" "stclrlb\0" "stclrlh\0" "steor\0" "steorb\0" "steorh\0" "steorl\0" "steorlb\0" "steorlh\0"
|
|
1906
|
+
"stg\0" "stgm\0" "stgp\0" "stllr\0" "stllrb\0" "stllrh\0" "stlr\0" "stlrb\0" "stlrh\0" "stlxp\0" "stlxr\0" "stlxrb\0"
|
|
1907
|
+
"stlxrh\0" "stnp\0" "stp\0" "str\0" "strb\0" "strh\0" "stset\0" "stsetb\0" "stseth\0" "stsetl\0" "stsetlb\0"
|
|
1908
|
+
"stsetlh\0" "stsmax\0" "stsmaxb\0" "stsmaxh\0" "stsmaxl\0" "stsmaxlb\0" "stsmaxlh\0" "stsmin\0" "stsminb\0"
|
|
1909
|
+
"stsminh\0" "stsminl\0" "stsminlb\0" "stsminlh\0" "sttr\0" "sttrb\0" "sttrh\0" "stumax\0" "stumaxb\0" "stumaxh\0"
|
|
1910
|
+
"stumaxl\0" "stumaxlb\0" "stumaxlh\0" "stumin\0" "stuminb\0" "stuminh\0" "stuminl\0" "stuminlb\0" "stuminlh\0"
|
|
1911
|
+
"stur\0" "sturb\0" "sturh\0" "stxp\0" "stxr\0" "stxrb\0" "stxrh\0" "stz2g\0" "stzg\0" "stzgm\0" "subg\0" "subp\0"
|
|
1912
|
+
"subps\0" "subs\0" "sudot\0" "suqadd\0" "svc\0" "swp\0" "swpa\0" "swpab\0" "swpah\0" "swpal\0" "swpalb\0" "swpalh\0"
|
|
1913
|
+
"swpb\0" "swph\0" "swpl\0" "swplb\0" "swplh\0" "sxtb\0" "sxth\0" "sxtl\0" "sxtl2\0" "sxtw\0" "sys\0" "tbl\0" "tbnz\0"
|
|
1914
|
+
"tbx\0" "tbz\0" "tlbi\0" "trn1\0" "trn2\0" "uaba\0" "uabal\0" "uabal2\0" "uabd\0" "uabdl\0" "uabdl2\0" "uadalp\0"
|
|
1915
|
+
"uaddl\0" "uaddl2\0" "uaddlp\0" "uaddlv\0" "uaddw\0" "uaddw2\0" "ubfiz\0" "ubfm\0" "ubfx\0" "ucvtf\0" "udf\0"
|
|
1916
|
+
"udiv\0" "uhadd\0" "uhsub\0" "umaddl\0" "umaxp\0" "umaxv\0" "uminp\0" "uminv\0" "umlal\0" "umlal2\0" "umlsl\0"
|
|
1917
|
+
"umlsl2\0" "ummla\0" "umnegl\0" "umov\0" "umsubl\0" "umulh\0" "umull\0" "umull2\0" "uqrshl\0" "uqrshrn\0"
|
|
1918
|
+
"uqrshrn2\0" "uqshl\0" "uqshrn\0" "uqshrn2\0" "uqsub\0" "uqxtn\0" "uqxtn2\0" "urecpe\0" "urhadd\0" "urshl\0"
|
|
1919
|
+
"urshr\0" "ursqrte\0" "ursra\0" "usdot\0" "ushl\0" "ushll\0" "ushll2\0" "ushr\0" "usmmla\0" "usqadd\0" "usra\0"
|
|
1920
|
+
"usubl\0" "usubl2\0" "usubw\0" "usubw2\0" "uxtb\0" "uxth\0" "uxtl\0" "uxtl2\0" "uzp1\0" "uzp2\0" "wfe\0" "wfi\0"
|
|
1921
|
+
"xaflag\0" "xar\0" "xpacd\0" "xpaci\0" "xpaclri\0" "yield\0" "zip1\0" "zip2";
|
|
1922
|
+
|
|
1923
|
+
const InstDB::InstNameIndex InstDB::instNameIndex[26] = {
|
|
1924
|
+
{ Inst::kIdAdc , Inst::kIdAnd_v + 1 },
|
|
1925
|
+
{ Inst::kIdB , Inst::kIdBsl_v + 1 },
|
|
1926
|
+
{ Inst::kIdCas , Inst::kIdCnt_v + 1 },
|
|
1927
|
+
{ Inst::kIdDc , Inst::kIdDup_v + 1 },
|
|
1928
|
+
{ Inst::kIdEon , Inst::kIdExt_v + 1 },
|
|
1929
|
+
{ Inst::kIdFabd_v , Inst::kIdFsub_v + 1 },
|
|
1930
|
+
{ Inst::kIdGmi , Inst::kIdGmi + 1 },
|
|
1931
|
+
{ Inst::kIdHint , Inst::kIdHvc + 1 },
|
|
1932
|
+
{ Inst::kIdIc , Inst::kIdIns_v + 1 },
|
|
1933
|
+
{ Inst::kIdNone , Inst::kIdNone + 1 },
|
|
1934
|
+
{ Inst::kIdNone , Inst::kIdNone + 1 },
|
|
1935
|
+
{ Inst::kIdLdadd , Inst::kIdLdur_v + 1 },
|
|
1936
|
+
{ Inst::kIdMadd , Inst::kIdMvni_v + 1 },
|
|
1937
|
+
{ Inst::kIdNeg , Inst::kIdNot_v + 1 },
|
|
1938
|
+
{ Inst::kIdOrn , Inst::kIdOrr_v + 1 },
|
|
1939
|
+
{ Inst::kIdPacda , Inst::kIdPmull2_v + 1 },
|
|
1940
|
+
{ Inst::kIdNone , Inst::kIdNone + 1 },
|
|
1941
|
+
{ Inst::kIdRbit , Inst::kIdRsubhn2_v + 1 },
|
|
1942
|
+
{ Inst::kIdSbc , Inst::kIdSxtl2_v + 1 },
|
|
1943
|
+
{ Inst::kIdTlbi , Inst::kIdTrn2_v + 1 },
|
|
1944
|
+
{ Inst::kIdUbfiz , Inst::kIdUzp2_v + 1 },
|
|
1945
|
+
{ Inst::kIdNone , Inst::kIdNone + 1 },
|
|
1946
|
+
{ Inst::kIdWfe , Inst::kIdWfi + 1 },
|
|
1947
|
+
{ Inst::kIdXaflag , Inst::kIdXtn2_v + 1 },
|
|
1948
|
+
{ Inst::kIdYield , Inst::kIdYield + 1 },
|
|
1949
|
+
{ Inst::kIdZip1_v , Inst::kIdZip2_v + 1 }
|
|
1950
|
+
};
|
|
1951
|
+
// ----------------------------------------------------------------------------
|
|
1952
|
+
// ${NameData:End}
|
|
1953
|
+
#endif
|
|
1954
|
+
|
|
1955
|
+
ASMJIT_END_SUB_NAMESPACE
|
|
1956
|
+
|
|
1957
|
+
#endif // !ASMJIT_NO_AARCH64
|