amaterasu 0.6.0

data/lib/amaterasu/game_boy/cpu/instructions/rotate.rb

@@ -0,0 +1,120 @@
+# frozen_string_literal: true
+
+module Amaterasu
+  module GameBoy
+    class Cpu
+      module Instructions
+        # Holds the logic of all the Rotate instructions.
+        #
+        # - RLCA: Rotate Left Circular A.
+        # - RRCA: Rotate Right Circular A.
+        # - RLA: Rotate Left Through Carry A.
+        # - RRA: Rotate Right Through Carry A.
+        class Rotate < Base
+          include Utils::BitOps
+
+          def initialize(cpu:, operation:)
+            super(cpu:)
+
+            @mnemonic = format_operand(operation).to_s
+            @logic    = build_logic(operation)
+          end
+
+          private
+
+          # Returns a lambda object containing the instruction logic.
+          def build_logic(operation)
+            case operation
+            when :rlca then -> { rlca }
+            when :rrca then -> { rrca }
+            when :rla  then -> { rla }
+            when :rra  then -> { rra }
+            else
+              raise ArgumentError, 'Unknown Rotate operation'
+            end
+          end
+
+          # Rotate Left Circular.
+          # Rotate all bits from the A register to the left.
+          # Bit 7 falls off the left and at the same time:
+          # - Either sets or clears the Carry flag depending on it's value.
+          # - Wraps around the A register and becomes Bit 0.
+          #
+          # Before:  [C] <- [7][6][5][4][3][2][1][0]
+          # After : [C=7]   [6][5][4][3][2][1][0][7] <-
+          #
+          # M-cycle 1: Fetches the opcode and performs the rotate.
+          #
+          def rlca
+            old_bit7 = bit(@registers.a, 7)
+
+            @registers.clear_flags
+            @registers.c_flag = old_bit7 == 1
+
+            @registers.a = (@registers.a << 1) | old_bit7
+          end
+
+          # Rotate Right Circular.
+          # Rotate all bits from the A register to the right.
+          # Bit 0 falls off the right side and at the same time:
+          # - Either sets or clears the Carry flag depending on it's value.
+          # - Wraps around the A register and becomes Bit 7.
+          #
+          # Before:    [7][6][5][4][3][2][1][0] -> [C]
+          # After : -> [0][7][6][5][4][3][2][1]    [C=0]
+          #
+          # M-cycle 1: Fetches the opcode and performs the rotate.
+          #
+          def rrca
+            old_bit0 = bit(@registers.a, 0)
+
+            @registers.clear_flags
+            @registers.c_flag = old_bit0 == 1
+
+            @registers.a = (old_bit0 << 7) | (@registers.a >> 1)
+          end
+
+          # Rotate Left Through Carry.
+          # - Rotate all bits from the A register to the left.
+          # - Bit 7 falls off the left side and becomes the Carry flag.
+          # - The value of Carry flag becomes the new Bit 0.
+          #
+          # Before:  [C] <- [7][6][5][4][3][2][1][0]
+          # After :  [7]    [6][5][4][3][2][1][0][C] <-
+          #
+          # M-cycle 1: Fetches the opcode and performs the rotate.
+          #
+          def rla
+            carry_in = @registers.c_flag
+            old_bit7 = bit(@registers.a, 7)
+
+            @registers.clear_flags
+            @registers.c_flag = old_bit7 == 1
+
+            @registers.a = (@registers.a << 1) | carry_in
+          end
+
+          # Rotate Right Through Carry.
+          # - Rotate all bits from the A register to the right.
+          # - Bit 0 falls off the right side and becomes the Carry flag.
+          # - The previous value of Carry flag becomes the new Bit 0.
+          #
+          # Before:    [7][6][5][4][3][2][1][0] -> [C]
+          # After : -> [C][7][6][5][4][3][2][1]
+          #
+          # M-cycle 1: Fetches the opcode and performs the rotate.
+          #
+          def rra
+            carry_in = @registers.c_flag
+            old_bit0 = bit(@registers.a, 0)
+
+            @registers.clear_flags
+            @registers.c_flag = old_bit0 == 1
+
+            @registers.a = (carry_in << 7) | (@registers.a >> 1)
+          end
+        end
+      end
+    end
+  end
+end

data/lib/amaterasu/game_boy/cpu/instructions/rst.rb

@@ -0,0 +1,33 @@
+# frozen_string_literal: true
+
+module Amaterasu
+  module GameBoy
+    class Cpu
+      module Instructions
+        # Holds the logic of all the RST instructions.
+        class Rst < Base
+          # Creates a Call instruction object with a mnemonic and logic to be executed.
+          def initialize(cpu:, vector:)
+            super(cpu:)
+
+            @mnemonic = "RST $#{format('%02X', vector)}"
+            @logic    = -> { rst(vector) }
+          end
+
+          private
+
+          # This is essentially a CALL, but jumps to a fixed address vector.
+          #
+          # M-cycle 1: Fetches opcode.
+          # M-cycle 2: Stores the msb of the PC into the Stack.
+          # M-cycle 3: Stores the lsb of the PC into the Stack.
+          # M-cycle 4: Jumps to a fixed address vector.
+          def rst(vector)
+            @cpu.stack_push(value: @registers.pc)
+            @cpu.jump_to(address: vector)
+          end
+        end
+      end
+    end
+  end
+end

data/lib/amaterasu/game_boy/cpu/instructions/sbc.rb

@@ -0,0 +1,64 @@
+# frozen_string_literal: true
+
+module Amaterasu
+  module GameBoy
+    class Cpu
+      module Instructions
+        # Handles the logic related to all possible SBC instructions
+        #
+        # - SBC A, r8
+        # - SBC A, [HL]
+        # - SBC A, n8
+        class Sbc < Base
+          # @param cpu [Cpu] Holds a direct reference to the main Cpu object.
+          # @param source [Symbol] Operator, can be a register, :mem_hl, :imm8.
+          def initialize(cpu:, source:)
+            super(cpu:)
+
+            @mnemonic = "SBC A, #{source}"
+            @logic    = build_logic(source)
+          end
+
+          private
+
+          # Builds the logic for all SBC instructions.
+          # Returns a lambda object to be called by the CPU.
+          def build_logic(source)
+            case source
+            when :a      then -> { sbc_a(@registers.a) }
+            when :b      then -> { sbc_a(@registers.b) }
+            when :c      then -> { sbc_a(@registers.c) }
+            when :d      then -> { sbc_a(@registers.d) }
+            when :e      then -> { sbc_a(@registers.e) }
+            when :h      then -> { sbc_a(@registers.h) }
+            when :l      then -> { sbc_a(@registers.l) }
+            when :mem_hl then -> { sbc_a(@cpu.bus_read(address: @registers.hl)) }
+            when :imm8   then -> { sbc_a(@cpu.fetch_next_byte) }
+            else
+              raise ArgumentError, 'Unknown Sbc source'
+            end
+          end
+
+          # Subtracts a given value + Carry flag from register A and stores it back into A.
+          #
+          # - Sets the Zero flag if the result is zero, otherwise clears it.
+          # - Always sets the SBCtraction flag.
+          # - Sets the Half Carry flag if it needed to borrow from Bit 4.
+          # - Sets the Carry flag if it needed to borrow (acc < value).
+          def sbc_a(value)
+            acc = @registers.a
+            carry_in = @registers.c_flag
+            result = @registers.a - (value + carry_in)
+
+            @registers.z_flag = result.nobits?(0xFF)
+            @registers.n_flag = true
+            @registers.h_flag = (acc & 0x0F) < ((value & 0x0F) + carry_in)
+            @registers.c_flag = acc < (value + carry_in)
+
+            @registers.a = result
+          end
+        end
+      end
+    end
+  end
+end

data/lib/amaterasu/game_boy/cpu/instructions/stop.rb

@@ -0,0 +1,19 @@
+# frozen_string_literal: true
+
+module Amaterasu
+  module GameBoy
+    class Cpu
+      module Instructions
+        # Holds the logic for STOP instruction.
+        class Stop < Base
+          def initialize(cpu:)
+            super
+
+            @mnemonic = 'STOP'
+            @logic    = -> { @cpu.fetch_next_byte }
+          end
+        end
+      end
+    end
+  end
+end

data/lib/amaterasu/game_boy/cpu/instructions/sub.rb

@@ -0,0 +1,63 @@
+# frozen_string_literal: true
+
+module Amaterasu
+  module GameBoy
+    class Cpu
+      module Instructions
+        # Handles the logic related to all possible SUB instructions
+        #
+        # - SUB A, r8
+        # - SUB A, [HL]
+        # - SUB A, n8
+        class Sub < Base
+          # @param cpu [Cpu] Holds a direct reference to the main Cpu object.
+          # @param source [Symbol] Operator, can be a register, :mem_hl, :imm8.
+          def initialize(cpu:, source:)
+            super(cpu:)
+
+            @mnemonic = "SUB A, #{format_operand(source)}"
+            @logic    = build_logic(source)
+          end
+
+          private
+
+          # Builds the logic for all SUB instructions.
+          # Returns a lambda object to be called by the CPU.
+          def build_logic(source)
+            case source
+            when :a      then -> { sub_a(@registers.a) }
+            when :b      then -> { sub_a(@registers.b) }
+            when :c      then -> { sub_a(@registers.c) }
+            when :d      then -> { sub_a(@registers.d) }
+            when :e      then -> { sub_a(@registers.e) }
+            when :h      then -> { sub_a(@registers.h) }
+            when :l      then -> { sub_a(@registers.l) }
+            when :mem_hl then -> { sub_a(@cpu.bus_read(address: @registers.hl)) }
+            when :imm8   then -> { sub_a(@cpu.fetch_next_byte) }
+            else
+              -> { raise 'Not implemented Sub operation' }
+            end
+          end
+
+          # Subtracts a given value from register A and stores it back into A.
+          #
+          # - Sets the Zero flag if the result is zero, otherwise clears it.
+          # - Always sets the Subtraction flag.
+          # - Sets the Half Carry flag if it needed to borrow from Bit 4.
+          # - Sets the Carry flag if it needed to borrow (acc < value).
+          def sub_a(value)
+            acc = @registers.a
+            result = @registers.a - value
+
+            @registers.z_flag = result.nobits?(0xFF)
+            @registers.n_flag = true
+            @registers.h_flag = (acc & 0x0F) < (value & 0x0F)
+            @registers.c_flag = acc < value
+
+            @registers.a = result
+          end
+        end
+      end
+    end
+  end
+end

data/lib/amaterasu/game_boy/cpu/instructions/xor.rb

@@ -0,0 +1,60 @@
+# frozen_string_literal: true
+
+module Amaterasu
+  module GameBoy
+    class Cpu
+      module Instructions
+        # Handles the logic related to all possible XOR instructions
+        #
+        # - XOR A, r8
+        # - XOR A, [HL]
+        # - XOR A, n8
+        class Xor < Base
+          # @param cpu [Cpu] Holds a direct reference to the main Cpu object.
+          # @param source [Symbol] Operator, can be a register, :mem_hl, :imm8.
+          def initialize(cpu:, source:)
+            super(cpu:)
+
+            @mnemonic = define_mnemonic(source)
+            @logic    = build_logic(source)
+          end
+
+          private
+
+          def define_mnemonic(source)
+            case source
+            when :mem_hl then 'XOR A, [HL]'
+            when :imm8 then 'XOR A, n8'
+            else "XOR A, #{source.upcase}"
+            end
+          end
+
+          def build_logic(source)
+            case source
+            when :a      then -> { xor_a(@registers.a) }
+            when :b      then -> { xor_a(@registers.b) }
+            when :c      then -> { xor_a(@registers.c) }
+            when :d      then -> { xor_a(@registers.d) }
+            when :e      then -> { xor_a(@registers.e) }
+            when :h      then -> { xor_a(@registers.h) }
+            when :l      then -> { xor_a(@registers.l) }
+            when :mem_hl then -> { xor_a(@cpu.bus_read(address: @registers.hl)) }
+            when :imm8   then -> { xor_a(@cpu.fetch_next_byte) }
+            else
+              raise ArgumentError, 'Unknown Xor source'
+            end
+          end
+
+          def xor_a(value)
+            result = @registers.a ^ value
+
+            @registers.clear_flags
+            @registers.z_flag = result.nobits?(0xFF)
+
+            @registers.a = result
+          end
+        end
+      end
+    end
+  end
+end