HDLRuby 2.11.12 → 3.0.0

data/lib/HDLRuby/hruby_rcsim.rb

@@ -88,8 +88,8 @@ module HDLRuby::High
 
 
 
-    ## Extends the SystemT class for hybrid Ruby-C simulation.
     class SystemT
+        ## Extends the SystemT class for hybrid Ruby-C simulation.
 
         attr_reader :rcsystemT # The access to the C version of the systemT
 
@@ -141,8 +141,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the Scope class for hybrid Ruby-C simulation.
     class Scope
+        ## Extends the Scope class for hybrid Ruby-C simulation.
 
         attr_reader :rcscope # The access to the C version of the scope.
 
@@ -185,25 +185,26 @@ module HDLRuby::High
                 end)
             end
 
-            # # Create and add the behaviors.
-            # if self.each_behavior.any? then
-            #     RCSim.rcsim_add_scope_behaviors(@rcscope,
-            #                                     self.each_behavior.map do |beh|
-            #         # beh.to_rcsim(@rcscope)
-            #         beh.to_rcsim(subowner)
-            #     end)
-            # end
-
-            # # Create and add the connections.
-            # if self.each_connection.any? then
-            #     RCSim.rcsim_add_scope_behaviors(@rcscope, 
-            #                                     self.each_connection.map do |cxt|
-            #         # cxt.to_rcsim(@rcscope)
-            #         cxt.to_rcsim(subowner)
-            #     end)
-            # end
-            rcbehs = self.each_behavior.map {|beh| beh.to_rcsim(subowner)} +
-                self.each_connection.map {|cxt| cxt.to_rcsim(subowner) }
+            # Create and add the behaviors and connections.
+            rcbehs = self.each_behavior.map {|beh| beh.to_rcsim(subowner)} # +
+                # self.each_connection.map {|cxt| cxt.to_rcsim(subowner) }
+            self.each_connection do |cnx|
+                # ICIICI
+                if !cnx.right.is_a?(RefObject) then
+                    rcbehs << cnx.to_rcsim(subowner)
+                else
+                    # puts "cnx.left.object=#{cnx.left.object.fullname} cnx.right.object=#{cnx.right.object.fullname}"
+                    rcbehs << cnx.to_rcsim(subowner)
+                    if cnx.left.is_a?(RefObject) then
+                        sigL = cnx.left.object
+                        prtL = sigL.parent
+                        if prtL.is_a?(SystemT) and prtL.each_inout.any?{|e| e.object_id == sigL.object_id} then
+                            # puts "write to right with sigL=#{sigL.fullname}."
+                            rcbehs << Connection.new(cnx.right.clone,cnx.left.clone).to_rcsim(subowner)
+                        end
+                    end
+                end
+            end
             if rcbehs.any? then
                 RCSim.rcsim_add_scope_behaviors(@rcscope,rcbehs)
             end
@@ -217,8 +218,8 @@ module HDLRuby::High
 
 
 
-    ## Extends the Type class for hybrid Ruby-C simulation.
     class Type
+        ## Extends the Type class for hybrid Ruby-C simulation.
 
         attr_reader :rctype # The access to the C version of the scope.
 
@@ -238,8 +239,8 @@ module HDLRuby::High
         end
     end
 
-    ## Extends the TypeDef class for hybrid Ruby-C simulation.
     class TypeDef
+        ## Extends the TypeDef class for hybrid Ruby-C simulation.
 
         # Generate the C description of the type.
         def to_rcsim
@@ -249,8 +250,8 @@ module HDLRuby::High
         end
     end
 
-    ## Extends the TypeVector class for hybrid Ruby-C simulation.
     class TypeVector
+        ## Extends the TypeVector class for hybrid Ruby-C simulation.
 
         # Generate the C description of the type.
         def to_rcsim
@@ -260,8 +261,8 @@ module HDLRuby::High
         end
     end
 
-    ## Extends the TypeTuple class for hybrid Ruby-C simulation.
     class TypeTuple
+        ## Extends the TypeTuple class for hybrid Ruby-C simulation.
         # Add the possibility to change the direction.
         def direction=(dir)
             @direction = dir == :little ? :little : :big
@@ -276,8 +277,9 @@ module HDLRuby::High
     end
 
 
-    ## Extends the TypeStruct class for hybrid Ruby-C simulation.
     class TypeStruct
+        ## Extends the TypeStruct class for hybrid Ruby-C simulation.
+
         # Add the possibility to change the direction.
         def direction=(dir)
             @direction = dir == :little ? :little : :big
@@ -335,6 +337,18 @@ module HDLRuby::High
                 self.block.each_inner do |inner|
                     refs.delete_if {|r| r.name == inner.name }
                 end
+                # The get the left references: the will be removed from the
+                # events.
+                left_refs = self.block.each_node_deep.select do |node|
+                    node.is_a?(RefObject) && node.leftvalue? && 
+                        !node.parent.is_a?(RefObject) 
+                end.to_a
+                # Keep only one left ref per signal.
+                left_refs.uniq! { |node| node.fullname }
+                # Remove the left refs.
+                left_refs.each do |l| 
+                    refs.delete_if {|r| r.fullname == l.fullname }
+                end
                 # Generate the event.
                 events = refs.map {|ref| Event.new(:anyedge,ref.clone) }
                 # Add them to the behavior for further processing.
@@ -374,19 +388,19 @@ module HDLRuby::High
     end
 
 
-    ## Extends the Behavior class for hybrid Ruby-C simulation.
     class Behavior
+        ## Extends the Behavior class for hybrid Ruby-C simulation.
         include RCSimBehavior
     end
 
-    ## Extends the TimeBehavior class for hybrid Ruby-C simulation.
     class TimeBehavior
+        ## Extends the TimeBehavior class for hybrid Ruby-C simulation.
         include RCSimBehavior
     end
 
 
-    ## Extends the Event class for hybrid Ruby-C simulation.
     class Event
+        ## Extends the Event class for hybrid Ruby-C simulation.
 
         attr_reader :rcevent
 
@@ -404,8 +418,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the SignalI class for hybrid Ruby-C simulation.
     class SignalI
+        ## Extends the SignalI class for hybrid Ruby-C simulation.
 
         attr_reader :rcsignalI
 
@@ -436,8 +450,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the SignalC class for hybrid Ruby-C simulation.
     class SignalC
+        ## Extends the SignalC class for hybrid Ruby-C simulation.
 
         attr_reader :rcsignalC
 
@@ -459,8 +473,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the SystemI class for hybrid Ruby-C simulation.
     class SystemI
+        ## Extends the SystemI class for hybrid Ruby-C simulation.
 
         attr_reader :rcsystemI
 
@@ -496,19 +510,19 @@ module HDLRuby::High
     end
 
 
-    ## Extends the Chunk class for hybrid Ruby-C simulation.
     class Chunk
+        ## Extends the Chunk class for hybrid Ruby-C simulation.
         # TODO!!
     end
 
-    ## Extends the Code class for hybrid Ruby-C simulation.
     class Code
+        ## Extends the Code class for hybrid Ruby-C simulation.
         # TODO!!
     end
 
 
-    ## Extends the Statement class for hybrid Ruby-C simulation.
     class Statement
+        ## Extends the Statement class for hybrid Ruby-C simulation.
 
         attr_reader :rcstatement
 
@@ -519,8 +533,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the Transmit class for hybrid Ruby-C simulation.
     class Transmit
+        ## Extends the Transmit class for hybrid Ruby-C simulation.
         attr_reader :rcstatement
 
         # Generate the C description of the transmit.
@@ -534,8 +548,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the Print class for hybrid Ruby-C simulation.
     class Print
+        ## Extends the Print class for hybrid Ruby-C simulation.
         attr_reader :rcstatement
 
         # Generate the C description of the print.
@@ -554,8 +568,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the TimeTerminate class for hybrid Ruby-C simulation.
     class TimeTerminate
+        ## Extends the TimeTerminate class for hybrid Ruby-C simulation.
         attr_reader :rcstatement
 
         # Generate the C description of the terminate.
@@ -567,15 +581,15 @@ module HDLRuby::High
         end
     end
 
-    ## Extends the Configure class for hybrid Ruby-C simulation.
     class Configure
+        ## Extends the Configure class for hybrid Ruby-C simulation.
         attr_reader :rcstatement
         # TODO!!!
     end
 
     
-    ## Extends the If class for hybrid Ruby-C simulation.
     class If
+        ## Extends the If class for hybrid Ruby-C simulation.
         attr_reader :rcstatement
 
         # Generate the C description of the hardware if.
@@ -597,13 +611,13 @@ module HDLRuby::High
     end
 
 
-    ## Extends the When class for hybrid Ruby-C simulation.
     class When
+        ## Extends the When class for hybrid Ruby-C simulation.
         # Nothing to add.
     end
 
-    ## Extends the Case class for hybrid Ruby-C simulation.
     class Case
+        ## Extends the Case class for hybrid Ruby-C simulation.
         attr_reader :rcstatement
 
         # Generate the C description of the hardware case.
@@ -625,13 +639,13 @@ module HDLRuby::High
     end
 
 
-    ## Extends the Delay class for hybrid Ruby-C simulation.
     class Delay
+        ## Extends the Delay class for hybrid Ruby-C simulation.
         # Nothing to do.
     end
 
-    ## Extends the TimeWait class for hybrid Ruby-C simulation.
     class TimeWait
+        ## Extends the TimeWait class for hybrid Ruby-C simulation.
         attr_reader :rcstatement
 
         # Generate the C description of the time wait.
@@ -645,8 +659,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the TimeRepeat class for hybrid Ruby-C simulation.
     class TimeRepeat
+        ## Extends the TimeRepeat class for hybrid Ruby-C simulation.
         attr_reader :rcstatement
 
         # Generate the C description of the hardware case.
@@ -701,24 +715,25 @@ module HDLRuby::High
         end
     end
 
-    ## Extends the Block class for hybrid Ruby-C simulation.
     class Block
+        ## Extends the Block class for hybrid Ruby-C simulation.
         include RCSimBlock
     end
 
-    ## Extends the TimeBlock class for hybrid Ruby-C simulation.
     class TimeBlock
+        ## Extends the TimeBlock class for hybrid Ruby-C simulation.
         include RCSimBlock
     end
 
 
-    ## Extends the Connection class for hybrid Ruby-C simulation.
     class Connection
+        ## Extends the Connection class for hybrid Ruby-C simulation.
         attr_reader :rcbehavior
 
         # Add recursively any event to +rcevs+ for activativing the 
         # connection from signal +sig+ attached to +rcbehavior+
         def self.add_rcevents(sig,rcevs,rcbehavior)
+            # puts "add_rcevents for sig=#{sig.fullname}"
             # Recurse on sub signals if any.
             sig.each_signal do |sub|
                 Connection.add_rcevents(sub,rcevs,rcbehavior)
@@ -767,8 +782,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the Expression class for hybrid Ruby-C simulation.
     class Expression
+        ## Extends the Expression class for hybrid Ruby-C simulation.
 
         # attr_reader :rcexpression
 
@@ -779,8 +794,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the Value class for hybrid Ruby-C simulation.
     class Value
+        ## Extends the Value class for hybrid Ruby-C simulation.
         # attr_reader :rcexpression
 
         # Generate the C description of the value.
@@ -815,8 +830,8 @@ module HDLRuby::High
         end
     end
 
-    ## Extends the StringE class for hybrid Ruby-C simulation.
     class StringE
+        ## Extends the StringE class for hybrid Ruby-C simulation.
 
         # Generate the C description of the value.
         def to_rcsim
@@ -826,8 +841,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the Cast class for hybrid Ruby-C simulation.
     class Cast
+        ## Extends the Cast class for hybrid Ruby-C simulation.
         # attr_reader :rcexpression
 
         # Generate the C description of the cast.
@@ -846,13 +861,13 @@ module HDLRuby::High
     end
 
 
-    ## Extends the Operation class for hybrid Ruby-C simulation.
     class Operation
+        ## Extends the Operation class for hybrid Ruby-C simulation.
         # Nothing to do.
     end
 
-    ## Extends the Unary class for hybrid Ruby-C simulation.
     class Unary
+        ## Extends the Unary class for hybrid Ruby-C simulation.
         attr_reader :rcexpression
 
         # Generate the C description of the unary operation.
@@ -863,8 +878,8 @@ module HDLRuby::High
         end
     end
 
-    ## Extends the Binary class for hybrid Ruby-C simulation.
     class Binary
+        ## Extends the Binary class for hybrid Ruby-C simulation.
         # attr_reader :rcexpression
 
         # Generate the C description of the binary operation.
@@ -877,8 +892,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the Select class for hybrid Ruby-C simulation.
     class Select
+        ## Extends the Select class for hybrid Ruby-C simulation.
         # attr_reader :rcexpression
 
         # Generate the C description of the select operation.
@@ -898,8 +913,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the Concat class for hybrid Ruby-C simulation.
     class Concat
+        ## Extends the Concat class for hybrid Ruby-C simulation.
         # attr_reader :rcexpression
 
         # Generate the C description of the concat operation.
@@ -920,8 +935,8 @@ module HDLRuby::High
 
 
 
-    ## Extends the Ref class for hybrid Ruby-C simulation.
     class Ref
+        ## Extends the Ref class for hybrid Ruby-C simulation.
         # attr_reader :rcref
         # alias_method :rcexpression, :rcref
 
@@ -932,8 +947,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the RefConcat class for hybrid Ruby-C simulation.
     class RefConcat
+        ## Extends the RefConcat class for hybrid Ruby-C simulation.
         # attr_reader :rcref
         # alias_method :rcexpression, :rcref
 
@@ -953,8 +968,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the RefIndex class for hybrid Ruby-C simulation.
     class RefIndex
+        ## Extends the RefIndex class for hybrid Ruby-C simulation.
         # attr_reader :rcref
         # alias_method :rcexpression, :rcref
 
@@ -967,8 +982,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the RefRange class for hybrid Ruby-C simulation.
     class RefRange
+        ## Extends the RefRange class for hybrid Ruby-C simulation.
         # attr_reader :rcref
         # alias_method :rcexpression, :rcref
 
@@ -983,14 +998,14 @@ module HDLRuby::High
     end
 
 
-    ## Extends the RefName class for hybrid Ruby-C simulation.
     class RefName
+        ## Extends the RefName class for hybrid Ruby-C simulation.
         # Should not be used with rcsim.
     end
 
 
-    ## Extends the RefThis class for hybrid Ruby-C simulation.
     class RefThis 
+        ## Extends the RefThis class for hybrid Ruby-C simulation.
         # attr_reader :rcref
         # alias_method :rcexpression, :rcref
 
@@ -1001,8 +1016,8 @@ module HDLRuby::High
     end
 
 
-    ## Extends the RefObject class for hybrid Ruby-C simulation.
     class RefObject
+        ## Extends the RefObject class for hybrid Ruby-C simulation.
         # attr_reader :rcref
         # alias_method :rcexpression, :rcref
         

data/lib/HDLRuby/hruby_rsim.rb

@@ -12,13 +12,17 @@ module HDLRuby::High
 #
 ########################################################################
 
-    ##
-    # Enhance a system type with Ruby simulation.
+
+
     class SystemT
+        ## Enhance a system type with Ruby simulation.
 
         # Tell if the simulation is in multithread mode or not.
         attr_reader :multithread
 
+        # The current global time.
+        attr_reader :time
+
         ## Add untimed objet +obj+
         def add_untimed(obj)
             @untimeds << obj
@@ -66,6 +70,7 @@ module HDLRuby::High
                 @sig_active.each do |sig|
                     next if (sig.c_value.eql?(sig.f_value))
                     # next if (sig.c_value.to_vstr == sig.f_value.to_vstr)
+                    # puts "for sig=#{sig.fullname}"
                     sig.each_anyedge { |beh| @sig_exec << beh }
                     if (sig.c_value.zero?) then
                         # puts "sig.c_value=#{sig.c_value.content}"
@@ -78,6 +83,7 @@ module HDLRuby::High
                 @sig_active.each { |sig| sig.c_value = sig.f_value }
                 # puts "first @sig_exec.size=#{@sig_exec.size}"
                 @sig_exec.uniq! {|beh| beh.object_id }
+                # puts "now @sig_exec.size=#{@sig_exec.size}"
                 # Display the activated signals.
                 @sig_active.each do |sig|
                     if !shown_values[sig].eql?(sig.f_value) then
@@ -93,9 +99,10 @@ module HDLRuby::High
                 @sig_exec.clear
                 @sig_active.uniq! {|sig| sig.object_id }
                 # puts "@sig_active.size=#{@sig_active.size}"
-                # Advance time.
+                # Compute the nearest next time stamp.
                 @time = (@timed_behaviors.min {|b0,b1|  b0.time <=> b1.time }).time
             end
+            # puts "@time=#{@time}"
             # Display the time
             self.show_time
         end
@@ -322,9 +329,8 @@ module HDLRuby::High
     end
 
 
-    ## 
-    # Describes scopes of system types.
     class Scope
+        ## Enhance a scope with Ruby simulation.
         
         ## Initialize the simulation for system +systemT+.
         def init_sim(systemT)
@@ -335,7 +341,26 @@ module HDLRuby::High
             # Recurse on the systemI.
             self.each_systemI { |sys| sys.init_sim(systemT) }
             # Recurse on the connections.
-            self.each_connection { |cnx| cnx.init_sim(systemT) }
+            # self.each_connection { |cnx| cnx.init_sim(systemT) }
+            self.each_connection do |cnx|
+                # Connection to a real expression?
+                if !cnx.right.is_a?(RefObject) then
+                    # Yes.
+                    cnx.init_sim(systemT)
+                else
+                    # No, maybe the reverse connection is also required.
+                    # puts "cnx.left.object=#{cnx.left.object.fullname} cnx.right.object=#{cnx.right.object.fullname}"
+                    cnx.init_sim(systemT)
+                    if cnx.left.is_a?(RefObject) then
+                        sigL = cnx.left.object
+                        prtL = sigL.parent
+                        if prtL.is_a?(SystemT) and prtL.each_inout.any?{|e| e.object_id == sigL.object_id} then
+                            # puts "write to right with sigL=#{sigL.fullname}."
+                            Connection.new(cnx.right.clone,cnx.left.clone).init_sim(systemT)
+                        end
+                    end
+                end
+            end
             # Recurse on the sub scopes.
             self.each_scope { |sco| sco.init_sim(systemT) }
         end
@@ -393,9 +418,21 @@ module HDLRuby::High
                 # Keep only one ref per signal.
                 refs.uniq! { |node| node.fullname }
                 # puts "refs=#{refs.map {|node| node.fullname}}"
+                # The get the left references: the will be removed from the
+                # events.
+                left_refs = self.block.each_node_deep.select do |node|
+                    node.is_a?(RefObject) && node.leftvalue? && 
+                        !node.parent.is_a?(RefObject) 
+                end.to_a
+                # Keep only one left ref per signal.
+                left_refs.uniq! { |node| node.fullname }
                 # Remove the inner signals from the list.
                 self.block.each_inner do |inner|
-                    refs.delete_if {|r| r.name == inner.name }
+                    refs.delete_if {|r| r.fullname == inner.fullname }
+                end
+                # Remove the left refs.
+                left_refs.each do |l| 
+                    refs.delete_if {|r| r.fullname == l.fullname }
                 end
                 # Generate the event.
                 events = refs.map {|ref| Event.new(:anyedge,ref.clone) }
@@ -494,6 +531,9 @@ module HDLRuby::High
 
         ## Initialize the simulation for +systemT+
         def init_sim(systemT)
+            # Initialize the local time to -1
+            @time = -1
+            @sim = systemT
             # Recurse on the sub signals if any.
             if self.each_signal.any? then
                 self.each_signal {|sig| sig.init_sim(systemT) }
@@ -569,12 +609,16 @@ module HDLRuby::High
 
         ## Assigns +value+ the the reference.
         def assign(mode,value)
-            # Set the next value.
-            @f_value = value
+            # # Set the next value.
+            # @f_value = value
             # Set the mode.
             @mode = mode
-            # puts "assign #{value.content} (#{value.content.class}) with self.type.width=#{self.type.width} while value.type.width=#{value.type.width}" if self.name.to_s.include?("xnor")
-            @f_value = value.cast(self.type) # Cast not always inserted by HDLRuby normally
+            # @f_value = value.cast(self.type) # Cast not always inserted by HDLRuby normally
+            if @sim.time > @time or !value.impedence? then
+                # puts "assign #{value.content} to #{self.fullname}"
+                @f_value = value.cast(self.type) # Cast not always inserted by HDLRuby normally
+                @time = @sim.time
+            end
         end
 
         ## Assigns +value+ at +index+ (integer or range).
@@ -673,7 +717,7 @@ module HDLRuby::High
 
         ## Executes the statement.
         def execute(mode)
-            # puts "execute Transmit in mode=#{mode} for left=#{self.left.object.name}"
+            # puts "execute Transmit in mode=#{mode} for left=#{self.left.object.fullname}" if left.is_a?(RefObject)
             self.left.assign(mode,self.right.execute(mode))
         end
     end
@@ -685,7 +729,11 @@ module HDLRuby::High
         ## Initialize the simulation for system +systemT+.
         def init_sim(systemT)
             self.yes.init_sim(systemT)
-            self.each_noif { |cond,stmnt| stmnt.init_sim(systemT) } 
+            # self.each_noif { |cond,stmnt| stmnt.init_sim(systemT) } 
+            self.each_noif do |cond,stmnt| 
+                cond.init_sim(systemT)
+                stmnt.init_sim(systemT)
+            end
             self.no.init_sim(systemT) if self.no
         end
 
@@ -959,8 +1007,9 @@ module HDLRuby::High
 
         ## Executes the statement.
         def execute(mode)
-            # puts "connection left=#{left} right=#{right}"
-            self.left.assign(mode,self.right.execute(mode))
+            # puts "connection left=#{left.object.fullname}"
+            # self.left.assign(mode,self.right.execute(mode))
+            self.left.assign(:seq,self.right.execute(mode))
         end
     end
 

data/lib/HDLRuby/hruby_rsim_mute.rb

@@ -1,14 +1,13 @@
 require "HDLRuby/hruby_rsim"
 
 ##
-# Library for enhancing the Ruby simulator with VCD support
+# Library for enhancing the Ruby simulator with muted output support
 #
 ########################################################################
 module HDLRuby::High
 
-    ##
-    # Enhance the system type class with VCD support.
     class SystemT
+        # Enhance the system type class with mute support.
 
         ## Initializes the displayer for generating a vcd on +vcdout+
         def show_init(vcdout)