lambdapdk 0.1.56__py3-none-any.whl → 0.2.0rc2__py3-none-any.whl

lambdapdk/sky130/libs/sky130sc.py

@@ -1,211 +1,175 @@
-import os
-import siliconcompiler
-from lambdapdk import register_data_source
+from pathlib import Path
 
+from lambdapdk import LambdaLibrary
+from lambdapdk.sky130 import Sky130PDK
 
-def setup():
+
+class _Sky130_SCLibrary(LambdaLibrary):
     '''
     Skywater130 standard cell library.
     '''
-    process = 'skywater130'
-    stackup = '5M1LI'
-    version = 'v0_0_2'
-
-    dontuse = {
-        'hd': [
-            'sky130_fd_sc_hd__lpflow_bleeder_1',
-            'sky130_fd_sc_hd__lpflow_clkbufkapwr_1',
-            'sky130_fd_sc_hd__lpflow_clkbufkapwr_16',
-            'sky130_fd_sc_hd__lpflow_clkbufkapwr_2',
-            'sky130_fd_sc_hd__lpflow_clkbufkapwr_4',
-            'sky130_fd_sc_hd__lpflow_clkbufkapwr_8',
-            'sky130_fd_sc_hd__lpflow_clkinvkapwr_1',
-            'sky130_fd_sc_hd__lpflow_clkinvkapwr_16',
-            'sky130_fd_sc_hd__lpflow_clkinvkapwr_2',
-            'sky130_fd_sc_hd__lpflow_clkinvkapwr_4',
-            'sky130_fd_sc_hd__lpflow_clkinvkapwr_8',
-            'sky130_fd_sc_hd__lpflow_decapkapwr_12',
-            'sky130_fd_sc_hd__lpflow_decapkapwr_3',
-            'sky130_fd_sc_hd__lpflow_decapkapwr_4',
-            'sky130_fd_sc_hd__lpflow_decapkapwr_6',
-            'sky130_fd_sc_hd__lpflow_decapkapwr_8',
-            'sky130_fd_sc_hd__lpflow_inputiso0n_1',
-            'sky130_fd_sc_hd__lpflow_inputiso0p_1',
-            'sky130_fd_sc_hd__lpflow_inputiso1n_1',
-            'sky130_fd_sc_hd__lpflow_inputiso1p_1',
-            'sky130_fd_sc_hd__lpflow_inputisolatch_1',
-            'sky130_fd_sc_hd__lpflow_isobufsrc_1',
-            'sky130_fd_sc_hd__lpflow_isobufsrc_16',
-            'sky130_fd_sc_hd__lpflow_isobufsrc_2',
-            'sky130_fd_sc_hd__lpflow_isobufsrc_4',
-            'sky130_fd_sc_hd__lpflow_isobufsrc_8',
-            'sky130_fd_sc_hd__lpflow_isobufsrckapwr_16',
-            'sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1',
-            'sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2',
-            'sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4',
-            'sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4',
-            'sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1',
-            'sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2',
-            'sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4'
-        ],
-        'hdll': [
-            'sky130_fd_sc_hdll__inputiso0p_1',
-            'sky130_fd_sc_hdll__inputiso0n_1',
-            'sky130_fd_sc_hdll__inputiso1p_1',
-            'sky130_fd_sc_hdll__inputiso1n_1',
-            'sky130_fd_sc_hdll__isobufsrc_1',
-            'sky130_fd_sc_hdll__isobufsrc_2',
-            'sky130_fd_sc_hdll__isobufsrc_4',
-            'sky130_fd_sc_hdll__isobufsrc_8',
-            'sky130_fd_sc_hdll__isobufsrc_16',
-        ]
-    }
-
-    libs = []
-    for libtype, sites, slow_v in (("hd", ["unithd", "unithddbl"], "1v40"),
-                                   ("hdll", ["unithd", "unithddbl"], "1v44")):
-
-        # This name can later be expanded to the full sky130_fd_sc_{libtype}
-        libname = f"sky130{libtype}"
-        libdir = os.path.join('lambdapdk', 'sky130', 'libs', libname)
-
-        lib = siliconcompiler.Library(libname, package='lambdapdk')
-        register_data_source(lib)
-
-        # version
-        lib.set('package', 'version', version)
-
-        # pdk
-        lib.set('option', 'pdk', process)
-
-        # footprint/type/sites
-        lib.set('asic', 'libarch', libtype)
-        lib.set('asic', 'site', libtype, sites)
-
-        # model files
-        lib.add('output', 'slow', 'nldm',
-                libdir + f'/nldm/sky130_fd_sc_{libtype}__ss_n40C_{slow_v}.lib.gz')
-        lib.add('output', 'typical', 'nldm',
-                libdir + f'/nldm/sky130_fd_sc_{libtype}__tt_025C_1v80.lib.gz')
-        lib.add('output', 'fast', 'nldm',
-                libdir + f'/nldm/sky130_fd_sc_{libtype}__ff_100C_1v95.lib.gz')
-
-        lib.add('output', stackup, 'lef', libdir + f'/lef/sky130_fd_sc_{libtype}_merged.lef')
-        lib.add('output', stackup, 'gds', libdir + f'/gds/sky130_fd_sc_{libtype}.gds')
-        lib.add('output', stackup, 'cdl', libdir + f'/cdl/sky130_fd_sc_{libtype}.cdl')
-
-        lib.add('output', 'rtl', 'verilog', libdir + f'/verilog/sky130_fd_sc_{libtype}.v')
-        lib.add('output', 'rtl', 'verilog', libdir + '/verilog/primitives.v')
-
-        # antenna cells
-        lib.add('asic', 'cells', 'antenna', f'sky130_fd_sc_{libtype}__diode_2')
-
-        # clock buffers
-        lib.add('asic', 'cells', 'clkbuf', [f'sky130_fd_sc_{libtype}__clkbuf_1',
-                                            f'sky130_fd_sc_{libtype}__clkbuf_2',
-                                            f'sky130_fd_sc_{libtype}__clkbuf_4',
-                                            f'sky130_fd_sc_{libtype}__clkbuf_8',
-                                            f'sky130_fd_sc_{libtype}__clkbuf_16'])
-        if libtype == "hdll":
-            lib.add('asic', 'cells', 'clkbuf', [f'sky130_fd_sc_{libtype}__clkbuf_6',
-                                                f'sky130_fd_sc_{libtype}__clkbuf_12'])
-
-        # hold cells
-        lib.add('asic', 'cells', 'hold', [f'sky130_fd_sc_{libtype}__dlygate4sd1_1',
-                                          f'sky130_fd_sc_{libtype}__dlygate4sd2_1',
-                                          f'sky130_fd_sc_{libtype}__dlygate4sd3_1'])
-        if libtype == "hd":
-            lib.add('asic', 'cells', 'hold', [f'sky130_fd_sc_{libtype}__dlymetal6s2s_1',
-                                              f'sky130_fd_sc_{libtype}__dlymetal6s4s_1',
-                                              f'sky130_fd_sc_{libtype}__dlymetal6s6s_1'])
-
-        # filler
-        lib.add('asic', 'cells', 'filler', [f'sky130_fd_sc_{libtype}__fill_1',
-                                            f'sky130_fd_sc_{libtype}__fill_2',
-                                            f'sky130_fd_sc_{libtype}__fill_4',
-                                            f'sky130_fd_sc_{libtype}__fill_8'])
-
-        # Tapcell
-        lib.add('asic', 'cells', 'tap', f'sky130_fd_sc_{libtype}__tapvpwrvgnd_1')
-
-        # Endcap
-        lib.add('asic', 'cells', 'endcap', f'sky130_fd_sc_{libtype}__decap_4')
-
-        lib.add('asic', 'cells', 'dontuse', [
-            f'sky130_fd_sc_{libtype}__probe_p_8',
-            f'sky130_fd_sc_{libtype}__probec_p_8'
-        ])
-        lib.add('asic', 'cells', 'dontuse', dontuse[libtype])
-
-        # tie cells
-        lib.add('asic', 'cells', 'tie', f'sky130_fd_sc_{libtype}__conb_1')
-
-        # Defaults for OpenROAD tool variables
-        lib.set('option', 'var', 'openroad_place_density', '0.60')
-        lib.set('option', 'var', 'openroad_pad_global_place', '0')
-        lib.set('option', 'var', 'openroad_pad_detail_place', '0')
-        lib.set('option', 'var', 'openroad_macro_place_halo', ['40', '40'])
-        lib.set('option', 'var', 'openroad_macro_place_channel', ['80', '80'])
-
-        # Yosys techmap
-        # TODO: separate this out properly for the different libraries
-        lib.add('option', 'file', 'yosys_techmap', libdir + '/techmap/yosys/cells_latch.v')
-        lib.add('option', 'file', 'yosys_tbufmap', libdir + '/techmap/yosys/cells_tristatebuf.v')
-        if libtype == "hd":
-            lib.add('option', 'file', 'yosys_addermap', libdir + '/techmap/yosys/cells_adders.v')
-
-        # Openroad specific files
-        lib.set('option', 'file', 'openroad_pdngen',
-                libdir + '/apr/openroad/pdngen.tcl')
-        lib.set('option', 'file', 'openroad_global_connect',
-                libdir + '/apr/openroad/global_connect.tcl')
-        lib.set('option', 'file', 'openroad_tapcells',
-                libdir + '/apr/openroad/tapcell.tcl')
-
-        lib.set('option', 'var', 'yosys_abc_clock_multiplier', "1000")  # convert from ns -> ps
-
-        cap_table = {
-            'hd': "0.011pF",
-            'hdll': "0.011pF"
-        }
-        lib.set('option', 'var', 'yosys_abc_constraint_load', cap_table[libtype])
-
-        lib.set('option', 'var', 'yosys_driver_cell', f"sky130_fd_sc_{libtype}__buf_4")
-        lib.set('option', 'var', 'yosys_buffer_cell', f"sky130_fd_sc_{libtype}__buf_4")
-        lib.set('option', 'var', 'yosys_buffer_input', "A")
-        lib.set('option', 'var', 'yosys_buffer_output', "X")
-        for tool in ('yosys', 'openroad'):
-            lib.set('option', 'var', f'{tool}_tiehigh_cell', f"sky130_fd_sc_{libtype}__conb_1")
-            lib.set('option', 'var', f'{tool}_tiehigh_port', "HI")
-            lib.set('option', 'var', f'{tool}_tielow_cell', f"sky130_fd_sc_{libtype}__conb_1")
-            lib.set('option', 'var', f'{tool}_tielow_port', "LO")
-
-        # Bambu setup
-        lib.set('option', 'var', 'bambu_clock_multiplier', "1")  # convert from ns -> ns
-
-        libs.append(lib)
-
-        std_lambda_lib = siliconcompiler.Library(f'lambdalib_stdlib_{libname}',
-                                                 package='lambdapdk')
-        register_data_source(std_lambda_lib)
-        std_lambda_lib.add('option', 'ydir', libdir + '/lambda/stdlib')
-        std_lambda_lib.use(lib)
-        std_lambda_lib.set('asic', 'logiclib', lib.design)
-        libs.append(std_lambda_lib)
-        aux_lambda_lib = siliconcompiler.Library(f'lambdalib_auxlib_{libname}',
-                                                 package='lambdapdk')
-        register_data_source(aux_lambda_lib)
-        aux_lambda_lib.add('option', 'ydir', libdir + '/lambda/auxlib')
-        aux_lambda_lib.use(std_lambda_lib)
-        aux_lambda_lib.use(lib)
-        aux_lambda_lib.set('asic', 'logiclib', lib.design)
-        aux_lambda_lib.set('option', 'library', std_lambda_lib.design)
-        libs.append(aux_lambda_lib)
-
-    return libs
-
-
-#########################
-if __name__ == "__main__":
-    for lib in setup(siliconcompiler.Chip('<lib>')):
-        lib.write_manifest(f'{lib.top()}.json')
+    def __init__(self, libtype, slow_v):
+        super().__init__()
+        self.set_name(f"sky130{libtype}")
+
+        self.set_version("v0_0_2")
+
+        self.add_asic_pdk(Sky130PDK())
+
+        self.add_asic_site(["unithd", "unithddbl"])
+
+        lib_path = Path("lambdapdk", "sky130", "libs", self.name)
+
+        with self.active_dataroot("lambdapdk"):
+            for corner_name, filename in [
+                    ('slow', f'sky130_fd_sc_{libtype}__ss_n40C_{slow_v}.lib.gz'),
+                    ('typical', f'sky130_fd_sc_{libtype}__tt_025C_1v80.lib.gz'),
+                    ('fast', f'sky130_fd_sc_{libtype}__ff_100C_1v95.lib.gz')]:
+                with self.active_fileset(f"models.timing.{corner_name}.nldm"):
+                    self.add_file(lib_path / "nldm" / filename)
+                    self.add_asic_libcornerfileset(corner_name, "nldm")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("models.physical"):
+                self.add_file(lib_path / "lef" / f"sky130_fd_sc_{libtype}_merged.lef")
+                self.add_file(lib_path / "gds" / f"sky130_fd_sc_{libtype}.gds")
+                self.add_asic_aprfileset()
+
+            with self.active_fileset("models.lvs"):
+                self.add_file(lib_path / "cdl" / f"sky130_fd_sc_{libtype}.cdl")
+                self.add_asic_aprfileset()
+
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "verilog" / f"sky130_fd_sc_{libtype}.v")
+                self.add_file(lib_path / "verilog" / "primitives.v")
+
+            # antenna cells
+            self.add_asic_celllist('antenna', f'sky130_fd_sc_{libtype}__diode_2')
+
+            # clock buffers
+            self.add_asic_celllist('clkbuf', [f'sky130_fd_sc_{libtype}__clkbuf_1',
+                                              f'sky130_fd_sc_{libtype}__clkbuf_2',
+                                              f'sky130_fd_sc_{libtype}__clkbuf_4',
+                                              f'sky130_fd_sc_{libtype}__clkbuf_8',
+                                              f'sky130_fd_sc_{libtype}__clkbuf_16'])
+            if libtype == "hdll":
+                self.add_asic_celllist('clkbuf', [f'sky130_fd_sc_{libtype}__clkbuf_6',
+                                                  f'sky130_fd_sc_{libtype}__clkbuf_12'])
+
+            # hold cells
+            self.add_asic_celllist('hold', [f'sky130_fd_sc_{libtype}__dlygate4sd1_1',
+                                            f'sky130_fd_sc_{libtype}__dlygate4sd2_1',
+                                            f'sky130_fd_sc_{libtype}__dlygate4sd3_1'])
+            if libtype == "hd":
+                self.add_asic_celllist('hold', [f'sky130_fd_sc_{libtype}__dlymetal6s2s_1',
+                                                f'sky130_fd_sc_{libtype}__dlymetal6s4s_1',
+                                                f'sky130_fd_sc_{libtype}__dlymetal6s6s_1'])
+
+            # filler
+            self.add_asic_celllist('filler', [f'sky130_fd_sc_{libtype}__fill_1',
+                                              f'sky130_fd_sc_{libtype}__fill_2',
+                                              f'sky130_fd_sc_{libtype}__fill_4',
+                                              f'sky130_fd_sc_{libtype}__fill_8'])
+
+            # Tapcell
+            self.add_asic_celllist('tap', f'sky130_fd_sc_{libtype}__tapvpwrvgnd_1')
+
+            # Endcap
+            self.add_asic_celllist('endcap', f'sky130_fd_sc_{libtype}__decap_4')
+
+            self.add_asic_celllist('dontuse', [
+                f'sky130_fd_sc_{libtype}__probe_p_8',
+                f'sky130_fd_sc_{libtype}__probec_p_8'
+            ])
+
+            if libtype == "hd":
+                self.add_asic_celllist('dontuse', [
+                    'sky130_fd_sc_hd__lpflow_bleeder_1',
+                    'sky130_fd_sc_hd__lpflow_clkbufkapwr_1',
+                    'sky130_fd_sc_hd__lpflow_clkbufkapwr_16',
+                    'sky130_fd_sc_hd__lpflow_clkbufkapwr_2',
+                    'sky130_fd_sc_hd__lpflow_clkbufkapwr_4',
+                    'sky130_fd_sc_hd__lpflow_clkbufkapwr_8',
+                    'sky130_fd_sc_hd__lpflow_clkinvkapwr_1',
+                    'sky130_fd_sc_hd__lpflow_clkinvkapwr_16',
+                    'sky130_fd_sc_hd__lpflow_clkinvkapwr_2',
+                    'sky130_fd_sc_hd__lpflow_clkinvkapwr_4',
+                    'sky130_fd_sc_hd__lpflow_clkinvkapwr_8',
+                    'sky130_fd_sc_hd__lpflow_decapkapwr_12',
+                    'sky130_fd_sc_hd__lpflow_decapkapwr_3',
+                    'sky130_fd_sc_hd__lpflow_decapkapwr_4',
+                    'sky130_fd_sc_hd__lpflow_decapkapwr_6',
+                    'sky130_fd_sc_hd__lpflow_decapkapwr_8',
+                    'sky130_fd_sc_hd__lpflow_inputiso0n_1',
+                    'sky130_fd_sc_hd__lpflow_inputiso0p_1',
+                    'sky130_fd_sc_hd__lpflow_inputiso1n_1',
+                    'sky130_fd_sc_hd__lpflow_inputiso1p_1',
+                    'sky130_fd_sc_hd__lpflow_inputisolatch_1',
+                    'sky130_fd_sc_hd__lpflow_isobufsrc_1',
+                    'sky130_fd_sc_hd__lpflow_isobufsrc_16',
+                    'sky130_fd_sc_hd__lpflow_isobufsrc_2',
+                    'sky130_fd_sc_hd__lpflow_isobufsrc_4',
+                    'sky130_fd_sc_hd__lpflow_isobufsrc_8',
+                    'sky130_fd_sc_hd__lpflow_isobufsrckapwr_16',
+                    'sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1',
+                    'sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2',
+                    'sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4',
+                    'sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4',
+                    'sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1',
+                    'sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2',
+                    'sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4'])
+            elif libtype == "hdll":
+                self.add_asic_celllist('dontuse', [
+                    'sky130_fd_sc_hdll__inputiso0p_1',
+                    'sky130_fd_sc_hdll__inputiso0n_1',
+                    'sky130_fd_sc_hdll__inputiso1p_1',
+                    'sky130_fd_sc_hdll__inputiso1n_1',
+                    'sky130_fd_sc_hdll__isobufsrc_1',
+                    'sky130_fd_sc_hdll__isobufsrc_2',
+                    'sky130_fd_sc_hdll__isobufsrc_4',
+                    'sky130_fd_sc_hdll__isobufsrc_8',
+                    'sky130_fd_sc_hdll__isobufsrc_16'])
+
+            # tie cells
+            self.add_asic_celllist('tie', f'sky130_fd_sc_{libtype}__conb_1')
+
+        # Setup for yosys
+        with self.active_dataroot("lambdapdk"):
+            cap_table = {
+                'hd': 11,
+                'hdll': 11
+            }
+            self.set_yosys_driver_cell(f"sky130_fd_sc_{libtype}__buf_4")
+            self.set_yosys_buffer_cell(f"sky130_fd_sc_{libtype}__buf_4", "A", "X")
+            self.set_yosys_tielow_cell(f"sky130_fd_sc_{libtype}__conb_1", "LO")
+            self.set_yosys_tiehigh_cell(f"sky130_fd_sc_{libtype}__conb_1", "HI")
+            self.set_yosys_abc(1000, cap_table[libtype])
+            self.set_yosys_tristatebuffer_map(
+                lib_path / "techmap" / "yosys" / "cells_tristatebuf.v")
+            if libtype == "hd":
+                self.set_yosys_adder_map(lib_path / "techmap" / "yosys" / "cells_adders.v")
+            self.add_yosys_tech_map(lib_path / "techmap" / "yosys" / "cells_latch.v")
+
+        # Setup for OpenROAD
+        with self.active_dataroot("lambdapdk"):
+            self.set_openroad_placement_density(0.60)
+            self.set_openroad_tielow_cell(f"sky130_fd_sc_{libtype}__conb_1", "LO")
+            self.set_openroad_tiehigh_cell(f"sky130_fd_sc_{libtype}__conb_1", "HI")
+            self.set_openroad_macro_placement_halo(40, 40)
+            self.set_openroad_tapcells_file(lib_path / "apr" / "openroad" / "tapcell.tcl")
+            self.add_openroad_global_connect_file(
+                lib_path / "apr" / "openroad" / "global_connect.tcl")
+            self.add_openroad_power_grid_file(lib_path / "apr" / "openroad" / "pdngen.tcl")
+
+        # Setup for bambu
+        self.set_bambu_clock_multiplier(1)
+
+
+class Sky130_SCHDLibrary(_Sky130_SCLibrary):
+    def __init__(self):
+        super().__init__("hd", "1v40")
+
+
+class Sky130_SCHDLLLibrary(_Sky130_SCLibrary):
+    def __init__(self):
+        super().__init__("hdll", "1v44")

lambdapdk/sky130/libs/sky130sram.py

@@ -1,45 +1,55 @@
-from siliconcompiler import Chip, Library
-from lambdapdk import register_data_source
+from pathlib import Path
 
+from lambdalib import LambalibTechLibrary
+from lambdapdk import LambdaLibrary, _LambdaPath
+from lambdapdk.sky130 import Sky130PDK
 
-def setup():
-    libs = []
-    stackup = '5M1LI'
 
-    for config in ('64x256',):
-        mem_name = f'sky130_sram_1rw1r_{config}_8'
-        lib = Library(mem_name, package='lambdapdk')
-        register_data_source(lib)
-        path_base = 'lambdapdk/sky130/libs/sky130sram'
-        lib.add('output', stackup, 'lef', f'{path_base}/{mem_name}/lef/{mem_name}.lef.gz')
-        lib.add('output', stackup, 'gds', f'{path_base}/{mem_name}/gds/{mem_name}.gds')
-        lib.add('output', stackup, 'cdl', f'{path_base}/{mem_name}/spice/{mem_name}.lvs.sp')
+class Sky130_SRAM_64x256(LambdaLibrary):
+    def __init__(self):
+        super().__init__()
+        self.set_name('sky130_sram_1rw1r_64x256_8')
 
-        for corner in ('slow', 'fast', 'typical'):
-            lib.add('output', corner, 'nldm',
-                    f'{path_base}/{mem_name}/nldm/{mem_name}_TT_1p8V_25C.lib')
-            lib.add('output', corner, 'spice', f'{path_base}/{mem_name}/spice/{mem_name}.sp')
+        self.add_asic_pdk(Sky130PDK())
 
-        lib.set('option', 'file', 'openroad_pdngen',
-                f'{path_base}/apr/openroad/pdngen.tcl')
-        lib.set('option', 'file', 'openroad_global_connect',
-                f'{path_base}/apr/openroad/global_connect.tcl')
+        path_base = Path('lambdapdk', 'sky130', 'libs', "sky130sram")
 
-        libs.append(lib)
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("models.timing.nldm"):
+                self.add_file(path_base / self.name / "nldm" / f"{self.name}_TT_1p8V_25C.lib")
+                self.add_asic_libcornerfileset("generic", "nldm")
 
-    lambda_lib = Library('lambdalib_sky130sram', package='lambdapdk')
-    register_data_source(lambda_lib)
-    lambda_lib.add('option', 'ydir', 'lambdapdk/sky130/libs/sky130sram/lambda')
-    for lib in libs:
-        lambda_lib.use(lib)
-        lambda_lib.add('asic', 'macrolib', lib.design)
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("models.physical"):
+                self.add_file(path_base / self.name / "lef" / f"{self.name}.lef.gz")
+                self.add_file(path_base / self.name / "gds" / f"{self.name}.gds")
+                self.add_asic_aprfileset()
 
-    libs.append(lambda_lib)
+            with self.active_fileset("models.lvs"):
+                self.add_file(path_base / self.name / "spice" / f"{self.name}.lvs.sp",
+                              filetype="cdl")
+                self.add_asic_aprfileset()
 
-    return libs
+            with self.active_fileset("models.spice"):
+                self.add_file(path_base / self.name / "spice" / f"{self.name}.sp")
 
+        with self.active_dataroot("lambdapdk"):
+            self.add_openroad_power_grid_file(path_base / "apr" / "openroad" / "pdngen.tcl")
+            self.add_openroad_global_connect_file(
+                path_base / "apr" / "openroad" / "global_connect.tcl")
 
-#########################
-if __name__ == "__main__":
-    for lib in setup(Chip('<lib>')):
-        lib.write_manifest(f'{lib.top()}.json')
+
+class Sky130Lambdalib_SinglePort(LambalibTechLibrary, _LambdaPath):
+    def __init__(self):
+        super().__init__("la_spram", [
+            Sky130_SRAM_64x256])
+        self.set_name("sky130_la_spram")
+
+        # version
+        self.set_version("v1")
+
+        lib_path = Path("lambdapdk", "sky130", "libs", "sky130sram")
+
+        with self.active_dataroot("lambdapdk"):
+            with self.active_fileset("rtl"):
+                self.add_file(lib_path / "lambda" / "la_spram.v")

{lambdapdk-0.1.56.dist-info → lambdapdk-0.2.0rc2.dist-info}/METADATA

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: lambdapdk
-Version: 0.1.56
+Version: 0.2.0rc2
 Summary: Library of open source Process Design Kits
 Author: Zero ASIC
 License:                                  Apache License
@@ -198,13 +198,13 @@ Project-URL: Homepage, https://github.com/siliconcompiler/lambdapdk
 Requires-Python: >=3.8
 Description-Content-Type: text/markdown
 License-File: LICENSE
-Requires-Dist: siliconcompiler>=0.27.0
+Requires-Dist: siliconcompiler>=0.34.3
+Requires-Dist: lambdalib==0.4.0-rc1
 Provides-Extra: test
 Requires-Dist: flake8==7.3.0; extra == "test"
 Requires-Dist: pytest==8.4.1; extra == "test"
 Requires-Dist: pytest-timeout==2.4.0; extra == "test"
 Requires-Dist: tclint==0.6.0; extra == "test"
-Requires-Dist: lambdalib==0.3.4; extra == "test"
 Requires-Dist: sc-leflib==0.4.0; extra == "test"
 Requires-Dist: Jinja2==3.1.6; extra == "test"
 Dynamic: license-file

lambdapdk-0.2.0rc2.dist-info/RECORD

@@ -0,0 +1,30 @@
+lambdapdk/__init__.py,sha256=D-5fAL_Hac2rIqC0BbYuxGQcuUL-75VN76VZr8kFDRY,9830
+lambdapdk/asap7/__init__.py,sha256=UprA-NESlw20dBdqhXhx-bfJ4d7KWotJYrWGmVbYbG8,4304
+lambdapdk/asap7/libs/asap7sc7p5t.py,sha256=x1sOg01b0ayYUOe38WweazGu51VmOkgthrBEk3bbcBY,4858
+lambdapdk/asap7/libs/fakeio7.py,sha256=E7jWC9YVhRdtDQlbkuRdhFY_0Lum209Bb7xSF0U68W4,773
+lambdapdk/asap7/libs/fakekit7.py,sha256=3AG-xHYw9PyCwdMKeo529DiXreejYUxd16uS2t1Bt1M,597
+lambdapdk/asap7/libs/fakeram7.py,sha256=JWENktqmrc_qzEG7X_ZAdBQJdLuvCl2UpXtWeM8y3Xo,6268
+lambdapdk/freepdk45/__init__.py,sha256=mtdE-xFQRn7nnHsT8izcLJ1hBd_DNL13NHijh6hsmZE,3159
+lambdapdk/freepdk45/libs/fakeram45.py,sha256=hJD7NuVI-JdXNR2t4a3I8_vgfHEESZL7HQ5SGnsGVQg,2391
+lambdapdk/freepdk45/libs/nangate45.py,sha256=RCgqS616U9N_rEyyCoEsyXHMoDobtXUKDoJPKT0yYEY,3551
+lambdapdk/gf180/__init__.py,sha256=uuF94SUCl0U1ibBFLfIVHjcXlAJLNtwogn9ZZBuh0j0,9154
+lambdapdk/gf180/libs/gf180io.py,sha256=KiwhmxycF2R7pl8EGsacStR5WkmGSIk8vIf7WD2gdwQ,4312
+lambdapdk/gf180/libs/gf180mcu.py,sha256=Xt0jorrrJhK0R2UDAE-LslrY3S_1yXC4LQi-TQ1ARRw,8419
+lambdapdk/gf180/libs/gf180sram.py,sha256=72mAAov8QZgIQczeUJZxWWikqYekQYFvnXarCzl2jTo,4664
+lambdapdk/ihp130/__init__.py,sha256=3IdnV5_rKzxwBD3pD2SX7LsQfYlUd-YZF0m96fH3KoE,4697
+lambdapdk/ihp130/libs/sg13g2_io.py,sha256=kA2jT3AZfyNhR5RowhOLiOA2Sb9_uB5TJyF70b1x150,2995
+lambdapdk/ihp130/libs/sg13g2_sram.py,sha256=SabP-8icWhhGpBiMZkFlgSAYVGBg7vxVTOdPAixwq9g,3273
+lambdapdk/ihp130/libs/sg13g2_stdcell.py,sha256=dA8yOp2VHfFZn0K3LF1sp-ril0JP6DT86BZHr9A_Z2k,5010
+lambdapdk/interposer/__init__.py,sha256=woXKReyGw3yuoaQ6FZIFWJ7twxCdtx_tmVFSwhyJTJ0,4739
+lambdapdk/interposer/_generator.py,sha256=Uf9i7gfjgntUpLmxsRmOfzfgh26iQ3nfZmrdIx59UtA,15016
+lambdapdk/interposer/libs/bumps.py,sha256=gLz05sR72NFVZkbEXB1LRUQVkIegrE8JeH5gyBOVRWE,1730
+lambdapdk/sky130/__init__.py,sha256=85rjv0QvpP4VWG0N7UBSyWCH5YATZW8jlXA1O-54nXU,3790
+lambdapdk/sky130/libs/sky130io.py,sha256=ZlgkezCpgFc13zy5UqpIRHGQvT1KdKiXTsADf-T8_80,2105
+lambdapdk/sky130/libs/sky130sc.py,sha256=msRNxMT6MtbGEhX3hfMOo2JL5EQpAaqYhy-hGxcAjAI,8553
+lambdapdk/sky130/libs/sky130sram.py,sha256=jvAI4RyQMOrQl6u9dZtZaOr7-uAfPB-9iZhsVgu7g8I,2117
+lambdapdk-0.2.0rc2.dist-info/licenses/LICENSE,sha256=2TIhku7H905BsYloYoCwat2JsdkGYc_qsnvU-p7P-IQ,10766
+lambdapdk-0.2.0rc2.dist-info/METADATA,sha256=QG_tdOjUUkznBq2HgY85aygwSUqYXfu01kRF_uvQ2wQ,13953
+lambdapdk-0.2.0rc2.dist-info/WHEEL,sha256=_zCd3N1l69ArxyTb8rzEoP9TpbYXkqRFSNOD5OuxnTs,91
+lambdapdk-0.2.0rc2.dist-info/entry_points.txt,sha256=M3DJNwBP0Yv7_3UQ4scoJihxcHncDMkD2cEAbaK2XOw,61
+lambdapdk-0.2.0rc2.dist-info/top_level.txt,sha256=5wk8psZwCcQgSjOlWTihBeDkSIViGn8I3j5yALbs59s,10
+lambdapdk-0.2.0rc2.dist-info/RECORD,,

lambdapdk-0.2.0rc2.dist-info/entry_points.txt

@@ -0,0 +1,2 @@
+[siliconcompiler.docs]
+linkcode = lambdapdk:get_docs_codeurl

lambdapdk-0.1.56.dist-info/RECORD

@@ -1,30 +0,0 @@
-lambdapdk/__init__.py,sha256=dl2LeS3DgDIZgLSBya7T7q778FD4opRq2ALBx3q1vK0,4195
-lambdapdk/asap7/__init__.py,sha256=kC5GWACMeA4MKKpKcJBDHoeZLvZKwdRLi3HQCajl1H8,4745
-lambdapdk/asap7/libs/asap7sc7p5t.py,sha256=kIli2Uuyc3ubG9P58rpu4SJxod8A306-ORZmP95X9vg,6052
-lambdapdk/asap7/libs/fakeio7.py,sha256=t4OQ7uljg4jh14bf3o4wsnI5gNkLEVpMs1drispc7LE,978
-lambdapdk/asap7/libs/fakekit7.py,sha256=IpyAHOCXBPsHfAxW-vS0Vyanws9WnEUDnMbUAzxY2U4,604
-lambdapdk/asap7/libs/fakeram7.py,sha256=oAn6nLYPGaWG7hOvCzPCoa_lrLMH30LwipFXQ1qSNZg,1559
-lambdapdk/freepdk45/__init__.py,sha256=6Iv6zJ0It0KfH4e_3bjn_Yyv5uaLCh4N_tTZm_MoBEQ,3672
-lambdapdk/freepdk45/libs/fakeram45.py,sha256=vX0bqC2xKP1sfihJKEHzHTighNqLOB2egavzIiQdAr4,1245
-lambdapdk/freepdk45/libs/nangate45.py,sha256=XaIhQvwzpp2bsAShG2J3hMbL4ISAbqxOnO692KBG0m0,4892
-lambdapdk/gf180/__init__.py,sha256=fbJ4z0kXBftIHAsgyqJmbpZfpWf9PWuxXgoQoG3IhQ0,7963
-lambdapdk/gf180/libs/gf180io.py,sha256=6WgsALOaKWYG6RfNFz6sg36zmfZZFl2HnsDWOWYy1UM,2751
-lambdapdk/gf180/libs/gf180mcu.py,sha256=N2ny2_OJu_0xJAEqyZ1aA0mO3vvy5u5NmXALFhlqpJs,6811
-lambdapdk/gf180/libs/gf180sram.py,sha256=gE64wFo8wjDwmhL7_0UTl1gyfUZ8IeaILHNjwu7vfrg,2294
-lambdapdk/ihp130/__init__.py,sha256=7UQLjQDjr3O8H-d3ds8tF9qZINUXcS46H-ZKVcyCZ2g,5500
-lambdapdk/ihp130/libs/sg13g2_io.py,sha256=60Xxh2DC2n_nHsCKKjgQpNYqxf4ZuxxgfM3aaIfJBTQ,2158
-lambdapdk/ihp130/libs/sg13g2_sram.py,sha256=CgzCB7TfOtFmBAy7Ogqlm4_f0ZCqcVDydCLdYkfDc1A,2081
-lambdapdk/ihp130/libs/sg13g2_stdcell.py,sha256=rm1g2u8Bm-OpJzaEe2COiX-yfI18Cy96fRv3ikNwYoM,5097
-lambdapdk/interposer/__init__.py,sha256=UEAxcCLo-0OheGNCOTLpwnF05HFAz3agStFBTdcgS58,4039
-lambdapdk/interposer/_generator.py,sha256=Uf9i7gfjgntUpLmxsRmOfzfgh26iQ3nfZmrdIx59UtA,15016
-lambdapdk/interposer/libs/bumps.py,sha256=-b3cNOUBKhzzxoWI1Y047g9Ev3a_mXBMLKO3BaHo1sI,771
-lambdapdk/sky130/__init__.py,sha256=3-UxGN0A1Kr8tlq8hVkxqDjENuzkkK1MOqHteoih9m8,4113
-lambdapdk/sky130/libs/sky130io.py,sha256=wFmN9RC98f6OFM5E5acCUgPe35tVTKciJzIcUBlmumo,2029
-lambdapdk/sky130/libs/sky130sc.py,sha256=vDqt7mpEmwBwuK1kkEr6g2lxBs7dMpEs3HkbS8EC85Y,9606
-lambdapdk/sky130/libs/sky130sram.py,sha256=CFn8Ve0WkHBdzlkZ1LPZJ3hknwE2IZGkV5Cr2qdiOZ8,1643
-lambdapdk-0.1.56.dist-info/licenses/LICENSE,sha256=2TIhku7H905BsYloYoCwat2JsdkGYc_qsnvU-p7P-IQ,10766
-lambdapdk-0.1.56.dist-info/METADATA,sha256=ZBVQYX1mZDlUT8Y7uwguP9ZKSDH_uFJIPUKct-YQRgA,13964
-lambdapdk-0.1.56.dist-info/WHEEL,sha256=_zCd3N1l69ArxyTb8rzEoP9TpbYXkqRFSNOD5OuxnTs,91
-lambdapdk-0.1.56.dist-info/entry_points.txt,sha256=pAsLLqQtg5qJC63h5tDVuyxPYJAkaTUgAxscBiohPD4,128
-lambdapdk-0.1.56.dist-info/top_level.txt,sha256=5wk8psZwCcQgSjOlWTihBeDkSIViGn8I3j5yALbs59s,10
-lambdapdk-0.1.56.dist-info/RECORD,,

lambdapdk-0.1.56.dist-info/entry_points.txt

@@ -1,4 +0,0 @@
-[siliconcompiler.docs]
-libs = lambdapdk:get_docs_libraries
-linkcode = lambdapdk:get_docs_codeurl
-pdks = lambdapdk:get_docs_pdks