@aptre/v86 0.5.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (111) hide show
  1. package/LICENSE +22 -0
  2. package/LICENSE.MIT +22 -0
  3. package/Readme.md +237 -0
  4. package/dist/v86.browser.js +26666 -0
  5. package/dist/v86.browser.js.map +7 -0
  6. package/dist/v86.js +26632 -0
  7. package/dist/v86.js.map +7 -0
  8. package/gen/generate_analyzer.ts +512 -0
  9. package/gen/generate_interpreter.ts +522 -0
  10. package/gen/generate_jit.ts +624 -0
  11. package/gen/rust_ast.ts +107 -0
  12. package/gen/util.ts +35 -0
  13. package/gen/x86_table.ts +1836 -0
  14. package/lib/9p.ts +1547 -0
  15. package/lib/filesystem.ts +1879 -0
  16. package/lib/marshall.ts +168 -0
  17. package/lib/softfloat/softfloat.c +32501 -0
  18. package/lib/zstd/zstddeclib.c +13520 -0
  19. package/package.json +75 -0
  20. package/src/acpi.ts +267 -0
  21. package/src/browser/dummy_screen.ts +106 -0
  22. package/src/browser/fake_network.ts +1771 -0
  23. package/src/browser/fetch_network.ts +361 -0
  24. package/src/browser/filestorage.ts +124 -0
  25. package/src/browser/inbrowser_network.ts +57 -0
  26. package/src/browser/keyboard.ts +564 -0
  27. package/src/browser/main.ts +3415 -0
  28. package/src/browser/mouse.ts +255 -0
  29. package/src/browser/network.ts +142 -0
  30. package/src/browser/print_stats.ts +336 -0
  31. package/src/browser/screen.ts +978 -0
  32. package/src/browser/serial.ts +316 -0
  33. package/src/browser/speaker.ts +1223 -0
  34. package/src/browser/starter.ts +1688 -0
  35. package/src/browser/wisp_network.ts +332 -0
  36. package/src/browser/worker_bus.ts +64 -0
  37. package/src/buffer.ts +652 -0
  38. package/src/bus.ts +78 -0
  39. package/src/const.ts +128 -0
  40. package/src/cpu.ts +2891 -0
  41. package/src/dma.ts +474 -0
  42. package/src/elf.ts +251 -0
  43. package/src/floppy.ts +1778 -0
  44. package/src/ide.ts +3455 -0
  45. package/src/io.ts +504 -0
  46. package/src/iso9660.ts +317 -0
  47. package/src/kernel.ts +250 -0
  48. package/src/lib.ts +645 -0
  49. package/src/log.ts +149 -0
  50. package/src/main.ts +199 -0
  51. package/src/ne2k.ts +1589 -0
  52. package/src/pci.ts +815 -0
  53. package/src/pit.ts +406 -0
  54. package/src/ps2.ts +820 -0
  55. package/src/rtc.ts +537 -0
  56. package/src/rust/analysis.rs +101 -0
  57. package/src/rust/codegen.rs +2660 -0
  58. package/src/rust/config.rs +3 -0
  59. package/src/rust/control_flow.rs +425 -0
  60. package/src/rust/cpu/apic.rs +658 -0
  61. package/src/rust/cpu/arith.rs +1207 -0
  62. package/src/rust/cpu/call_indirect.rs +2 -0
  63. package/src/rust/cpu/cpu.rs +4501 -0
  64. package/src/rust/cpu/fpu.rs +923 -0
  65. package/src/rust/cpu/global_pointers.rs +112 -0
  66. package/src/rust/cpu/instructions.rs +2486 -0
  67. package/src/rust/cpu/instructions_0f.rs +5261 -0
  68. package/src/rust/cpu/ioapic.rs +316 -0
  69. package/src/rust/cpu/memory.rs +351 -0
  70. package/src/rust/cpu/misc_instr.rs +613 -0
  71. package/src/rust/cpu/mod.rs +16 -0
  72. package/src/rust/cpu/modrm.rs +133 -0
  73. package/src/rust/cpu/pic.rs +402 -0
  74. package/src/rust/cpu/sse_instr.rs +361 -0
  75. package/src/rust/cpu/string.rs +701 -0
  76. package/src/rust/cpu/vga.rs +175 -0
  77. package/src/rust/cpu_context.rs +69 -0
  78. package/src/rust/dbg.rs +98 -0
  79. package/src/rust/gen/analyzer.rs +3807 -0
  80. package/src/rust/gen/analyzer0f.rs +3992 -0
  81. package/src/rust/gen/interpreter.rs +4447 -0
  82. package/src/rust/gen/interpreter0f.rs +5404 -0
  83. package/src/rust/gen/jit.rs +5080 -0
  84. package/src/rust/gen/jit0f.rs +5547 -0
  85. package/src/rust/gen/mod.rs +14 -0
  86. package/src/rust/jit.rs +2443 -0
  87. package/src/rust/jit_instructions.rs +7881 -0
  88. package/src/rust/js_api.rs +6 -0
  89. package/src/rust/leb.rs +46 -0
  90. package/src/rust/lib.rs +29 -0
  91. package/src/rust/modrm.rs +330 -0
  92. package/src/rust/opstats.rs +249 -0
  93. package/src/rust/page.rs +15 -0
  94. package/src/rust/paging.rs +25 -0
  95. package/src/rust/prefix.rs +15 -0
  96. package/src/rust/profiler.rs +155 -0
  97. package/src/rust/regs.rs +38 -0
  98. package/src/rust/softfloat.rs +286 -0
  99. package/src/rust/state_flags.rs +27 -0
  100. package/src/rust/wasmgen/mod.rs +2 -0
  101. package/src/rust/wasmgen/wasm_builder.rs +1047 -0
  102. package/src/rust/wasmgen/wasm_opcodes.rs +221 -0
  103. package/src/rust/zstd.rs +105 -0
  104. package/src/sb16.ts +1928 -0
  105. package/src/state.ts +359 -0
  106. package/src/uart.ts +472 -0
  107. package/src/vga.ts +2791 -0
  108. package/src/virtio.ts +1756 -0
  109. package/src/virtio_balloon.ts +273 -0
  110. package/src/virtio_console.ts +372 -0
  111. package/src/virtio_net.ts +326 -0
@@ -0,0 +1,624 @@
1
+ #!/usr/bin/env node
2
+
3
+ import assert from 'node:assert/strict'
4
+ import fs from 'node:fs'
5
+ import path from 'node:path'
6
+ import url from 'node:url'
7
+
8
+ import x86_table from './x86_table.js'
9
+ import type { X86Encoding } from './x86_table.js'
10
+ import * as rust_ast from './rust_ast.js'
11
+ import type { Statement, SwitchCase } from './rust_ast.js'
12
+ import {
13
+ hex,
14
+ get_switch_value,
15
+ get_switch_exist,
16
+ finalize_table_rust,
17
+ } from './util.js'
18
+
19
+ const __dirname = url.fileURLToPath(new URL('.', import.meta.url))
20
+ const OUT_DIR = path.join(__dirname, '..', 'src/rust/gen/')
21
+
22
+ fs.mkdirSync(OUT_DIR, { recursive: true })
23
+
24
+ const table_arg = get_switch_value('--table')
25
+ const gen_all = get_switch_exist('--all')
26
+ const to_generate: Record<string, boolean> = {
27
+ jit: gen_all || table_arg === 'jit',
28
+ jit0f: gen_all || table_arg === 'jit0f',
29
+ }
30
+
31
+ assert(
32
+ Object.keys(to_generate).some((k) => to_generate[k]),
33
+ 'Pass --table [jit|jit0f] or --all to pick which tables to generate',
34
+ )
35
+
36
+ gen_table()
37
+
38
+ function gen_read_imm_call(
39
+ op: Readonly<X86Encoding>,
40
+ size_variant: number | undefined,
41
+ ): string | undefined {
42
+ const size = op.os || op.opcode % 2 === 1 ? size_variant : 8
43
+
44
+ if (
45
+ op.imm8 ||
46
+ op.imm8s ||
47
+ op.imm16 ||
48
+ op.imm1632 ||
49
+ op.imm32 ||
50
+ op.immaddr
51
+ ) {
52
+ if (op.imm8) {
53
+ return 'ctx.cpu.read_imm8()'
54
+ } else if (op.imm8s) {
55
+ return 'ctx.cpu.read_imm8s()'
56
+ } else {
57
+ if (op.immaddr) {
58
+ // immaddr: depends on address size
59
+ return 'ctx.cpu.read_moffs()'
60
+ } else {
61
+ assert(op.imm1632 || op.imm16 || op.imm32)
62
+
63
+ if ((op.imm1632 && size === 16) || op.imm16) {
64
+ return 'ctx.cpu.read_imm16()'
65
+ } else {
66
+ assert((op.imm1632 && size === 32) || op.imm32)
67
+ return 'ctx.cpu.read_imm32()'
68
+ }
69
+ }
70
+ }
71
+ } else {
72
+ return undefined
73
+ }
74
+ }
75
+
76
+ function gen_call(name: string, args: string[] = []): string {
77
+ return `${name}(${args.join(', ')});`
78
+ }
79
+
80
+ /*
81
+ * Current naming scheme:
82
+ * instr(16|32|)_(66|F2|F3)?0F?[0-9a-f]{2}(_[0-7])?(_mem|_reg|)
83
+ */
84
+ function make_instruction_name(
85
+ encoding: Readonly<X86Encoding>,
86
+ size: number | undefined,
87
+ ): string {
88
+ const suffix = encoding.os ? String(size) : ''
89
+ const opcode_hex = hex(encoding.opcode & 0xff, 2)
90
+ const first_prefix =
91
+ (encoding.opcode & 0xff00) === 0
92
+ ? ''
93
+ : hex((encoding.opcode >> 8) & 0xff, 2)
94
+ const second_prefix =
95
+ (encoding.opcode & 0xff0000) === 0
96
+ ? ''
97
+ : hex((encoding.opcode >> 16) & 0xff, 2)
98
+ const fixed_g_suffix =
99
+ encoding.fixed_g === undefined ? '' : `_${encoding.fixed_g}`
100
+
101
+ assert(
102
+ first_prefix === '' ||
103
+ first_prefix === '0F' ||
104
+ first_prefix === 'F2' ||
105
+ first_prefix === 'F3',
106
+ )
107
+ assert(
108
+ second_prefix === '' ||
109
+ second_prefix === '66' ||
110
+ second_prefix === 'F2' ||
111
+ second_prefix === 'F3',
112
+ )
113
+
114
+ return `instr${suffix}_${second_prefix}${first_prefix}${opcode_hex}${fixed_g_suffix}`
115
+ }
116
+
117
+ function gen_instruction_body(
118
+ encodings: Readonly<X86Encoding>[],
119
+ size: number | undefined,
120
+ ): Statement[] {
121
+ const encoding = encodings[0]
122
+
123
+ const has_66: Readonly<X86Encoding>[] = []
124
+ const has_F2: Readonly<X86Encoding>[] = []
125
+ const has_F3: Readonly<X86Encoding>[] = []
126
+ const no_prefix: Readonly<X86Encoding>[] = []
127
+
128
+ for (const e of encodings) {
129
+ if (e.opcode >>> 16 === 0x66) has_66.push(e)
130
+ else if (((e.opcode >>> 8) & 0xff) === 0xf2 || e.opcode >>> 16 === 0xf2)
131
+ has_F2.push(e)
132
+ else if (((e.opcode >>> 8) & 0xff) === 0xf3 || e.opcode >>> 16 === 0xf3)
133
+ has_F3.push(e)
134
+ else no_prefix.push(e)
135
+ }
136
+
137
+ if (has_F2.length || has_F3.length) {
138
+ assert(
139
+ (encoding.opcode & 0xff0000) === 0 ||
140
+ (encoding.opcode & 0xff00) === 0x0f00,
141
+ )
142
+ }
143
+
144
+ if (has_66.length) {
145
+ assert((encoding.opcode & 0xff00) === 0x0f00)
146
+ }
147
+
148
+ const code: Statement[] = []
149
+
150
+ if (encoding.e) {
151
+ code.push('let modrm_byte = ctx.cpu.read_imm8();')
152
+ }
153
+
154
+ if (has_66.length || has_F2.length || has_F3.length) {
155
+ const if_blocks: { condition: string; body: Statement[] }[] = []
156
+
157
+ if (has_66.length) {
158
+ const body = gen_instruction_body_after_prefix(has_66, size)
159
+ if_blocks.push({
160
+ condition: 'ctx.cpu.prefixes & prefix::PREFIX_66 != 0',
161
+ body,
162
+ })
163
+ }
164
+ if (has_F2.length) {
165
+ const body = gen_instruction_body_after_prefix(has_F2, size)
166
+ if_blocks.push({
167
+ condition: 'ctx.cpu.prefixes & prefix::PREFIX_F2 != 0',
168
+ body,
169
+ })
170
+ }
171
+ if (has_F3.length) {
172
+ const body = gen_instruction_body_after_prefix(has_F3, size)
173
+ if_blocks.push({
174
+ condition: 'ctx.cpu.prefixes & prefix::PREFIX_F3 != 0',
175
+ body,
176
+ })
177
+ }
178
+
179
+ const else_block = {
180
+ body: gen_instruction_body_after_prefix(no_prefix, size),
181
+ }
182
+
183
+ return ([] as Statement[]).concat(code, {
184
+ type: 'if-else',
185
+ if_blocks,
186
+ else_block,
187
+ })
188
+ } else {
189
+ return ([] as Statement[]).concat(
190
+ code,
191
+ gen_instruction_body_after_prefix(encodings, size),
192
+ )
193
+ }
194
+ }
195
+
196
+ function gen_instruction_body_after_prefix(
197
+ encodings: Readonly<X86Encoding>[],
198
+ size: number | undefined,
199
+ ): Statement[] {
200
+ const encoding = encodings[0]
201
+
202
+ if (encoding.fixed_g !== undefined) {
203
+ assert(encoding.e)
204
+
205
+ // instruction with modrm byte where the middle 3 bits encode the instruction
206
+
207
+ // group by opcode without prefix plus middle bits of modrm byte
208
+ const cases: Record<number, Readonly<X86Encoding>> = encodings.reduce(
209
+ (cases_by_opcode: Record<number, Readonly<X86Encoding>>, case_) => {
210
+ assert(typeof case_.fixed_g === 'number')
211
+ cases_by_opcode[
212
+ (case_.opcode & 0xffff) | (case_.fixed_g << 16)
213
+ ] = case_
214
+ return cases_by_opcode
215
+ },
216
+ Object.create(null) as Record<number, Readonly<X86Encoding>>,
217
+ )
218
+ const sorted = Object.values(cases).sort(
219
+ (e1, e2) => (e1.fixed_g ?? 0) - (e2.fixed_g ?? 0),
220
+ )
221
+
222
+ return [
223
+ {
224
+ type: 'switch',
225
+ condition: 'modrm_byte >> 3 & 7',
226
+ cases: sorted.map((case_): SwitchCase => {
227
+ const fixed_g = case_.fixed_g!
228
+ const body = gen_instruction_body_after_fixed_g(case_, size)
229
+
230
+ return {
231
+ conditions: [fixed_g],
232
+ body,
233
+ }
234
+ }),
235
+
236
+ default_case: {
237
+ body: ([] as Statement[]).concat(
238
+ gen_call(`codegen::gen_trigger_ud`, ['ctx']),
239
+ '*instr_flags |= jit::JIT_INSTR_BLOCK_BOUNDARY_FLAG;',
240
+ ),
241
+ },
242
+ },
243
+ ]
244
+ } else {
245
+ assert(encodings.length === 1)
246
+ return gen_instruction_body_after_fixed_g(encodings[0], size)
247
+ }
248
+ }
249
+
250
+ function gen_instruction_body_after_fixed_g(
251
+ encoding: Readonly<X86Encoding>,
252
+ size: number | undefined,
253
+ ): Statement[] {
254
+ const instruction_postfix: Statement[] = []
255
+
256
+ if (encoding.block_boundary || (!encoding.custom && encoding.e)) {
257
+ instruction_postfix.push(
258
+ '*instr_flags |= jit::JIT_INSTR_BLOCK_BOUNDARY_FLAG;',
259
+ )
260
+ }
261
+
262
+ const instruction_prefix: Statement[] = []
263
+
264
+ if (encoding.task_switch_test || encoding.sse) {
265
+ instruction_prefix.push(
266
+ gen_call(
267
+ encoding.sse
268
+ ? 'codegen::gen_task_switch_test_mmx'
269
+ : 'codegen::gen_task_switch_test',
270
+ ['ctx'],
271
+ ),
272
+ )
273
+ }
274
+
275
+ const imm_read = gen_read_imm_call(encoding, size)
276
+ const imm_read_bindings: string[] = []
277
+ if (imm_read) {
278
+ imm_read_bindings.push(`let imm = ${imm_read} as u32;`)
279
+ }
280
+
281
+ const instruction_name = make_instruction_name(encoding, size)
282
+
283
+ if (!encoding.prefix) {
284
+ if (encoding.custom) {
285
+ // no-op
286
+ } else {
287
+ instruction_prefix.push(
288
+ gen_call('codegen::gen_move_registers_from_locals_to_memory', [
289
+ 'ctx',
290
+ ]),
291
+ )
292
+ instruction_postfix.push(
293
+ gen_call('codegen::gen_move_registers_from_memory_to_locals', [
294
+ 'ctx',
295
+ ]),
296
+ )
297
+ }
298
+ }
299
+
300
+ if (encoding.e) {
301
+ const reg_postfix: string[] = []
302
+ const mem_postfix: string[] = []
303
+
304
+ if (encoding.mem_ud) {
305
+ mem_postfix.push(
306
+ '*instr_flags |= jit::JIT_INSTR_BLOCK_BOUNDARY_FLAG;',
307
+ )
308
+ }
309
+
310
+ if (encoding.reg_ud) {
311
+ reg_postfix.push(
312
+ '*instr_flags |= jit::JIT_INSTR_BLOCK_BOUNDARY_FLAG;',
313
+ )
314
+ }
315
+
316
+ if (encoding.ignore_mod) {
317
+ assert(
318
+ !imm_read,
319
+ 'Unexpected instruction (ignore mod with immediate value)',
320
+ )
321
+
322
+ // Has modrm byte, but the 2 mod bits are ignored and both
323
+ // operands are always registers (0f20-0f24)
324
+ const args = [
325
+ 'ctx.builder',
326
+ `"${instruction_name}"`,
327
+ '(modrm_byte & 7) as u32',
328
+ '(modrm_byte >> 3 & 7) as u32',
329
+ ]
330
+
331
+ return ([] as Statement[]).concat(
332
+ instruction_prefix,
333
+ gen_call(`codegen::gen_fn${args.length - 2}_const`, args),
334
+ reg_postfix,
335
+ instruction_postfix,
336
+ )
337
+ } else if (encoding.custom) {
338
+ const mem_args: string[] = ['ctx', 'addr']
339
+ const reg_args: string[] = ['ctx', '(modrm_byte & 7) as u32']
340
+
341
+ if (encoding.fixed_g === undefined) {
342
+ mem_args.push('(modrm_byte >> 3 & 7) as u32')
343
+ reg_args.push('(modrm_byte >> 3 & 7) as u32')
344
+ }
345
+
346
+ if (imm_read) {
347
+ mem_args.push('imm')
348
+ reg_args.push('imm')
349
+ }
350
+
351
+ return ([] as Statement[]).concat(
352
+ instruction_prefix,
353
+ {
354
+ type: 'if-else',
355
+ if_blocks: [
356
+ {
357
+ condition: 'modrm_byte < 0xC0',
358
+ body: ([] as Statement[]).concat(
359
+ 'let addr = modrm::decode(ctx.cpu, modrm_byte);',
360
+ imm_read_bindings,
361
+ gen_call(
362
+ `jit_instructions::${instruction_name}_mem_jit`,
363
+ mem_args,
364
+ ),
365
+ mem_postfix,
366
+ ),
367
+ },
368
+ ],
369
+ else_block: {
370
+ body: ([] as Statement[]).concat(
371
+ imm_read_bindings,
372
+ gen_call(
373
+ `jit_instructions::${instruction_name}_reg_jit`,
374
+ reg_args,
375
+ ),
376
+ reg_postfix,
377
+ ),
378
+ },
379
+ },
380
+ instruction_postfix,
381
+ )
382
+ } else {
383
+ const mem_args: string[] = [
384
+ 'ctx.builder',
385
+ `"${instruction_name}_mem"`,
386
+ ]
387
+ const reg_args: string[] = [
388
+ 'ctx.builder',
389
+ `"${instruction_name}_reg"`,
390
+ '(modrm_byte & 7) as u32',
391
+ ]
392
+
393
+ if (encoding.fixed_g === undefined) {
394
+ mem_args.push('(modrm_byte >> 3 & 7) as u32')
395
+ reg_args.push('(modrm_byte >> 3 & 7) as u32')
396
+ }
397
+
398
+ if (imm_read) {
399
+ mem_args.push('imm')
400
+ reg_args.push('imm')
401
+ }
402
+
403
+ return ([] as Statement[]).concat(
404
+ instruction_prefix,
405
+ {
406
+ type: 'if-else',
407
+ if_blocks: [
408
+ {
409
+ condition: 'modrm_byte < 0xC0',
410
+ body: ([] as Statement[]).concat(
411
+ 'let addr = modrm::decode(ctx.cpu, modrm_byte);',
412
+ gen_call(`codegen::gen_modrm_resolve`, [
413
+ 'ctx',
414
+ 'addr',
415
+ ]),
416
+ imm_read_bindings,
417
+ gen_call(
418
+ `codegen::gen_modrm_fn${mem_args.length - 2}`,
419
+ mem_args,
420
+ ),
421
+ mem_postfix,
422
+ ),
423
+ },
424
+ ],
425
+ else_block: {
426
+ body: ([] as Statement[]).concat(
427
+ imm_read_bindings,
428
+ gen_call(
429
+ `codegen::gen_fn${reg_args.length - 2}_const`,
430
+ reg_args,
431
+ ),
432
+ reg_postfix,
433
+ ),
434
+ },
435
+ },
436
+ instruction_postfix,
437
+ )
438
+ }
439
+ } else if (encoding.prefix || encoding.custom) {
440
+ // custom, but not modrm
441
+
442
+ const args: string[] = ['ctx']
443
+
444
+ if (imm_read) {
445
+ args.push('imm')
446
+ }
447
+
448
+ if (encoding.prefix) {
449
+ args.push('instr_flags')
450
+ }
451
+
452
+ return ([] as Statement[]).concat(
453
+ instruction_prefix,
454
+ imm_read_bindings,
455
+ gen_call(`jit_instructions::${instruction_name}_jit`, args),
456
+ instruction_postfix,
457
+ )
458
+ } else {
459
+ // instruction without modrm byte or prefix
460
+
461
+ const args: string[] = ['ctx.builder', `"${instruction_name}"`]
462
+
463
+ if (imm_read) {
464
+ args.push('imm')
465
+ }
466
+
467
+ if (encoding.extra_imm16) {
468
+ assert(imm_read)
469
+ imm_read_bindings.push(`let imm2 = ctx.cpu.read_imm16() as u32;`)
470
+ args.push('imm2')
471
+ } else if (encoding.extra_imm8) {
472
+ assert(imm_read)
473
+ imm_read_bindings.push(`let imm2 = ctx.cpu.read_imm8() as u32;`)
474
+ args.push('imm2')
475
+ }
476
+
477
+ return ([] as Statement[]).concat(
478
+ instruction_prefix,
479
+ imm_read_bindings,
480
+ gen_call(`codegen::gen_fn${args.length - 2}_const`, args),
481
+ instruction_postfix,
482
+ )
483
+ }
484
+ }
485
+
486
+ function gen_table(): void {
487
+ const by_opcode: Record<number, Readonly<X86Encoding>[]> = Object.create(
488
+ null,
489
+ ) as Record<number, Readonly<X86Encoding>[]>
490
+ const by_opcode0f: Record<number, Readonly<X86Encoding>[]> = Object.create(
491
+ null,
492
+ ) as Record<number, Readonly<X86Encoding>[]>
493
+
494
+ for (const o of x86_table) {
495
+ let opcode = o.opcode
496
+
497
+ if ((opcode & 0xff00) === 0x0f00) {
498
+ opcode &= 0xff
499
+ by_opcode0f[opcode] = by_opcode0f[opcode] || []
500
+ by_opcode0f[opcode].push(o)
501
+ } else {
502
+ opcode &= 0xff
503
+ by_opcode[opcode] = by_opcode[opcode] || []
504
+ by_opcode[opcode].push(o)
505
+ }
506
+ }
507
+
508
+ const cases: SwitchCase[] = []
509
+ for (let opcode = 0; opcode < 0x100; opcode++) {
510
+ const encoding = by_opcode[opcode]
511
+ assert(encoding && encoding.length)
512
+
513
+ const opcode_hex = hex(opcode, 2)
514
+ const opcode_high_hex = hex(opcode | 0x100, 2)
515
+
516
+ if (encoding[0].os) {
517
+ cases.push({
518
+ conditions: [`0x${opcode_hex}`],
519
+ body: gen_instruction_body(encoding, 16),
520
+ })
521
+ cases.push({
522
+ conditions: [`0x${opcode_high_hex}`],
523
+ body: gen_instruction_body(encoding, 32),
524
+ })
525
+ } else {
526
+ cases.push({
527
+ conditions: [`0x${opcode_hex}`, `0x${opcode_high_hex}`],
528
+ body: gen_instruction_body(encoding, undefined),
529
+ })
530
+ }
531
+ }
532
+ const table: Statement = {
533
+ type: 'switch',
534
+ condition: 'opcode',
535
+ cases,
536
+ default_case: {
537
+ body: ['assert!(false);'],
538
+ },
539
+ }
540
+
541
+ if (to_generate.jit) {
542
+ const code: Statement[] = [
543
+ '#[cfg_attr(rustfmt, rustfmt_skip)]',
544
+
545
+ 'use crate::prefix;',
546
+ 'use crate::jit;',
547
+ 'use crate::jit_instructions;',
548
+ 'use crate::modrm;',
549
+ 'use crate::codegen;',
550
+
551
+ 'pub fn jit(opcode: u32, ctx: &mut jit::JitContext, instr_flags: &mut u32) {',
552
+ table,
553
+ '}',
554
+ ]
555
+
556
+ finalize_table_rust(
557
+ OUT_DIR,
558
+ 'jit.rs',
559
+ rust_ast
560
+ .print_syntax_tree(([] as Statement[]).concat(code))
561
+ .join('\n') + '\n',
562
+ )
563
+ }
564
+
565
+ const cases0f: SwitchCase[] = []
566
+ for (let opcode = 0; opcode < 0x100; opcode++) {
567
+ const encoding = by_opcode0f[opcode]
568
+
569
+ assert(encoding && encoding.length)
570
+
571
+ const opcode_hex = hex(opcode, 2)
572
+ const opcode_high_hex = hex(opcode | 0x100, 2)
573
+
574
+ if (encoding[0].os) {
575
+ cases0f.push({
576
+ conditions: [`0x${opcode_hex}`],
577
+ body: gen_instruction_body(encoding, 16),
578
+ })
579
+ cases0f.push({
580
+ conditions: [`0x${opcode_high_hex}`],
581
+ body: gen_instruction_body(encoding, 32),
582
+ })
583
+ } else {
584
+ const block: SwitchCase = {
585
+ conditions: [`0x${opcode_hex}`, `0x${opcode_high_hex}`],
586
+ body: gen_instruction_body(encoding, undefined),
587
+ }
588
+ cases0f.push(block)
589
+ }
590
+ }
591
+
592
+ const table0f: Statement = {
593
+ type: 'switch',
594
+ condition: 'opcode',
595
+ cases: cases0f,
596
+ default_case: {
597
+ body: ['assert!(false);'],
598
+ },
599
+ }
600
+
601
+ if (to_generate.jit0f) {
602
+ const code: Statement[] = [
603
+ '#[cfg_attr(rustfmt, rustfmt_skip)]',
604
+
605
+ 'use crate::prefix;',
606
+ 'use crate::jit;',
607
+ 'use crate::jit_instructions;',
608
+ 'use crate::modrm;',
609
+ 'use crate::codegen;',
610
+
611
+ 'pub fn jit(opcode: u32, ctx: &mut jit::JitContext, instr_flags: &mut u32) {',
612
+ table0f,
613
+ '}',
614
+ ]
615
+
616
+ finalize_table_rust(
617
+ OUT_DIR,
618
+ 'jit0f.rs',
619
+ rust_ast
620
+ .print_syntax_tree(([] as Statement[]).concat(code))
621
+ .join('\n') + '\n',
622
+ )
623
+ }
624
+ }