@aptre/v86 0.5.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (111) hide show
  1. package/LICENSE +22 -0
  2. package/LICENSE.MIT +22 -0
  3. package/Readme.md +237 -0
  4. package/dist/v86.browser.js +26666 -0
  5. package/dist/v86.browser.js.map +7 -0
  6. package/dist/v86.js +26632 -0
  7. package/dist/v86.js.map +7 -0
  8. package/gen/generate_analyzer.ts +512 -0
  9. package/gen/generate_interpreter.ts +522 -0
  10. package/gen/generate_jit.ts +624 -0
  11. package/gen/rust_ast.ts +107 -0
  12. package/gen/util.ts +35 -0
  13. package/gen/x86_table.ts +1836 -0
  14. package/lib/9p.ts +1547 -0
  15. package/lib/filesystem.ts +1879 -0
  16. package/lib/marshall.ts +168 -0
  17. package/lib/softfloat/softfloat.c +32501 -0
  18. package/lib/zstd/zstddeclib.c +13520 -0
  19. package/package.json +75 -0
  20. package/src/acpi.ts +267 -0
  21. package/src/browser/dummy_screen.ts +106 -0
  22. package/src/browser/fake_network.ts +1771 -0
  23. package/src/browser/fetch_network.ts +361 -0
  24. package/src/browser/filestorage.ts +124 -0
  25. package/src/browser/inbrowser_network.ts +57 -0
  26. package/src/browser/keyboard.ts +564 -0
  27. package/src/browser/main.ts +3415 -0
  28. package/src/browser/mouse.ts +255 -0
  29. package/src/browser/network.ts +142 -0
  30. package/src/browser/print_stats.ts +336 -0
  31. package/src/browser/screen.ts +978 -0
  32. package/src/browser/serial.ts +316 -0
  33. package/src/browser/speaker.ts +1223 -0
  34. package/src/browser/starter.ts +1688 -0
  35. package/src/browser/wisp_network.ts +332 -0
  36. package/src/browser/worker_bus.ts +64 -0
  37. package/src/buffer.ts +652 -0
  38. package/src/bus.ts +78 -0
  39. package/src/const.ts +128 -0
  40. package/src/cpu.ts +2891 -0
  41. package/src/dma.ts +474 -0
  42. package/src/elf.ts +251 -0
  43. package/src/floppy.ts +1778 -0
  44. package/src/ide.ts +3455 -0
  45. package/src/io.ts +504 -0
  46. package/src/iso9660.ts +317 -0
  47. package/src/kernel.ts +250 -0
  48. package/src/lib.ts +645 -0
  49. package/src/log.ts +149 -0
  50. package/src/main.ts +199 -0
  51. package/src/ne2k.ts +1589 -0
  52. package/src/pci.ts +815 -0
  53. package/src/pit.ts +406 -0
  54. package/src/ps2.ts +820 -0
  55. package/src/rtc.ts +537 -0
  56. package/src/rust/analysis.rs +101 -0
  57. package/src/rust/codegen.rs +2660 -0
  58. package/src/rust/config.rs +3 -0
  59. package/src/rust/control_flow.rs +425 -0
  60. package/src/rust/cpu/apic.rs +658 -0
  61. package/src/rust/cpu/arith.rs +1207 -0
  62. package/src/rust/cpu/call_indirect.rs +2 -0
  63. package/src/rust/cpu/cpu.rs +4501 -0
  64. package/src/rust/cpu/fpu.rs +923 -0
  65. package/src/rust/cpu/global_pointers.rs +112 -0
  66. package/src/rust/cpu/instructions.rs +2486 -0
  67. package/src/rust/cpu/instructions_0f.rs +5261 -0
  68. package/src/rust/cpu/ioapic.rs +316 -0
  69. package/src/rust/cpu/memory.rs +351 -0
  70. package/src/rust/cpu/misc_instr.rs +613 -0
  71. package/src/rust/cpu/mod.rs +16 -0
  72. package/src/rust/cpu/modrm.rs +133 -0
  73. package/src/rust/cpu/pic.rs +402 -0
  74. package/src/rust/cpu/sse_instr.rs +361 -0
  75. package/src/rust/cpu/string.rs +701 -0
  76. package/src/rust/cpu/vga.rs +175 -0
  77. package/src/rust/cpu_context.rs +69 -0
  78. package/src/rust/dbg.rs +98 -0
  79. package/src/rust/gen/analyzer.rs +3807 -0
  80. package/src/rust/gen/analyzer0f.rs +3992 -0
  81. package/src/rust/gen/interpreter.rs +4447 -0
  82. package/src/rust/gen/interpreter0f.rs +5404 -0
  83. package/src/rust/gen/jit.rs +5080 -0
  84. package/src/rust/gen/jit0f.rs +5547 -0
  85. package/src/rust/gen/mod.rs +14 -0
  86. package/src/rust/jit.rs +2443 -0
  87. package/src/rust/jit_instructions.rs +7881 -0
  88. package/src/rust/js_api.rs +6 -0
  89. package/src/rust/leb.rs +46 -0
  90. package/src/rust/lib.rs +29 -0
  91. package/src/rust/modrm.rs +330 -0
  92. package/src/rust/opstats.rs +249 -0
  93. package/src/rust/page.rs +15 -0
  94. package/src/rust/paging.rs +25 -0
  95. package/src/rust/prefix.rs +15 -0
  96. package/src/rust/profiler.rs +155 -0
  97. package/src/rust/regs.rs +38 -0
  98. package/src/rust/softfloat.rs +286 -0
  99. package/src/rust/state_flags.rs +27 -0
  100. package/src/rust/wasmgen/mod.rs +2 -0
  101. package/src/rust/wasmgen/wasm_builder.rs +1047 -0
  102. package/src/rust/wasmgen/wasm_opcodes.rs +221 -0
  103. package/src/rust/zstd.rs +105 -0
  104. package/src/sb16.ts +1928 -0
  105. package/src/state.ts +359 -0
  106. package/src/uart.ts +472 -0
  107. package/src/vga.ts +2791 -0
  108. package/src/virtio.ts +1756 -0
  109. package/src/virtio_balloon.ts +273 -0
  110. package/src/virtio_console.ts +372 -0
  111. package/src/virtio_net.ts +326 -0
@@ -0,0 +1,512 @@
1
+ #!/usr/bin/env node
2
+
3
+ import assert from 'node:assert/strict'
4
+ import fs from 'node:fs'
5
+ import path from 'node:path'
6
+ import url from 'node:url'
7
+
8
+ import x86_table from './x86_table.js'
9
+ import type { X86Encoding } from './x86_table.js'
10
+ import * as rust_ast from './rust_ast.js'
11
+ import type { Statement, SwitchCase } from './rust_ast.js'
12
+ import {
13
+ hex,
14
+ get_switch_value,
15
+ get_switch_exist,
16
+ finalize_table_rust,
17
+ } from './util.js'
18
+
19
+ const __dirname = url.fileURLToPath(new URL('.', import.meta.url))
20
+ const OUT_DIR = path.join(__dirname, '..', 'src/rust/gen/')
21
+
22
+ fs.mkdirSync(OUT_DIR, { recursive: true })
23
+
24
+ const table_arg = get_switch_value('--table')
25
+ const gen_all = get_switch_exist('--all')
26
+ const to_generate: Record<string, boolean> = {
27
+ analyzer: gen_all || table_arg === 'analyzer',
28
+ analyzer0f: gen_all || table_arg === 'analyzer0f',
29
+ }
30
+
31
+ assert(
32
+ Object.keys(to_generate).some((k) => to_generate[k]),
33
+ 'Pass --table [analyzer|analyzer0f] or --all to pick which tables to generate',
34
+ )
35
+
36
+ gen_table()
37
+
38
+ function gen_read_imm_call(
39
+ op: Readonly<X86Encoding>,
40
+ size_variant: number | undefined,
41
+ ): string | undefined {
42
+ const size = op.os || op.opcode % 2 === 1 ? size_variant : 8
43
+
44
+ if (
45
+ op.imm8 ||
46
+ op.imm8s ||
47
+ op.imm16 ||
48
+ op.imm1632 ||
49
+ op.imm32 ||
50
+ op.immaddr
51
+ ) {
52
+ if (op.imm8) {
53
+ return 'cpu.read_imm8()'
54
+ } else if (op.imm8s) {
55
+ return 'cpu.read_imm8s()'
56
+ } else {
57
+ if (op.immaddr) {
58
+ // immaddr: depends on address size
59
+ return 'cpu.read_moffs()'
60
+ } else {
61
+ assert(op.imm1632 || op.imm16 || op.imm32)
62
+
63
+ if ((op.imm1632 && size === 16) || op.imm16) {
64
+ return 'cpu.read_imm16()'
65
+ } else {
66
+ assert((op.imm1632 && size === 32) || op.imm32)
67
+ return 'cpu.read_imm32()'
68
+ }
69
+ }
70
+ }
71
+ } else {
72
+ return undefined
73
+ }
74
+ }
75
+
76
+ function gen_call(name: string, args: string[] = []): string {
77
+ return `${name}(${args.join(', ')});`
78
+ }
79
+
80
+ /*
81
+ * Current naming scheme:
82
+ * instr(16|32|)_(66|F2|F3)?0F?[0-9a-f]{2}(_[0-7])?(_mem|_reg|)
83
+ */
84
+ function make_instruction_name(
85
+ encoding: Readonly<X86Encoding>,
86
+ size: number | undefined,
87
+ ): string {
88
+ const suffix = encoding.os ? String(size) : ''
89
+ const opcode_hex = hex(encoding.opcode & 0xff, 2)
90
+ const first_prefix =
91
+ (encoding.opcode & 0xff00) === 0
92
+ ? ''
93
+ : hex((encoding.opcode >> 8) & 0xff, 2)
94
+ const second_prefix =
95
+ (encoding.opcode & 0xff0000) === 0
96
+ ? ''
97
+ : hex((encoding.opcode >> 16) & 0xff, 2)
98
+ const fixed_g_suffix =
99
+ encoding.fixed_g === undefined ? '' : `_${encoding.fixed_g}`
100
+
101
+ assert(
102
+ first_prefix === '' ||
103
+ first_prefix === '0F' ||
104
+ first_prefix === 'F2' ||
105
+ first_prefix === 'F3',
106
+ )
107
+ assert(
108
+ second_prefix === '' ||
109
+ second_prefix === '66' ||
110
+ second_prefix === 'F2' ||
111
+ second_prefix === 'F3',
112
+ )
113
+
114
+ return `instr${suffix}_${second_prefix}${first_prefix}${opcode_hex}${fixed_g_suffix}`
115
+ }
116
+
117
+ function gen_instruction_body(
118
+ encodings: Readonly<X86Encoding>[],
119
+ size: number | undefined,
120
+ ): Statement[] {
121
+ const encoding = encodings[0]
122
+
123
+ const has_66: Readonly<X86Encoding>[] = []
124
+ const has_F2: Readonly<X86Encoding>[] = []
125
+ const has_F3: Readonly<X86Encoding>[] = []
126
+ const no_prefix: Readonly<X86Encoding>[] = []
127
+
128
+ for (const e of encodings) {
129
+ if (e.opcode >>> 16 === 0x66) has_66.push(e)
130
+ else if (((e.opcode >>> 8) & 0xff) === 0xf2 || e.opcode >>> 16 === 0xf2)
131
+ has_F2.push(e)
132
+ else if (((e.opcode >>> 8) & 0xff) === 0xf3 || e.opcode >>> 16 === 0xf3)
133
+ has_F3.push(e)
134
+ else no_prefix.push(e)
135
+ }
136
+
137
+ if (has_F2.length || has_F3.length) {
138
+ assert(
139
+ (encoding.opcode & 0xff0000) === 0 ||
140
+ (encoding.opcode & 0xff00) === 0x0f00,
141
+ )
142
+ }
143
+
144
+ if (has_66.length) {
145
+ assert((encoding.opcode & 0xff00) === 0x0f00)
146
+ }
147
+
148
+ const code: Statement[] = []
149
+
150
+ if (encoding.e) {
151
+ code.push('let modrm_byte = cpu.read_imm8();')
152
+ }
153
+
154
+ if (has_66.length || has_F2.length || has_F3.length) {
155
+ const if_blocks: { condition: string; body: Statement[] }[] = []
156
+
157
+ if (has_66.length) {
158
+ const body = gen_instruction_body_after_prefix(has_66, size)
159
+ if_blocks.push({
160
+ condition: 'cpu.prefixes & prefix::PREFIX_66 != 0',
161
+ body,
162
+ })
163
+ }
164
+ if (has_F2.length) {
165
+ const body = gen_instruction_body_after_prefix(has_F2, size)
166
+ if_blocks.push({
167
+ condition: 'cpu.prefixes & prefix::PREFIX_F2 != 0',
168
+ body,
169
+ })
170
+ }
171
+ if (has_F3.length) {
172
+ const body = gen_instruction_body_after_prefix(has_F3, size)
173
+ if_blocks.push({
174
+ condition: 'cpu.prefixes & prefix::PREFIX_F3 != 0',
175
+ body,
176
+ })
177
+ }
178
+
179
+ const else_block = {
180
+ body: gen_instruction_body_after_prefix(no_prefix, size),
181
+ }
182
+
183
+ return ([] as Statement[]).concat(code, {
184
+ type: 'if-else',
185
+ if_blocks,
186
+ else_block,
187
+ })
188
+ } else {
189
+ return ([] as Statement[]).concat(
190
+ code,
191
+ gen_instruction_body_after_prefix(encodings, size),
192
+ )
193
+ }
194
+ }
195
+
196
+ function gen_instruction_body_after_prefix(
197
+ encodings: Readonly<X86Encoding>[],
198
+ size: number | undefined,
199
+ ): Statement[] {
200
+ const encoding = encodings[0]
201
+
202
+ if (encoding.fixed_g !== undefined) {
203
+ assert(encoding.e)
204
+
205
+ // instruction with modrm byte where the middle 3 bits encode the instruction
206
+
207
+ // group by opcode without prefix plus middle bits of modrm byte
208
+ const cases: Record<number, Readonly<X86Encoding>> = encodings.reduce(
209
+ (cases_by_opcode: Record<number, Readonly<X86Encoding>>, case_) => {
210
+ assert(typeof case_.fixed_g === 'number')
211
+ cases_by_opcode[
212
+ (case_.opcode & 0xffff) | (case_.fixed_g << 16)
213
+ ] = case_
214
+ return cases_by_opcode
215
+ },
216
+ Object.create(null) as Record<number, Readonly<X86Encoding>>,
217
+ )
218
+ const sorted = Object.values(cases).sort(
219
+ (e1, e2) => (e1.fixed_g ?? 0) - (e2.fixed_g ?? 0),
220
+ )
221
+
222
+ return [
223
+ {
224
+ type: 'switch',
225
+ condition: 'modrm_byte >> 3 & 7',
226
+ cases: sorted.map((case_): SwitchCase => {
227
+ const fixed_g = case_.fixed_g!
228
+ const body = gen_instruction_body_after_fixed_g(case_, size)
229
+
230
+ return {
231
+ conditions: [fixed_g],
232
+ body,
233
+ }
234
+ }),
235
+
236
+ default_case: {
237
+ body: [
238
+ 'analysis.ty = analysis::AnalysisType::BlockBoundary;',
239
+ 'analysis.no_next_instruction = true;',
240
+ ],
241
+ },
242
+ },
243
+ ]
244
+ } else {
245
+ assert(encodings.length === 1)
246
+ return gen_instruction_body_after_fixed_g(encodings[0], size)
247
+ }
248
+ }
249
+
250
+ function gen_instruction_body_after_fixed_g(
251
+ encoding: Readonly<X86Encoding>,
252
+ size: number | undefined,
253
+ ): Statement[] {
254
+ const imm_read = gen_read_imm_call(encoding, size)
255
+ const instruction_postfix: string[] = []
256
+
257
+ if (encoding.custom_sti) {
258
+ instruction_postfix.push('analysis.ty = analysis::AnalysisType::STI;')
259
+ } else if (
260
+ (encoding.block_boundary &&
261
+ // jump_offset_imm: Is a block boundary, but gets a different type (Jump) below
262
+ !encoding.jump_offset_imm) ||
263
+ (!encoding.custom && encoding.e)
264
+ ) {
265
+ instruction_postfix.push(
266
+ 'analysis.ty = analysis::AnalysisType::BlockBoundary;',
267
+ )
268
+ }
269
+
270
+ if (encoding.no_next_instruction) {
271
+ instruction_postfix.push('analysis.no_next_instruction = true;')
272
+ }
273
+ if (encoding.absolute_jump) {
274
+ instruction_postfix.push('analysis.absolute_jump = true;')
275
+ }
276
+
277
+ if (encoding.prefix) {
278
+ const instruction_name =
279
+ 'analysis::' + make_instruction_name(encoding, size) + '_analyze'
280
+ const args = ['cpu', 'analysis']
281
+
282
+ assert(!imm_read)
283
+
284
+ return ([] as Statement[]).concat(
285
+ gen_call(instruction_name, args),
286
+ instruction_postfix,
287
+ )
288
+ } else if (encoding.e) {
289
+ // instruction with modrm byte where the middle 3 bits encode a register
290
+
291
+ const reg_postfix: string[] = []
292
+ const mem_postfix: string[] = []
293
+
294
+ if (encoding.mem_ud) {
295
+ mem_postfix.push(
296
+ 'analysis.ty = analysis::AnalysisType::BlockBoundary;',
297
+ )
298
+ }
299
+
300
+ if (encoding.reg_ud) {
301
+ reg_postfix.push(
302
+ 'analysis.ty = analysis::AnalysisType::BlockBoundary;',
303
+ )
304
+ }
305
+
306
+ if (encoding.ignore_mod) {
307
+ assert(
308
+ !imm_read,
309
+ 'Unexpected instruction (ignore mod with immediate value)',
310
+ )
311
+
312
+ // Has modrm byte, but the 2 mod bits are ignored and both
313
+ // operands are always registers (0f20-0f24)
314
+
315
+ return instruction_postfix
316
+ } else {
317
+ return ([] as Statement[]).concat(
318
+ {
319
+ type: 'if-else',
320
+ if_blocks: [
321
+ {
322
+ condition: 'modrm_byte < 0xC0',
323
+ body: ([] as Statement[]).concat(
324
+ gen_call('analysis::modrm_analyze', [
325
+ 'cpu',
326
+ 'modrm_byte',
327
+ ]),
328
+ mem_postfix,
329
+ ),
330
+ },
331
+ ],
332
+ else_block: {
333
+ body: reg_postfix,
334
+ },
335
+ },
336
+ imm_read ? [imm_read + ';'] : [],
337
+ instruction_postfix,
338
+ )
339
+ }
340
+ } else {
341
+ // instruction without modrm byte or prefix
342
+
343
+ const body: Statement[] = []
344
+
345
+ if (imm_read) {
346
+ if (encoding.jump_offset_imm) {
347
+ body.push('let jump_offset = ' + imm_read + ';')
348
+
349
+ if (encoding.conditional_jump) {
350
+ assert(
351
+ (encoding.opcode & ~0xf) === 0x70 ||
352
+ (encoding.opcode & ~0xf) === 0x0f80 ||
353
+ (encoding.opcode & ~0x3) === 0xe0,
354
+ )
355
+ const condition_index = encoding.opcode & 0xff
356
+ body.push(
357
+ `analysis.ty = analysis::AnalysisType::Jump { offset: jump_offset as i32, condition: Some(0x${hex(condition_index, 2)}), is_32: cpu.osize_32() };`,
358
+ )
359
+ } else {
360
+ body.push(
361
+ `analysis.ty = analysis::AnalysisType::Jump { offset: jump_offset as i32, condition: None, is_32: cpu.osize_32() };`,
362
+ )
363
+ }
364
+ } else {
365
+ body.push(imm_read + ';')
366
+ }
367
+ }
368
+
369
+ if (encoding.extra_imm16) {
370
+ assert(imm_read)
371
+ body.push(gen_call('cpu.read_imm16'))
372
+ } else if (encoding.extra_imm8) {
373
+ assert(imm_read)
374
+ body.push(gen_call('cpu.read_imm8'))
375
+ }
376
+
377
+ return ([] as Statement[]).concat(body, instruction_postfix)
378
+ }
379
+ }
380
+
381
+ function gen_table(): void {
382
+ const by_opcode: Record<number, Readonly<X86Encoding>[]> = Object.create(
383
+ null,
384
+ ) as Record<number, Readonly<X86Encoding>[]>
385
+ const by_opcode0f: Record<number, Readonly<X86Encoding>[]> = Object.create(
386
+ null,
387
+ ) as Record<number, Readonly<X86Encoding>[]>
388
+
389
+ for (const o of x86_table) {
390
+ let opcode = o.opcode
391
+
392
+ if ((opcode & 0xff00) === 0x0f00) {
393
+ opcode &= 0xff
394
+ by_opcode0f[opcode] = by_opcode0f[opcode] || []
395
+ by_opcode0f[opcode].push(o)
396
+ } else {
397
+ opcode &= 0xff
398
+ by_opcode[opcode] = by_opcode[opcode] || []
399
+ by_opcode[opcode].push(o)
400
+ }
401
+ }
402
+
403
+ const cases: SwitchCase[] = []
404
+ for (let opcode = 0; opcode < 0x100; opcode++) {
405
+ const encoding = by_opcode[opcode]
406
+ assert(encoding && encoding.length)
407
+
408
+ const opcode_hex = hex(opcode, 2)
409
+ const opcode_high_hex = hex(opcode | 0x100, 2)
410
+
411
+ if (encoding[0].os) {
412
+ cases.push({
413
+ conditions: [`0x${opcode_hex}`],
414
+ body: gen_instruction_body(encoding, 16),
415
+ })
416
+ cases.push({
417
+ conditions: [`0x${opcode_high_hex}`],
418
+ body: gen_instruction_body(encoding, 32),
419
+ })
420
+ } else {
421
+ cases.push({
422
+ conditions: [`0x${opcode_hex}`, `0x${opcode_high_hex}`],
423
+ body: gen_instruction_body(encoding, undefined),
424
+ })
425
+ }
426
+ }
427
+ const table: Statement = {
428
+ type: 'switch',
429
+ condition: 'opcode',
430
+ cases,
431
+ default_case: {
432
+ body: ['dbg_assert!(false);'],
433
+ },
434
+ }
435
+
436
+ if (to_generate.analyzer) {
437
+ const code: Statement[] = [
438
+ '#[cfg_attr(rustfmt, rustfmt_skip)]',
439
+ 'use crate::analysis;',
440
+ 'use crate::prefix;',
441
+ 'use crate::cpu_context;',
442
+ 'pub fn analyzer(opcode: u32, cpu: &mut cpu_context::CpuContext, analysis: &mut analysis::Analysis) {',
443
+ table,
444
+ '}',
445
+ ]
446
+
447
+ finalize_table_rust(
448
+ OUT_DIR,
449
+ 'analyzer.rs',
450
+ rust_ast
451
+ .print_syntax_tree(([] as Statement[]).concat(code))
452
+ .join('\n') + '\n',
453
+ )
454
+ }
455
+
456
+ const cases0f: SwitchCase[] = []
457
+ for (let opcode = 0; opcode < 0x100; opcode++) {
458
+ const encoding = by_opcode0f[opcode]
459
+
460
+ assert(encoding && encoding.length)
461
+
462
+ const opcode_hex = hex(opcode, 2)
463
+ const opcode_high_hex = hex(opcode | 0x100, 2)
464
+
465
+ if (encoding[0].os) {
466
+ cases0f.push({
467
+ conditions: [`0x${opcode_hex}`],
468
+ body: gen_instruction_body(encoding, 16),
469
+ })
470
+ cases0f.push({
471
+ conditions: [`0x${opcode_high_hex}`],
472
+ body: gen_instruction_body(encoding, 32),
473
+ })
474
+ } else {
475
+ const block: SwitchCase = {
476
+ conditions: [`0x${opcode_hex}`, `0x${opcode_high_hex}`],
477
+ body: gen_instruction_body(encoding, undefined),
478
+ }
479
+ cases0f.push(block)
480
+ }
481
+ }
482
+
483
+ const table0f: Statement = {
484
+ type: 'switch',
485
+ condition: 'opcode',
486
+ cases: cases0f,
487
+ default_case: {
488
+ body: ['dbg_assert!(false);'],
489
+ },
490
+ }
491
+
492
+ if (to_generate.analyzer0f) {
493
+ const code: Statement[] = [
494
+ '#![allow(unused)]',
495
+ '#[cfg_attr(rustfmt, rustfmt_skip)]',
496
+ 'use crate::analysis;',
497
+ 'use crate::prefix;',
498
+ 'use crate::cpu_context;',
499
+ 'pub fn analyzer(opcode: u32, cpu: &mut cpu_context::CpuContext, analysis: &mut analysis::Analysis) {',
500
+ table0f,
501
+ '}',
502
+ ]
503
+
504
+ finalize_table_rust(
505
+ OUT_DIR,
506
+ 'analyzer0f.rs',
507
+ rust_ast
508
+ .print_syntax_tree(([] as Statement[]).concat(code))
509
+ .join('\n') + '\n',
510
+ )
511
+ }
512
+ }