ruby-vpi 18.0.2 → 19.0.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (232) hide show
  1. data/Rakefile +15 -19
  2. data/bin/generate/proto.rb +15 -10
  3. data/bin/ruby-vpi +2 -0
  4. data/doc/README +3 -5
  5. data/doc/Rakefile +3 -3
  6. data/doc/common.css +24 -136
  7. data/doc/common.tpl +48 -37
  8. data/doc/figures/figures.dia +19 -19
  9. data/doc/figures/ruby_relay.png +0 -0
  10. data/doc/history.html +252 -67
  11. data/doc/history.inc +98 -1
  12. data/doc/history.yaml +105 -0
  13. data/doc/intro.inc +43 -32
  14. data/doc/lib/doc_format.rb +19 -13
  15. data/doc/lib/doc_proxy.rb +7 -7
  16. data/doc/manual.doc +156 -117
  17. data/doc/manual.html +601 -560
  18. data/doc/memo.html +29 -25
  19. data/doc/print.css +63 -4
  20. data/doc/readme.doc +4 -6
  21. data/doc/readme.html +129 -111
  22. data/doc/rss.xml +168 -7
  23. data/doc/screen.css +146 -0
  24. data/doc/spacing.css +57 -0
  25. data/{samp → examples}/counter/RSpec/Rakefile +0 -0
  26. data/{samp → examples}/counter/RSpec/counter_design.rb +0 -0
  27. data/examples/counter/RSpec/counter_proto.rb +9 -0
  28. data/{samp → examples}/counter/RSpec/counter_runner.rake +0 -0
  29. data/{samp → examples}/counter/RSpec/counter_spec.rb +0 -0
  30. data/{samp → examples}/counter/Rakefile +0 -0
  31. data/{samp → examples}/counter/counter.v +0 -0
  32. data/{samp → examples}/counter/xUnit/Rakefile +0 -0
  33. data/{samp → examples}/counter/xUnit/counter_bench.rb +0 -0
  34. data/{samp → examples}/counter/xUnit/counter_bench.v +0 -0
  35. data/{samp → examples}/counter/xUnit/counter_design.rb +0 -0
  36. data/examples/counter/xUnit/counter_proto.rb +9 -0
  37. data/{samp → examples}/counter/xUnit/counter_runner.rake +0 -0
  38. data/{samp → examples}/counter/xUnit/counter_spec.rb +0 -0
  39. data/{samp → examples}/pipelined_alu/Hw5UnitModel.rb +0 -0
  40. data/{samp → examples}/pipelined_alu/README +0 -0
  41. data/{samp → examples}/pipelined_alu/Rakefile +0 -0
  42. data/{samp → examples}/pipelined_alu/TestHw5UnitModel.rb +0 -0
  43. data/{samp → examples}/pipelined_alu/hw5_unit.v +0 -0
  44. data/{samp → examples}/pipelined_alu/hw5_unit_design.rb +0 -7
  45. data/examples/pipelined_alu/hw5_unit_proto.rb +2 -0
  46. data/{samp → examples}/pipelined_alu/hw5_unit_runner.rake +0 -0
  47. data/{samp → examples}/pipelined_alu/hw5_unit_spec.rb +0 -0
  48. data/{samp → examples}/pipelined_alu/int_gen.rb +0 -0
  49. data/{samp → examples}/register_file/LICENSE +0 -0
  50. data/{samp → examples}/register_file/README +0 -0
  51. data/{samp → examples}/register_file/Rakefile +0 -0
  52. data/{samp → examples}/register_file/register_file.v +0 -0
  53. data/{samp → examples}/register_file/register_file_design.rb +0 -0
  54. data/examples/register_file/register_file_proto.rb +11 -0
  55. data/{samp → examples}/register_file/register_file_runner.rake +0 -0
  56. data/{samp → examples}/register_file/register_file_spec.rb +0 -0
  57. data/ext/main.c +5 -5
  58. data/ext/swig_vpi.i +6 -2
  59. data/lib/ruby-vpi/core/callback.rb +142 -0
  60. data/lib/ruby-vpi/core/edge.rb +128 -0
  61. data/lib/ruby-vpi/core/handle.rb +421 -0
  62. data/lib/ruby-vpi/core/scheduler.rb +244 -0
  63. data/lib/ruby-vpi/core/struct.rb +123 -0
  64. data/lib/ruby-vpi/core.rb +41 -0
  65. data/lib/ruby-vpi/rcov.rb +25 -12
  66. data/lib/ruby-vpi/runner.rb +30 -26
  67. data/lib/ruby-vpi/runner_boot_loader.rb +67 -37
  68. data/lib/ruby-vpi.rb +2 -2
  69. data/ref/c/annotated.html +1 -1
  70. data/ref/c/common_8h.html +1 -1
  71. data/ref/c/files.html +1 -1
  72. data/ref/c/functions.html +1 -1
  73. data/ref/c/functions_vars.html +1 -1
  74. data/ref/c/globals.html +1 -1
  75. data/ref/c/globals_0x63.html +1 -1
  76. data/ref/c/globals_0x65.html +1 -1
  77. data/ref/c/globals_0x66.html +1 -1
  78. data/ref/c/globals_0x6d.html +1 -1
  79. data/ref/c/globals_0x70.html +1 -1
  80. data/ref/c/globals_0x72.html +1 -1
  81. data/ref/c/globals_0x73.html +1 -1
  82. data/ref/c/globals_0x74.html +1 -1
  83. data/ref/c/globals_0x76.html +1 -1
  84. data/ref/c/globals_0x78.html +1 -1
  85. data/ref/c/globals_defs.html +1 -1
  86. data/ref/c/globals_defs_0x65.html +1 -1
  87. data/ref/c/globals_defs_0x70.html +1 -1
  88. data/ref/c/globals_defs_0x76.html +1 -1
  89. data/ref/c/globals_defs_0x78.html +1 -1
  90. data/ref/c/globals_enum.html +1 -1
  91. data/ref/c/globals_eval.html +1 -1
  92. data/ref/c/globals_func.html +1 -1
  93. data/ref/c/globals_type.html +1 -1
  94. data/ref/c/globals_vars.html +1 -1
  95. data/ref/c/index.html +1 -1
  96. data/ref/c/main_8c.html +1 -1
  97. data/ref/c/main_8h.html +1 -1
  98. data/ref/c/relay_8c.html +1 -1
  99. data/ref/c/relay_8h.html +1 -1
  100. data/ref/c/structt__cb__data.html +1 -1
  101. data/ref/c/structt__vpi__delay.html +1 -1
  102. data/ref/c/structt__vpi__error__info.html +1 -1
  103. data/ref/c/structt__vpi__strengthval.html +1 -1
  104. data/ref/c/structt__vpi__systf__data.html +1 -1
  105. data/ref/c/structt__vpi__time.html +1 -1
  106. data/ref/c/structt__vpi__value.html +1 -1
  107. data/ref/c/structt__vpi__vecval.html +1 -1
  108. data/ref/c/structt__vpi__vlog__info.html +1 -1
  109. data/ref/c/verilog_8h.html +1 -1
  110. data/ref/c/vlog_8c.html +1 -1
  111. data/ref/c/vlog_8h.html +1 -1
  112. data/ref/c/vpi__user_8h.html +1 -1
  113. data/ref/ruby/classes/ERB.html +7 -5
  114. data/ref/ruby/classes/ERB.src/{M000026.html → M000024.html} +0 -0
  115. data/ref/ruby/classes/FileUtils.html +11 -11
  116. data/ref/ruby/classes/FileUtils.src/{M000027.html → M000025.html} +0 -0
  117. data/ref/ruby/classes/FileUtils.src/{M000028.html → M000026.html} +0 -0
  118. data/ref/ruby/classes/Float.html +8 -6
  119. data/ref/ruby/classes/Float.src/{M000021.html → M000019.html} +0 -0
  120. data/ref/ruby/classes/Integer.html +67 -65
  121. data/ref/ruby/classes/Integer.src/M000007.html +25 -0
  122. data/ref/ruby/classes/Integer.src/{M000014.html → M000008.html} +5 -5
  123. data/ref/ruby/classes/Integer.src/M000009.html +5 -12
  124. data/ref/ruby/classes/Integer.src/M000010.html +5 -5
  125. data/ref/ruby/classes/Integer.src/M000011.html +5 -5
  126. data/ref/ruby/classes/Integer.src/M000012.html +5 -5
  127. data/ref/ruby/classes/Integer.src/M000015.html +25 -0
  128. data/ref/ruby/classes/Integer.src/M000016.html +31 -0
  129. data/ref/ruby/classes/Integer.src/M000017.html +12 -12
  130. data/ref/ruby/classes/Integer.src/M000018.html +17 -18
  131. data/ref/ruby/classes/Object.html +126 -0
  132. data/ref/ruby/classes/RDoc.html +5 -5
  133. data/ref/ruby/classes/RDoc.src/{M000061.html → M000081.html} +0 -0
  134. data/ref/ruby/classes/RubyVPI.html +50 -9
  135. data/ref/ruby/classes/String.html +22 -20
  136. data/ref/ruby/classes/String.src/M000020.html +36 -0
  137. data/ref/ruby/classes/String.src/M000021.html +41 -0
  138. data/ref/ruby/classes/String.src/M000022.html +5 -23
  139. data/ref/ruby/classes/String.src/M000023.html +5 -28
  140. data/ref/ruby/classes/{Vpi → VPI}/Handle.html +442 -140
  141. data/ref/ruby/classes/{Vpi/Handle.src/M000042.html → VPI/Handle.src/M000037.html} +4 -4
  142. data/ref/ruby/classes/VPI/Handle.src/M000038.html +21 -0
  143. data/ref/ruby/classes/VPI/Handle.src/M000039.html +18 -0
  144. data/ref/ruby/classes/{Vpi/Handle.src/M000036.html → VPI/Handle.src/M000040.html} +5 -5
  145. data/ref/ruby/classes/VPI/Handle.src/M000045.html +18 -0
  146. data/ref/ruby/classes/{Vpi/Handle.src/M000038.html → VPI/Handle.src/M000046.html} +5 -5
  147. data/ref/ruby/classes/VPI/Handle.src/M000057.html +18 -0
  148. data/ref/ruby/classes/{Vpi/Handle.src/M000040.html → VPI/Handle.src/M000058.html} +5 -5
  149. data/ref/ruby/classes/VPI/Handle.src/M000061.html +18 -0
  150. data/ref/ruby/classes/VPI/Handle.src/M000062.html +18 -0
  151. data/ref/ruby/classes/{Vpi/Handle.src/M000054.html → VPI/Handle.src/M000065.html} +11 -11
  152. data/ref/ruby/classes/VPI/Handle.src/M000067.html +21 -0
  153. data/ref/ruby/classes/VPI/Handle.src/M000068.html +28 -0
  154. data/ref/ruby/classes/VPI/Handle.src/M000069.html +50 -0
  155. data/ref/ruby/classes/{Vpi/Handle.src/M000048.html → VPI/Handle.src/M000070.html} +6 -6
  156. data/ref/ruby/classes/{Vpi/Handle.src/M000049.html → VPI/Handle.src/M000071.html} +6 -6
  157. data/ref/ruby/classes/{Vpi/Handle.src/M000050.html → VPI/Handle.src/M000072.html} +5 -5
  158. data/ref/ruby/classes/{Vpi/Handle.src/M000051.html → VPI/Handle.src/M000073.html} +17 -17
  159. data/ref/ruby/classes/VPI/Handle.src/M000075.html +18 -0
  160. data/ref/ruby/classes/VPI/Handle.src/M000076.html +40 -0
  161. data/ref/ruby/classes/{Vpi/Handle.src/M000056.html → VPI/Handle.src/M000077.html} +18 -18
  162. data/ref/ruby/classes/{Vpi → VPI}/S_vpi_time.html +22 -20
  163. data/ref/ruby/classes/VPI/S_vpi_time.src/M000078.html +18 -0
  164. data/ref/ruby/classes/VPI/S_vpi_time.src/M000079.html +19 -0
  165. data/ref/ruby/classes/{Vpi → VPI}/S_vpi_value.html +37 -23
  166. data/ref/ruby/classes/VPI/S_vpi_value.src/M000034.html +35 -0
  167. data/ref/ruby/classes/VPI/S_vpi_value.src/M000035.html +42 -0
  168. data/ref/ruby/classes/VPI/S_vpi_value.src/M000036.html +42 -0
  169. data/ref/ruby/classes/{Vpi.html → VPI.html} +129 -34
  170. data/ref/ruby/classes/VPI.src/M000027.html +19 -0
  171. data/ref/ruby/classes/VPI.src/M000028.html +18 -0
  172. data/ref/ruby/classes/VPI.src/M000029.html +19 -0
  173. data/ref/ruby/classes/VPI.src/M000031.html +25 -0
  174. data/ref/ruby/classes/VPI.src/M000032.html +26 -0
  175. data/ref/ruby/classes/VerilogParser/Module/Port.html +17 -15
  176. data/ref/ruby/classes/VerilogParser/Module/Port.src/M000004.html +23 -0
  177. data/ref/ruby/classes/VerilogParser/Module/Port.src/{M000007.html → M000005.html} +0 -0
  178. data/ref/ruby/classes/VerilogParser/Module/Port.src/M000006.html +5 -10
  179. data/ref/ruby/classes/VerilogParser/Module.html +7 -5
  180. data/ref/ruby/classes/VerilogParser/Module.src/{M000005.html → M000003.html} +0 -0
  181. data/ref/ruby/classes/VerilogParser.html +7 -5
  182. data/ref/ruby/classes/VerilogParser.src/{M000004.html → M000002.html} +0 -0
  183. data/ref/ruby/created.rid +1 -1
  184. data/ref/ruby/files/bin/generate_rb.html +2 -2
  185. data/ref/ruby/files/lib/ruby-vpi/{vpi_rb.html → core/callback_rb.html} +7 -8
  186. data/ref/ruby/files/lib/ruby-vpi/core/edge_rb.html +114 -0
  187. data/ref/ruby/files/lib/ruby-vpi/core/handle_rb.html +107 -0
  188. data/ref/ruby/files/lib/ruby-vpi/core/scheduler_rb.html +114 -0
  189. data/ref/ruby/files/lib/ruby-vpi/core/struct_rb.html +108 -0
  190. data/ref/ruby/files/lib/ruby-vpi/core_rb.html +121 -0
  191. data/ref/ruby/files/lib/ruby-vpi/rcov_rb.html +1 -1
  192. data/ref/ruby/files/lib/ruby-vpi/runner_boot_loader_rb.html +5 -41
  193. data/ref/ruby/files/lib/ruby-vpi/runner_boot_loader_rb.src/M000001.html +3 -3
  194. data/ref/ruby/files/lib/ruby-vpi/runner_rb.html +1 -1
  195. data/ref/ruby/files/lib/ruby-vpi_rb.html +1 -1
  196. data/ref/ruby/fr_class_index.html +5 -4
  197. data/ref/ruby/fr_file_index.html +6 -1
  198. data/ref/ruby/fr_method_index.html +80 -60
  199. metadata +126 -103
  200. data/ext/swig_vpi.h +0 -924
  201. data/ext/swig_wrap.cin +0 -7083
  202. data/lib/ruby-vpi/vpi.rb +0 -651
  203. data/ref/ruby/classes/Integer.src/M000013.html +0 -18
  204. data/ref/ruby/classes/Integer.src/M000019.html +0 -25
  205. data/ref/ruby/classes/Integer.src/M000020.html +0 -30
  206. data/ref/ruby/classes/String.src/M000024.html +0 -18
  207. data/ref/ruby/classes/String.src/M000025.html +0 -18
  208. data/ref/ruby/classes/VerilogParser/Module/Port.src/M000008.html +0 -18
  209. data/ref/ruby/classes/Vpi/Handle.src/M000035.html +0 -18
  210. data/ref/ruby/classes/Vpi/Handle.src/M000037.html +0 -18
  211. data/ref/ruby/classes/Vpi/Handle.src/M000039.html +0 -18
  212. data/ref/ruby/classes/Vpi/Handle.src/M000041.html +0 -18
  213. data/ref/ruby/classes/Vpi/Handle.src/M000043.html +0 -21
  214. data/ref/ruby/classes/Vpi/Handle.src/M000044.html +0 -21
  215. data/ref/ruby/classes/Vpi/Handle.src/M000045.html +0 -22
  216. data/ref/ruby/classes/Vpi/Handle.src/M000046.html +0 -50
  217. data/ref/ruby/classes/Vpi/Handle.src/M000047.html +0 -91
  218. data/ref/ruby/classes/Vpi/Handle.src/M000053.html +0 -18
  219. data/ref/ruby/classes/Vpi/Handle.src/M000057.html +0 -40
  220. data/ref/ruby/classes/Vpi/S_vpi_time.src/M000058.html +0 -18
  221. data/ref/ruby/classes/Vpi/S_vpi_time.src/M000059.html +0 -19
  222. data/ref/ruby/classes/Vpi/S_vpi_value.src/M000032.html +0 -18
  223. data/ref/ruby/classes/Vpi/S_vpi_value.src/M000033.html +0 -18
  224. data/ref/ruby/classes/Vpi/S_vpi_value.src/M000034.html +0 -18
  225. data/ref/ruby/classes/Vpi.src/M000029.html +0 -28
  226. data/ref/ruby/classes/Vpi.src/M000030.html +0 -39
  227. data/ref/ruby/classes/Vpi.src/M000031.html +0 -20
  228. data/ref/ruby/files/lib/ruby-vpi/runner_boot_loader_rb.src/M000002.html +0 -18
  229. data/samp/counter/RSpec/counter_proto.rb +0 -10
  230. data/samp/counter/xUnit/counter_proto.rb +0 -10
  231. data/samp/pipelined_alu/hw5_unit_proto.rb +0 -4
  232. data/samp/register_file/register_file_proto.rb +0 -11
data/doc/memo.html CHANGED
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  <meta http-equiv="content-type" content="text/html; charset=utf-8"/>
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- <link rel="stylesheet" type="text/css" href="common.css" media="screen" />
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+ <link rel="stylesheet" type="text/css" href="screen.css" media="screen" />
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+ <link rel="alternate stylesheet" type="text/css" href="print.css" title="Print Preview" />
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  <link rel="alternate" type="application/rss+xml" href="http://ruby-vpi.rubyforge.org/doc/rss.xml" title="RSS feed for this project." />
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- <div id="site-links">
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- <a href="readme.html">Home</a>
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- &middot; <a href="manual.html">Manual</a>
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- &middot; <a href="history.html">History</a>
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- <hr style="display: none"/>
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+ <div id="menu">
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+ <h1>Site navigation</h1>
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+ <ul id="site-links">
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+ <li><a href="readme.html">Home</a></li>
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+ <li><a href="manual.html">Manual</a></li>
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+ <li><a href="memo.html">Memo</a></li>
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+ </ul>
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+ <ul><li>1 <a id="a-607246108" href="#Pending_tasks" class="ref">Pending tasks</a></li><li>2 <a id="a-607251748" href="#Finished_tasks" class="ref">Finished tasks</a></li><li>3 <a id="a-607255818" href="#Obsolete_tasks" class="ref">Obsolete tasks</a></li></ul>
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data/doc/print.css CHANGED
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+ pre {
48
+ line-height: 1.5em;
49
+ }
50
+
51
+
52
+ /* emphasis */
53
+
54
+ body {
55
+ font-family: serif;
56
+ }
57
+
58
+ h1, h2, h3, h4, h5, h6, th, .title {
59
+ font-family: sans-serif;
60
+ font-weight: bolder;
61
+ }
62
+
63
+
64
+ /* firefox quirks */
65
+
66
+ li {
67
+ padding-left: 0.5em;
68
+ margin-left: 2em;
69
+ }
data/doc/readme.doc CHANGED
@@ -1,11 +1,9 @@
1
1
  <doc_proxy_include common.inc>
2
- <%
3
- insert_toc = false
4
- page_title = "Ruby-VPI: Ruby interface to Verilog VPI"
5
- %>
2
+ <% page_title = "Ruby-VPI: Ruby interface to Verilog VPI" %>
6
3
 
7
- <div style="float: right">Version <%= version %></div>
8
- <h1 style="padding-top: 0">Ruby-VPI</h1>
4
+ <hr style="display: none"/>
5
+
6
+ <h1 style="padding-top: 0">Ruby-VPI <a style="float: right; position: relative; top: -1em; margin-bottom: -1em;" href="history.html#<%= version.to_html_anchor %>"><%= version %></a></h1>
9
7
 
10
8
  <a href="http://www.ruby-lang.org"><img src="images/ruby/logo-reflection.png" alt="Logo of the Ruby programming language" style="margin: 0; margin-left: 2em; margin-bottom: 1em; float: right"/></a>
11
9
 
data/doc/readme.html CHANGED
@@ -2,23 +2,34 @@
2
2
  <html>
3
3
  <head>
4
4
  <meta http-equiv="content-type" content="text/html; charset=utf-8"/>
5
- <link rel="stylesheet" type="text/css" href="common.css" media="screen" />
5
+ <link rel="stylesheet" type="text/css" href="screen.css" media="screen" />
6
6
  <link rel="stylesheet" type="text/css" href="print.css" media="print" />
7
+ <link rel="alternate stylesheet" type="text/css" href="print.css" title="Print Preview" />
7
8
  <link rel="alternate" type="application/rss+xml" href="http://ruby-vpi.rubyforge.org/doc/rss.xml" title="RSS feed for this project." />
8
9
  <title>Ruby-VPI: Ruby interface to Verilog VPI</title>
9
10
  </head>
10
11
  <body>
11
- <div id="site-links">
12
- <a href="readme.html">Home</a>
13
- &middot; <a href="manual.html">Manual</a>
14
- &middot; <a href="memo.html">Memo</a>
15
- &middot; <a href="history.html">History</a>
16
- <hr style="display: none"/>
17
- </div>
12
+ <div id="menu">
13
+ <h1>Site navigation</h1>
14
+ <ul id="site-links">
15
+ <li><a href="readme.html">Home</a></li>
16
+ <li><a href="manual.html">Manual</a></li>
17
+ <li><a href="memo.html">Memo</a></li>
18
+ <li><a href="history.html">History</a></li>
19
+ </ul>
20
+
21
+
22
+ <div id="toc">
23
+ <h1 id="toc-contents">Contents</h1>
24
+ <ul><li>1 <a id="a-607217228" href="#resources" class="ref">Resources</a><ul><li>1.1 <a id="a-607205968" href="#Records" class="ref">Records</a></li><li>1.2 <a id="a-607208408" href="#Documentation" class="ref">Documentation</a></li><li>1.3 <a id="a-607211248" href="#Facilities" class="ref">Facilities</a></li></ul></li><li>2 <a id="a-607230458" href="#intro.features" class="ref">Features</a><ul><li>2.1 <a id="a-607220078" href="#Portable" class="ref">Portable</a></li><li>2.2 <a id="a-607222628" href="#Agile" class="ref">Agile</a></li><li>2.3 <a id="a-607225228" href="#Powerful" class="ref">Powerful</a></li></ul></li><li>3 <a id="a-607243448" href="#intro.reqs" class="ref">Requirements</a><ul><li>3.1 <a id="a-607233248" href="#Verilog_simulator" class="ref">Verilog simulator</a></li><li>3.2 <a id="a-607235818" href="#Compilers" class="ref">Compilers</a></li><li>3.3 <a id="a-607238348" href="#Libraries" class="ref">Libraries</a></li></ul></li><li>4 <a id="a-607247078" href="#intro.appetizers" class="ref">Appetizers</a></li><li>5 <a id="a-607250138" href="#intro.applications" class="ref">Applications</a></li><li>6 <a id="a-607257618" href="#intro.related-works" class="ref">Related works</a><ul><li>6.1 <a id="a-607253438" href="#intro.related-works.pli" class="ref">Ye olde PLI</a></li></ul></li><li>7 <a id="a-607261148" href="#intro.license" class="ref">License</a></li></ul>
25
+
26
+ </div>
27
+ </div>
28
+
29
+ <div id="body">
30
+ <hr style="display: none"/>
18
31
 
19
-
20
- <div id="body"><div style="float: right">Version 18.0.2</div>
21
- <h1 style="padding-top: 0">Ruby-VPI</h1>
32
+ <h1 style="padding-top: 0">Ruby-VPI <a style="float: right; position: relative; top: -1em; margin-bottom: -1em;" href="history.html#a19.0.0">19.0.0</a></h1>
22
33
 
23
34
  <p><a href="http://www.ruby-lang.org"><img src="images/ruby/logo-reflection.png" alt="Logo of the Ruby programming language" style="margin: 0; margin-left: 2em; margin-bottom: 1em; float: right"/></a></p>
24
35
 
@@ -42,7 +53,7 @@
42
53
 
43
54
  <div id="resources" class="section">
44
55
  <h1 class="title">
45
- <a href="#a-607228958">1</a>
56
+ <a href="#a-607217228" class="ref">1</a>
46
57
 
47
58
  &nbsp;
48
59
 
@@ -53,8 +64,8 @@
53
64
  <div id="Records" class="paragraph">
54
65
  <p class="title">Records</p>
55
66
  <ul>
56
- <li><a href="history.html#a18.0.2">What&#8217;s new</a>
57
- &#8211; release notes for version 18.0.2.
67
+ <li><a href="history.html#a19.0.0">What&#8217;s new</a>
68
+ &#8211; release notes for version 19.0.0.
58
69
  <ul>
59
70
  <li><a href="history.html">History</a>
60
71
  &#8211; a record of all release notes.</li>
@@ -122,7 +133,7 @@
122
133
 
123
134
  <div id="intro.features" class="section">
124
135
  <h1 class="title">
125
- <a href="#a-607249798">2</a>
136
+ <a href="#a-607230458" class="ref">2</a>
126
137
 
127
138
  &nbsp;
128
139
 
@@ -134,7 +145,7 @@
134
145
  <p class="title">Portable</p>
135
146
  <ul>
136
147
  <li>Supports the <em>entire</em> <a href="http://ieeexplore.ieee.org/xpl/standardstoc.jsp?isnumber=33945"><span class="caps">IEEE 1364</span>-2005 Verilog VPI</a> standard.</li>
137
- <li>Works with all <a href="#intro.reqs">major Verilog simulators</a> available today.</li>
148
+ <li>Works with all <a href="#intro.reqs" class="ref">major Verilog simulators</a> available today.</li>
138
149
  <li>Compiled <em>just once</em> during <a href="manual.html#setup.inst">installation</a> and used forever!</li>
139
150
  </ul>
140
151
  </div>
@@ -193,7 +204,7 @@
193
204
 
194
205
  <div id="intro.reqs" class="section">
195
206
  <h1 class="title">
196
- <a href="#a-607272338">3</a>
207
+ <a href="#a-607243448" class="ref">3</a>
197
208
 
198
209
  &nbsp;
199
210
 
@@ -223,7 +234,7 @@
223
234
 
224
235
  <ul>
225
236
  <li><a href="http://www.cadence.com/products/functional_ver/nc-verilog/">Cadence NC-Sim</a>
226
- &#8211; any version that supports the <tt>+loadvpi</tt> option should be acceptable. However, version 05.83-s003 is <em>mostly</em> acceptable because you <strong>will not</strong> be able to <a href="manual.html#problem.ncsim.vpiForceFlag">force values onto wires</a>.</li>
237
+ &#8211; any version that supports the <tt>+loadvpi</tt> option should be acceptable.</li>
227
238
  </ul>
228
239
 
229
240
 
@@ -289,9 +300,80 @@
289
300
  <p>
290
301
  <hr style="display: none"/>
291
302
 
303
+ <div id="intro.appetizers" class="section">
304
+ <h1 class="title">
305
+ <a href="#a-607247078" class="ref">4</a>
306
+
307
+ &nbsp;
308
+
309
+ Appetizers
310
+ </h1>
311
+
312
+ Here is a tiny sampling of code to whet your appetite. See <a href="manual.html#usage.tutorial">the tutorial</a> for more samples.
313
+
314
+
315
+ <ul>
316
+ <li>Assign the value 2<sup>2048</sup> to a register:
317
+ <ul>
318
+ <li><code class="code">your_register.intVal = <span style="color:#00D; font-weight:bold">2</span> ** <span style="color:#00D; font-weight:bold">2048</span></code></li>
319
+ <li><code class="code">your_register.put_value <span style="color:#00D; font-weight:bold">2</span> ** <span style="color:#00D; font-weight:bold">2048</span></code></li>
320
+ </ul></li>
321
+ </ul>
322
+
323
+
324
+ <ul>
325
+ <li>Check if all nets in a module are at high impedance:
326
+ <ul>
327
+ <li><code class="code">your_module.all_net? { |your_net| your_net.z? }</code></li>
328
+ <li><pre class="code">
329
+ your_nets = your_module.net_a
330
+ your_nets.all? { |net| net.z? }</pre></li>
331
+ </ul></li>
332
+ </ul>
333
+
334
+
335
+ <ul>
336
+ <li>See a register&#8217;s path, width, and location (file &#38; line number):
337
+ <ul>
338
+ <li><code class="code">puts your_register</code></li>
339
+ <li><pre class="code">
340
+ p <span style="color:#A60">:path</span> =&gt; your_register.fullName
341
+ p <span style="color:#A60">:width</span> =&gt; your_register.size
342
+ p <span style="color:#A60">:file</span> =&gt; your_register.fileName
343
+ p <span style="color:#A60">:file</span> =&gt; your_register.lineNo</pre></li>
344
+ </ul></li>
345
+ </ul>
346
+
347
+
348
+ <ul>
349
+ <li>Access the first five elements in a memory:
350
+ <ul>
351
+ <li><code class="code">your_memory.memoryWord_a.first(<span style="color:#00D; font-weight:bold">5</span>)</code></li>
352
+ <li><code class="code">your_memory.memoryWord_a[<span style="color:#00D; font-weight:bold">0</span>..<span style="color:#00D; font-weight:bold">4</span>]</code></li>
353
+ <li><code class="code">your_memory.memoryWord_a[<span style="color:#00D; font-weight:bold">0</span>, <span style="color:#00D; font-weight:bold">5</span>]</code></li>
354
+ </ul></li>
355
+ </ul>
356
+
357
+
358
+ <ul>
359
+ <li>Clear a memory by filling it with zeroes:
360
+ <ul>
361
+ <li><code class="code">your_memory.each_memoryWord { |w| w.zero! }</code></li>
362
+ <li><code class="code">your_memory.each_memoryWord { |w| w.intVal = <span style="color:#00D; font-weight:bold">0</span> }</code></li>
363
+ <li><code class="code">your_memory.each_memoryWord { |w| w.put_value <span style="color:#00D; font-weight:bold">0</span> }</code></li>
364
+ </ul></li>
365
+ </ul>
366
+
367
+ </div>
368
+ </p>
369
+
370
+
371
+ <p>
372
+ <hr style="display: none"/>
373
+
292
374
  <div id="intro.applications" class="section">
293
375
  <h1 class="title">
294
- <a href="#a-607276548">4</a>
376
+ <a href="#a-607250138" class="ref">5</a>
295
377
 
296
378
  &nbsp;
297
379
 
@@ -335,66 +417,47 @@
335
417
  <p>
336
418
  <hr style="display: none"/>
337
419
 
338
- <div id="intro.appetizers" class="section">
420
+ <div id="intro.related-works" class="section">
339
421
  <h1 class="title">
340
- <a href="#a-607279658">5</a>
422
+ <a href="#a-607257618" class="ref">6</a>
341
423
 
342
424
  &nbsp;
343
425
 
344
- Appetizers
426
+ Related works
345
427
  </h1>
346
428
 
347
- <p>Here is a tiny sampling of code to whet your appetite. See <a href="manual.html#usage.tutorial">the tutorial</a> for more samples.</p>
348
-
349
-
350
- <ul>
351
- <li>Assign the value 2<sup>2048</sup> to a register:</li>
352
- </ul>
353
-
354
-
355
- <blockquote>
356
- <p><code class="code">your_register.intVal = <span style="color:#00D; font-weight:bold">2</span> ** <span style="color:#00D; font-weight:bold">2048</span></code></p>
357
- </blockquote>
358
-
359
-
360
- <ul>
361
- <li>Check if all nets in a module are at high impedance:</li>
362
- </ul>
363
-
364
-
365
- <blockquote>
366
- <p><code class="code">your_module.all_net? { |net| net.z? }</code></p>
367
- </blockquote>
368
-
369
-
370
- <ul>
371
- <li>See a register&#8217;s path, width, and location (file &#38; line number):</li>
429
+ <ul>
430
+ <li><a href="http://anvil.sourceforge.net">ANVIL</a> is a C++ interface to VPI.</li>
431
+ <li><a href="http://teal.sourceforge.net">Teal</a> is a C++ interface to VPI.</li>
432
+ <li><a href="http://jove.sourceforge.net">JOVE</a> is a Java interface to VPI.</li>
433
+ <li><a href="http://embedded.eecs.berkeley.edu/Alumni/pinhong/scriptEDA/">ScriptEDA</a> is a Perl, Python, and Tcl interface to VPI.</li>
434
+ <li><a href="http://rhdl.rubyforge.org">RHDL</a> is a hardware description and verification language based on Ruby.</li>
435
+ <li><a href="http://myhdl.jandecaluwe.com">MyHDL</a> is a hardware description and verification language based on Python, which features conversion to Verilog and co-simulation.</li>
372
436
  </ul>
373
437
 
374
438
 
375
- <blockquote>
376
- <p><code class="code">puts your_register</code></p>
377
- </blockquote>
439
+ <p>
440
+ <hr style="display: none"/>
378
441
 
442
+ <div id="intro.related-works.pli" class="section">
443
+ <h2 class="title">
444
+ <a href="#a-607253438" class="ref">6.1</a>
379
445
 
380
- <ul>
381
- <li>Access the first five elements in a memory:</li>
382
- </ul>
446
+ &nbsp;
383
447
 
448
+ Ye olde PLI
449
+ </h2>
384
450
 
385
- <blockquote>
386
- <p><code class="code">your_memory.memoryWord_a[<span style="color:#00D; font-weight:bold">0</span>..<span style="color:#00D; font-weight:bold">4</span>]</code></p>
387
- </blockquote>
451
+ The following projects utilize the archaic <strong>tf</strong> and <strong>acc</strong> PLI interfaces, which have been officially deprecated in IEEE Std 1364-2005.
388
452
 
389
453
 
390
454
  <ul>
391
- <li>Clear a memory by filling it with zeroes:</li>
455
+ <li><a href="http://www.nelsim.com">ScriptSim</a> is a Perl, Python, and Tcl/Tk interface to PLI.</li>
456
+ <li><a href="http://www.veripool.com/verilog-pli.html">Verilog::Pli</a> is a Perl interface to PLI.</li>
392
457
  </ul>
393
458
 
394
-
395
- <blockquote>
396
- <p><code class="code">your_memory.each_memoryWord {|w| w.intVal = <span style="color:#00D; font-weight:bold">0</span>}</code></p>
397
- </blockquote>
459
+ </div>
460
+ </p>
398
461
 
399
462
  </div>
400
463
  </p>
@@ -405,7 +468,7 @@
405
468
 
406
469
  <div id="intro.license" class="section">
407
470
  <h1 class="title">
408
- <a href="#a-607284018">6</a>
471
+ <a href="#a-607261148" class="ref">7</a>
409
472
 
410
473
  &nbsp;
411
474
 
@@ -444,54 +507,9 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
444
507
 
445
508
  </div>
446
509
  </p>
447
-
448
-
449
- <p>
450
- <hr style="display: none"/>
451
-
452
- <div id="intro.related-works" class="section">
453
- <h1 class="title">
454
- <a href="#a-607290678">7</a>
455
-
456
- &nbsp;
457
-
458
- Related works
459
- </h1>
460
-
461
- <ul>
462
- <li><a href="http://jove.sourceforge.net">JOVE</a> is a Java interface to VPI.</li>
463
- <li><a href="http://teal.sourceforge.net">Teal</a> is a C++ interface to VPI.</li>
464
- <li><a href="http://embedded.eecs.berkeley.edu/Alumni/pinhong/scriptEDA/">ScriptEDA</a> is a Perl, Python, and Tcl interface to VPI.</li>
465
- <li><a href="http://rhdl.rubyforge.org">RHDL</a> is a hardware description and verification language based on Ruby.</li>
466
- <li><a href="http://myhdl.jandecaluwe.com">MyHDL</a> is a hardware description and verification language based on Python, which features conversion to Verilog and co-simulation.</li>
467
- </ul>
468
-
469
-
470
- <p>
471
- <hr style="display: none"/>
472
-
473
- <div id="intro.related-works.pli" class="section">
474
- <h2 class="title">
475
- <a href="#a-607287248">7.1</a>
476
-
477
- &nbsp;
478
-
479
- Ye olde PLI
480
- </h2>
481
-
482
- The following projects utilize the archaic <strong>tf</strong> and <strong>acc</strong> PLI interfaces, which have been officially deprecated in IEEE Std 1364-2005.
483
-
484
-
485
- <ul>
486
- <li><a href="http://www.nelsim.com">ScriptSim</a> is a Perl, Python, and Tcl/Tk interface to PLI.</li>
487
- <li><a href="http://www.veripool.com/verilog-pli.html">Verilog::Pli</a> is a Perl interface to PLI.</li>
488
- </ul>
489
-
510
+ <br/>
511
+ <hr/>
512
+ This website is maintained by Suraj N. Kurapati (SNK at GNA dot ORG). This particular webpage was last updated on Mon Aug 27 19:26:45 -0700 2007.
490
513
  </div>
491
- </p>
492
-
493
- </div>
494
- </p></div>
495
-
496
- </body>
514
+ </body>
497
515
  </html>