ruby-vpi 18.0.2 → 19.0.0

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Files changed (232) hide show
  1. data/Rakefile +15 -19
  2. data/bin/generate/proto.rb +15 -10
  3. data/bin/ruby-vpi +2 -0
  4. data/doc/README +3 -5
  5. data/doc/Rakefile +3 -3
  6. data/doc/common.css +24 -136
  7. data/doc/common.tpl +48 -37
  8. data/doc/figures/figures.dia +19 -19
  9. data/doc/figures/ruby_relay.png +0 -0
  10. data/doc/history.html +252 -67
  11. data/doc/history.inc +98 -1
  12. data/doc/history.yaml +105 -0
  13. data/doc/intro.inc +43 -32
  14. data/doc/lib/doc_format.rb +19 -13
  15. data/doc/lib/doc_proxy.rb +7 -7
  16. data/doc/manual.doc +156 -117
  17. data/doc/manual.html +601 -560
  18. data/doc/memo.html +29 -25
  19. data/doc/print.css +63 -4
  20. data/doc/readme.doc +4 -6
  21. data/doc/readme.html +129 -111
  22. data/doc/rss.xml +168 -7
  23. data/doc/screen.css +146 -0
  24. data/doc/spacing.css +57 -0
  25. data/{samp → examples}/counter/RSpec/Rakefile +0 -0
  26. data/{samp → examples}/counter/RSpec/counter_design.rb +0 -0
  27. data/examples/counter/RSpec/counter_proto.rb +9 -0
  28. data/{samp → examples}/counter/RSpec/counter_runner.rake +0 -0
  29. data/{samp → examples}/counter/RSpec/counter_spec.rb +0 -0
  30. data/{samp → examples}/counter/Rakefile +0 -0
  31. data/{samp → examples}/counter/counter.v +0 -0
  32. data/{samp → examples}/counter/xUnit/Rakefile +0 -0
  33. data/{samp → examples}/counter/xUnit/counter_bench.rb +0 -0
  34. data/{samp → examples}/counter/xUnit/counter_bench.v +0 -0
  35. data/{samp → examples}/counter/xUnit/counter_design.rb +0 -0
  36. data/examples/counter/xUnit/counter_proto.rb +9 -0
  37. data/{samp → examples}/counter/xUnit/counter_runner.rake +0 -0
  38. data/{samp → examples}/counter/xUnit/counter_spec.rb +0 -0
  39. data/{samp → examples}/pipelined_alu/Hw5UnitModel.rb +0 -0
  40. data/{samp → examples}/pipelined_alu/README +0 -0
  41. data/{samp → examples}/pipelined_alu/Rakefile +0 -0
  42. data/{samp → examples}/pipelined_alu/TestHw5UnitModel.rb +0 -0
  43. data/{samp → examples}/pipelined_alu/hw5_unit.v +0 -0
  44. data/{samp → examples}/pipelined_alu/hw5_unit_design.rb +0 -7
  45. data/examples/pipelined_alu/hw5_unit_proto.rb +2 -0
  46. data/{samp → examples}/pipelined_alu/hw5_unit_runner.rake +0 -0
  47. data/{samp → examples}/pipelined_alu/hw5_unit_spec.rb +0 -0
  48. data/{samp → examples}/pipelined_alu/int_gen.rb +0 -0
  49. data/{samp → examples}/register_file/LICENSE +0 -0
  50. data/{samp → examples}/register_file/README +0 -0
  51. data/{samp → examples}/register_file/Rakefile +0 -0
  52. data/{samp → examples}/register_file/register_file.v +0 -0
  53. data/{samp → examples}/register_file/register_file_design.rb +0 -0
  54. data/examples/register_file/register_file_proto.rb +11 -0
  55. data/{samp → examples}/register_file/register_file_runner.rake +0 -0
  56. data/{samp → examples}/register_file/register_file_spec.rb +0 -0
  57. data/ext/main.c +5 -5
  58. data/ext/swig_vpi.i +6 -2
  59. data/lib/ruby-vpi/core/callback.rb +142 -0
  60. data/lib/ruby-vpi/core/edge.rb +128 -0
  61. data/lib/ruby-vpi/core/handle.rb +421 -0
  62. data/lib/ruby-vpi/core/scheduler.rb +244 -0
  63. data/lib/ruby-vpi/core/struct.rb +123 -0
  64. data/lib/ruby-vpi/core.rb +41 -0
  65. data/lib/ruby-vpi/rcov.rb +25 -12
  66. data/lib/ruby-vpi/runner.rb +30 -26
  67. data/lib/ruby-vpi/runner_boot_loader.rb +67 -37
  68. data/lib/ruby-vpi.rb +2 -2
  69. data/ref/c/annotated.html +1 -1
  70. data/ref/c/common_8h.html +1 -1
  71. data/ref/c/files.html +1 -1
  72. data/ref/c/functions.html +1 -1
  73. data/ref/c/functions_vars.html +1 -1
  74. data/ref/c/globals.html +1 -1
  75. data/ref/c/globals_0x63.html +1 -1
  76. data/ref/c/globals_0x65.html +1 -1
  77. data/ref/c/globals_0x66.html +1 -1
  78. data/ref/c/globals_0x6d.html +1 -1
  79. data/ref/c/globals_0x70.html +1 -1
  80. data/ref/c/globals_0x72.html +1 -1
  81. data/ref/c/globals_0x73.html +1 -1
  82. data/ref/c/globals_0x74.html +1 -1
  83. data/ref/c/globals_0x76.html +1 -1
  84. data/ref/c/globals_0x78.html +1 -1
  85. data/ref/c/globals_defs.html +1 -1
  86. data/ref/c/globals_defs_0x65.html +1 -1
  87. data/ref/c/globals_defs_0x70.html +1 -1
  88. data/ref/c/globals_defs_0x76.html +1 -1
  89. data/ref/c/globals_defs_0x78.html +1 -1
  90. data/ref/c/globals_enum.html +1 -1
  91. data/ref/c/globals_eval.html +1 -1
  92. data/ref/c/globals_func.html +1 -1
  93. data/ref/c/globals_type.html +1 -1
  94. data/ref/c/globals_vars.html +1 -1
  95. data/ref/c/index.html +1 -1
  96. data/ref/c/main_8c.html +1 -1
  97. data/ref/c/main_8h.html +1 -1
  98. data/ref/c/relay_8c.html +1 -1
  99. data/ref/c/relay_8h.html +1 -1
  100. data/ref/c/structt__cb__data.html +1 -1
  101. data/ref/c/structt__vpi__delay.html +1 -1
  102. data/ref/c/structt__vpi__error__info.html +1 -1
  103. data/ref/c/structt__vpi__strengthval.html +1 -1
  104. data/ref/c/structt__vpi__systf__data.html +1 -1
  105. data/ref/c/structt__vpi__time.html +1 -1
  106. data/ref/c/structt__vpi__value.html +1 -1
  107. data/ref/c/structt__vpi__vecval.html +1 -1
  108. data/ref/c/structt__vpi__vlog__info.html +1 -1
  109. data/ref/c/verilog_8h.html +1 -1
  110. data/ref/c/vlog_8c.html +1 -1
  111. data/ref/c/vlog_8h.html +1 -1
  112. data/ref/c/vpi__user_8h.html +1 -1
  113. data/ref/ruby/classes/ERB.html +7 -5
  114. data/ref/ruby/classes/ERB.src/{M000026.html → M000024.html} +0 -0
  115. data/ref/ruby/classes/FileUtils.html +11 -11
  116. data/ref/ruby/classes/FileUtils.src/{M000027.html → M000025.html} +0 -0
  117. data/ref/ruby/classes/FileUtils.src/{M000028.html → M000026.html} +0 -0
  118. data/ref/ruby/classes/Float.html +8 -6
  119. data/ref/ruby/classes/Float.src/{M000021.html → M000019.html} +0 -0
  120. data/ref/ruby/classes/Integer.html +67 -65
  121. data/ref/ruby/classes/Integer.src/M000007.html +25 -0
  122. data/ref/ruby/classes/Integer.src/{M000014.html → M000008.html} +5 -5
  123. data/ref/ruby/classes/Integer.src/M000009.html +5 -12
  124. data/ref/ruby/classes/Integer.src/M000010.html +5 -5
  125. data/ref/ruby/classes/Integer.src/M000011.html +5 -5
  126. data/ref/ruby/classes/Integer.src/M000012.html +5 -5
  127. data/ref/ruby/classes/Integer.src/M000015.html +25 -0
  128. data/ref/ruby/classes/Integer.src/M000016.html +31 -0
  129. data/ref/ruby/classes/Integer.src/M000017.html +12 -12
  130. data/ref/ruby/classes/Integer.src/M000018.html +17 -18
  131. data/ref/ruby/classes/Object.html +126 -0
  132. data/ref/ruby/classes/RDoc.html +5 -5
  133. data/ref/ruby/classes/RDoc.src/{M000061.html → M000081.html} +0 -0
  134. data/ref/ruby/classes/RubyVPI.html +50 -9
  135. data/ref/ruby/classes/String.html +22 -20
  136. data/ref/ruby/classes/String.src/M000020.html +36 -0
  137. data/ref/ruby/classes/String.src/M000021.html +41 -0
  138. data/ref/ruby/classes/String.src/M000022.html +5 -23
  139. data/ref/ruby/classes/String.src/M000023.html +5 -28
  140. data/ref/ruby/classes/{Vpi → VPI}/Handle.html +442 -140
  141. data/ref/ruby/classes/{Vpi/Handle.src/M000042.html → VPI/Handle.src/M000037.html} +4 -4
  142. data/ref/ruby/classes/VPI/Handle.src/M000038.html +21 -0
  143. data/ref/ruby/classes/VPI/Handle.src/M000039.html +18 -0
  144. data/ref/ruby/classes/{Vpi/Handle.src/M000036.html → VPI/Handle.src/M000040.html} +5 -5
  145. data/ref/ruby/classes/VPI/Handle.src/M000045.html +18 -0
  146. data/ref/ruby/classes/{Vpi/Handle.src/M000038.html → VPI/Handle.src/M000046.html} +5 -5
  147. data/ref/ruby/classes/VPI/Handle.src/M000057.html +18 -0
  148. data/ref/ruby/classes/{Vpi/Handle.src/M000040.html → VPI/Handle.src/M000058.html} +5 -5
  149. data/ref/ruby/classes/VPI/Handle.src/M000061.html +18 -0
  150. data/ref/ruby/classes/VPI/Handle.src/M000062.html +18 -0
  151. data/ref/ruby/classes/{Vpi/Handle.src/M000054.html → VPI/Handle.src/M000065.html} +11 -11
  152. data/ref/ruby/classes/VPI/Handle.src/M000067.html +21 -0
  153. data/ref/ruby/classes/VPI/Handle.src/M000068.html +28 -0
  154. data/ref/ruby/classes/VPI/Handle.src/M000069.html +50 -0
  155. data/ref/ruby/classes/{Vpi/Handle.src/M000048.html → VPI/Handle.src/M000070.html} +6 -6
  156. data/ref/ruby/classes/{Vpi/Handle.src/M000049.html → VPI/Handle.src/M000071.html} +6 -6
  157. data/ref/ruby/classes/{Vpi/Handle.src/M000050.html → VPI/Handle.src/M000072.html} +5 -5
  158. data/ref/ruby/classes/{Vpi/Handle.src/M000051.html → VPI/Handle.src/M000073.html} +17 -17
  159. data/ref/ruby/classes/VPI/Handle.src/M000075.html +18 -0
  160. data/ref/ruby/classes/VPI/Handle.src/M000076.html +40 -0
  161. data/ref/ruby/classes/{Vpi/Handle.src/M000056.html → VPI/Handle.src/M000077.html} +18 -18
  162. data/ref/ruby/classes/{Vpi → VPI}/S_vpi_time.html +22 -20
  163. data/ref/ruby/classes/VPI/S_vpi_time.src/M000078.html +18 -0
  164. data/ref/ruby/classes/VPI/S_vpi_time.src/M000079.html +19 -0
  165. data/ref/ruby/classes/{Vpi → VPI}/S_vpi_value.html +37 -23
  166. data/ref/ruby/classes/VPI/S_vpi_value.src/M000034.html +35 -0
  167. data/ref/ruby/classes/VPI/S_vpi_value.src/M000035.html +42 -0
  168. data/ref/ruby/classes/VPI/S_vpi_value.src/M000036.html +42 -0
  169. data/ref/ruby/classes/{Vpi.html → VPI.html} +129 -34
  170. data/ref/ruby/classes/VPI.src/M000027.html +19 -0
  171. data/ref/ruby/classes/VPI.src/M000028.html +18 -0
  172. data/ref/ruby/classes/VPI.src/M000029.html +19 -0
  173. data/ref/ruby/classes/VPI.src/M000031.html +25 -0
  174. data/ref/ruby/classes/VPI.src/M000032.html +26 -0
  175. data/ref/ruby/classes/VerilogParser/Module/Port.html +17 -15
  176. data/ref/ruby/classes/VerilogParser/Module/Port.src/M000004.html +23 -0
  177. data/ref/ruby/classes/VerilogParser/Module/Port.src/{M000007.html → M000005.html} +0 -0
  178. data/ref/ruby/classes/VerilogParser/Module/Port.src/M000006.html +5 -10
  179. data/ref/ruby/classes/VerilogParser/Module.html +7 -5
  180. data/ref/ruby/classes/VerilogParser/Module.src/{M000005.html → M000003.html} +0 -0
  181. data/ref/ruby/classes/VerilogParser.html +7 -5
  182. data/ref/ruby/classes/VerilogParser.src/{M000004.html → M000002.html} +0 -0
  183. data/ref/ruby/created.rid +1 -1
  184. data/ref/ruby/files/bin/generate_rb.html +2 -2
  185. data/ref/ruby/files/lib/ruby-vpi/{vpi_rb.html → core/callback_rb.html} +7 -8
  186. data/ref/ruby/files/lib/ruby-vpi/core/edge_rb.html +114 -0
  187. data/ref/ruby/files/lib/ruby-vpi/core/handle_rb.html +107 -0
  188. data/ref/ruby/files/lib/ruby-vpi/core/scheduler_rb.html +114 -0
  189. data/ref/ruby/files/lib/ruby-vpi/core/struct_rb.html +108 -0
  190. data/ref/ruby/files/lib/ruby-vpi/core_rb.html +121 -0
  191. data/ref/ruby/files/lib/ruby-vpi/rcov_rb.html +1 -1
  192. data/ref/ruby/files/lib/ruby-vpi/runner_boot_loader_rb.html +5 -41
  193. data/ref/ruby/files/lib/ruby-vpi/runner_boot_loader_rb.src/M000001.html +3 -3
  194. data/ref/ruby/files/lib/ruby-vpi/runner_rb.html +1 -1
  195. data/ref/ruby/files/lib/ruby-vpi_rb.html +1 -1
  196. data/ref/ruby/fr_class_index.html +5 -4
  197. data/ref/ruby/fr_file_index.html +6 -1
  198. data/ref/ruby/fr_method_index.html +80 -60
  199. metadata +126 -103
  200. data/ext/swig_vpi.h +0 -924
  201. data/ext/swig_wrap.cin +0 -7083
  202. data/lib/ruby-vpi/vpi.rb +0 -651
  203. data/ref/ruby/classes/Integer.src/M000013.html +0 -18
  204. data/ref/ruby/classes/Integer.src/M000019.html +0 -25
  205. data/ref/ruby/classes/Integer.src/M000020.html +0 -30
  206. data/ref/ruby/classes/String.src/M000024.html +0 -18
  207. data/ref/ruby/classes/String.src/M000025.html +0 -18
  208. data/ref/ruby/classes/VerilogParser/Module/Port.src/M000008.html +0 -18
  209. data/ref/ruby/classes/Vpi/Handle.src/M000035.html +0 -18
  210. data/ref/ruby/classes/Vpi/Handle.src/M000037.html +0 -18
  211. data/ref/ruby/classes/Vpi/Handle.src/M000039.html +0 -18
  212. data/ref/ruby/classes/Vpi/Handle.src/M000041.html +0 -18
  213. data/ref/ruby/classes/Vpi/Handle.src/M000043.html +0 -21
  214. data/ref/ruby/classes/Vpi/Handle.src/M000044.html +0 -21
  215. data/ref/ruby/classes/Vpi/Handle.src/M000045.html +0 -22
  216. data/ref/ruby/classes/Vpi/Handle.src/M000046.html +0 -50
  217. data/ref/ruby/classes/Vpi/Handle.src/M000047.html +0 -91
  218. data/ref/ruby/classes/Vpi/Handle.src/M000053.html +0 -18
  219. data/ref/ruby/classes/Vpi/Handle.src/M000057.html +0 -40
  220. data/ref/ruby/classes/Vpi/S_vpi_time.src/M000058.html +0 -18
  221. data/ref/ruby/classes/Vpi/S_vpi_time.src/M000059.html +0 -19
  222. data/ref/ruby/classes/Vpi/S_vpi_value.src/M000032.html +0 -18
  223. data/ref/ruby/classes/Vpi/S_vpi_value.src/M000033.html +0 -18
  224. data/ref/ruby/classes/Vpi/S_vpi_value.src/M000034.html +0 -18
  225. data/ref/ruby/classes/Vpi.src/M000029.html +0 -28
  226. data/ref/ruby/classes/Vpi.src/M000030.html +0 -39
  227. data/ref/ruby/classes/Vpi.src/M000031.html +0 -20
  228. data/ref/ruby/files/lib/ruby-vpi/runner_boot_loader_rb.src/M000002.html +0 -18
  229. data/samp/counter/RSpec/counter_proto.rb +0 -10
  230. data/samp/counter/xUnit/counter_proto.rb +0 -10
  231. data/samp/pipelined_alu/hw5_unit_proto.rb +0 -4
  232. data/samp/register_file/register_file_proto.rb +0 -11
data/doc/manual.html CHANGED
@@ -2,34 +2,96 @@
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  <html>
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  <head>
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  <meta http-equiv="content-type" content="text/html; charset=utf-8"/>
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- <link rel="stylesheet" type="text/css" href="common.css" media="screen" />
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+ <link rel="stylesheet" type="text/css" href="screen.css" media="screen" />
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  <link rel="stylesheet" type="text/css" href="print.css" media="print" />
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+ <link rel="alternate stylesheet" type="text/css" href="print.css" title="Print Preview" />
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  <link rel="alternate" type="application/rss+xml" href="http://ruby-vpi.rubyforge.org/doc/rss.xml" title="RSS feed for this project." />
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- <title>Ruby-VPI 18.0.2 user manual</title>
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+ <title>Ruby-VPI user manual</title>
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  </head>
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  <body>
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- <div id="site-links">
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- <a href="readme.html">Home</a>
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- &middot; <a href="manual.html">Manual</a>
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- &middot; <a href="memo.html">Memo</a>
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- &middot; <a href="history.html">History</a>
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- <hr style="display: none"/>
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- </div>
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+ <div id="menu">
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+ <h1>Site navigation</h1>
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+ <ul id="site-links">
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+ <li><a href="readme.html">Home</a></li>
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+ <li><a href="manual.html">Manual</a></li>
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+ <li><a href="memo.html">Memo</a></li>
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+ <li><a href="history.html">History</a></li>
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+ </ul>
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+ <h1>Menu navigation</h1>
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+ <ul id="toc-links">
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+ <li><a href="#toc-contents">Contents</a></li><li><a href="#toc:tip">Tips</a></li><li><a href="#toc:note">Notes</a></li><li><a href="#toc:caution">Cautions</a></li><li><a href="#toc:figure">Figures</a></li><li><a href="#toc:table">Tables</a></li><li><a href="#toc:example">Examples</a></li>
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+ <h1 id="toc-contents">Contents</h1>
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+ <ul><li>1 <a id="a-607060028" href="#Ruby-VPI_user_manual" class="ref">Ruby-VPI user manual</a><ul><li>1.1 <a id="a-607052878" href="#About_this_manual" class="ref">About this manual</a></li><li>1.2 <a id="a-607055408" href="#Legal_notice" class="ref">Legal notice</a></li></ul></li><li>2 <a id="a-607140228" href="#intro" class="ref">Welcome</a><ul><li>2.1 <a id="a-607073948" href="#resources" class="ref">Resources</a><ul><li>2.1.1 <a id="a-607063268" href="#Records" class="ref">Records</a></li><li>2.1.2 <a id="a-607065648" href="#Documentation" class="ref">Documentation</a></li><li>2.1.3 <a id="a-607068348" href="#Facilities" class="ref">Facilities</a></li></ul></li><li>2.2 <a id="a-607086258" href="#intro.features" class="ref">Features</a><ul><li>2.2.1 <a id="a-607076588" href="#Portable" class="ref">Portable</a></li><li>2.2.2 <a id="a-607078988" href="#Agile" class="ref">Agile</a></li><li>2.2.3 <a id="a-607081388" href="#Powerful" class="ref">Powerful</a></li></ul></li><li>2.3 <a id="a-607098488" href="#intro.reqs" class="ref">Requirements</a><ul><li>2.3.1 <a id="a-607088898" href="#Verilog_simulator" class="ref">Verilog simulator</a></li><li>2.3.2 <a id="a-607091338" href="#Compilers" class="ref">Compilers</a></li><li>2.3.3 <a id="a-607093658" href="#Libraries" class="ref">Libraries</a></li></ul></li><li>2.4 <a id="a-607101288" href="#intro.appetizers" class="ref">Appetizers</a></li><li>2.5 <a id="a-607103848" href="#intro.applications" class="ref">Applications</a></li><li>2.6 <a id="a-607109258" href="#intro.related-works" class="ref">Related works</a><ul><li>2.6.1 <a id="a-607106308" href="#intro.related-works.pli" class="ref">Ye olde PLI</a></li></ul></li><li>2.7 <a id="a-607112128" href="#intro.license" class="ref">License</a></li></ul></li><li>3 <a id="a-607180888" href="#setup" class="ref">Setup</a><ul><li>3.1 <a id="a-607143418" href="#setup.manifest" class="ref">Manifest</a></li><li>3.2 <a id="a-607148858" href="#setup.reqs" class="ref">Requirements</a></li><li>3.3 <a id="a-607155028" href="#setup.recom" class="ref">Recommendations</a><ul><li>3.3.1 <a id="a-607151688" href="#setup.recom.merger" class="ref">Text merging tool</a></li></ul></li><li>3.4 <a id="a-607164168" href="#setup.inst" class="ref">Installation</a><ul><li>3.4.1 <a id="a-607160108" href="#setup.inst.windows" class="ref">Installing on Windows</a></li></ul></li><li>3.5 <a id="a-607166448" href="#setup.maintenance" class="ref">Maintenance</a></li></ul></li><li>4 <a id="a-607194908" href="#organization" class="ref">Organization</a><ul><li>4.1 <a id="a-607189198" href="#organization.tests" class="ref">Tests</a></li></ul></li><li>5 <a id="a-607339858" href="#usage" class="ref">Usage</a><ul><li>5.1 <a id="a-607201128" href="#overview.relay" class="ref">Interacting with the Verilog simulator</a></li><li>5.2 <a id="a-607084798" href="#vpi" class="ref">VPI in Ruby</a><ul><li>5.2.1 <a id="a-607039078" href="#vpi.handles" class="ref">Handles</a><ul><li>5.2.1.1 <a id="a-607206178" href="#Shortcuts_for_productivity" class="ref">Shortcuts for productivity</a></li><li>5.2.1.2 <a id="a-607208738" href="#Accessing_a_handle_s_relatives" class="ref">Accessing a handle&#8217;s relatives</a></li><li>5.2.1.3 <a id="a-607211678" href="#Accessing_a_handle_s_properties" class="ref">Accessing a handle&#8217;s properties</a></li></ul></li><li>5.2.2 <a id="a-607049268" href="#vpi.callbacks" class="ref">Callbacks</a></li></ul></li><li>5.3 <a id="a-607113668" href="#usage.concurrency" class="ref">Concurrency</a><ul><li>5.3.1 <a id="a-607100498" href="#Creating_a_concurrent_process" class="ref">Creating a concurrent process</a></li></ul></li><li>5.4 <a id="a-607122918" href="#usage.prototyping" class="ref">Prototyping</a><ul><li>5.4.1 <a id="a-607117988" href="#Creating_a_prototype" class="ref">Creating a prototype</a></li></ul></li><li>5.5 <a id="a-607128648" href="#usage.debugger" class="ref">Interactive debugging</a><ul><li>5.5.1 <a id="a-607125578" href="#usage.debugger.init" class="ref">Advanced initialization</a></li></ul></li><li>5.6 <a id="a-607150648" href="#usage.runner" class="ref">Test runner</a><ul><li>5.6.1 <a id="a-607138328" href="#usage.runner.env-vars" class="ref">Environment variables</a><ul><li>5.6.1.1 <a id="a-607131748" href="#Variables_as_command-line_arguments" class="ref">Variables as command-line arguments</a></li></ul></li></ul></li><li>5.7 <a id="a-607177328" href="#usage.tools" class="ref">Tools</a><ul><li>5.7.1 <a id="a-607165778" href="#usage.tools.generate" class="ref">Automated test generation</a></li><li>5.7.2 <a id="a-607169418" href="#usage.tools.convert" class="ref">Verilog to Ruby conversion</a></li></ul></li><li>5.8 <a id="a-607179568" href="#usage.examples" class="ref">Example tests</a></li><li>5.9 <a id="a-607105538" href="#usage.tutorial" class="ref">Tutorial</a><ul><li>5.9.1 <a id="a-607192538" href="#usage.tutorial.declare-design" class="ref">Start with a Verilog design</a></li><li>5.9.2 <a id="a-607217768" href="#usage.tutorial.generate-test" class="ref">Generate a test</a></li><li>5.9.3 <a id="a-607227868" href="#usage.tutorial.specification" class="ref">Specify your expectations</a></li><li>5.9.4 <a id="a-607233858" href="#usage.tutorial.implement-proto" class="ref">Implement the prototype</a></li><li>5.9.5 <a id="a-607247108" href="#usage.tutorial.test-proto" class="ref">Verify the prototype</a></li><li>5.9.6 <a id="a-607253098" href="#usage.tutorial.implement-design" class="ref">Implement the design</a></li><li>5.9.7 <a id="a-607037508" href="#usage.tutorial.test-design" class="ref">Verify the design</a></li></ul></li></ul></li><li>6 <a id="a-607355358" href="#hacking" class="ref">Hacking</a><ul><li>6.1 <a id="a-607342188" href="#hacking.scm" class="ref">Getting the latest source code</a></li><li>6.2 <a id="a-607344708" href="#Installing_without_really_installing" class="ref">Installing without really installing</a></li><li>6.3 <a id="a-607347318" href="#hacking.release-packages" class="ref">Building release packages</a></li><li>6.4 <a id="a-607349668" href="#hacking.manual" class="ref">Editing this manual</a></li></ul></li><li>7 <a id="a-607403828" href="#problems" class="ref">Known problems</a><ul><li>7.1 <a id="a-607383948" href="#problem.ivl" class="ref">Icarus Verilog</a><ul><li>7.1.1 <a id="a-607361328" href="#problems.ivl.vpi_handle_by_name.absolute-paths" class="ref">Give full paths to Verilog objects</a></li><li>7.1.2 <a id="a-607371018" href="#problems.ivl.vpi_handle_by_name.connect-registers" class="ref">Registers must be connected</a></li><li>7.1.3 <a id="a-607373268" href="#problems.ivl.vpi_reset" class="ref">VPI::reset</a></li></ul></li></ul></li><li>8 <a id="a-607436278" href="#glossary" class="ref">Glossary</a><ul><li>8.1 <a id="a-607406658" href="#glossary.test" class="ref">Test</a></li><li>8.2 <a id="a-607409158" href="#glossary.design" class="ref">Design</a></li><li>8.3 <a id="a-607411918" href="#glossary.specification" class="ref">Specification</a></li><li>8.4 <a id="a-607414138" href="#glossary.expectation" class="ref">Expectation</a></li><li>8.5 <a id="a-607416618" href="#glossary.handle" class="ref">Handle</a></li><li>8.6 <a id="a-607418878" href="#glossary.rake" class="ref">Rake</a></li><li>8.7 <a id="a-607421418" href="#glossary.RSpec" class="ref">RSpec</a></li><li>8.8 <a id="a-607423678" href="#glossary.TDD" class="ref">Test driven development</a></li><li>8.9 <a id="a-607425938" href="#glossary.BDD" class="ref">Behavior driven development</a></li></ul></li></ul>
29
+
30
+ <h1 id="toc:tip">Tips</h1>
31
+ <ol>
32
+ <li><a href="#Add_support_for_your_Verilog_simulator" id="a-607145888">Add support for your Verilog simulator</a></li>
33
+ <li><a href="#Tuning_for_maximum_performance" id="a-607157578">Tuning for maximum performance</a></li>
34
+ <li><a href="#Using__kdiff3__with_the_automated_test_generator." id="a-607159448">Using <strong>kdiff3</strong> with the automated test generator.</a></li>
35
+ <li><a href="#What_can_the_test_runner_do_" id="a-607241748">What can the test runner do?</a></li>
36
+ </ol>
37
+ <h1 id="toc:note">Notes</h1>
38
+ <ol>
39
+ <li><a href="#Constants_are_capitalized_in_Ruby" id="a-607203518">Constants are capitalized in Ruby</a></li>
40
+ </ol>
41
+ <h1 id="toc:caution">Cautions</h1>
42
+ <ol>
43
+ <li><a href="#Do_not_rename_generated_files" id="a-607154698">Do not rename generated files</a></li>
44
+ </ol>
45
+ <h1 id="toc:figure">Figures</h1>
46
+ <ol>
47
+ <li><a href="#fig:organization.detail" id="a-607183488">Where does Ruby-VPI fit in?</a></li>
48
+ <li><a href="#fig:organization" id="a-607186098">Organization of a test in Ruby-VPI</a></li>
49
+ <li><a href="#fig:ruby_relay" id="a-607197648">Interaction between Ruby and Verilog</a></li>
50
+ <li><a href="#fig:method_naming_format" id="a-607214478">Method naming format for accessing a handle&#8217;s properties</a></li>
51
+ </ol>
52
+ <h1 id="toc:table">Tables</h1>
53
+ <ol>
54
+ <li><a href="#tbl:accessors" id="a-607216908">Possible accessors and their implications</a></li>
55
+ <li><a href="#ex:properties" id="a-607004748">Examples of accessing a handle&#8217;s properties</a></li>
56
+ </ol>
57
+ <h1 id="toc:example">Examples</h1>
58
+ <ol>
59
+ <li><a href="#ex:callback" id="a-607043828">Using a callback for value change notification</a></li>
60
+ <li><a href="#An_edge-triggered__always__block" id="a-607088908">An edge-triggered &#8220;always&#8221; block</a></li>
61
+ <li><a href="#A_change-triggered__combinational___always__block" id="a-607094288">A change-triggered (combinational) &#8220;always&#8221; block</a></li>
62
+ <li><a href="#Running_a_test_with_environment_variables" id="a-607134148">Running a test with environment variables</a></li>
63
+ <li><a href="#fig:counter.v_decl" id="a-607186858">Declaration of a simple up-counter with synchronous reset</a></li>
64
+ <li><a href="#fig:generate-test.RSpec" id="a-607199068">Generating a test with specification in RSpec format</a></li>
65
+ <li><a href="#fig:generate-test.xUnit" id="a-607205488">Generating a test with specification in xUnit format</a></li>
66
+ <li><a href="#fig:RSpec_counter_spec.rb" id="a-607220678">Specification implemented in RSpec format</a></li>
67
+ <li><a href="#fig:xUnit_counter_spec.rb" id="a-607223038">Specification implemented in xUnit format</a></li>
68
+ <li><a href="#fig:counter_proto.rb" id="a-607230458">Ruby prototype of our Verilog design</a></li>
69
+ <li><a href="#fig:test-proto.RSpec" id="a-607236978">Running a test with specification in RSpec format</a></li>
70
+ <li><a href="#fig:test-proto.unit-test" id="a-607239478">Running a test with specification in xUnit format</a></li>
71
+ <li><a href="#fig:counter.v_impl" id="a-607249698">Implementation of a simple up-counter with synchronous reset</a></li>
72
+ <li><a href="#fig:test-design.RSpec" id="a-607000458">Running a test with specification in RSpec format</a></li>
73
+ <li><a href="#fig:test-design.unit-test" id="a-607031948">Running a test with specification in xUnit format</a></li>
74
+ <li><a href="#ex:TestFoo" id="a-607358168">Part of a bench which instantiates a Verilog design</a></li>
75
+ <li><a href="#ex:TestFoo_bad" id="a-607364228">Bad design with unconnected registers</a></li>
76
+ <li><a href="#ex:TestFoo_fix" id="a-607366668">Fixed design with wired registers</a></li>
77
+ </ol>
78
+ </div>
79
+ </div>
18
80
 
19
- <div id="toc-links">
20
- <a href="#toc:contents">Contents</a> &middot; <a href="#toc:tip">Tips</a> &middot; <a href="#toc:caution">Cautions</a> &middot; <a href="#toc:figure">Figures</a> &middot; <a href="#toc:table">Tables</a> &middot; <a href="#toc:example">Examples</a>
21
- </div>
22
-
23
81
  <div id="body">
82
+
24
83
  <hr style="display: none"/>
25
84
 
26
- <div id="Ruby-VPI_18.0.2_user_manual" class="front_cover">
27
- <h1 class="title"><big>Ruby-VPI 18.0.2 user manual</big></h1>
85
+ <div id="Ruby-VPI_user_manual" class="front_cover">
86
+ <h1 class="title"><big>Ruby-VPI user manual</big></h1>
28
87
 
29
88
  <h2 class="author">Suraj N. Kurapati</h2>
30
89
 
31
90
 
32
- <h3 class="date">03 August 2007</h3>
91
+ <h3 class="date">27 August 2007</h3>
92
+
93
+
94
+ <p style="text-align:center;"><a href="history.html#a19.0.0">Version 19.0.0</a></p>
33
95
 
34
96
 
35
97
  <p>
@@ -44,13 +106,16 @@
44
106
  <p>In addition, this manual is distributed as one big HTML file so that you can easily search for a particular topic using nothing more than your web browser&#8217;s built-in text search mechanism. This facilitates offline reading, where an Internet search engine is not available.</p>
45
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46
108
 
47
- <p>You can give feedback about this manual and, in general, any aspect of the Ruby-VPI project on the <a href="http://ruby-vpi.rubyforge.org/forum/">project forums</a>. Furthermore, you can <a href="#hacking.manual">edit this manual</a> and contribute your improvements to the <a href="http://ruby-vpi.rubyforge.org/tracker/">project patches</a>. Finally, you can find the newest version of this manual at the <a href="http://ruby-vpi.rubyforge.org/">Ruby-VPI project website</a>.</p>
109
+ <p>Finally, this manual comes equipped with a stylesheet that makes it suitable for printing. In particular, users of the <a href="http://mozilla.org">Mozilla</a> family of web browsers will be pleasantly surprised to notice that all hyperlinks have been expanded to include their target URL next to the link text. So try using the &#8220;print preview&#8221; function of a graphical web browser to see how this manual will appear when printed.</p>
110
+
111
+
112
+ <p>You can give feedback about this manual and, in general, any aspect of the Ruby-VPI project on the <a href="http://ruby-vpi.rubyforge.org/forum/">project forums</a>. Furthermore, you can <a href="#hacking.manual" class="ref">edit this manual</a> yourself and contribute your improvements to the <a href="http://ruby-vpi.rubyforge.org/tracker/">project patches</a> tracker. Finally, you can find the newest version of this manual at the <a href="http://ruby-vpi.rubyforge.org/">Ruby-VPI project website</a>.</p>
48
113
  </div>
49
114
 
50
115
 
51
116
  <div id="Legal_notice" class="paragraph">
52
117
  <p class="title">Legal notice</p>
53
- <p>This manual is distributed under <a href="#intro.license">the same license as Ruby-VPI</a>.</p>
118
+ <p>This manual is distributed under <a href="#intro.license" class="ref">the same license as Ruby-VPI</a>.</p>
54
119
 
55
120
 
56
121
  <p>The admonition graphics used in this manual are Copyright 2005, 2006 <a href="http://tango.freedesktop.org/Tango_Desktop_Project">Tango Desktop Project</a> and are distributed under <a href="./images/tango/LICENSE">these terms</a>.</p>
@@ -64,7 +129,7 @@
64
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65
130
  <div id="intro" class="chapter">
66
131
  <h1 class="title">
67
- Chapter <a href="#a-607321098">2</a>
132
+ Chapter <a href="#a-607140228" class="ref">2</a>
68
133
 
69
134
  <br/><br/>
70
135
 
@@ -90,7 +155,7 @@
90
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91
156
  <div id="resources" class="section">
92
157
  <h2 class="title">
93
- <a href="#a-607255258">2.1</a>
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+ <a href="#a-607073948" class="ref">2.1</a>
94
159
 
95
160
  &nbsp;
96
161
 
@@ -101,8 +166,8 @@
101
166
  <div id="Records" class="paragraph">
102
167
  <p class="title">Records</p>
103
168
  <ul>
104
- <li><a href="history.html#a18.0.2">What&#8217;s new</a>
105
- &#8211; release notes for version 18.0.2.
169
+ <li><a href="history.html#a19.0.0">What&#8217;s new</a>
170
+ &#8211; release notes for version 19.0.0.
106
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  <ul>
107
172
  <li><a href="history.html">History</a>
108
173
  &#8211; a record of all release notes.</li>
@@ -170,7 +235,7 @@
170
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171
236
  <div id="intro.features" class="section">
172
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  <h2 class="title">
173
- <a href="#a-607267568">2.2</a>
238
+ <a href="#a-607086258" class="ref">2.2</a>
174
239
 
175
240
  &nbsp;
176
241
 
@@ -182,7 +247,7 @@
182
247
  <p class="title">Portable</p>
183
248
  <ul>
184
249
  <li>Supports the <em>entire</em> <a href="http://ieeexplore.ieee.org/xpl/standardstoc.jsp?isnumber=33945"><span class="caps">IEEE 1364</span>-2005 Verilog VPI</a> standard.</li>
185
- <li>Works with all <a href="#intro.reqs">major Verilog simulators</a> available today.</li>
250
+ <li>Works with all <a href="#intro.reqs" class="ref">major Verilog simulators</a> available today.</li>
186
251
  <li>Compiled <em>just once</em> during <a href="manual.html#setup.inst">installation</a> and used forever!</li>
187
252
  </ul>
188
253
  </div>
@@ -241,7 +306,7 @@
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242
307
  <div id="intro.reqs" class="section">
243
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  <h2 class="title">
244
- <a href="#a-607279798">2.3</a>
309
+ <a href="#a-607098488" class="ref">2.3</a>
245
310
 
246
311
  &nbsp;
247
312
 
@@ -271,7 +336,7 @@
271
336
 
272
337
  <ul>
273
338
  <li><a href="http://www.cadence.com/products/functional_ver/nc-verilog/">Cadence NC-Sim</a>
274
- &#8211; any version that supports the <tt>+loadvpi</tt> option should be acceptable. However, version 05.83-s003 is <em>mostly</em> acceptable because you <strong>will not</strong> be able to <a href="manual.html#problem.ncsim.vpiForceFlag">force values onto wires</a>.</li>
339
+ &#8211; any version that supports the <tt>+loadvpi</tt> option should be acceptable.</li>
275
340
  </ul>
276
341
 
277
342
 
@@ -337,9 +402,80 @@
337
402
  <p>
338
403
  <hr style="display: none"/>
339
404
 
405
+ <div id="intro.appetizers" class="section">
406
+ <h2 class="title">
407
+ <a href="#a-607101288" class="ref">2.4</a>
408
+
409
+ &nbsp;
410
+
411
+ Appetizers
412
+ </h2>
413
+
414
+ Here is a tiny sampling of code to whet your appetite. See <a href="manual.html#usage.tutorial">the tutorial</a> for more samples.
415
+
416
+
417
+ <ul>
418
+ <li>Assign the value 2<sup>2048</sup> to a register:
419
+ <ul>
420
+ <li><code class="code">your_register.intVal = <span style="color:#00D; font-weight:bold">2</span> ** <span style="color:#00D; font-weight:bold">2048</span></code></li>
421
+ <li><code class="code">your_register.put_value <span style="color:#00D; font-weight:bold">2</span> ** <span style="color:#00D; font-weight:bold">2048</span></code></li>
422
+ </ul></li>
423
+ </ul>
424
+
425
+
426
+ <ul>
427
+ <li>Check if all nets in a module are at high impedance:
428
+ <ul>
429
+ <li><code class="code">your_module.all_net? { |your_net| your_net.z? }</code></li>
430
+ <li><pre class="code">
431
+ your_nets = your_module.net_a
432
+ your_nets.all? { |net| net.z? }</pre></li>
433
+ </ul></li>
434
+ </ul>
435
+
436
+
437
+ <ul>
438
+ <li>See a register&#8217;s path, width, and location (file &#38; line number):
439
+ <ul>
440
+ <li><code class="code">puts your_register</code></li>
441
+ <li><pre class="code">
442
+ p <span style="color:#A60">:path</span> =&gt; your_register.fullName
443
+ p <span style="color:#A60">:width</span> =&gt; your_register.size
444
+ p <span style="color:#A60">:file</span> =&gt; your_register.fileName
445
+ p <span style="color:#A60">:file</span> =&gt; your_register.lineNo</pre></li>
446
+ </ul></li>
447
+ </ul>
448
+
449
+
450
+ <ul>
451
+ <li>Access the first five elements in a memory:
452
+ <ul>
453
+ <li><code class="code">your_memory.memoryWord_a.first(<span style="color:#00D; font-weight:bold">5</span>)</code></li>
454
+ <li><code class="code">your_memory.memoryWord_a[<span style="color:#00D; font-weight:bold">0</span>..<span style="color:#00D; font-weight:bold">4</span>]</code></li>
455
+ <li><code class="code">your_memory.memoryWord_a[<span style="color:#00D; font-weight:bold">0</span>, <span style="color:#00D; font-weight:bold">5</span>]</code></li>
456
+ </ul></li>
457
+ </ul>
458
+
459
+
460
+ <ul>
461
+ <li>Clear a memory by filling it with zeroes:
462
+ <ul>
463
+ <li><code class="code">your_memory.each_memoryWord { |w| w.zero! }</code></li>
464
+ <li><code class="code">your_memory.each_memoryWord { |w| w.intVal = <span style="color:#00D; font-weight:bold">0</span> }</code></li>
465
+ <li><code class="code">your_memory.each_memoryWord { |w| w.put_value <span style="color:#00D; font-weight:bold">0</span> }</code></li>
466
+ </ul></li>
467
+ </ul>
468
+
469
+ </div>
470
+ </p>
471
+
472
+
473
+ <p>
474
+ <hr style="display: none"/>
475
+
340
476
  <div id="intro.applications" class="section">
341
477
  <h2 class="title">
342
- <a href="#a-607282358">2.4</a>
478
+ <a href="#a-607103848" class="ref">2.5</a>
343
479
 
344
480
  &nbsp;
345
481
 
@@ -383,66 +519,47 @@
383
519
  <p>
384
520
  <hr style="display: none"/>
385
521
 
386
- <div id="intro.appetizers" class="section">
522
+ <div id="intro.related-works" class="section">
387
523
  <h2 class="title">
388
- <a href="#a-607284958">2.5</a>
524
+ <a href="#a-607109258" class="ref">2.6</a>
389
525
 
390
526
  &nbsp;
391
527
 
392
- Appetizers
528
+ Related works
393
529
  </h2>
394
530
 
395
- <p>Here is a tiny sampling of code to whet your appetite. See <a href="manual.html#usage.tutorial">the tutorial</a> for more samples.</p>
396
-
397
-
398
- <ul>
399
- <li>Assign the value 2<sup>2048</sup> to a register:</li>
400
- </ul>
401
-
402
-
403
- <blockquote>
404
- <p><code class="code">your_register.intVal = <span style="color:#00D; font-weight:bold">2</span> ** <span style="color:#00D; font-weight:bold">2048</span></code></p>
405
- </blockquote>
406
-
407
-
408
- <ul>
409
- <li>Check if all nets in a module are at high impedance:</li>
410
- </ul>
411
-
412
-
413
- <blockquote>
414
- <p><code class="code">your_module.all_net? { |net| net.z? }</code></p>
415
- </blockquote>
416
-
417
-
418
- <ul>
419
- <li>See a register&#8217;s path, width, and location (file &#38; line number):</li>
531
+ <ul>
532
+ <li><a href="http://anvil.sourceforge.net">ANVIL</a> is a C++ interface to VPI.</li>
533
+ <li><a href="http://teal.sourceforge.net">Teal</a> is a C++ interface to VPI.</li>
534
+ <li><a href="http://jove.sourceforge.net">JOVE</a> is a Java interface to VPI.</li>
535
+ <li><a href="http://embedded.eecs.berkeley.edu/Alumni/pinhong/scriptEDA/">ScriptEDA</a> is a Perl, Python, and Tcl interface to VPI.</li>
536
+ <li><a href="http://rhdl.rubyforge.org">RHDL</a> is a hardware description and verification language based on Ruby.</li>
537
+ <li><a href="http://myhdl.jandecaluwe.com">MyHDL</a> is a hardware description and verification language based on Python, which features conversion to Verilog and co-simulation.</li>
420
538
  </ul>
421
539
 
422
540
 
423
- <blockquote>
424
- <p><code class="code">puts your_register</code></p>
425
- </blockquote>
541
+ <p>
542
+ <hr style="display: none"/>
426
543
 
544
+ <div id="intro.related-works.pli" class="section">
545
+ <h3 class="title">
546
+ <a href="#a-607106308" class="ref">2.6.1</a>
427
547
 
428
- <ul>
429
- <li>Access the first five elements in a memory:</li>
430
- </ul>
548
+ &nbsp;
431
549
 
550
+ Ye olde PLI
551
+ </h3>
432
552
 
433
- <blockquote>
434
- <p><code class="code">your_memory.memoryWord_a[<span style="color:#00D; font-weight:bold">0</span>..<span style="color:#00D; font-weight:bold">4</span>]</code></p>
435
- </blockquote>
553
+ The following projects utilize the archaic <strong>tf</strong> and <strong>acc</strong> PLI interfaces, which have been officially deprecated in IEEE Std 1364-2005.
436
554
 
437
555
 
438
556
  <ul>
439
- <li>Clear a memory by filling it with zeroes:</li>
557
+ <li><a href="http://www.nelsim.com">ScriptSim</a> is a Perl, Python, and Tcl/Tk interface to PLI.</li>
558
+ <li><a href="http://www.veripool.com/verilog-pli.html">Verilog::Pli</a> is a Perl interface to PLI.</li>
440
559
  </ul>
441
560
 
442
-
443
- <blockquote>
444
- <p><code class="code">your_memory.each_memoryWord {|w| w.intVal = <span style="color:#00D; font-weight:bold">0</span>}</code></p>
445
- </blockquote>
561
+ </div>
562
+ </p>
446
563
 
447
564
  </div>
448
565
  </p>
@@ -453,7 +570,7 @@
453
570
 
454
571
  <div id="intro.license" class="section">
455
572
  <h2 class="title">
456
- <a href="#a-607287828">2.6</a>
573
+ <a href="#a-607112128" class="ref">2.7</a>
457
574
 
458
575
  &nbsp;
459
576
 
@@ -490,54 +607,6 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
490
607
  <span class="caps">IN AN ACTION OF CONTRACT</span>, TORT <span class="caps">OR OTHERWISE</span>, ARISING FROM, OUT <span class="caps">OF OR IN</span>
491
608
  <span class="caps">CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE</span>.</p>
492
609
 
493
- </div>
494
- </p>
495
-
496
-
497
- <p>
498
- <hr style="display: none"/>
499
-
500
- <div id="intro.related-works" class="section">
501
- <h2 class="title">
502
- <a href="#a-607293218">2.7</a>
503
-
504
- &nbsp;
505
-
506
- Related works
507
- </h2>
508
-
509
- <ul>
510
- <li><a href="http://jove.sourceforge.net">JOVE</a> is a Java interface to VPI.</li>
511
- <li><a href="http://teal.sourceforge.net">Teal</a> is a C++ interface to VPI.</li>
512
- <li><a href="http://embedded.eecs.berkeley.edu/Alumni/pinhong/scriptEDA/">ScriptEDA</a> is a Perl, Python, and Tcl interface to VPI.</li>
513
- <li><a href="http://rhdl.rubyforge.org">RHDL</a> is a hardware description and verification language based on Ruby.</li>
514
- <li><a href="http://myhdl.jandecaluwe.com">MyHDL</a> is a hardware description and verification language based on Python, which features conversion to Verilog and co-simulation.</li>
515
- </ul>
516
-
517
-
518
- <p>
519
- <hr style="display: none"/>
520
-
521
- <div id="intro.related-works.pli" class="section">
522
- <h3 class="title">
523
- <a href="#a-607290278">2.7.1</a>
524
-
525
- &nbsp;
526
-
527
- Ye olde PLI
528
- </h3>
529
-
530
- The following projects utilize the archaic <strong>tf</strong> and <strong>acc</strong> PLI interfaces, which have been officially deprecated in IEEE Std 1364-2005.
531
-
532
-
533
- <ul>
534
- <li><a href="http://www.nelsim.com">ScriptSim</a> is a Perl, Python, and Tcl/Tk interface to PLI.</li>
535
- <li><a href="http://www.veripool.com/verilog-pli.html">Verilog::Pli</a> is a Perl interface to PLI.</li>
536
- </ul>
537
-
538
- </div>
539
- </p>
540
-
541
610
  </div>
542
611
  </p>
543
612
  </div>
@@ -547,7 +616,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
547
616
 
548
617
  <div id="setup" class="chapter">
549
618
  <h1 class="title">
550
- Chapter <a href="#a-607361758">3</a>
619
+ Chapter <a href="#a-607180888" class="ref">3</a>
551
620
 
552
621
  <br/><br/>
553
622
 
@@ -559,7 +628,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
559
628
 
560
629
  <div id="setup.manifest" class="section">
561
630
  <h2 class="title">
562
- <a href="#a-607324288">3.1</a>
631
+ <a href="#a-607143418" class="ref">3.1</a>
563
632
 
564
633
  &nbsp;
565
634
 
@@ -572,10 +641,10 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
572
641
  <ul>
573
642
  <li><tt>doc</tt> contains user documentation in various formats.</li>
574
643
  <li><tt>ref</tt> contains reference API documentation in HTML format.</li>
575
- <li><tt>ext</tt> contains source code, written in the C language, for the <a href="#organization">core of Ruby-VPI</a></li>
644
+ <li><tt>ext</tt> contains source code, written in the C language, for the <a href="#organization" class="ref">core of Ruby-VPI</a></li>
576
645
  <li><tt>lib</tt> contains Ruby libraries provided by Ruby-VPI.</li>
577
- <li><tt>bin</tt> contains various tools. See <a href="#usage.tools">Section 5.4</a> for more information.</li>
578
- <li><tt>samp</tt> contains example tests. See <a href="#usage.examples">Section 5.5</a> for more information.</li>
646
+ <li><tt>bin</tt> contains various tools. See <a href="#usage.tools" class="ref">Section 5.7</a> for more information.</li>
647
+ <li><tt>examples</tt> contains example tests. See <a href="#usage.examples" class="ref">Section 5.8</a> for more information.</li>
579
648
  </ul>
580
649
 
581
650
  </div>
@@ -585,14 +654,14 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
585
654
 
586
655
  <div id="setup.reqs" class="section">
587
656
  <h2 class="title">
588
- <a href="#a-607329728">3.2</a>
657
+ <a href="#a-607148858" class="ref">3.2</a>
589
658
 
590
659
  &nbsp;
591
660
 
592
661
  Requirements
593
662
  </h2>
594
663
 
595
- <p>See <a href="#intro.reqs">Section 2.3</a> above.</p>
664
+ <p>See <a href="#intro.reqs" class="ref">Section 2.3</a> above.</p>
596
665
 
597
666
 
598
667
  <p>
@@ -602,7 +671,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
602
671
  <div class="tip" id="Add_support_for_your_Verilog_simulator">
603
672
  <img src="images/tango/tip.png" alt="tip" class="icon"/>
604
673
 
605
- <p class="title"><a href="#a-607326758">Tip 1</a>. &nbsp; Add support for your Verilog simulator</p>
674
+ <p class="title"><a href="#a-607145888" class="ref">Tip 1</a>. &nbsp; Add support for your Verilog simulator</p>
606
675
 
607
676
  Write a <a href="http://rubyforge.org/tracker/?group_id=1339">support request</a> for your simulator, while providing a sample transcript of the commands you use to run a test with your simulator, and I will add support for your simulator in the next release!
608
677
  </div>
@@ -616,7 +685,7 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
616
685
 
617
686
  <div id="setup.recom" class="section">
618
687
  <h2 class="title">
619
- <a href="#a-607335898">3.3</a>
688
+ <a href="#a-607155028" class="ref">3.3</a>
620
689
 
621
690
  &nbsp;
622
691
 
@@ -631,14 +700,14 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
631
700
 
632
701
  <div id="setup.recom.merger" class="section">
633
702
  <h3 class="title">
634
- <a href="#a-607332558">3.3.1</a>
703
+ <a href="#a-607151688" class="ref">3.3.1</a>
635
704
 
636
705
  &nbsp;
637
706
 
638
707
  Text merging tool
639
708
  </h3>
640
709
 
641
- An <em>interactive</em> text merging tool can greatly simplify the process of transferring wanted changes from one file to another. In particular, such tools are especially beneficial when using the <a href="#usage.tools.generate">automated test generator</a>. A handful of the currently available open-source text merging tools are listed below.
710
+ An <em>interactive</em> text merging tool can greatly simplify the process of transferring wanted changes from one file to another. In particular, such tools are especially beneficial when using the <a href="#usage.tools.generate" class="ref">automated test generator</a>. A handful of the currently available open-source text merging tools are listed below.
642
711
 
643
712
 
644
713
  <ul>
@@ -675,14 +744,14 @@ IMPLIED, INCLUDING <span class="caps">BUT NOT LIMITED TO THE WARRANTIES OF MERCH
675
744
 
676
745
  <div id="setup.inst" class="section">
677
746
  <h2 class="title">
678
- <a href="#a-607345038">3.4</a>
747
+ <a href="#a-607164168" class="ref">3.4</a>
679
748
 
680
749
  &nbsp;
681
750
 
682
751
  Installation
683
752
  </h2>
684
753
 
685
- <p>Once you have satisfied the <a href="#setup.reqs">necessary requirements</a>, you can install Ruby-VPI by running the <pre>gem install -y ruby-vpi</pre> command. RubyGems will install Ruby-VPI into the system gem directory, whose path can be determined by running the <pre>gem env gemdir</pre> command. Within this directory, there is a <tt>gems/</tt> subdirectory which contains the Ruby-VPI installation, as illustrated below.</p>
754
+ <p>Once you have satisfied the <a href="#setup.reqs" class="ref">necessary requirements</a>, you can install Ruby-VPI by running the <pre>gem install -y ruby-vpi</pre> command. RubyGems will install Ruby-VPI into the system gem directory, whose path can be determined by running the <pre>gem env gemdir</pre> command. Within this directory, there is a <tt>gems/</tt> subdirectory which contains the Ruby-VPI installation, as illustrated below.</p>
686
755
 
687
756
 
688
757
  <pre>
@@ -701,7 +770,7 @@ $ ls -d `gem env gemdir`/gems/ruby-vpi*
701
770
  <div class="tip" id="Tuning_for_maximum_performance">
702
771
  <img src="images/tango/tip.png" alt="tip" class="icon"/>
703
772
 
704
- <p class="title"><a href="#a-607338448">Tip 2</a>. &nbsp; Tuning for maximum performance</p>
773
+ <p class="title"><a href="#a-607157578" class="ref">Tip 2</a>. &nbsp; Tuning for maximum performance</p>
705
774
 
706
775
  You can tune your installation of Ruby-VPI for maximum performance by adding your C compiler&#8217;s optimization flag to the <code class="code"><span style="color:#036; font-weight:bold">CFLAGS</span></code> environment variable <em>before</em> you run the <pre>gem install -y ruby-vpi</pre> command. For example, if your C compiler is GCC, then you can set <code class="code"><span style="color:#036; font-weight:bold">CFLAGS</span></code> to <tt>-O9</tt> for maximum optimization.
707
776
  </div>
@@ -712,7 +781,7 @@ $ ls -d `gem env gemdir`/gems/ruby-vpi*
712
781
 
713
782
  <div id="setup.inst.windows" class="section">
714
783
  <h3 class="title">
715
- <a href="#a-607340978">3.4.1</a>
784
+ <a href="#a-607160108" class="ref">3.4.1</a>
716
785
 
717
786
  &nbsp;
718
787
 
@@ -763,7 +832,7 @@ $ ls -d `gem env gemdir`/gems/ruby-vpi*
763
832
 
764
833
  <div id="setup.maintenance" class="section">
765
834
  <h2 class="title">
766
- <a href="#a-607347318">3.5</a>
835
+ <a href="#a-607166448" class="ref">3.5</a>
767
836
 
768
837
  &nbsp;
769
838
 
@@ -787,14 +856,14 @@ $ ls -d `gem env gemdir`/gems/ruby-vpi*
787
856
 
788
857
  <div id="organization" class="chapter">
789
858
  <h1 class="title">
790
- Chapter <a href="#a-607368998">4</a>
859
+ Chapter <a href="#a-607194908" class="ref">4</a>
791
860
 
792
861
  <br/><br/>
793
862
 
794
863
  <big>Organization</big>
795
864
  </h1>
796
865
 
797
- <p>Ruby-VPI is a bridge between <span class="caps">IEEE 1364</span>-2005 Verilog VPI and the Ruby language. It enables Ruby programs to use VPI either (1) in the same, verbose way that C programs do, or (2) in a simpler, higher level way. In addition, it serves as a vehicle for the application of agile software development practices, such as <a href="#glossary.TDD">TDD</a> and <a href="#glossary.BDD">BDD</a> to the realm of hardware development with Verilog.</p>
866
+ <p>Ruby-VPI is a bridge between <span class="caps">IEEE 1364</span>-2005 Verilog VPI and the Ruby language. It enables Ruby programs to use VPI either (1) in the same, verbose way that C programs do, or (2) in a simpler, higher level way. In addition, it serves as a vehicle for the application of agile software development practices, such as <a href="#glossary.TDD" class="ref">TDD</a> and <a href="#glossary.BDD" class="ref">BDD</a> to the realm of hardware development with Verilog.</p>
798
867
 
799
868
 
800
869
  <p>Ruby-VPI can be used with any Verilog simulator that supports VPI. In particular, it is known to operate with (1) Synopsys VCS and Mentor Modelsim, the two <a href="http://www.eetimes.com/news/design/showArticle.jhtml?articleID=47204415">most prominent Verilog simulators</a> in the Electronic Design Automation (EDA) industry; as well as (2) GPL Cver and Icarus Verilog, the two most prevalent open source Verilog simulators today.</p>
@@ -807,77 +876,28 @@ $ ls -d `gem env gemdir`/gems/ruby-vpi*
807
876
  <div class="figure" id="fig:organization.detail">
808
877
 
809
878
 
810
- <p class="title"><a href="#a-607364358">Figure 1</a>. &nbsp; Where does Ruby-VPI fit in?</p>
879
+ <p class="title"><a href="#a-607183488" class="ref">Figure 1</a>. &nbsp; Where does Ruby-VPI fit in?</p>
811
880
 
812
881
  <img src="figures/organization_detailed.png" alt="" />
813
882
  </div>
814
883
  </div>
815
884
 
816
- As <a href="#fig:organization.detail">Figure 1</a> shows, Ruby-VPI is composed of two complementary parts: one interacts with VPI through the C language, while the other interacts with an executable specification written in the Ruby language. The former is complied during installation to produce dynamically loadable C libraries&#8212;-each tailored to accommodate the quirks of its respective Verilog simulator. The latter is not compiled because Ruby programs are interpreted dynamically.</p>
885
+ As <a href="#fig:organization.detail" class="ref">Figure 1</a> shows, Ruby-VPI is composed of two complementary parts: one interacts with VPI through the C language, while the other interacts with an executable specification written in the Ruby language. The former is complied during installation to produce dynamically loadable C libraries&#8212;-each tailored to accommodate the quirks of its respective Verilog simulator. The latter is not compiled because Ruby programs are interpreted dynamically.</p>
817
886
 
818
887
 
819
888
  <p>
820
889
  <hr style="display: none"/>
821
890
 
822
- <div id="overview.relay" class="section">
823
- <h2 class="title">
824
- <a href="#a-607370648">4.1</a>
825
-
826
- &nbsp;
827
-
828
- Ruby/Verilog interaction
829
- </h2>
830
-
831
- <p>In a typical VPI application written in C, the <em>Verilog simulator</em> is in charge. Verilog code temporarily transfers control to C by invoking C functions, which return control to Verilog when they finish.</p>
832
-
833
-
834
- <p>In contrast, Ruby-VPI puts the <em>specification</em> in charge. The specification temporarily transfers control to the Verilog simulator by invoking the <code class="code">advance_time</code> method, which returns control to the specification when it finishes. This process is illustrated in <a href="#fig:ruby_relay">Figure 2</a>.</p>
835
-
836
-
837
- <p>Ruby-VPI&#8217;s approach is the same as any software testing framework, where the <em>specification</em> drives the design under test. Whereas, the typical VPI &#38; C approach is literally <em>backwards</em> because the design under test drives the specification.</p>
838
-
839
-
840
- <p>
841
- <hr style="display: none"/>
842
-
843
- <div class="formal">
844
- <div class="figure" id="fig:ruby_relay">
845
-
846
-
847
- <p class="title"><a href="#a-607367168">Figure 2</a>. &nbsp; Interaction between Ruby and Verilog</p>
848
-
849
- <img src="figures/ruby_relay.png" alt="" />
850
-
851
-
852
- <ol>
853
- <li>The current simulation time is <em>X</em>.</li>
854
- <li>The specification invokes the <code class="code"><span style="color:#036; font-weight:bold">Vpi</span>::advance_time</code> method with parameter <em>Y</em>, which specifies the number of simulation time steps to be simulated.</li>
855
- <li>The Verilog simulator is now in control (temporarily).</li>
856
- <li>The current simulation time has <em>not</em> changed; it is still <em>X</em>.</li>
857
- <li>The Verilog simulator simulates <em>Y</em> simulation time steps.</li>
858
- <li>The current simulation time is now <em>X + Y</em>.</li>
859
- <li>The Verilog simulator returns control back to the specification.</li>
860
- </ol>
861
- </div>
862
- </div>
863
-
864
- Another means of transferring control from the specification to the Verilog simulator is the <a href="#vpi.callbacks">VPI callback</a>.</p>
865
-
866
- </div>
867
-
868
-
869
- <hr style="display: none"/>
870
-
871
891
  <div id="organization.tests" class="section">
872
892
  <h2 class="title">
873
- <a href="#a-607376218">4.2</a>
893
+ <a href="#a-607189198" class="ref">4.1</a>
874
894
 
875
895
  &nbsp;
876
896
 
877
897
  Tests
878
898
  </h2>
879
899
 
880
- <p>In Ruby-VPI, the process of functional verification is neatly packaged into self-contained, executable tests. As <a href="#fig:organization">Figure 3</a> illustrates, a test is composed of a <strong>bench</strong>, a <strong>design</strong>, and a <strong>specification</strong>.</p>
900
+ <p>In Ruby-VPI, the process of functional verification is neatly packaged into self-contained, executable tests. As <a href="#fig:organization" class="ref">Figure 2</a> illustrates, a test is composed of a <strong>bench</strong>, a <strong>design</strong>, and a <strong>specification</strong>.</p>
881
901
 
882
902
 
883
903
  <p>
@@ -887,7 +907,7 @@ Another means of transferring control from the specification to the Verilog simu
887
907
  <div class="figure" id="fig:organization">
888
908
 
889
909
 
890
- <p class="title"><a href="#a-607373118">Figure 3</a>. &nbsp; Organization of a test in Ruby-VPI</p>
910
+ <p class="title"><a href="#a-607186098" class="ref">Figure 2</a>. &nbsp; Organization of a test in Ruby-VPI</p>
891
911
 
892
912
  <img src="figures/organization.png" alt="" />
893
913
  </div>
@@ -903,112 +923,119 @@ Another means of transferring control from the specification to the Verilog simu
903
923
 
904
924
  </div>
905
925
  </p>
926
+ </div>
927
+
928
+
929
+ <hr style="display: none"/>
906
930
 
931
+ <div id="usage" class="chapter">
932
+ <h1 class="title">
933
+ Chapter <a href="#a-607339858" class="ref">5</a>
907
934
 
908
- <p>
935
+ <br/><br/>
936
+
937
+ <big>Usage</big>
938
+ </h1>
939
+
940
+
909
941
  <hr style="display: none"/>
910
942
 
911
- <div id="VPI_in_Ruby" class="section">
943
+ <div id="overview.relay" class="section">
912
944
  <h2 class="title">
913
- <a href="#a-607291858">4.3</a>
945
+ <a href="#a-607201128" class="ref">5.1</a>
914
946
 
915
947
  &nbsp;
916
948
 
917
- VPI in Ruby
949
+ Interacting with the Verilog simulator
918
950
  </h2>
919
951
 
920
-
921
- <hr style="display: none"/>
952
+ <p>In a typical VPI application written in C, the <em>Verilog simulator</em> is in charge. Verilog code temporarily transfers control to C by invoking C functions, which return control to Verilog when they finish.</p>
922
953
 
923
- <div id="Deviations_from_the_VPI_standard" class="section">
924
- <h3 class="title">
925
- <a href="#a-607385138">4.3.1</a>
926
954
 
927
- &nbsp;
955
+ <p>In contrast, Ruby-VPI puts the <em>specification</em> in charge. The specification temporarily transfers control to the Verilog simulator by invoking the <code class="code">advance_time</code> method, which returns control to the specification after a given number of time steps. This process is illustrated in <a href="#fig:ruby_relay" class="ref">Figure 3</a>. You can also use the <code class="code">wait</code> method, which is just an alias to the <code class="code">advance_time</code> method, if you prefer.</p>
928
956
 
929
- Deviations from the VPI standard
930
- </h3>
931
957
 
932
- <p>Ruby-VPI makes the entire IEEE Std 1364-2005 VPI interface available to Ruby, but with the following minor differences.</p>
958
+ <p>Ruby-VPI&#8217;s approach is the same as any software testing framework, where the <em>specification</em> drives the design under test. Whereas, the typical VPI &#38; C approach is literally <em>backwards</em> because the design under test drives the specification.</p>
933
959
 
934
960
 
935
961
  <p>
936
- <hr style="display: none"/>
937
-
938
- <div id="Names_are_capitalized" class="section">
939
- <h4 class="title">
940
- <a href="#a-607378708">4.3.1.1</a>
941
-
942
- &nbsp;
943
-
944
- Names are capitalized
945
- </h4>
962
+ <hr style="display: none"/>
946
963
 
947
- <p>The names of all VPI types, structures, and constants become <em>capitalized</em> because Ruby requires that the names of constants begin with a capital letter. However, note that Ruby&#8217;s capitalization rule does <em>not</em> apply to VPI functions.</p>
964
+ <div class="formal">
965
+ <div class="figure" id="fig:ruby_relay">
966
+
948
967
 
968
+ <p class="title"><a href="#a-607197648" class="ref">Figure 3</a>. &nbsp; Interaction between Ruby and Verilog</p>
949
969
 
950
- <p>For example, the <code class="code">s_vpi_value</code> structure becomes the <code class="code"><span style="color:#036; font-weight:bold">S_vpi_value</span></code> class in Ruby. Likewise, the <code class="code">vpiIntVal</code> constant becomes the <code class="code"><span style="color:#036; font-weight:bold">VpiIntVal</span></code> constant in Ruby. However, the <code class="code">vpi_handle</code> function remains as <code class="code">vpi_handle</code> in Ruby.</p>
970
+ <img src="figures/ruby_relay.png" alt="" />
951
971
 
952
- </div>
953
- </p>
954
972
 
973
+ <ol>
974
+ <li>The current simulation time is <em>X</em>.</li>
975
+ <li>The specification invokes the <code class="code">advance_time</code> method with parameter <em>Y</em>, which specifies the number of simulation time steps to be simulated.</li>
976
+ <li>The Verilog simulator is now in control (temporarily).</li>
977
+ <li>The current simulation time has <em>not</em> changed; it is still <em>X</em>.</li>
978
+ <li>The Verilog simulator simulates <em>Y</em> simulation time steps.</li>
979
+ <li>The current simulation time is now <em>X + Y</em>.</li>
980
+ <li>The Verilog simulator returns control back to the specification.</li>
981
+ </ol>
982
+ </div>
983
+ </div>
984
+
985
+ Another means of transferring control from the specification to the Verilog simulator is the <a href="#vpi.callbacks" class="ref">VPI callback</a>.</p>
955
986
 
956
- <p>
957
- <hr style="display: none"/>
987
+ </div>
988
+
958
989
 
959
- <div id="a_vprintf__is__printf_" class="section">
960
- <h4 class="title">
961
- <a href="#a-607381208">4.3.1.2</a>
990
+ <hr style="display: none"/>
962
991
 
963
- &nbsp;
992
+ <div id="vpi" class="section">
993
+ <h2 class="title">
994
+ <a href="#a-607084798" class="ref">5.2</a>
964
995
 
965
- <code class="code">vprintf</code> is <code class="code">printf</code>
966
- </h4>
996
+ &nbsp;
967
997
 
968
- The <code class="code">vpi_vprintf</code> and <code class="code">vpi_mcd_vprintf</code> VPI functions are aliased to <code class="code">vpi_printf</code> and <code class="code">vpi_mcd_printf</code> respectively because:
998
+ VPI in Ruby
999
+ </h2>
969
1000
 
1001
+ <p>Ruby-VPI provides the <em>entire</em> IEEE Std 1364-2005 VPI interface to Ruby. This section will show you how to make use of it.</p>
970
1002
 
971
- <ul>
972
- <li>Ruby represents <a href="http://phrogz.net/ProgrammingRuby/tut_methods.html#variablelengthargumentlists">variable argument lists as arrays</a> instead of defining a special datatype, such as <code class="code">va_list</code>, for them.</li>
973
- </ul>
974
1003
 
1004
+ <p>
1005
+ <hr style="display: none"/>
975
1006
 
976
- <ul>
977
- <li>Some C compilers have trouble with pointers to the <code class="code">va_list</code> type. For these compilers, the third line of source code shown below causes a &#8220;type mismatch&#8221; error.</li>
978
- </ul>
1007
+ <div class="admonition">
1008
+ <div class="note" id="Constants_are_capitalized_in_Ruby">
1009
+ <img src="images/tango/note.png" alt="note" class="icon"/>
979
1010
 
1011
+ <p class="title"><a href="#a-607203518" class="ref">Note 1</a>. &nbsp; Constants are capitalized in Ruby</p>
980
1012
 
981
- <pre class="code" lang="c">
982
- <span style="color:#579">#include</span> <span style="color:#B44; font-weight:bold">&lt;stdarg.h&gt;</span>
983
- <span style="color:#339; font-weight:bold">void</span> foo(va_list ap) {
984
- va_list *p = &amp;ap;
985
- }
986
- </pre>
1013
+ <p>In the remainder of this manual, you may be surprised to see that VPI constants such as <code class="code">vpiIntVal</code> are written with a captialized name, as <code class="code"><span style="color:#036; font-weight:bold">VpiIntVal</span></code>. The reason for this discrepancy is that in Ruby, the names of constants are capitalized.</p>
987
1014
 
988
- </div>
989
- </p>
990
1015
 
991
- </div>
992
-
1016
+ <p>However, keep in mind that Ruby-VPI provides all VPI constants in both (1) their original, uncapitalized form and (2) their capitalized Ruby form. You may use either version according to your preference; they are functionally equivalent.</p>
1017
+ </div>
1018
+ </div>
1019
+
993
1020
 
994
1021
  <hr style="display: none"/>
995
1022
 
996
1023
  <div id="vpi.handles" class="section">
997
1024
  <h3 class="title">
998
- <a href="#a-607236168">4.3.2</a>
1025
+ <a href="#a-607039078" class="ref">5.2.1</a>
999
1026
 
1000
1027
  &nbsp;
1001
1028
 
1002
1029
  Handles
1003
1030
  </h3>
1004
1031
 
1005
- <p>A <strong>handle</strong> is a reference to an object (such as a module, register, wire, and so on) inside the Verilog simulation. Handles allows you to inspect and manipulate the design under test and its internal components. They are instances of the <code class="code"><span style="color:#036; font-weight:bold">Vpi</span>::<span style="color:#036; font-weight:bold">Handle</span></code> class (see <a href="../ref/ruby/classes/Vpi/Handle.html">reference documentation</a> for details) in Ruby-VPI.</p>
1032
+ <p>A <strong>handle</strong> is a reference to an object (such as a module, register, wire, and so on) inside the Verilog simulation. Handles allows you to inspect and manipulate the design under test and its internal components. They are instances of the <code class="code"><span style="color:#036; font-weight:bold">VPI</span>::<span style="color:#036; font-weight:bold">Handle</span></code> class (see <a href="../ref/ruby/classes/VPI/Handle.html">reference documentation</a> for details) in Ruby-VPI.</p>
1006
1033
 
1007
1034
 
1008
- <p>Handles have various <strong>properties</strong>, listed in the second column of <a href="#tbl:accessors">Table 1</a>, which provide different kinds of information about the underlying Verilog objects they represent. These properties are accessed through the VPI functions listed in the last column of <a href="#tbl:accessors">Table 1</a>.</p>
1035
+ <p>Handles have various <strong>properties</strong>, listed in the second column of <a href="#tbl:accessors" class="ref">Table 1</a>, which provide different kinds of information about the underlying Verilog objects they represent. These properties are accessed through the VPI functions listed in the last column of <a href="#tbl:accessors" class="ref">Table 1</a>.</p>
1009
1036
 
1010
1037
 
1011
- <p>Handles are typically obtained through the <code class="code">vpi_handle_by_name</code> and <code class="code">vpi_handle</code> functions. These functions are hierarchical in nature, as they allow you to obtain new handles that are related to existing ones. For example, to obtain a handle to a register contained within a module, one would typically write: <code class="code">your_reg = vpi_handle( <span style="color:#036; font-weight:bold">VpiReg</span>, your_handle )</code></p>
1038
+ <p>Handles are typically obtained through the <code class="code">vpi_handle_by_name</code> and <code class="code">vpi_handle</code> functions. These functions are hierarchical in nature, as they allow you to obtain new handles that are related to existing ones. For example, to obtain a handle to a register contained within a module, one would typically write: <pre class="code">your_reg = vpi_handle( <span style="color:#036; font-weight:bold">VpiReg</span>, your_handle )</pre></p>
1012
1039
 
1013
1040
 
1014
1041
  <p>
@@ -1024,7 +1051,7 @@ Another means of transferring control from the specification to the Verilog simu
1024
1051
 
1025
1052
  <div id="Accessing_a_handle_s_relatives" class="section">
1026
1053
  <h4 class="title">
1027
- <a href="#a-607390358">4.3.2.2</a>
1054
+ <a href="#a-607208738" class="ref">5.2.1.2</a>
1028
1055
 
1029
1056
  &nbsp;
1030
1057
 
@@ -1037,20 +1064,19 @@ Another means of transferring control from the specification to the Verilog simu
1037
1064
  <pre class="code">
1038
1065
  foo = vpi_handle_by_name( <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">foo</span><span style="color:#710">&quot;</span></span>, <span style="color:#038; font-weight:bold">nil</span> )
1039
1066
  bar = vpi_handle_by_name( <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">bar</span><span style="color:#710">&quot;</span></span>, foo )
1040
- baz = vpi_handle_by_name( <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">baz</span><span style="color:#710">&quot;</span></span>, bar )
1041
- </pre>
1067
+ baz = vpi_handle_by_name( <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">baz</span><span style="color:#710">&quot;</span></span>, bar )</pre>
1042
1068
 
1043
1069
 
1044
1070
  <p>or by writing:</p>
1045
1071
 
1046
1072
 
1047
- <code class="code">baz = vpi_handle_by_name( <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">foo.bar.bar</span><span style="color:#710">&quot;</span></span>, <span style="color:#038; font-weight:bold">nil</span> )</code>
1073
+ <pre class="code">baz = vpi_handle_by_name( <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">foo.bar.bar</span><span style="color:#710">&quot;</span></span>, <span style="color:#038; font-weight:bold">nil</span> )</pre>
1048
1074
 
1049
1075
 
1050
1076
  <p>These idioms seem excessively verbose in a higher level language such as Ruby, so Ruby-VPI allows you to access a handle&#8217;s relative by simply invoking the relative&#8217;s name as a method on the handle:</p>
1051
1077
 
1052
1078
 
1053
- <code class="code">foo.bar.baz</code>
1079
+ <pre class="code">foo.bar.baz</pre>
1054
1080
 
1055
1081
  </div>
1056
1082
  </p>
@@ -1061,7 +1087,7 @@ baz = vpi_handle_by_name( <span style="background-color:#fff0f0"><span style="co
1061
1087
 
1062
1088
  <div id="Accessing_a_handle_s_properties" class="section">
1063
1089
  <h4 class="title">
1064
- <a href="#a-607393298">4.3.2.3</a>
1090
+ <a href="#a-607211678" class="ref">5.2.1.3</a>
1065
1091
 
1066
1092
  &nbsp;
1067
1093
 
@@ -1075,8 +1101,7 @@ baz = vpi_handle_by_name( <span style="background-color:#fff0f0"><span style="co
1075
1101
  wrapper = <span style="color:#036; font-weight:bold">S_vpi_value</span>.new
1076
1102
  wrapper.format = <span style="color:#036; font-weight:bold">VpiIntVal</span>
1077
1103
  vpi_get_value( foo.bar, wrapper )
1078
- result = wrapper.value.integer
1079
- </pre>
1104
+ result = wrapper.value.integer</pre>
1080
1105
 
1081
1106
 
1082
1107
  <p>or, if <em>bar</em> is capable of storing more than 32 bits, one would convert a string representation of bar&#8217;s integer value into a limitless Ruby integer by writing:</p>
@@ -1086,14 +1111,13 @@ result = wrapper.value.integer
1086
1111
  wrapper = <span style="color:#036; font-weight:bold">S_vpi_value</span>.new
1087
1112
  wrapper.format = <span style="color:#036; font-weight:bold">VpiHexStrVal</span>
1088
1113
  vpi_get_value( foo.bar, wrapper )
1089
- result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</span> )
1090
- </pre>
1114
+ result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</span> )</pre>
1091
1115
 
1092
1116
 
1093
- <p>These idioms seem excessively verbose in a higher level language such as Ruby, so Ruby-VPI allows you to access a handle&#8217;s properties by simply invoking property names, using the special naming format shown in <a href="#fig:method_naming_format">Figure 4</a>, as methods on the handle:</p>
1117
+ <p>These idioms seem excessively verbose in a higher level language such as Ruby, so Ruby-VPI allows you to access a handle&#8217;s properties by simply invoking property names, using the special naming format shown in <a href="#fig:method_naming_format" class="ref">Figure 4</a>, as methods on the handle:</p>
1094
1118
 
1095
1119
 
1096
- <code class="code">result = foo.bar.intVal</code>
1120
+ <pre class="code">result = foo.bar.intVal</pre>
1097
1121
 
1098
1122
  </div>
1099
1123
 
@@ -1104,7 +1128,7 @@ result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</
1104
1128
  <div class="figure" id="fig:method_naming_format">
1105
1129
 
1106
1130
 
1107
- <p class="title"><a href="#a-607396098">Figure 4</a>. &nbsp; Method naming format for accessing a handle&#8217;s properties</p>
1131
+ <p class="title"><a href="#a-607214478" class="ref">Figure 4</a>. &nbsp; Method naming format for accessing a handle&#8217;s properties</p>
1108
1132
 
1109
1133
  <table>
1110
1134
  <tr>
@@ -1138,7 +1162,7 @@ result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</
1138
1162
  <ul>
1139
1163
  <li><strong>Accessor</strong> suggests a VPI function that should be used in order to access the VPI property. When this parameter is not specified, Ruby-VPI will attempt to <em>guess</em> the value of this parameter.
1140
1164
 
1141
- <p><a href="#tbl:accessors">Table 1</a> shows a list of valid accessors and how they influence the means by which a property is accessed.</p></li>
1165
+ <p><a href="#tbl:accessors" class="ref">Table 1</a> shows a list of valid accessors and how they influence the means by which a property is accessed.</p></li>
1142
1166
  </ul>
1143
1167
 
1144
1168
 
@@ -1157,7 +1181,7 @@ result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</
1157
1181
  <div class="table" id="tbl:accessors">
1158
1182
 
1159
1183
 
1160
- <p class="title"><a href="#a-607398528">Table 1</a>. &nbsp; Possible accessors and their implications</p>
1184
+ <p class="title"><a href="#a-607216908" class="ref">Table 1</a>. &nbsp; Possible accessors and their implications</p>
1161
1185
 
1162
1186
  <table>
1163
1187
  <tr>
@@ -1211,7 +1235,7 @@ result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</
1211
1235
  <div class="table" id="ex:properties">
1212
1236
 
1213
1237
 
1214
- <p class="title"><a href="#a-607223948">Table 2</a>. &nbsp; Examples of accessing a handle&#8217;s properties</p>
1238
+ <p class="title"><a href="#a-607004748" class="ref">Table 2</a>. &nbsp; Examples of accessing a handle&#8217;s properties</p>
1215
1239
 
1216
1240
  <table>
1217
1241
  <tr>
@@ -1536,7 +1560,7 @@ result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</
1536
1560
 
1537
1561
  <div id="vpi.callbacks" class="section">
1538
1562
  <h3 class="title">
1539
- <a href="#a-607249768">4.3.3</a>
1563
+ <a href="#a-607049268" class="ref">5.2.2</a>
1540
1564
 
1541
1565
  &nbsp;
1542
1566
 
@@ -1556,121 +1580,195 @@ result = wrapper.value.str.to_i( <span style="color:#00D; font-weight:bold">16</
1556
1580
  <div class="example" id="ex:callback">
1557
1581
 
1558
1582
 
1559
- <p class="title"><a href="#a-607242918">Example 1</a>. &nbsp; Using a callback for value change notification</p>
1583
+ <p class="title"><a href="#a-607043828" class="ref">Example 1</a>. &nbsp; Using a callback for value change notification</p>
1560
1584
 
1561
- <p>This example shows how to use a callback for notification of changes in a handle&#8217;s <code class="code"><span style="color:#036; font-weight:bold">VpiIntVal</span></code> property. When you no longer need this callback, you can tear it down using <code class="code">vpi_remove_cb(cb_handle)</code>.</p>
1585
+ <p>This example shows how to use a callback for notification of changes in a handle&#8217;s <code class="code"><span style="color:#036; font-weight:bold">VpiIntVal</span></code> property. When you no longer need this callback, you can tear it down using <code class="code">vpi_remove_cb</code>.</p>
1562
1586
 
1563
1587
 
1564
- <p>In this example, the handle being monitored is the <code class="code"><span style="color:#036; font-weight:bold">Counter</span>.count</code> signal from <a href="#fig:counter.v_decl">Example 3</a>.</p>
1588
+ <p>In this example, the handle being monitored is the <code class="code"><span style="color:#036; font-weight:bold">Counter</span>.count</code> signal from <a href="#fig:counter.v_decl" class="ref">Example 5</a>.</p>
1565
1589
 
1566
1590
 
1567
1591
  <pre class="code">
1568
- cbTime = <span style="color:#036; font-weight:bold">S_vpi_time</span>.new
1569
- cbTime.type = <span style="color:#036; font-weight:bold">VpiSimTime</span>
1570
- cbTime.low = <span style="color:#00D; font-weight:bold">0</span>
1571
- cbTime.high = <span style="color:#00D; font-weight:bold">0</span>
1572
-
1573
- cbValue = <span style="color:#036; font-weight:bold">S_vpi_value</span>.new
1574
- cbValue.format = <span style="color:#036; font-weight:bold">VpiIntVal</span>
1575
-
1576
- cbData = <span style="color:#036; font-weight:bold">S_cb_data</span>.new
1577
- cbData.reason = <span style="color:#036; font-weight:bold">CbValueChange</span>
1578
- cbData.obj = <span style="color:#036; font-weight:bold">Counter</span>.count
1579
- cbData.time = cbTime
1580
- cbData.value = cbValue
1581
- cbData.index = <span style="color:#00D; font-weight:bold">0</span>
1582
-
1583
- cbHandle = vpi_register_cb(cbData) <span style="color:#080; font-weight:bold">do</span> |data|
1584
- time = (data.time.high &lt;&lt; <span style="color:#00D; font-weight:bold">32</span>) | data.time.low
1585
- count = data.value.value.integer
1592
+ time = <span style="color:#036; font-weight:bold">S_vpi_time</span>.new
1593
+ time.type = <span style="color:#036; font-weight:bold">VpiSimTime</span>
1594
+ time.low = <span style="color:#00D; font-weight:bold">0</span>
1595
+ time.high = <span style="color:#00D; font-weight:bold">0</span>
1596
+
1597
+ value = <span style="color:#036; font-weight:bold">S_vpi_value</span>.new
1598
+ value.format = <span style="color:#036; font-weight:bold">VpiIntVal</span>
1599
+
1600
+ alarm = <span style="color:#036; font-weight:bold">S_cb_data</span>.new
1601
+ alarm.reason = <span style="color:#036; font-weight:bold">CbValueChange</span>
1602
+ alarm.obj = <span style="color:#036; font-weight:bold">Counter</span>.count
1603
+ alarm.time = time
1604
+ alarm.value = value
1605
+ alarm.index = <span style="color:#00D; font-weight:bold">0</span>
1606
+
1607
+ vpi_register_cb( alarm ) <span style="color:#080; font-weight:bold">do</span> |info|
1608
+ time = info.time.integer
1609
+ count = info.value.value.integer
1586
1610
  puts <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">hello from callback! time=</span><span style="background: #eee"><span style="font-weight: bold; color: #888">#{</span>time<span style="font-weight: bold; color: #888">}</span></span><span style="color:#D20"> count=</span><span style="background: #eee"><span style="font-weight: bold; color: #888">#{</span>count<span style="font-weight: bold; color: #888">}</span></span><span style="color:#710">&quot;</span></span>
1587
- <span style="color:#080; font-weight:bold">end</span>
1588
- </pre>
1611
+ <span style="color:#080; font-weight:bold">end</span></pre>
1589
1612
 
1590
1613
 
1591
- <p>Append this code to the <tt>RSpec/counter_spec.rb</tt> file (provided in <a href="#usage.examples">Section 5.5</a> and discussed in <a href="#usage.tutorial.specification">Section 5.6.3</a>) and run the <a href="#usage.tutorial">counter_RSpec test</a></p>
1614
+ <p>Append this code to the <tt>RSpec/counter_spec.rb</tt> file (provided in <a href="#usage.examples" class="ref">Section 5.8</a> and discussed in <a href="#usage.tutorial.specification" class="ref">Section 5.9.3</a>) and run the <a href="#usage.tutorial" class="ref">counter_RSpec test</a></p>
1592
1615
  </div>
1593
1616
  </div>
1594
1617
  </p>
1595
1618
 
1596
1619
  </div>
1597
-
1620
+ </p>
1598
1621
 
1599
1622
  </div>
1600
- </p>
1601
- </div>
1602
-
1603
-
1604
- <hr style="display: none"/>
1605
-
1606
- <div id="usage" class="chapter">
1607
- <h1 class="title">
1608
- Chapter <a href="#a-607488938">5</a>
1609
-
1610
- <br/><br/>
1611
-
1612
- <big>Usage</big>
1613
- </h1>
1623
+
1614
1624
 
1615
-
1616
1625
  <hr style="display: none"/>
1617
1626
 
1618
- <div id="usage.prototyping" class="section">
1627
+ <div id="usage.concurrency" class="section">
1619
1628
  <h2 class="title">
1620
- <a href="#a-607395418">5.1</a>
1629
+ <a href="#a-607113668" class="ref">5.3</a>
1621
1630
 
1622
1631
  &nbsp;
1623
1632
 
1624
- Prototyping
1633
+ Concurrency
1625
1634
  </h2>
1626
1635
 
1627
- <p>Ruby-VPI enables you to rapidly prototype your designs in Ruby without having to do full-scale implementations in Verilog. This lets you explore and evaluate different design choices quickly.</p>
1636
+ <p>Ruby-VPI provides a concurrency model that allows you to run blocks of code in parallel. These blocks of code are known as <em>concurrent processes</em> and they represent the same idea as &#8220;initial&#8221;, &#8220;always&#8221;, and &#8220;forever&#8221; blocks do in Verilog.</p>
1637
+
1638
+
1639
+ <p>Ruby-VPI&#8217;s concurrency model imposes two important constraints, which are inspired by <a href="http://en.wikipedia.org/wiki/GPGPU">GPGPU and fragment/vertex shader programming</a>, in order to avoid race conditions and to make parallel programming simpler.</p>
1628
1640
 
1629
1641
 
1630
- <p>The prototyping process is completely transparent: there is absolutely no difference, in the eyes of your executable specification, between a real Verilog design or its Ruby prototype.</p>
1642
+ <p>First, <strong>all processes execute in the same time step</strong>. That is, we only advance the <em>entire</em> simulation to the next time step when <em>all</em> processes are finished with the current time step. In this manner, we avoid race conditions where a process advances the entire simulation to a future time step but the other processes still think they are executing in the original time step (because they were not notified of the advancement).</p>
1631
1643
 
1632
1644
 
1633
- <p>In addition, the prototyping process is completely standard-based: Ruby prototypes emulate the behavior of real Verilog designs using <em>nothing more</em> than the VPI itself.</p>
1645
+ <p>Second, <strong>all processes see the same input</strong> (the state of the simulation database at the start of the current time step) while executing in a time step. That is, when a process modifies the simulation database, say, by changing the logic value of a register, the modification only takes effect at the <em>end</em> of the current time step. In this manner, we avoid race conditions where one process modifies the simulation midflight but some/all of other processes are unaware of that modification (because they were not notified of its occurence).</p>
1634
1646
 
1635
1647
 
1636
- <p>For example, compare the Verilog design shown in <a href="#fig:counter.v_impl">Example 11</a> with its Ruby prototype shown in figure <a href="#fig:counter_proto.rb">Example 8</a>. The prototype uses only VPI to (1) detect changes in its inputs and (2) manipulate its outputs accordingly. In addition, notice how well the prototype&#8217;s syntax reflects the intended behavior of the Verilog design. This similarity facilitates rapid translation of a prototype from Ruby into Verilog later in the design process.</p>
1648
+ <p>Note that these constraints are automatically enforced &#8220;under the hood&#8221;, so to speak, by Ruby-VPI. As a user, you need not do anything extra to implement or support these constraints; they are already taken care of.</p>
1637
1649
 
1638
1650
 
1639
1651
  <p>
1640
- <div id="Getting_started" class="paragraph">
1641
- <p class="title">Getting started</p>
1642
- To create a prototype,
1643
- <ol>
1644
- <li>Start with a <a href="#usage.tutorial.declare-design">Verilog module declaration</a> for your design.</li>
1645
- <li><a href="#usage.tutorial.generate-test">Generate a test</a> using that module declaration.</li>
1646
- <li><a href="#usage.tutorial.implement-proto">Implement the prototype</a> in the generated <tt>proto.rb</tt> file.</li>
1647
- <li><a href="#usage.tutorial.test-proto">Verify the prototype</a> against its specification.</li>
1648
- </ol>
1652
+ <div id="Creating_a_concurrent_process" class="paragraph">
1653
+ <p class="title">Creating a concurrent process</p>
1654
+ <p>You can create a concurrent proceess by passing a block of code to the <code class="code">process</code> method.</p>
1655
+
1656
+
1657
+ <p>You can also create concurrent processes that loop forever using the <code class="code">always</code> and <code class="code">forever</code> methods, which mimic the &#8220;always&#8221; and &#8220;forever&#8221; blocks, respectively, of the Verilog language. However, due to the constraints of the concurrency model (see above), there is one limitation: all assignments are treated like Verilog&#8217;s non-blocking assignments.</p>
1658
+
1659
+
1660
+ <p>
1661
+ <hr style="display: none"/>
1662
+
1663
+ <div class="formal">
1664
+ <div class="example" id="An_edge-triggered__always__block">
1665
+
1666
+
1667
+ <p class="title"><a href="#a-607088908" class="ref">Example 2</a>. &nbsp; An edge-triggered &#8220;always&#8221; block</p>
1668
+
1669
+ <p>Suppose you have the following Verilog code:</p>
1670
+
1671
+
1672
+ <pre class="code" lang="verilog">
1673
+ always @(posedge clock1 and negedge clock2) begin
1674
+ foo &lt;= foo + 1;
1675
+ bar = bar + 5;
1676
+ end</pre>
1677
+
1678
+
1679
+ <p>In Ruby-VPI, this code would be written as:</p>
1680
+
1681
+
1682
+ <pre class="code">
1683
+ always <span style="color:#080; font-weight:bold">do</span>
1684
+ wait <span style="color:#080; font-weight:bold">until</span> clock.posedge? <span style="color:#080; font-weight:bold">and</span> clock2.negedge?
1685
+
1686
+ foo.intVal += <span style="color:#00D; font-weight:bold">1</span>
1687
+ bar.intVal += <span style="color:#00D; font-weight:bold">5</span> <span style="color:#888"># this is a NON-blocking assignment!</span>
1688
+ <span style="color:#080; font-weight:bold">end</span></pre>
1689
+ </div>
1690
+ </div>
1691
+
1692
+
1693
+ <hr style="display: none"/>
1694
+
1695
+ <div class="formal">
1696
+ <div class="example" id="A_change-triggered__combinational___always__block">
1697
+
1698
+
1699
+ <p class="title"><a href="#a-607094288" class="ref">Example 3</a>. &nbsp; A change-triggered (combinational) &#8220;always&#8221; block</p>
1700
+
1701
+ <p>Suppose you have the following Verilog code:</p>
1702
+
1703
+
1704
+ <pre class="code" lang="verilog">
1705
+ always @(apple, banana, cherry, date) begin
1706
+ $display(&quot;Yum! Fruits are good for health!&quot;);
1707
+ end</pre>
1708
+
1709
+
1710
+ <p>In Ruby-VPI, this code would be written as:</p>
1711
+
1712
+
1713
+ <pre class="code">
1714
+ always <span style="color:#080; font-weight:bold">do</span>
1715
+ wait <span style="color:#080; font-weight:bold">until</span> apple.change? <span style="color:#080; font-weight:bold">or</span> banana.change? <span style="color:#080; font-weight:bold">and</span> cherry.change? <span style="color:#080; font-weight:bold">or</span> date.change?
1716
+ puts <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">Yum! Fruits are good for health!</span><span style="color:#710">&quot;</span></span>
1717
+ <span style="color:#080; font-weight:bold">end</span></pre>
1649
1718
 
1650
1719
 
1651
- <p>Once you are satisfied with your prototype, you can proceed to <a href="#usage.tutorial.implement-design">implement your design in Verilog</a>. This process is often a simple translation your Ruby prototype into your Verilog. At the very least, your prototype serves as a reference while you are implementing your Verilog design.</p>
1720
+ <p>Or, if you are lazy like I am, you can express the sensitivity list programatically:</p>
1652
1721
 
1653
1722
 
1654
- <p>Once your design has been implemented in Verilog, you can use the <em>same</em> specification, which was originally used to verify your prototype, to verify your Verilog design (see <a href="#usage.test-runner">Section 5.3</a> for details).</p>
1723
+ <pre class="code">
1724
+ always <span style="color:#080; font-weight:bold">do</span>
1725
+ wait <span style="color:#080; font-weight:bold">until</span> [apple, banana, cherry, date].any? {|x| x.change?}
1726
+ puts <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">Yum! Fruits are good for health!</span><span style="color:#710">&quot;</span></span>
1727
+ <span style="color:#080; font-weight:bold">end</span></pre>
1728
+ </div>
1729
+ </div>
1730
+ </p>
1655
1731
  </div>
1732
+ </p>
1656
1733
 
1734
+ </div>
1735
+
1657
1736
 
1658
- <hr style="display: none"/>
1737
+ <hr style="display: none"/>
1659
1738
 
1660
- <div id="How_does_prototyping_work_" class="section">
1661
- <h3 class="title">
1662
- <a href="#a-607383008">5.1.2</a>
1739
+ <div id="usage.prototyping" class="section">
1740
+ <h2 class="title">
1741
+ <a href="#a-607122918" class="ref">5.4</a>
1663
1742
 
1664
- &nbsp;
1743
+ &nbsp;
1665
1744
 
1666
- How does prototyping work?
1667
- </h3>
1745
+ Prototyping
1746
+ </h2>
1747
+
1748
+ <p>Ruby-VPI enables you to rapidly prototype your designs in Ruby without having to do full-scale implementations in Verilog. This lets you explore and evaluate different design choices quickly.</p>
1749
+
1750
+
1751
+ <p>The prototyping process is completely transparent: there is absolutely no difference, in the eyes of your executable specification, between a real Verilog design or its Ruby prototype. In addition, the prototyping process is completely standard-based: Ruby prototypes emulate the behavior of real Verilog designs using <em>nothing more</em> than the VPI itself.</p>
1752
+
1753
+
1754
+ <p>For example, compare the Verilog design shown in <a href="#fig:counter.v_impl" class="ref">Example 13</a> with its Ruby prototype shown in figure <a href="#fig:counter_proto.rb" class="ref">Example 10</a>. The prototype uses only VPI to (1) detect changes in its inputs and (2) manipulate its outputs accordingly. In addition, notice how well the prototype&#8217;s syntax reflects the intended behavior of the Verilog design. This similarity facilitates rapid translation of a prototype from Ruby into Verilog later in the design process.</p>
1755
+
1756
+
1757
+ <p>
1758
+ <div id="Creating_a_prototype" class="paragraph">
1759
+ <p class="title">Creating a prototype</p>
1760
+ <ol>
1761
+ <li>Start with a <a href="#usage.tutorial.declare-design" class="ref">Verilog module declaration</a> for your design.</li>
1762
+ <li><a href="#usage.tutorial.generate-test" class="ref">Generate a test</a> using that module declaration.</li>
1763
+ <li><a href="#usage.tutorial.implement-proto" class="ref">Implement the prototype</a> in the generated <tt>proto.rb</tt> file.</li>
1764
+ <li><a href="#usage.tutorial.test-proto" class="ref">Verify the prototype</a> against its specification.</li>
1765
+ </ol>
1668
1766
 
1669
- <p>The <code class="code">advance_time</code> method normally transfers control from the executable specification to the Verilog simulator. However, when prototyping is enabled, Ruby-VPI redefines it so that the <code class="code">feign!</code> method (which is defined in a test&#8217;s <tt>proto.rb</tt> file) is invoked on the design under test. The <code class="code">feign!</code> method artificially simulates the behavior of the real Verilog design.</p>
1670
1767
 
1768
+ <p>Once you are satisfied with your prototype, you can proceed to <a href="#usage.tutorial.implement-design" class="ref">implement your design in Verilog</a>. This process is often a simple translation your Ruby prototype into your Verilog. At the very least, your prototype serves as a reference while you are implementing your Verilog design.</p>
1671
1769
 
1672
- <p>In this manner, control is kept within the Ruby interpreter when prototyping is enabled. An advantage of this approach is that it reduces the total execution time of a Ruby-VPI test by allowing Ruby&#8217;s POSIX thread to commandeer the Verilog simulator&#8217;s process. A disadvantage of this approach is that callbacks, which require the transfer of control to the Verilog simulator, must be ignored.</p>
1673
1770
 
1771
+ <p>Once your design has been implemented in Verilog, you can use the <em>same</em> specification, which was originally used to verify your prototype, to verify your Verilog design (see <a href="#usage.runner" class="ref">Section 5.6</a> for details).</p>
1674
1772
  </div>
1675
1773
  </p>
1676
1774
 
@@ -1681,18 +1779,18 @@ cbHandle = vpi_register_cb(cbData) <span style="color:#080; font-weight:bold">do
1681
1779
 
1682
1780
  <div id="usage.debugger" class="section">
1683
1781
  <h2 class="title">
1684
- <a href="#a-607403488">5.2</a>
1782
+ <a href="#a-607128648" class="ref">5.5</a>
1685
1783
 
1686
1784
  &nbsp;
1687
1785
 
1688
- Debugging
1786
+ Interactive debugging
1689
1787
  </h2>
1690
1788
 
1691
1789
  <p>The <a href="http://www.datanoise.com/articles/category/ruby-debug">ruby-debug project</a> serves as the interactive debugger for Ruby-VPI.</p>
1692
1790
 
1693
1791
 
1694
1792
  <ol>
1695
- <li>Enable the debugger by activating the <code class="code"><span style="color:#036; font-weight:bold">DEBUGGER</span></code> environment variable (see <a href="#usage.test-runner">Section 5.3</a> for details).</li>
1793
+ <li>Enable the debugger by activating the <code class="code"><span style="color:#036; font-weight:bold">DEBUGGER</span></code> environment variable (see <a href="#usage.runner" class="ref">Section 5.6</a> for details).</li>
1696
1794
  <li>Put the <code class="code">debugger</code> command in your code&#8212;anywhere you wish to activate an interactive debugging session. These commands are automatically ignored when the debugger is disabled; so you can safely leave them in your code, if you wish.</li>
1697
1795
  </ol>
1698
1796
 
@@ -1702,7 +1800,7 @@ cbHandle = vpi_register_cb(cbData) <span style="color:#080; font-weight:bold">do
1702
1800
 
1703
1801
  <div id="usage.debugger.init" class="section">
1704
1802
  <h3 class="title">
1705
- <a href="#a-607400418">5.2.1</a>
1803
+ <a href="#a-607125578" class="ref">5.5.1</a>
1706
1804
 
1707
1805
  &nbsp;
1708
1806
 
@@ -1725,20 +1823,20 @@ cbHandle = vpi_register_cb(cbData) <span style="color:#080; font-weight:bold">do
1725
1823
 
1726
1824
  <hr style="display: none"/>
1727
1825
 
1728
- <div id="usage.test-runner" class="section">
1826
+ <div id="usage.runner" class="section">
1729
1827
  <h2 class="title">
1730
- <a href="#a-607420258">5.3</a>
1828
+ <a href="#a-607150648" class="ref">5.6</a>
1731
1829
 
1732
1830
  &nbsp;
1733
1831
 
1734
1832
  Test runner
1735
1833
  </h2>
1736
1834
 
1737
- <p>A test runner is a file, generated by the <a href="#usage.tools.generate">automated test generator</a> whose name ends with <tt>.rake</tt>. It helps you run generated tests&#8212;you can think of it as a <em>makefile</em> if you are familiar with C programming in a UNIX environment.</p>
1835
+ <p>A test runner is a file, generated by the <a href="#usage.tools.generate" class="ref">automated test generator</a> whose name ends with <tt>.rake</tt>. It helps you run generated tests&#8212;you can think of it as a <em>makefile</em> if you are familiar with C programming in a UNIX environment.</p>
1738
1836
 
1739
1837
 
1740
1838
  <p>When you invoke a test runner without any arguments, it will show you a list of available tasks:
1741
- <pre>$ rake -f your_test_runner.rake
1839
+ <pre>% rake -f your_test_runner.rake
1742
1840
 
1743
1841
  (in /home/sun/src/ruby-vpi/doc)
1744
1842
  rake clean # Remove any temporary products.
@@ -1755,9 +1853,9 @@ rake vsim # Simulate with Mentor Modelsim.
1755
1853
  <p>
1756
1854
  <hr style="display: none"/>
1757
1855
 
1758
- <div id="usage.test-runner.env-vars" class="section">
1856
+ <div id="usage.runner.env-vars" class="section">
1759
1857
  <h3 class="title">
1760
- <a href="#a-607413148">5.3.1</a>
1858
+ <a href="#a-607138328" class="ref">5.6.1</a>
1761
1859
 
1762
1860
  &nbsp;
1763
1861
 
@@ -1768,29 +1866,30 @@ rake vsim # Simulate with Mentor Modelsim.
1768
1866
 
1769
1867
 
1770
1868
  <ul>
1771
- <li><code class="code"><span style="color:#036; font-weight:bold">COVERAGE</span></code> enables code coverage analysis and generation of code coverage reports.</li>
1772
- <li><code class="code"><span style="color:#036; font-weight:bold">DEBUGGER</span></code> enables the <a href="#usage.debugger">interactive debugger</a> in its <a href="http://www.datanoise.com/articles/2006/12/20/post-mortem-debugging">post-mortem debugging mode</a>.</li>
1773
- <li><code class="code"><span style="color:#036; font-weight:bold">PROTOTYPE</span></code> enables the Ruby prototype for the design under test so that the prototype, rather than the real Verilog design, is verified by the specification.</li>
1869
+ <li><code class="code"><span style="color:#036; font-weight:bold">PROTOTYPE</span></code> enables the Ruby prototype for the design under test so that the prototype, rather than the real Verilog design, is verified by the specification.</li>
1870
+ <li><code class="code"><span style="color:#036; font-weight:bold">COVERAGE</span></code> enables code coverage analysis and generation of code coverage reports.</li>
1871
+ <li><code class="code"><span style="color:#036; font-weight:bold">PROFILER</span></code> enables the <a href="http://ruby-prof.rubyforge.org">ruby-prof</a> Ruby code profiler, which collects statistics on the runtime usage of the source code. This data allows you to identify performance bottlenecks.</li>
1872
+ <li><code class="code"><span style="color:#036; font-weight:bold">DEBUGGER</span></code> enables the <a href="#usage.debugger" class="ref">interactive debugger</a> in its <a href="http://www.datanoise.com/articles/2006/12/20/post-mortem-debugging">post-mortem debugging mode</a>.</li>
1774
1873
  </ul>
1775
1874
 
1776
1875
 
1777
- <p>To activate these variables, simply assign the number 1 to them. For example, <code class="code"><span style="color:#036; font-weight:bold">DEBUG</span>=<span style="color:#00D; font-weight:bold">1</span></code> activates the <code class="code"><span style="color:#036; font-weight:bold">DEBUG</span></code> variable.</p>
1876
+ <p>To activate these variables, simply assign the number 1 to them. For example, <code class="code"><span style="color:#036; font-weight:bold">DEBUGGER</span>=<span style="color:#00D; font-weight:bold">1</span></code> activates the <code class="code"><span style="color:#036; font-weight:bold">DEBUGGER</span></code> variable.</p>
1778
1877
 
1779
1878
 
1780
- <p>To deactivate these variables, simply assign a different value to them or <strong>unset</strong> them in your shell. For example, both <code class="code"><span style="color:#036; font-weight:bold">DEBUG</span>=<span style="color:#00D; font-weight:bold">0</span></code> and <code class="code"><span style="color:#036; font-weight:bold">DEBUG</span>=</code> dectivate the <code class="code"><span style="color:#036; font-weight:bold">DEBUG</span></code> variable.</p>
1879
+ <p>To deactivate these variables, simply assign a different value to them or <strong>unset</strong> them in your shell. For example, both <code class="code"><span style="color:#036; font-weight:bold">DEBUGGER</span>=<span style="color:#00D; font-weight:bold">0</span></code> and <code class="code"><span style="color:#036; font-weight:bold">DEBUGGER</span>=</code> dectivate the <code class="code"><span style="color:#036; font-weight:bold">DEBUGGER</span></code> variable.</p>
1781
1880
 
1782
1881
 
1783
1882
  <p>
1784
1883
  <div id="Variables_as_command-line_arguments" class="paragraph">
1785
1884
  <p class="title">Variables as command-line arguments</p>
1786
- You can specify variable assignments as arguments to the <strong>rake</strong> command. For example, <pre>rake DEBUG=1</pre> is equivalent to
1885
+ You can specify variable assignments as arguments to the <strong>rake</strong> command. For example, <pre>rake DEBUGGER=1</pre> is equivalent to
1787
1886
  <pre>
1788
- DEBUG=1
1789
- export DEBUG
1887
+ DEBUGGER=1
1888
+ export DEBUGGER
1790
1889
  rake
1791
1890
  </pre> in Bourne shell or
1792
1891
  <pre>
1793
- setenv DEBUG 1
1892
+ setenv DEBUGGER 1
1794
1893
  rake
1795
1894
  </pre> in C shell.
1796
1895
  </div>
@@ -1804,7 +1903,7 @@ rake
1804
1903
  <div class="example" id="Running_a_test_with_environment_variables">
1805
1904
 
1806
1905
 
1807
- <p class="title"><a href="#a-607408978">Example 2</a>. &nbsp; Running a test with environment variables</p>
1906
+ <p class="title"><a href="#a-607134148" class="ref">Example 4</a>. &nbsp; Running a test with environment variables</p>
1808
1907
 
1809
1908
  <p>Below, we enable the prototype and code coverage analysis:
1810
1909
  <pre>rake -f your_test_runner.rake PROTOTYPE=1 COVERAGE=1</pre></p>
@@ -1828,7 +1927,7 @@ rake
1828
1927
 
1829
1928
  <div id="usage.tools" class="section">
1830
1929
  <h2 class="title">
1831
- <a href="#a-607439408">5.4</a>
1930
+ <a href="#a-607177328" class="ref">5.7</a>
1832
1931
 
1833
1932
  &nbsp;
1834
1933
 
@@ -1851,11 +1950,11 @@ Tools:
1851
1950
  generate Generates Ruby-VPI tests from Verilog 2001 and Verilog 95 module declarations.
1852
1951
 
1853
1952
  Simulators:
1854
- cver GPL Cver
1855
1953
  ivl Icarus Verilog
1856
1954
  vcs Synopsys VCS
1857
1955
  vsim Mentor Modelsim
1858
1956
  ncsim Cadence NC-Sim
1957
+ cver GPL Cver
1859
1958
  </pre>
1860
1959
 
1861
1960
 
@@ -1864,7 +1963,7 @@ Simulators:
1864
1963
 
1865
1964
  <div id="usage.tools.generate" class="section">
1866
1965
  <h3 class="title">
1867
- <a href="#a-607429588">5.4.1</a>
1966
+ <a href="#a-607165778" class="ref">5.7.1</a>
1868
1967
 
1869
1968
  &nbsp;
1870
1969
 
@@ -1884,7 +1983,7 @@ A Ruby-VPI test is composed of the following files:
1884
1983
  </ul>
1885
1984
 
1886
1985
 
1887
- <p>As <a href="#fig:generate-test.RSpec">Example 4</a> shows, the name of each generated file is prefixed with the name of the Verilog module for which the test was generated. This convention helps organize tests within the file system, so that they are readily distinguishable from one another.</p>
1986
+ <p>As <a href="#fig:generate-test.RSpec" class="ref">Example 6</a> shows, the name of each generated file is prefixed with the name of the Verilog module for which the test was generated. This convention helps organize tests within the file system, so that they are readily distinguishable from one another.</p>
1888
1987
 
1889
1988
 
1890
1989
  <p>
@@ -1894,7 +1993,7 @@ A Ruby-VPI test is composed of the following files:
1894
1993
  <div class="caution" id="Do_not_rename_generated_files">
1895
1994
  <img src="images/tango/caution.png" alt="caution" class="icon"/>
1896
1995
 
1897
- <p class="title"><a href="#a-607423018">Caution 1</a>. &nbsp; Do not rename generated files</p>
1996
+ <p class="title"><a href="#a-607154698" class="ref">Caution 1</a>. &nbsp; Do not rename generated files</p>
1898
1997
 
1899
1998
  Ruby-VPI uses the convention described above to dynamically create a direct Ruby interface to the design under test, so <em>do not</em> rename the generated files arbitrarily.
1900
1999
  </div>
@@ -1913,14 +2012,13 @@ By producing multiple files, the automated test generator physically decouples t
1913
2012
  <div class="tip" id="Using__kdiff3__with_the_automated_test_generator.">
1914
2013
  <img src="images/tango/tip.png" alt="tip" class="icon"/>
1915
2014
 
1916
- <p class="title"><a href="#a-607425508">Tip 3</a>. &nbsp; Using <strong>kdiff3</strong> with the automated test generator.</p>
2015
+ <p class="title"><a href="#a-607159448" class="ref">Tip 3</a>. &nbsp; Using <strong>kdiff3</strong> with the automated test generator.</p>
1917
2016
 
1918
2017
  <ol>
1919
2018
  <li>Create a file named <tt>merge2</tt> with the following content: <pre class="code">
1920
2019
  <span style="color:#888">#!/bin/sh</span>
1921
2020
  <span style="color:#888"># args: old file, new file</span>
1922
- kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">$2</span><span style="color:#710">&quot;</span></span> <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">$@</span><span style="color:#710">&quot;</span></span>
1923
- </pre></li>
2021
+ kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">$2</span><span style="color:#710">&quot;</span></span> <span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">$@</span><span style="color:#710">&quot;</span></span></pre></li>
1924
2022
  <li>Make the file executable by running the <pre>chmod +x merge2</pre> command.</li>
1925
2023
  <li>Place the file somewhere accessible by your <code class="code"><span style="color:#036; font-weight:bold">PATH</span></code> environment variable.</li>
1926
2024
  <li>Assign the value &#8220;merge2&#8221; to the <code class="code"><span style="color:#036; font-weight:bold">MERGER</span></code> environment variable using your shell&#8217;s <strong>export</strong> or <strong>setenv</strong> command.</li>
@@ -1939,7 +2037,7 @@ kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color
1939
2037
 
1940
2038
  <div id="usage.tools.convert" class="section">
1941
2039
  <h3 class="title">
1942
- <a href="#a-607431878">5.4.2</a>
2040
+ <a href="#a-607169418" class="ref">5.7.2</a>
1943
2041
 
1944
2042
  &nbsp;
1945
2043
 
@@ -1961,14 +2059,14 @@ kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color
1961
2059
 
1962
2060
  <div id="usage.examples" class="section">
1963
2061
  <h2 class="title">
1964
- <a href="#a-607441648">5.5</a>
2062
+ <a href="#a-607179568" class="ref">5.8</a>
1965
2063
 
1966
2064
  &nbsp;
1967
2065
 
1968
- Sample tests
2066
+ Example tests
1969
2067
  </h2>
1970
2068
 
1971
- The <tt>samp</tt> directory (<a href="http://ruby-vpi.rubyforge.org/code//samp/">browse it online</a>) contains several sample tests which illustrate how Ruby-VPI can be used. Each sample has an associated <tt>Rakefile</tt> which simplifies the process of running it. Therefore, simply navigate into an example directory and run the <pre>rake</pre> command to get started.
2069
+ The <tt>examples</tt> directory (<a href="http://ruby-vpi.rubyforge.org/code//examples/">browse it online</a>) contains several example tests which illustrate how Ruby-VPI can be used. Each example has an associated <tt>Rakefile</tt> which simplifies the process of running it. Therefore, simply navigate into an example directory and run the <pre>rake</pre> command to get started.
1972
2070
 
1973
2071
  </div>
1974
2072
 
@@ -1977,7 +2075,7 @@ kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color
1977
2075
 
1978
2076
  <div id="usage.tutorial" class="section">
1979
2077
  <h2 class="title">
1980
- <a href="#a-607314468">5.6</a>
2078
+ <a href="#a-607105538" class="ref">5.9</a>
1981
2079
 
1982
2080
  &nbsp;
1983
2081
 
@@ -1985,13 +2083,13 @@ kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color
1985
2083
  </h2>
1986
2084
 
1987
2085
  <ol>
1988
- <li><a href="#usage.tutorial.declare-design">Declare a design</a> using Verilog 2001 syntax.</li>
1989
- <li><a href="#usage.tutorial.generate-test">Generate a test</a> for the design using the <a href="#usage.tools.generate">automated test generator</a> tool.</li>
1990
- <li><a href="#usage.tutorial.specification">Identify your expectations</a> for the design and implement them in the specification.</li>
1991
- <li>(Optional) <a href="#usage.tutorial.implement-proto">Implement the prototype</a> of the design in Ruby.</li>
1992
- <li>(Optional) <a href="#usage.tutorial.test-proto">Verify the prototype</a> against the specification.</li>
1993
- <li><a href="#usage.tutorial.implement-design">Implement the design</a> in Verilog once the prototype has been verified.</li>
1994
- <li><a href="#usage.tutorial.test-design">Verify the design</a> against the specification.</li>
2086
+ <li><a href="#usage.tutorial.declare-design" class="ref">Declare a design</a> using Verilog 2001 syntax.</li>
2087
+ <li><a href="#usage.tutorial.generate-test" class="ref">Generate a test</a> for the design using the <a href="#usage.tools.generate" class="ref">automated test generator</a> tool.</li>
2088
+ <li><a href="#usage.tutorial.specification" class="ref">Identify your expectations</a> for the design and implement them in the specification.</li>
2089
+ <li>(Optional) <a href="#usage.tutorial.implement-proto" class="ref">Implement the prototype</a> of the design in Ruby.</li>
2090
+ <li>(Optional) <a href="#usage.tutorial.test-proto" class="ref">Verify the prototype</a> against the specification.</li>
2091
+ <li><a href="#usage.tutorial.implement-design" class="ref">Implement the design</a> in Verilog once the prototype has been verified.</li>
2092
+ <li><a href="#usage.tutorial.test-design" class="ref">Verify the design</a> against the specification.</li>
1995
2093
  </ol>
1996
2094
 
1997
2095
 
@@ -2000,14 +2098,14 @@ kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color
2000
2098
 
2001
2099
  <div id="usage.tutorial.declare-design" class="section">
2002
2100
  <h3 class="title">
2003
- <a href="#a-607449058">5.6.1</a>
2101
+ <a href="#a-607192538" class="ref">5.9.1</a>
2004
2102
 
2005
2103
  &nbsp;
2006
2104
 
2007
2105
  Start with a Verilog design
2008
2106
  </h3>
2009
2107
 
2010
- <p>First, we need a Verilog design to test. In this tutorial, <a href="#fig:counter.v_decl">Example 3</a> will serve as our design under test. Its interface is composed of the following parts:</p>
2108
+ <p>First, we need a Verilog design to test. In this tutorial, <a href="#fig:counter.v_decl" class="ref">Example 5</a> will serve as our design under test. Its interface is composed of the following parts:</p>
2011
2109
 
2012
2110
 
2013
2111
  <ul>
@@ -2025,7 +2123,7 @@ kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color
2025
2123
  <div class="example" id="fig:counter.v_decl">
2026
2124
 
2027
2125
 
2028
- <p class="title"><a href="#a-607445548">Example 3</a>. &nbsp; Declaration of a simple up-counter with synchronous reset</p>
2126
+ <p class="title"><a href="#a-607186858" class="ref">Example 5</a>. &nbsp; Declaration of a simple up-counter with synchronous reset</p>
2029
2127
 
2030
2128
  <pre class="code" lang="verilog">
2031
2129
  module counter #(parameter Size = 5) (
@@ -2033,12 +2131,11 @@ module counter #(parameter Size = 5) (
2033
2131
  input reset,
2034
2132
  output reg [Size-1 : 0] count
2035
2133
  );
2036
- endmodule
2037
- </pre>
2134
+ endmodule</pre>
2038
2135
  </div>
2039
2136
  </div>
2040
2137
 
2041
- Before we continue, save the source code shown in <a href="#fig:counter.v_decl">Example 3</a> into a file named <tt>counter.v</tt>.</p>
2138
+ Before we continue, save the source code shown in <a href="#fig:counter.v_decl" class="ref">Example 5</a> into a file named <tt>counter.v</tt>.</p>
2042
2139
 
2043
2140
  </div>
2044
2141
  </p>
@@ -2049,33 +2146,33 @@ Before we continue, save the source code shown in <a href="#fig:counter.v_decl">
2049
2146
 
2050
2147
  <div id="usage.tutorial.generate-test" class="section">
2051
2148
  <h3 class="title">
2052
- <a href="#a-607459658">5.6.2</a>
2149
+ <a href="#a-607217768" class="ref">5.9.2</a>
2053
2150
 
2054
2151
  &nbsp;
2055
2152
 
2056
2153
  Generate a test
2057
2154
  </h3>
2058
2155
 
2059
- <p>Now that we have a Verilog design to test, we shall use the <a href="#usage.tools.generate">generate</a> tool to generate some scaffolding for our test. This tool allows us to implement our specification using RSpec, xUnit, or any other format.</p>
2156
+ <p>Now that we have a Verilog design to test, we shall use the <a href="#usage.tools.generate" class="ref">generate</a> tool to generate some scaffolding for our test. This tool allows us to implement our specification using RSpec, xUnit, or any other format.</p>
2060
2157
 
2061
2158
 
2062
2159
  Each format represents a different software development methodology:
2063
2160
  <ul>
2064
- <li>RSpec represents <a href="#glossary.BDD">BDD</a></li>
2065
- <li>xUnit represents <a href="#glossary.TDD">TDD</a></li>
2161
+ <li>RSpec represents <a href="#glossary.BDD" class="ref">BDD</a></li>
2162
+ <li>xUnit represents <a href="#glossary.TDD" class="ref">TDD</a></li>
2066
2163
  <li>our own format can represent another methodology</li>
2067
2164
  </ul>
2068
2165
 
2069
2166
 
2070
2167
  <p>In this tutorial, you will see how both RSpec and xUnit formats are used. So let us make separate directories for both formats to avoid generated tests from overwriting each other:
2071
2168
  <pre>
2072
- $ mkdir RSpec xUnit
2073
- $ cp counter.v RSpec
2074
- $ cp counter.v xUnit
2169
+ mkdir RSpec xUnit
2170
+ cp counter.v RSpec
2171
+ cp counter.v xUnit
2075
2172
  </pre></p>
2076
2173
 
2077
2174
 
2078
- <p>Once we have decided how we want to implement our specification, we can proceed to generate a test for our design. This process is illustrated by <a href="#fig:generate-test.RSpec">Example 4</a> and <a href="#fig:generate-test.xUnit">Example 5</a>.</p>
2175
+ <p>Once we have decided how we want to implement our specification, we can proceed to generate a test for our design. This process is illustrated by <a href="#fig:generate-test.RSpec" class="ref">Example 6</a> and <a href="#fig:generate-test.xUnit" class="ref">Example 7</a>.</p>
2079
2176
 
2080
2177
 
2081
2178
  <p>
@@ -2085,7 +2182,7 @@ $ cp counter.v xUnit
2085
2182
  <div class="example" id="fig:generate-test.RSpec">
2086
2183
 
2087
2184
 
2088
- <p class="title"><a href="#a-607452398">Example 4</a>. &nbsp; Generating a test with specification in RSpec format</p>
2185
+ <p class="title"><a href="#a-607199068" class="ref">Example 6</a>. &nbsp; Generating a test with specification in RSpec format</p>
2089
2186
 
2090
2187
  <pre>
2091
2188
  $ ruby-vpi generate counter.v --RSpec
@@ -2107,7 +2204,7 @@ $ ruby-vpi generate counter.v --RSpec
2107
2204
  <div class="example" id="fig:generate-test.xUnit">
2108
2205
 
2109
2206
 
2110
- <p class="title"><a href="#a-607454858">Example 5</a>. &nbsp; Generating a test with specification in xUnit format</p>
2207
+ <p class="title"><a href="#a-607205488" class="ref">Example 7</a>. &nbsp; Generating a test with specification in xUnit format</p>
2111
2208
 
2112
2209
  <pre>
2113
2210
  $ ruby-vpi generate counter.v --xUnit
@@ -2132,14 +2229,14 @@ $ ruby-vpi generate counter.v --xUnit
2132
2229
 
2133
2230
  <div id="usage.tutorial.specification" class="section">
2134
2231
  <h3 class="title">
2135
- <a href="#a-607469758">5.6.3</a>
2232
+ <a href="#a-607227868" class="ref">5.9.3</a>
2136
2233
 
2137
2234
  &nbsp;
2138
2235
 
2139
2236
  Specify your expectations
2140
2237
  </h3>
2141
2238
 
2142
- <p>So far, the test generation tool has created a basic foundation for our test Now we must build upon this foundation by identifying our <a href="#glossary.expectation">expectation</a> of the design under test. That is, how do we expect the design to <em>behave</em> under certain conditions?</p>
2239
+ <p>So far, the test generation tool has created a basic foundation for our test Now we must build upon this foundation by identifying our <a href="#glossary.expectation" class="ref">expectation</a> of the design under test. That is, how do we expect the design to <em>behave</em> under certain conditions?</p>
2143
2240
 
2144
2241
 
2145
2242
  Here are some reasonable expectations for our simple counter:
@@ -2150,7 +2247,7 @@ Here are some reasonable expectations for our simple counter:
2150
2247
  </ul>
2151
2248
 
2152
2249
 
2153
- <p>Now that we have identified a set of expectations for our design, we are ready to implement them in our specification. This process is illustrated by <a href="#fig:RSpec_counter_spec.rb">Example 6</a> and <a href="#fig:xUnit_counter_spec.rb">Example 7</a>.</p>
2250
+ <p>Now that we have identified a set of expectations for our design, we are ready to implement them in our specification. This process is illustrated by <a href="#fig:RSpec_counter_spec.rb" class="ref">Example 8</a> and <a href="#fig:xUnit_counter_spec.rb" class="ref">Example 9</a>.</p>
2154
2251
 
2155
2252
 
2156
2253
 
@@ -2160,7 +2257,7 @@ Here are some reasonable expectations for our simple counter:
2160
2257
  <div class="example" id="fig:RSpec_counter_spec.rb">
2161
2258
 
2162
2259
 
2163
- <p class="title"><a href="#a-607462568">Example 6</a>. &nbsp; Specification implemented in RSpec format</p>
2260
+ <p class="title"><a href="#a-607220678" class="ref">Example 8</a>. &nbsp; Specification implemented in RSpec format</p>
2164
2261
 
2165
2262
  <pre class="code">require <span style="background-color:#fff0f0"><span style="color:#710">'</span><span style="color:#D20">spec</span><span style="color:#710">'</span></span>
2166
2263
 
@@ -2200,8 +2297,7 @@ describe <span style="background-color:#fff0f0"><span style="color:#710">&quot;<
2200
2297
  <span style="color:#036; font-weight:bold">Counter</span>.cycle! <span style="color:#888"># increment the counter</span>
2201
2298
  <span style="color:#036; font-weight:bold">Counter</span>.count.intVal.should == <span style="color:#00D; font-weight:bold">0</span>
2202
2299
  <span style="color:#080; font-weight:bold">end</span>
2203
- <span style="color:#080; font-weight:bold">end</span>
2204
- </pre>
2300
+ <span style="color:#080; font-weight:bold">end</span></pre>
2205
2301
  </div>
2206
2302
  </div>
2207
2303
 
@@ -2212,7 +2308,7 @@ describe <span style="background-color:#fff0f0"><span style="color:#710">&quot;<
2212
2308
  <div class="example" id="fig:xUnit_counter_spec.rb">
2213
2309
 
2214
2310
 
2215
- <p class="title"><a href="#a-607464928">Example 7</a>. &nbsp; Specification implemented in xUnit format</p>
2311
+ <p class="title"><a href="#a-607223038" class="ref">Example 9</a>. &nbsp; Specification implemented in xUnit format</p>
2216
2312
 
2217
2313
  <pre class="code">require <span style="background-color:#fff0f0"><span style="color:#710">'</span><span style="color:#D20">test/unit</span><span style="color:#710">'</span></span>
2218
2314
 
@@ -2252,15 +2348,14 @@ describe <span style="background-color:#fff0f0"><span style="color:#710">&quot;<
2252
2348
  <span style="color:#036; font-weight:bold">Counter</span>.cycle! <span style="color:#888"># increment the counter</span>
2253
2349
  assert_equal( <span style="color:#00D; font-weight:bold">0</span>, <span style="color:#036; font-weight:bold">Counter</span>.count.intVal )
2254
2350
  <span style="color:#080; font-weight:bold">end</span>
2255
- <span style="color:#080; font-weight:bold">end</span>
2256
- </pre>
2351
+ <span style="color:#080; font-weight:bold">end</span></pre>
2257
2352
  </div>
2258
2353
  </div>
2259
2354
 
2260
2355
  Before we continue,
2261
2356
  <ol>
2262
- <li>Replace the contents of the file named <tt>RSpec/counter_spec.rb</tt> with the source code shown in <a href="#fig:RSpec_counter_spec.rb">Example 6</a>.</li>
2263
- <li>Replace the contents of the file named <tt>xUnit/counter_spec.rb</tt> with the source code shown in <a href="#fig:xUnit_counter_spec.rb">Example 7</a>.</li>
2357
+ <li>Replace the contents of the file named <tt>RSpec/counter_spec.rb</tt> with the source code shown in <a href="#fig:RSpec_counter_spec.rb" class="ref">Example 8</a>.</li>
2358
+ <li>Replace the contents of the file named <tt>xUnit/counter_spec.rb</tt> with the source code shown in <a href="#fig:xUnit_counter_spec.rb" class="ref">Example 9</a>.</li>
2264
2359
  </ol>
2265
2360
 
2266
2361
  </div>
@@ -2272,14 +2367,14 @@ Before we continue,
2272
2367
 
2273
2368
  <div id="usage.tutorial.implement-proto" class="section">
2274
2369
  <h3 class="title">
2275
- <a href="#a-607475748">5.6.4</a>
2370
+ <a href="#a-607233858" class="ref">5.9.4</a>
2276
2371
 
2277
2372
  &nbsp;
2278
2373
 
2279
2374
  Implement the prototype
2280
2375
  </h3>
2281
2376
 
2282
- <p>Now that we have a specification against which to verify our design let us build a prototype of our design. By doing so, we exercise our specification, experience potential problems that may arise when we later implement our design in Verilog, and gain confidence in our work. The result of this proceess is illustrated by <a href="#fig:counter_proto.rb">Example 8</a>.</p>
2377
+ <p>Now that we have a specification against which to verify our design let us build a prototype of our design. By doing so, we exercise our specification, experience potential problems that may arise when we later implement our design in Verilog, and gain confidence in our work. The result of this proceess is illustrated by <a href="#fig:counter_proto.rb" class="ref">Example 10</a>.</p>
2283
2378
 
2284
2379
 
2285
2380
  <p>
@@ -2289,23 +2384,21 @@ Before we continue,
2289
2384
  <div class="example" id="fig:counter_proto.rb">
2290
2385
 
2291
2386
 
2292
- <p class="title"><a href="#a-607472348">Example 8</a>. &nbsp; Ruby prototype of our Verilog design</p>
2387
+ <p class="title"><a href="#a-607230458" class="ref">Example 10</a>. &nbsp; Ruby prototype of our Verilog design</p>
2293
2388
 
2294
- <pre class="code"><span style="color:#888"># Ruby prototype of the design under test's Verilog implementation.</span>
2295
- <span style="color:#080; font-weight:bold">def</span> <span style="color:#06B; font-weight:bold">feign!</span>
2296
- <span style="color:#080; font-weight:bold">if</span> clock.posedge?
2297
- <span style="color:#080; font-weight:bold">if</span> reset.high?
2298
- count.intVal = <span style="color:#00D; font-weight:bold">0</span>
2299
- <span style="color:#080; font-weight:bold">else</span>
2300
- count.intVal += <span style="color:#00D; font-weight:bold">1</span>
2301
- <span style="color:#080; font-weight:bold">end</span>
2389
+ <pre class="code">always <span style="color:#080; font-weight:bold">do</span>
2390
+ wait <span style="color:#080; font-weight:bold">until</span> clock.posedge?
2391
+
2392
+ <span style="color:#080; font-weight:bold">if</span> reset.high?
2393
+ count.intVal = <span style="color:#00D; font-weight:bold">0</span>
2394
+ <span style="color:#080; font-weight:bold">else</span>
2395
+ count.intVal += <span style="color:#00D; font-weight:bold">1</span>
2302
2396
  <span style="color:#080; font-weight:bold">end</span>
2303
- <span style="color:#080; font-weight:bold">end</span>
2304
- </pre>
2397
+ <span style="color:#080; font-weight:bold">end</span></pre>
2305
2398
  </div>
2306
2399
  </div>
2307
2400
 
2308
- Before we continue, replace the contents of the files named <tt>RSpec/counter_proto.rb</tt> and <tt>xUnit/counter_proto.rb</tt> with the source code shown in <a href="#fig:counter_proto.rb">Example 8</a>.</p>
2401
+ Before we continue, replace the contents of the files named <tt>RSpec/counter_proto.rb</tt> and <tt>xUnit/counter_proto.rb</tt> with the source code shown in <a href="#fig:counter_proto.rb" class="ref">Example 10</a>.</p>
2309
2402
 
2310
2403
  </div>
2311
2404
  </p>
@@ -2316,17 +2409,17 @@ Before we continue, replace the contents of the files named <tt>RSpec/counter_pr
2316
2409
 
2317
2410
  <div id="usage.tutorial.test-proto" class="section">
2318
2411
  <h3 class="title">
2319
- <a href="#a-607231778">5.6.5</a>
2412
+ <a href="#a-607247108" class="ref">5.9.5</a>
2320
2413
 
2321
2414
  &nbsp;
2322
2415
 
2323
2416
  Verify the prototype
2324
2417
  </h3>
2325
2418
 
2326
- <p>Now that we have implemented our prototype, we are ready to verify it against our specification by running the test This process is illustrated by <a href="#fig:test-proto.RSpec">Example 9</a> and <a href="#fig:test-proto.unit-test">Example 10</a>.</p>
2419
+ <p>Now that we have implemented our prototype, we are ready to verify it against our specification by running the test This process is illustrated by <a href="#fig:test-proto.RSpec" class="ref">Example 11</a> and <a href="#fig:test-proto.unit-test" class="ref">Example 12</a>.</p>
2327
2420
 
2328
2421
 
2329
- <p>In these examples, the <code class="code"><span style="color:#036; font-weight:bold">PROTOTYPE</span></code> environment variable is assigned the value 1 while running the test so that, instead of our design, our prototype is verified against our specification (see <a href="#usage.test-runner.env-vars">Section 5.3.1</a> for details). Also, the <a href="#setup.reqs">GPL Cver simulator</a> denoted by <em>cver</em>, is used to run the simulation.</p>
2422
+ <p>In these examples, the <code class="code"><span style="color:#036; font-weight:bold">PROTOTYPE</span></code> environment variable is assigned the value 1 while running the test so that, instead of our design, our prototype is verified against our specification (see <a href="#usage.runner.env-vars" class="ref">Section 5.6.1</a> for details). Also, the <a href="#setup.reqs" class="ref">GPL Cver simulator</a> denoted by <em>cver</em>, is used to run the simulation.</p>
2330
2423
 
2331
2424
 
2332
2425
  <p>
@@ -2336,7 +2429,7 @@ Before we continue, replace the contents of the files named <tt>RSpec/counter_pr
2336
2429
  <div class="example" id="fig:test-proto.RSpec">
2337
2430
 
2338
2431
 
2339
- <p class="title"><a href="#a-607478868">Example 9</a>. &nbsp; Running a test with specification in RSpec format</p>
2432
+ <p class="title"><a href="#a-607236978" class="ref">Example 11</a>. &nbsp; Running a test with specification in RSpec format</p>
2340
2433
 
2341
2434
  <pre>
2342
2435
  $ cd RSpec
@@ -2360,7 +2453,7 @@ cd -
2360
2453
  <div class="example" id="fig:test-proto.unit-test">
2361
2454
 
2362
2455
 
2363
- <p class="title"><a href="#a-607481368">Example 10</a>. &nbsp; Running a test with specification in xUnit format</p>
2456
+ <p class="title"><a href="#a-607239478" class="ref">Example 12</a>. &nbsp; Running a test with specification in xUnit format</p>
2364
2457
 
2365
2458
  <pre>
2366
2459
  $ cd xUnit
@@ -2384,7 +2477,7 @@ Finished in 0.043859 seconds.
2384
2477
  <div class="tip" id="What_can_the_test_runner_do_">
2385
2478
  <img src="images/tango/tip.png" alt="tip" class="icon"/>
2386
2479
 
2387
- <p class="title"><a href="#a-607223748">Tip 4</a>. &nbsp; What can the test runner do?</p>
2480
+ <p class="title"><a href="#a-607241748" class="ref">Tip 4</a>. &nbsp; What can the test runner do?</p>
2388
2481
 
2389
2482
  If you invoke the test runner (1) without any arguments or (2) with the <tt>--tasks</tt> option, it will show you a list of tasks that it can perform for you.
2390
2483
  </div>
@@ -2400,14 +2493,14 @@ Finished in 0.043859 seconds.
2400
2493
 
2401
2494
  <div id="usage.tutorial.implement-design" class="section">
2402
2495
  <h3 class="title">
2403
- <a href="#a-607245728">5.6.6</a>
2496
+ <a href="#a-607253098" class="ref">5.9.6</a>
2404
2497
 
2405
2498
  &nbsp;
2406
2499
 
2407
2500
  Implement the design
2408
2501
  </h3>
2409
2502
 
2410
- <p>Now that we have implemented and verified our prototype, we are ready to implement our design This is often quite simple because we translate <em>existing</em> code from Ruby (our prototype) into Verilog (our design). The result of this process is illustrated by <a href="#fig:counter.v_impl">Example 11</a>.</p>
2503
+ <p>Now that we have implemented and verified our prototype, we are ready to implement our design This is often quite simple because we translate <em>existing</em> code from Ruby (our prototype) into Verilog (our design). The result of this process is illustrated by <a href="#fig:counter.v_impl" class="ref">Example 13</a>.</p>
2411
2504
 
2412
2505
 
2413
2506
  <p>
@@ -2417,7 +2510,7 @@ Finished in 0.043859 seconds.
2417
2510
  <div class="example" id="fig:counter.v_impl">
2418
2511
 
2419
2512
 
2420
- <p class="title"><a href="#a-607235998">Example 11</a>. &nbsp; Implementation of a simple up-counter with synchronous reset</p>
2513
+ <p class="title"><a href="#a-607249698" class="ref">Example 13</a>. &nbsp; Implementation of a simple up-counter with synchronous reset</p>
2421
2514
 
2422
2515
  <pre class="code" lang="verilog">/**
2423
2516
  A simple up-counter with synchronous reset.
@@ -2438,12 +2531,11 @@ module counter #(parameter Size = 5) (
2438
2531
  else
2439
2532
  count &lt;= count + 1;
2440
2533
  end
2441
- endmodule
2442
- </pre>
2534
+ endmodule</pre>
2443
2535
  </div>
2444
2536
  </div>
2445
2537
 
2446
- Before we continue, replace the contents of the files named <tt>RSpec/counter.v</tt> and <tt>xUnit/counter.v</tt> with the source code shown in <a href="#fig:counter.v_impl">Example 11</a></p>
2538
+ Before we continue, replace the contents of the files named <tt>RSpec/counter.v</tt> and <tt>xUnit/counter.v</tt> with the source code shown in <a href="#fig:counter.v_impl" class="ref">Example 13</a></p>
2447
2539
 
2448
2540
  </div>
2449
2541
  </p>
@@ -2454,17 +2546,17 @@ Before we continue, replace the contents of the files named <tt>RSpec/counter.v<
2454
2546
 
2455
2547
  <div id="usage.tutorial.test-design" class="section">
2456
2548
  <h3 class="title">
2457
- <a href="#a-607263938">5.6.7</a>
2549
+ <a href="#a-607037508" class="ref">5.9.7</a>
2458
2550
 
2459
2551
  &nbsp;
2460
2552
 
2461
2553
  Verify the design
2462
2554
  </h3>
2463
2555
 
2464
- <p>Now that we have implemented our design we are ready to verify it against our specification by running the test <a href="#fig:test-design.RSpec">Example 12</a> and <a href="#fig:test-design.unit-test">Example 13</a> illustrate this process.</p>
2556
+ <p>Now that we have implemented our design we are ready to verify it against our specification by running the test <a href="#fig:test-design.RSpec" class="ref">Example 14</a> and <a href="#fig:test-design.unit-test" class="ref">Example 15</a> illustrate this process.</p>
2465
2557
 
2466
2558
 
2467
- <p>In these examples, the <code class="code"><span style="color:#036; font-weight:bold">PROTOTYPE</span></code> environment variable is <em>not</em> specified while running the test, so that our design, instead of our prototype, is verified against our specification. You can also achieve this effect by assigning an empty value to <code class="code"><span style="color:#036; font-weight:bold">PROTOTYPE</span></code>, or by using your shell&#8217;s <strong>unset</strong> command. Finally, the <a href="#setup.reqs">GPL Cver simulator</a> denoted by <em>cver</em>, is used to run the simulation.</p>
2559
+ <p>In these examples, the <code class="code"><span style="color:#036; font-weight:bold">PROTOTYPE</span></code> environment variable is <em>not</em> specified while running the test, so that our design, instead of our prototype, is verified against our specification. You can also achieve this effect by assigning an empty value to <code class="code"><span style="color:#036; font-weight:bold">PROTOTYPE</span></code>, or by using your shell&#8217;s <strong>unset</strong> command. Finally, the <a href="#setup.reqs" class="ref">GPL Cver simulator</a> denoted by <em>cver</em>, is used to run the simulation.</p>
2468
2560
 
2469
2561
 
2470
2562
  <p>
@@ -2474,7 +2566,7 @@ Before we continue, replace the contents of the files named <tt>RSpec/counter.v<
2474
2566
  <div class="example" id="fig:test-design.RSpec">
2475
2567
 
2476
2568
 
2477
- <p class="title"><a href="#a-607252508">Example 12</a>. &nbsp; Running a test with specification in RSpec format</p>
2569
+ <p class="title"><a href="#a-607000458" class="ref">Example 14</a>. &nbsp; Running a test with specification in RSpec format</p>
2478
2570
 
2479
2571
  <pre>
2480
2572
  $ cd RSpec
@@ -2496,7 +2588,7 @@ Finished in 0.041198 seconds
2496
2588
  <div class="example" id="fig:test-design.unit-test">
2497
2589
 
2498
2590
 
2499
- <p class="title"><a href="#a-607255018">Example 13</a>. &nbsp; Running a test with specification in xUnit format</p>
2591
+ <p class="title"><a href="#a-607031948" class="ref">Example 15</a>. &nbsp; Running a test with specification in xUnit format</p>
2500
2592
 
2501
2593
  <pre>
2502
2594
  $ cd xUnit
@@ -2525,7 +2617,7 @@ Finished in 0.040262 seconds.
2525
2617
 
2526
2618
  <div id="hacking" class="chapter">
2527
2619
  <h1 class="title">
2528
- Chapter <a href="#a-607500728">6</a>
2620
+ Chapter <a href="#a-607355358" class="ref">6</a>
2529
2621
 
2530
2622
  <br/><br/>
2531
2623
 
@@ -2537,11 +2629,11 @@ Finished in 0.040262 seconds.
2537
2629
 
2538
2630
  <div id="hacking.scm" class="section">
2539
2631
  <h2 class="title">
2540
- <a href="#a-607491268">6.1</a>
2632
+ <a href="#a-607342188" class="ref">6.1</a>
2541
2633
 
2542
2634
  &nbsp;
2543
2635
 
2544
- Getting the source code
2636
+ Getting the latest source code
2545
2637
  </h2>
2546
2638
 
2547
2639
  Check out the source code using <a href="http://darcs.net">Darcs</a> from the project repository:
@@ -2556,21 +2648,41 @@ Finished in 0.040262 seconds.
2556
2648
  <p>
2557
2649
  <hr style="display: none"/>
2558
2650
 
2651
+ <div id="Installing_without_really_installing" class="section">
2652
+ <h2 class="title">
2653
+ <a href="#a-607344708" class="ref">6.2</a>
2654
+
2655
+ &nbsp;
2656
+
2657
+ Installing without really installing
2658
+ </h2>
2659
+
2660
+ <p>After you&#8217;ve obtained the latest source code (see <a href="#hacking.scm" class="ref">Section 6.1</a>), you can use it immediately without having to build or install a Ruby-VPI gem. To do this, set the <code class="code"><span style="color:#036; font-weight:bold">RUBYLIB</span></code> environment variable to the path where you checked out the source code <em>plus</em> the <tt>lib/</tt> directory.</p>
2661
+
2662
+
2663
+ <p>For example, if you checked out the source code into <tt>/home/foo/ruby-vpi/</tt> then you would set the value of the <code class="code"><span style="color:#036; font-weight:bold">RUBYLIB</span></code> environment variable to <tt>/home/foo/ruby-vpi/lib/</tt>. Henceforth, any Ruby-VPI tests you run will use the checked-out source code directly.</p>
2664
+
2665
+ </div>
2666
+ </p>
2667
+
2668
+
2669
+ <p>
2670
+ <hr style="display: none"/>
2671
+
2559
2672
  <div id="hacking.release-packages" class="section">
2560
2673
  <h2 class="title">
2561
- <a href="#a-607493898">6.2</a>
2674
+ <a href="#a-607347318" class="ref">6.3</a>
2562
2675
 
2563
2676
  &nbsp;
2564
2677
 
2565
2678
  Building release packages
2566
2679
  </h2>
2567
2680
 
2568
- <p>In addition to the <a href="#setup.reqs">normal requirements</a> you need the following software to build release packages:</p>
2681
+ <p>In addition to the <a href="#setup.reqs" class="ref">normal requirements</a> you need the following software to build release packages:</p>
2569
2682
 
2570
2683
 
2571
2684
  <ul>
2572
- <li><a href="http://www.swig.org/">SWIG</a></li>
2573
- <li><a href="http://rubyforge.org/projects/redcloth/">RedCloth</a></li>
2685
+ <li><a href="http://rubyforge.org/projects/redcloth/">RedCloth</a></li>
2574
2686
  <li><a href="http://rubyforge.org/projects/coderay/">CodeRay</a></li>
2575
2687
  </ul>
2576
2688
 
@@ -2586,14 +2698,31 @@ Finished in 0.040262 seconds.
2586
2698
 
2587
2699
  <div id="hacking.manual" class="section">
2588
2700
  <h2 class="title">
2589
- <a href="#a-607496128">6.3</a>
2701
+ <a href="#a-607349668" class="ref">6.4</a>
2590
2702
 
2591
2703
  &nbsp;
2592
2704
 
2593
2705
  Editing this manual
2594
2706
  </h2>
2595
2707
 
2596
- The &#8220;doc&#8221; files inside the <tt>doc/</tt> directory are really <em>plain text</em> files that contain the source code of this manual. You can edit these files and run the <pre>rake</pre> command to automatically generate the HTML documentation you are currently viewing.
2708
+ <p>The &#8220;doc&#8221; files inside the <tt>doc/</tt> directory are really <em>plain text</em> files that contain the source code of this manual. You can edit these files and run the <pre>rake</pre> command to automatically generate the HTML documentation you are currently viewing.
2709
+
2710
+ <p>In addition, the <tt>doc/README</tt> file says: <blockquote>The *.doc files in this directory are plain-text files!</p>
2711
+ </p>
2712
+
2713
+
2714
+ <p>To transform them into XHTML, you need the following software:</p>
2715
+
2716
+
2717
+ <ul>
2718
+ <li>Rake: http://docs.rubyrake.org/</li>
2719
+ <li>RedCloth: http://whytheluckystiff.net/ruby/redcloth/</li>
2720
+ <li>Coderay: http://coderay.rubychan.de/</li>
2721
+ </ul>
2722
+
2723
+
2724
+ Once you have the above software, simply run the &#8220;rake&#8221; command.
2725
+ </blockquote>
2597
2726
 
2598
2727
  </div>
2599
2728
  </p>
@@ -2604,7 +2733,7 @@ Finished in 0.040262 seconds.
2604
2733
 
2605
2734
  <div id="problems" class="chapter">
2606
2735
  <h1 class="title">
2607
- Chapter <a href="#a-607556918">7</a>
2736
+ Chapter <a href="#a-607403828" class="ref">7</a>
2608
2737
 
2609
2738
  <br/><br/>
2610
2739
 
@@ -2619,7 +2748,7 @@ Finished in 0.040262 seconds.
2619
2748
 
2620
2749
  <div id="problem.ivl" class="section">
2621
2750
  <h2 class="title">
2622
- <a href="#a-607529318">7.1</a>
2751
+ <a href="#a-607383948" class="ref">7.1</a>
2623
2752
 
2624
2753
  &nbsp;
2625
2754
 
@@ -2634,7 +2763,7 @@ Finished in 0.040262 seconds.
2634
2763
 
2635
2764
  <div id="problems.ivl.vpi_handle_by_name.absolute-paths" class="section">
2636
2765
  <h3 class="title">
2637
- <a href="#a-607506698">7.1.1</a>
2766
+ <a href="#a-607361328" class="ref">7.1.1</a>
2638
2767
 
2639
2768
  &nbsp;
2640
2769
 
@@ -2644,7 +2773,7 @@ Finished in 0.040262 seconds.
2644
2773
  <p>In version 0.8 and snapshot 20061009 of Icarus Verilog, the <code class="code">vpi_handle_by_name</code> function requires an <em>absolute</em> path (including the name of the bench which instantiates the design) to a Verilog object. In addition, <code class="code">vpi_handle_by_name</code> always returns <code class="code"><span style="color:#038; font-weight:bold">nil</span></code> when its second parameter is specified.</p>
2645
2774
 
2646
2775
 
2647
- <p>For example, consider <a href="#ex:TestFoo">Example 14</a>. Here, one must write <code class="code">vpi_handle_by_name(<span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">TestFoo.my_foo.clk</span><span style="color:#710">&quot;</span></span>, <span style="color:#038; font-weight:bold">nil</span>)</code> instead of <code class="code">vpi_handle_by_name(<span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">my_foo.clk</span><span style="color:#710">&quot;</span></span>, <span style="color:#036; font-weight:bold">TestFoo</span>)</code> in order to access the <code class="code">clk</code> input of the <code class="code">my_foo</code> module instance.</p>
2776
+ <p>For example, consider <a href="#ex:TestFoo" class="ref">Example 16</a>. Here, one must write <code class="code">vpi_handle_by_name(<span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">TestFoo.my_foo.clk</span><span style="color:#710">&quot;</span></span>, <span style="color:#038; font-weight:bold">nil</span>)</code> instead of <code class="code">vpi_handle_by_name(<span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">my_foo.clk</span><span style="color:#710">&quot;</span></span>, <span style="color:#036; font-weight:bold">TestFoo</span>)</code> in order to access the <code class="code">clk</code> input of the <code class="code">my_foo</code> module instance.</p>
2648
2777
 
2649
2778
 
2650
2779
  <p>
@@ -2654,14 +2783,13 @@ Finished in 0.040262 seconds.
2654
2783
  <div class="example" id="ex:TestFoo">
2655
2784
 
2656
2785
 
2657
- <p class="title"><a href="#a-607503538">Example 14</a>. &nbsp; Part of a bench which instantiates a Verilog design</p>
2786
+ <p class="title"><a href="#a-607358168" class="ref">Example 16</a>. &nbsp; Part of a bench which instantiates a Verilog design</p>
2658
2787
 
2659
2788
  <pre class="code" lang="verilog">
2660
2789
  module TestFoo;
2661
2790
  reg clk_reg;
2662
2791
  Foo my_foo(.clk(clk_reg));
2663
- endmodule
2664
- </pre>
2792
+ endmodule</pre>
2665
2793
  </div>
2666
2794
  </div>
2667
2795
  </p>
@@ -2673,7 +2801,7 @@ endmodule
2673
2801
 
2674
2802
  <div id="problems.ivl.vpi_handle_by_name.connect-registers" class="section">
2675
2803
  <h3 class="title">
2676
- <a href="#a-607516388">7.1.2</a>
2804
+ <a href="#a-607371018" class="ref">7.1.2</a>
2677
2805
 
2678
2806
  &nbsp;
2679
2807
 
@@ -2683,10 +2811,10 @@ endmodule
2683
2811
  <p>In version 0.8 of Icarus Verilog, if you want to access a register in a design, then it must be connected to something (either assigned to a wire or passed as a parameter to a module instantiation). Otherwise, you will get a <code class="code"><span style="color:#038; font-weight:bold">nil</span></code> value as the result of <code class="code">vpi_handle_by_name</code> method.</p>
2684
2812
 
2685
2813
 
2686
- <p>For example, suppose you wanted to access the <code class="code">clk_reg</code> register, from the bench shown in <a href="#ex:TestFoo_bad">Example 15</a> If you execute the statement <code class="code">clk_reg = vpi_handle_by_name(<span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">TestFoo.clk_reg</span><span style="color:#710">&quot;</span></span>, <span style="color:#038; font-weight:bold">nil</span>)</code> in a specification, then you will discover that the <code class="code">vpi_handle_by_name</code> method returns <code class="code"><span style="color:#038; font-weight:bold">nil</span></code> instead of a handle to the <code class="code">clk_reg</code> register.</p>
2814
+ <p>For example, suppose you wanted to access the <code class="code">clk_reg</code> register, from the bench shown in <a href="#ex:TestFoo_bad" class="ref">Example 17</a> If you execute the statement <code class="code">clk_reg = vpi_handle_by_name(<span style="background-color:#fff0f0"><span style="color:#710">&quot;</span><span style="color:#D20">TestFoo.clk_reg</span><span style="color:#710">&quot;</span></span>, <span style="color:#038; font-weight:bold">nil</span>)</code> in a specification, then you will discover that the <code class="code">vpi_handle_by_name</code> method returns <code class="code"><span style="color:#038; font-weight:bold">nil</span></code> instead of a handle to the <code class="code">clk_reg</code> register.</p>
2687
2815
 
2688
2816
 
2689
- <p>The solution is to change the design such that it appears like the one shown in <a href="#ex:TestFoo_fix">Example 16</a> where the register is connected to a wire, or <a href="#ex:TestFoo">Example 14</a> where the register is connected to a module instantiation.</p>
2817
+ <p>The solution is to change the design such that it appears like the one shown in <a href="#ex:TestFoo_fix" class="ref">Example 18</a> where the register is connected to a wire, or <a href="#ex:TestFoo" class="ref">Example 16</a> where the register is connected to a module instantiation.</p>
2690
2818
 
2691
2819
 
2692
2820
  <p>
@@ -2696,7 +2824,7 @@ endmodule
2696
2824
  <div class="example" id="ex:TestFoo_bad">
2697
2825
 
2698
2826
 
2699
- <p class="title"><a href="#a-607509598">Example 15</a>. &nbsp; Bad design with unconnected registers</p>
2827
+ <p class="title"><a href="#a-607364228" class="ref">Example 17</a>. &nbsp; Bad design with unconnected registers</p>
2700
2828
 
2701
2829
  Here the <code class="code">clk_reg</code> register is not connected to anything.
2702
2830
 
@@ -2704,8 +2832,7 @@ endmodule
2704
2832
  <pre class="code" lang="verilog">
2705
2833
  module TestFoo;
2706
2834
  reg clk_reg;
2707
- endmodule
2708
- </pre>
2835
+ endmodule</pre>
2709
2836
  </div>
2710
2837
  </div>
2711
2838
 
@@ -2716,7 +2843,7 @@ endmodule
2716
2843
  <div class="example" id="ex:TestFoo_fix">
2717
2844
 
2718
2845
 
2719
- <p class="title"><a href="#a-607512038">Example 16</a>. &nbsp; Fixed design with wired registers</p>
2846
+ <p class="title"><a href="#a-607366668" class="ref">Example 18</a>. &nbsp; Fixed design with wired registers</p>
2720
2847
 
2721
2848
  Here the <code class="code">clk_reg</code> register is connected to the <code class="code">clk_wire</code> wire.
2722
2849
 
@@ -2726,8 +2853,7 @@ module TestFoo;
2726
2853
  reg clk_reg;
2727
2854
  wire clk_wire;
2728
2855
  assign clk_wire = clk_reg;
2729
- endmodule
2730
- </pre>
2856
+ endmodule</pre>
2731
2857
  </div>
2732
2858
  </div>
2733
2859
  </p>
@@ -2739,55 +2865,15 @@ endmodule
2739
2865
 
2740
2866
  <div id="problems.ivl.vpi_reset" class="section">
2741
2867
  <h3 class="title">
2742
- <a href="#a-607518638">7.1.3</a>
2868
+ <a href="#a-607373268" class="ref">7.1.3</a>
2743
2869
 
2744
2870
  &nbsp;
2745
2871
 
2746
- Vpi::reset
2872
+ VPI::reset
2747
2873
  </h3>
2748
2874
 
2749
2875
  In version 0.8 of Icarus Verilog, the <code class="code">vpi_control(vpiReset)</code> VPI function causes an assertion to fail inside the simulator. As a result, the simulation terminates and a core dump is produced.
2750
2876
 
2751
- </div>
2752
- </p>
2753
-
2754
- </div>
2755
-
2756
-
2757
- <hr style="display: none"/>
2758
-
2759
- <div id="problem.ncsim" class="section">
2760
- <h2 class="title">
2761
- <a href="#a-607534708">7.2</a>
2762
-
2763
- &nbsp;
2764
-
2765
- Cadence NC-Sim
2766
- </h2>
2767
-
2768
- <p>The following sections describe problems that occur when Cadence NC-Sim (version 05.83-s003) is used with Ruby-VPI.</p>
2769
-
2770
-
2771
- <p>
2772
- <hr style="display: none"/>
2773
-
2774
- <div id="problem.ncsim.vpiForceFlag" class="section">
2775
- <h3 class="title">
2776
- <a href="#a-607531748">7.2.1</a>
2777
-
2778
- &nbsp;
2779
-
2780
- Cannot force values onto handles
2781
- </h3>
2782
-
2783
- <p>When you write to a handle&#8217;s value using <code class="code">vpi_put_value()</code> with the <code class="code"><span style="color:#036; font-weight:bold">VpiForceFlag</span></code> propagation parameter, it does not have any effect. As a result, the &#8220;register_file&#8221; sample test fails when you run it with NC-Sim.</p>
2784
-
2785
-
2786
- <p>This might be a bug in NC-Sim itself: even though I specified the &#8220;+access+rwc&#8221; command-line option for NC-Sim, I&#8217;m thinking that the force/release capability is not really enabled. However, it&#8217;s more likely that there&#8217;s a bug in the &#8220;register_file&#8221; sample test.</p>
2787
-
2788
-
2789
- <p>If you happen to know the solution, please tell me either on the project forums or via e-mail (see the LICENSE file for my e-mail address). Thanks.</p>
2790
-
2791
2877
  </div>
2792
2878
  </p>
2793
2879
 
@@ -2800,7 +2886,7 @@ endmodule
2800
2886
 
2801
2887
  <div id="glossary" class="chapter">
2802
2888
  <h1 class="title">
2803
- Chapter <a href="#a-607589368">8</a>
2889
+ Chapter <a href="#a-607436278" class="ref">8</a>
2804
2890
 
2805
2891
  <br/><br/>
2806
2892
 
@@ -2812,14 +2898,14 @@ endmodule
2812
2898
 
2813
2899
  <div id="glossary.test" class="section">
2814
2900
  <h2 class="title">
2815
- <a href="#a-607559748">8.1</a>
2901
+ <a href="#a-607406658" class="ref">8.1</a>
2816
2902
 
2817
2903
  &nbsp;
2818
2904
 
2819
2905
  Test
2820
2906
  </h2>
2821
2907
 
2822
- Something that checks if a <a href="#glossary.design">design</a> satisfies a <a href="#glossary.specification">specification</a>
2908
+ Something that checks if a <a href="#glossary.design" class="ref">design</a> satisfies a <a href="#glossary.specification" class="ref">specification</a>
2823
2909
 
2824
2910
  </div>
2825
2911
 
@@ -2828,14 +2914,14 @@ endmodule
2828
2914
 
2829
2915
  <div id="glossary.design" class="section">
2830
2916
  <h2 class="title">
2831
- <a href="#a-607562248">8.2</a>
2917
+ <a href="#a-607409158" class="ref">8.2</a>
2832
2918
 
2833
2919
  &nbsp;
2834
2920
 
2835
2921
  Design
2836
2922
  </h2>
2837
2923
 
2838
- A Verilog module that is verified against a <a href="#glossary.specification">specification</a> in order to ensure correctness or soundness of its being. In other words, it is the thing being checked: does it work or not?
2924
+ A Verilog module that is verified against a <a href="#glossary.specification" class="ref">specification</a> in order to ensure correctness or soundness of its being. In other words, it is the thing being checked: does it work or not?
2839
2925
 
2840
2926
  </div>
2841
2927
 
@@ -2844,14 +2930,14 @@ endmodule
2844
2930
 
2845
2931
  <div id="glossary.specification" class="section">
2846
2932
  <h2 class="title">
2847
- <a href="#a-607565008">8.3</a>
2933
+ <a href="#a-607411918" class="ref">8.3</a>
2848
2934
 
2849
2935
  &nbsp;
2850
2936
 
2851
2937
  Specification
2852
2938
  </h2>
2853
2939
 
2854
- A set of <a href="#glossary.expectation">expectations</a> which define the desired behavior of a <a href="#glossary.design">design</a> when it is subjected to certain stimulus.
2940
+ A set of <a href="#glossary.expectation" class="ref">expectations</a> which define the desired behavior of a <a href="#glossary.design" class="ref">design</a> when it is subjected to certain stimulus.
2855
2941
 
2856
2942
  </div>
2857
2943
 
@@ -2860,7 +2946,7 @@ endmodule
2860
2946
 
2861
2947
  <div id="glossary.expectation" class="section">
2862
2948
  <h2 class="title">
2863
- <a href="#a-607567228">8.4</a>
2949
+ <a href="#a-607414138" class="ref">8.4</a>
2864
2950
 
2865
2951
  &nbsp;
2866
2952
 
@@ -2876,14 +2962,14 @@ endmodule
2876
2962
 
2877
2963
  <div id="glossary.handle" class="section">
2878
2964
  <h2 class="title">
2879
- <a href="#a-607569708">8.5</a>
2965
+ <a href="#a-607416618" class="ref">8.5</a>
2880
2966
 
2881
2967
  &nbsp;
2882
2968
 
2883
2969
  Handle
2884
2970
  </h2>
2885
2971
 
2886
- A reference to an object inside the Verilog simulation. See <a href="#vpi.handles">Section 4.3.2</a> for usage instructions.
2972
+ A reference to an object inside the Verilog simulation. See <a href="#vpi.handles" class="ref">Section 5.2.1</a> for usage instructions.
2887
2973
 
2888
2974
  </div>
2889
2975
 
@@ -2892,7 +2978,7 @@ endmodule
2892
2978
 
2893
2979
  <div id="glossary.rake" class="section">
2894
2980
  <h2 class="title">
2895
- <a href="#a-607571968">8.6</a>
2981
+ <a href="#a-607418878" class="ref">8.6</a>
2896
2982
 
2897
2983
  &nbsp;
2898
2984
 
@@ -2913,14 +2999,14 @@ endmodule
2913
2999
 
2914
3000
  <div id="glossary.RSpec" class="section">
2915
3001
  <h2 class="title">
2916
- <a href="#a-607574508">8.7</a>
3002
+ <a href="#a-607421418" class="ref">8.7</a>
2917
3003
 
2918
3004
  &nbsp;
2919
3005
 
2920
3006
  RSpec
2921
3007
  </h2>
2922
3008
 
2923
- <p>The <a href="#glossary.BDD">BDD</a> framework for Ruby.</p>
3009
+ <p>The <a href="#glossary.BDD" class="ref">BDD</a> framework for Ruby.</p>
2924
3010
 
2925
3011
 
2926
3012
  <p>See the <a href="http://rspec.rubyforge.org">RSpec website</a> and <a href="http://rspec.rubyforge.org/documentation/index.html">tutorial</a> for more information.</p>
@@ -2932,7 +3018,7 @@ endmodule
2932
3018
 
2933
3019
  <div id="glossary.TDD" class="section">
2934
3020
  <h2 class="title">
2935
- <a href="#a-607576768">8.8</a>
3021
+ <a href="#a-607423678" class="ref">8.8</a>
2936
3022
 
2937
3023
  &nbsp;
2938
3024
 
@@ -2951,7 +3037,7 @@ endmodule
2951
3037
 
2952
3038
  <div id="glossary.BDD" class="section">
2953
3039
  <h2 class="title">
2954
- <a href="#a-607579028">8.9</a>
3040
+ <a href="#a-607425938" class="ref">8.9</a>
2955
3041
 
2956
3042
  &nbsp;
2957
3043
 
@@ -2966,55 +3052,10 @@ endmodule
2966
3052
  </div>
2967
3053
 
2968
3054
  </div>
3055
+
3056
+ <br/>
3057
+ <hr/>
3058
+ This website is maintained by Suraj N. Kurapati (SNK at GNA dot ORG). This particular webpage was last updated on Mon Aug 27 19:26:43 -0700 2007.
2969
3059
  </div>
2970
-
2971
- <hr style="display: none"/>
2972
- <div id="toc">
2973
- <h1 id="toc:contents">Contents</h1>
2974
- <ul><li><span class="hide">1 </span><a id="a-607241338" href="#Ruby-VPI_18.0.2_user_manual">Ruby-VPI 18.0.2 user manual</a><ul><li><span class="hide">1.1 </span><a id="a-607234498" href="#About_this_manual">About this manual</a></li><li><span class="hide">1.2 </span><a id="a-607237028" href="#Legal_notice">Legal notice</a></li></ul></li><li><span class="hide">2 </span><a id="a-607321098" href="#intro">Welcome</a><ul><li><span class="hide">2.1 </span><a id="a-607255258" href="#resources">Resources</a><ul><li><span class="hide">2.1.1 </span><a id="a-607244578" href="#Records">Records</a></li><li><span class="hide">2.1.2 </span><a id="a-607246958" href="#Documentation">Documentation</a></li><li><span class="hide">2.1.3 </span><a id="a-607249658" href="#Facilities">Facilities</a></li></ul></li><li><span class="hide">2.2 </span><a id="a-607267568" href="#intro.features">Features</a><ul><li><span class="hide">2.2.1 </span><a id="a-607257898" href="#Portable">Portable</a></li><li><span class="hide">2.2.2 </span><a id="a-607260298" href="#Agile">Agile</a></li><li><span class="hide">2.2.3 </span><a id="a-607262698" href="#Powerful">Powerful</a></li></ul></li><li><span class="hide">2.3 </span><a id="a-607279798" href="#intro.reqs">Requirements</a><ul><li><span class="hide">2.3.1 </span><a id="a-607270208" href="#Verilog_simulator">Verilog simulator</a></li><li><span class="hide">2.3.2 </span><a id="a-607272648" href="#Compilers">Compilers</a></li><li><span class="hide">2.3.3 </span><a id="a-607274968" href="#Libraries">Libraries</a></li></ul></li><li><span class="hide">2.4 </span><a id="a-607282358" href="#intro.applications">Applications</a></li><li><span class="hide">2.5 </span><a id="a-607284958" href="#intro.appetizers">Appetizers</a></li><li><span class="hide">2.6 </span><a id="a-607287828" href="#intro.license">License</a></li><li><span class="hide">2.7 </span><a id="a-607293218" href="#intro.related-works">Related works</a><ul><li><span class="hide">2.7.1 </span><a id="a-607290278" href="#intro.related-works.pli">Ye olde PLI</a></li></ul></li></ul></li><li><span class="hide">3 </span><a id="a-607361758" href="#setup">Setup</a><ul><li><span class="hide">3.1 </span><a id="a-607324288" href="#setup.manifest">Manifest</a></li><li><span class="hide">3.2 </span><a id="a-607329728" href="#setup.reqs">Requirements</a></li><li><span class="hide">3.3 </span><a id="a-607335898" href="#setup.recom">Recommendations</a><ul><li><span class="hide">3.3.1 </span><a id="a-607332558" href="#setup.recom.merger">Text merging tool</a></li></ul></li><li><span class="hide">3.4 </span><a id="a-607345038" href="#setup.inst">Installation</a><ul><li><span class="hide">3.4.1 </span><a id="a-607340978" href="#setup.inst.windows">Installing on Windows</a></li></ul></li><li><span class="hide">3.5 </span><a id="a-607347318" href="#setup.maintenance">Maintenance</a></li></ul></li><li><span class="hide">4 </span><a id="a-607368998" href="#organization">Organization</a><ul><li><span class="hide">4.1 </span><a id="a-607370648" href="#overview.relay">Ruby/Verilog interaction</a></li><li><span class="hide">4.2 </span><a id="a-607376218" href="#organization.tests">Tests</a></li><li><span class="hide">4.3 </span><a id="a-607291858" href="#VPI_in_Ruby">VPI in Ruby</a><ul><li><span class="hide">4.3.1 </span><a id="a-607385138" href="#Deviations_from_the_VPI_standard">Deviations from the VPI standard</a><ul><li><span class="hide">4.3.1.1 </span><a id="a-607378708" href="#Names_are_capitalized">Names are capitalized</a></li><li><span class="hide">4.3.1.2 </span><a id="a-607381208" href="#a_vprintf__is__printf_"><code class="code">vprintf</code> is <code class="code">printf</code></a></li></ul></li><li><span class="hide">4.3.2 </span><a id="a-607236168" href="#vpi.handles">Handles</a><ul><li><span class="hide">4.3.2.1 </span><a id="a-607387798" href="#Shortcuts_for_productivity">Shortcuts for productivity</a></li><li><span class="hide">4.3.2.2 </span><a id="a-607390358" href="#Accessing_a_handle_s_relatives">Accessing a handle&#8217;s relatives</a></li><li><span class="hide">4.3.2.3 </span><a id="a-607393298" href="#Accessing_a_handle_s_properties">Accessing a handle&#8217;s properties</a></li></ul></li><li><span class="hide">4.3.3 </span><a id="a-607249768" href="#vpi.callbacks">Callbacks</a></li></ul></li></ul></li><li><span class="hide">5 </span><a id="a-607488938" href="#usage">Usage</a><ul><li><span class="hide">5.1 </span><a id="a-607395418" href="#usage.prototyping">Prototyping</a><ul><li><span class="hide">5.1.1 </span><a id="a-607378568" href="#Getting_started">Getting started</a></li><li><span class="hide">5.1.2 </span><a id="a-607383008" href="#How_does_prototyping_work_">How does prototyping work?</a></li></ul></li><li><span class="hide">5.2 </span><a id="a-607403488" href="#usage.debugger">Debugging</a><ul><li><span class="hide">5.2.1 </span><a id="a-607400418" href="#usage.debugger.init">Advanced initialization</a></li></ul></li><li><span class="hide">5.3 </span><a id="a-607420258" href="#usage.test-runner">Test runner</a><ul><li><span class="hide">5.3.1 </span><a id="a-607413148" href="#usage.test-runner.env-vars">Environment variables</a><ul><li><span class="hide">5.3.1.1 </span><a id="a-607406578" href="#Variables_as_command-line_arguments">Variables as command-line arguments</a></li></ul></li></ul></li><li><span class="hide">5.4 </span><a id="a-607439408" href="#usage.tools">Tools</a><ul><li><span class="hide">5.4.1 </span><a id="a-607429588" href="#usage.tools.generate">Automated test generation</a></li><li><span class="hide">5.4.2 </span><a id="a-607431878" href="#usage.tools.convert">Verilog to Ruby conversion</a></li></ul></li><li><span class="hide">5.5 </span><a id="a-607441648" href="#usage.examples">Sample tests</a></li><li><span class="hide">5.6 </span><a id="a-607314468" href="#usage.tutorial">Tutorial</a><ul><li><span class="hide">5.6.1 </span><a id="a-607449058" href="#usage.tutorial.declare-design">Start with a Verilog design</a></li><li><span class="hide">5.6.2 </span><a id="a-607459658" href="#usage.tutorial.generate-test">Generate a test</a></li><li><span class="hide">5.6.3 </span><a id="a-607469758" href="#usage.tutorial.specification">Specify your expectations</a></li><li><span class="hide">5.6.4 </span><a id="a-607475748" href="#usage.tutorial.implement-proto">Implement the prototype</a></li><li><span class="hide">5.6.5 </span><a id="a-607231778" href="#usage.tutorial.test-proto">Verify the prototype</a></li><li><span class="hide">5.6.6 </span><a id="a-607245728" href="#usage.tutorial.implement-design">Implement the design</a></li><li><span class="hide">5.6.7 </span><a id="a-607263938" href="#usage.tutorial.test-design">Verify the design</a></li></ul></li></ul></li><li><span class="hide">6 </span><a id="a-607500728" href="#hacking">Hacking</a><ul><li><span class="hide">6.1 </span><a id="a-607491268" href="#hacking.scm">Getting the source code</a></li><li><span class="hide">6.2 </span><a id="a-607493898" href="#hacking.release-packages">Building release packages</a></li><li><span class="hide">6.3 </span><a id="a-607496128" href="#hacking.manual">Editing this manual</a></li></ul></li><li><span class="hide">7 </span><a id="a-607556918" href="#problems">Known problems</a><ul><li><span class="hide">7.1 </span><a id="a-607529318" href="#problem.ivl">Icarus Verilog</a><ul><li><span class="hide">7.1.1 </span><a id="a-607506698" href="#problems.ivl.vpi_handle_by_name.absolute-paths">Give full paths to Verilog objects</a></li><li><span class="hide">7.1.2 </span><a id="a-607516388" href="#problems.ivl.vpi_handle_by_name.connect-registers">Registers must be connected</a></li><li><span class="hide">7.1.3 </span><a id="a-607518638" href="#problems.ivl.vpi_reset">Vpi::reset</a></li></ul></li><li><span class="hide">7.2 </span><a id="a-607534708" href="#problem.ncsim">Cadence NC-Sim</a><ul><li><span class="hide">7.2.1 </span><a id="a-607531748" href="#problem.ncsim.vpiForceFlag">Cannot force values onto handles</a></li></ul></li></ul></li><li><span class="hide">8 </span><a id="a-607589368" href="#glossary">Glossary</a><ul><li><span class="hide">8.1 </span><a id="a-607559748" href="#glossary.test">Test</a></li><li><span class="hide">8.2 </span><a id="a-607562248" href="#glossary.design">Design</a></li><li><span class="hide">8.3 </span><a id="a-607565008" href="#glossary.specification">Specification</a></li><li><span class="hide">8.4 </span><a id="a-607567228" href="#glossary.expectation">Expectation</a></li><li><span class="hide">8.5 </span><a id="a-607569708" href="#glossary.handle">Handle</a></li><li><span class="hide">8.6 </span><a id="a-607571968" href="#glossary.rake">Rake</a></li><li><span class="hide">8.7 </span><a id="a-607574508" href="#glossary.RSpec">RSpec</a></li><li><span class="hide">8.8 </span><a id="a-607576768" href="#glossary.TDD">Test driven development</a></li><li><span class="hide">8.9 </span><a id="a-607579028" href="#glossary.BDD">Behavior driven development</a></li></ul></li></ul>
2975
-
2976
- <h1 id="toc:tip">Tips</h1>
2977
- <ol>
2978
- <li><a href="#Add_support_for_your_Verilog_simulator" id="a-607326758">Add support for your Verilog simulator</a></li>
2979
- <li><a href="#Tuning_for_maximum_performance" id="a-607338448">Tuning for maximum performance</a></li>
2980
- <li><a href="#Using__kdiff3__with_the_automated_test_generator." id="a-607425508">Using <strong>kdiff3</strong> with the automated test generator.</a></li>
2981
- <li><a href="#What_can_the_test_runner_do_" id="a-607223748">What can the test runner do?</a></li>
2982
- </ol>
2983
- <h1 id="toc:caution">Cautions</h1>
2984
- <ol>
2985
- <li><a href="#Do_not_rename_generated_files" id="a-607423018">Do not rename generated files</a></li>
2986
- </ol>
2987
- <h1 id="toc:figure">Figures</h1>
2988
- <ol>
2989
- <li><a href="#fig:organization.detail" id="a-607364358">Where does Ruby-VPI fit in?</a></li>
2990
- <li><a href="#fig:ruby_relay" id="a-607367168">Interaction between Ruby and Verilog</a></li>
2991
- <li><a href="#fig:organization" id="a-607373118">Organization of a test in Ruby-VPI</a></li>
2992
- <li><a href="#fig:method_naming_format" id="a-607396098">Method naming format for accessing a handle&#8217;s properties</a></li>
2993
- </ol>
2994
- <h1 id="toc:table">Tables</h1>
2995
- <ol>
2996
- <li><a href="#tbl:accessors" id="a-607398528">Possible accessors and their implications</a></li>
2997
- <li><a href="#ex:properties" id="a-607223948">Examples of accessing a handle&#8217;s properties</a></li>
2998
- </ol>
2999
- <h1 id="toc:example">Examples</h1>
3000
- <ol>
3001
- <li><a href="#ex:callback" id="a-607242918">Using a callback for value change notification</a></li>
3002
- <li><a href="#Running_a_test_with_environment_variables" id="a-607408978">Running a test with environment variables</a></li>
3003
- <li><a href="#fig:counter.v_decl" id="a-607445548">Declaration of a simple up-counter with synchronous reset</a></li>
3004
- <li><a href="#fig:generate-test.RSpec" id="a-607452398">Generating a test with specification in RSpec format</a></li>
3005
- <li><a href="#fig:generate-test.xUnit" id="a-607454858">Generating a test with specification in xUnit format</a></li>
3006
- <li><a href="#fig:RSpec_counter_spec.rb" id="a-607462568">Specification implemented in RSpec format</a></li>
3007
- <li><a href="#fig:xUnit_counter_spec.rb" id="a-607464928">Specification implemented in xUnit format</a></li>
3008
- <li><a href="#fig:counter_proto.rb" id="a-607472348">Ruby prototype of our Verilog design</a></li>
3009
- <li><a href="#fig:test-proto.RSpec" id="a-607478868">Running a test with specification in RSpec format</a></li>
3010
- <li><a href="#fig:test-proto.unit-test" id="a-607481368">Running a test with specification in xUnit format</a></li>
3011
- <li><a href="#fig:counter.v_impl" id="a-607235998">Implementation of a simple up-counter with synchronous reset</a></li>
3012
- <li><a href="#fig:test-design.RSpec" id="a-607252508">Running a test with specification in RSpec format</a></li>
3013
- <li><a href="#fig:test-design.unit-test" id="a-607255018">Running a test with specification in xUnit format</a></li>
3014
- <li><a href="#ex:TestFoo" id="a-607503538">Part of a bench which instantiates a Verilog design</a></li>
3015
- <li><a href="#ex:TestFoo_bad" id="a-607509598">Bad design with unconnected registers</a></li>
3016
- <li><a href="#ex:TestFoo_fix" id="a-607512038">Fixed design with wired registers</a></li>
3017
- </ol>
3018
- </div>
3019
- </body>
3060
+ </body>
3020
3061
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