rggen-systemverilog 0.19.0 → 0.20.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (53) hide show
  1. checksums.yaml +4 -4
  2. data/lib/rggen/systemverilog/common.rb +2 -2
  3. data/lib/rggen/systemverilog/common/component.rb +2 -6
  4. data/lib/rggen/systemverilog/common/feature.rb +39 -26
  5. data/lib/rggen/systemverilog/common/utility/interface_port.rb +7 -3
  6. data/lib/rggen/systemverilog/common/utility/local_scope.rb +2 -2
  7. data/lib/rggen/systemverilog/common/utility/structure_definition.rb +1 -3
  8. data/lib/rggen/systemverilog/ral.rb +4 -1
  9. data/lib/rggen/systemverilog/ral/bit_field/type.rb +15 -10
  10. data/lib/rggen/systemverilog/ral/bit_field/type/rwe_rwl.rb +1 -11
  11. data/lib/rggen/systemverilog/ral/feature.rb +4 -4
  12. data/lib/rggen/systemverilog/ral/register/type.rb +10 -52
  13. data/lib/rggen/systemverilog/ral/register/type/default.erb +1 -1
  14. data/lib/rggen/systemverilog/ral/register/type/external.rb +6 -10
  15. data/lib/rggen/systemverilog/ral/register/type/indirect.erb +3 -3
  16. data/lib/rggen/systemverilog/ral/register/type/indirect.rb +5 -2
  17. data/lib/rggen/systemverilog/ral/register_block/sv_ral_model.erb +8 -0
  18. data/lib/rggen/systemverilog/ral/register_block/sv_ral_model.rb +36 -0
  19. data/lib/rggen/systemverilog/ral/register_block/sv_ral_package.rb +1 -32
  20. data/lib/rggen/systemverilog/ral/register_common.rb +46 -0
  21. data/lib/rggen/systemverilog/ral/register_file/sv_ral_model.erb +8 -0
  22. data/lib/rggen/systemverilog/ral/register_file/sv_ral_model.rb +57 -0
  23. data/lib/rggen/systemverilog/ral/setup.rb +2 -1
  24. data/lib/rggen/systemverilog/rtl.rb +4 -1
  25. data/lib/rggen/systemverilog/rtl/bit_field/sv_rtl_top.rb +34 -19
  26. data/lib/rggen/systemverilog/rtl/bit_field/type.rb +1 -5
  27. data/lib/rggen/systemverilog/rtl/bit_field/type/rc_w0c_w1c.rb +3 -3
  28. data/lib/rggen/systemverilog/rtl/bit_field/type/ro.rb +1 -1
  29. data/lib/rggen/systemverilog/rtl/bit_field/type/rs_w0s_w1s.rb +2 -2
  30. data/lib/rggen/systemverilog/rtl/bit_field/type/rw_w1_wo_wo1.rb +1 -1
  31. data/lib/rggen/systemverilog/rtl/bit_field/type/rwc.rb +2 -2
  32. data/lib/rggen/systemverilog/rtl/bit_field/type/rwe.rb +2 -2
  33. data/lib/rggen/systemverilog/rtl/bit_field/type/rwl.rb +2 -2
  34. data/lib/rggen/systemverilog/rtl/bit_field/type/rws.rb +3 -3
  35. data/lib/rggen/systemverilog/rtl/bit_field/type/w0crs_w1crs.rb +1 -1
  36. data/lib/rggen/systemverilog/rtl/bit_field/type/w0src_w1src.rb +1 -1
  37. data/lib/rggen/systemverilog/rtl/bit_field/type/w0trg_w1trg.rb +1 -1
  38. data/lib/rggen/systemverilog/rtl/feature.rb +12 -16
  39. data/lib/rggen/systemverilog/rtl/partial_sum.rb +29 -0
  40. data/lib/rggen/systemverilog/rtl/register/sv_rtl_top.rb +10 -47
  41. data/lib/rggen/systemverilog/rtl/register/type.rb +25 -1
  42. data/lib/rggen/systemverilog/rtl/register/type/external.rb +10 -10
  43. data/lib/rggen/systemverilog/rtl/register/type/indirect.rb +2 -2
  44. data/lib/rggen/systemverilog/rtl/register_block/protocol.rb +2 -2
  45. data/lib/rggen/systemverilog/rtl/register_block/protocol/apb.rb +13 -14
  46. data/lib/rggen/systemverilog/rtl/register_block/protocol/axi4lite.rb +23 -25
  47. data/lib/rggen/systemverilog/rtl/register_block/sv_rtl_top.rb +11 -10
  48. data/lib/rggen/systemverilog/rtl/register_file/sv_rtl_top.rb +30 -0
  49. data/lib/rggen/systemverilog/rtl/register_index.rb +112 -0
  50. data/lib/rggen/systemverilog/rtl/setup.rb +1 -0
  51. data/lib/rggen/systemverilog/version.rb +1 -1
  52. metadata +11 -4
  53. data/lib/rggen/systemverilog/ral/register_block/sv_ral_block_model.erb +0 -11
checksums.yaml CHANGED
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@@ -28,10 +28,10 @@ module RgGen
28
28
  def self.register_component(builder, name, feature_class)
29
29
  builder.output_component_registry(name) do
30
30
  register_component [
31
- :register_map, :register_block, :register, :bit_field
31
+ :root, :register_block, :register_file, :register, :bit_field
32
32
  ] do |category|
33
33
  component Component, ComponentFactory
34
- feature feature_class, FeatureFactory if category != :register_map
34
+ feature feature_class, FeatureFactory if category != :root
35
35
  end
36
36
  end
37
37
  end
@@ -4,12 +4,8 @@ module RgGen
4
4
  module SystemVerilog
5
5
  module Common
6
6
  class Component < Core::OutputBase::Component
7
- def declarations(domain, type)
8
- body = ->(r) { r.declarations(domain, type) }
9
- [
10
- @features.each_value.map(&body),
11
- @children.map(&body)
12
- ].flatten
7
+ def declarations
8
+ @declarations ||= Hash.new { |h, k| h[k] = [] }
13
9
  end
14
10
 
15
11
  def package_imports(domain)
@@ -8,26 +8,25 @@ module RgGen
8
8
  template_engine Core::OutputBase::ERBEngine
9
9
 
10
10
  EntityContext =
11
- Struct.new(:entity_type, :creation_method, :declaration_type)
11
+ Struct.new(:entity_type, :method, :declaration_type, :default_layer)
12
12
 
13
13
  class << self
14
14
  private
15
15
 
16
- def define_entity(entity_type, creation_method, declaration_type)
16
+ def define_entity(entity_type, method, declaration_type, default_layer)
17
17
  context =
18
- EntityContext.new(entity_type, creation_method, declaration_type)
19
- define_method(entity_type) do |domain, name, attributes = {}, &block|
20
- entity =
21
- create_entity(context, { name: name }.merge(attributes), &block)
22
- add_entity(entity, context, domain, name)
18
+ EntityContext.new(entity_type, method, declaration_type, default_layer)
19
+ define_method(entity_type) do |name, *args, &block|
20
+ if args.size >= 3
21
+ message = 'wrong number of arguments ' \
22
+ "(given #{args.size + 1}, expected 1..3)"
23
+ raise ArgumentError.new(message)
24
+ end
25
+ define_entity(context, name, args, &block)
23
26
  end
24
27
  end
25
28
  end
26
29
 
27
- def declarations(domain, type)
28
- @declarations[domain][type]
29
- end
30
-
31
30
  def package_imports(domain)
32
31
  @package_imports[domain]
33
32
  end
@@ -36,30 +35,44 @@ module RgGen
36
35
 
37
36
  def post_initialize
38
37
  super
39
- @declarations = Hash.new do |h0, k0|
40
- h0[k0] = Hash.new { |h1, k1| h1[k1] = [] }
41
- end
42
38
  @package_imports = Hash.new { |h, k| h[k] = [] }
43
39
  end
44
40
 
45
- def create_entity(context, attributes, &block)
46
- creation_method = context.creation_method
47
- entity_type = context.entity_type
48
- __send__(creation_method, entity_type, attributes, &block)
41
+ def define_entity(context, name, args, &block)
42
+ layer, attributes = parse_entity_arguments(args)
43
+ entity = create_entity(context, name, attributes, &block)
44
+ add_entity(context, entity, name, layer)
45
+ end
46
+
47
+ def parse_entity_arguments(args)
48
+ if args.empty?
49
+ [nil, nil]
50
+ elsif args.size == 1 && args.first.is_a?(Hash)
51
+ [nil, args.first]
52
+ elsif args.size == 1
53
+ [args.first, nil]
54
+ else
55
+ args[0..1]
56
+ end
57
+ end
58
+
59
+ def create_entity(context, name, attributes, &block)
60
+ merged_attributes = { name: name }.merge(Hash(attributes))
61
+ __send__(context.method, context.entity_type, merged_attributes, &block)
49
62
  end
50
63
 
51
- def add_entity(entity, context, domain, name)
52
- add_declaration(context, domain, entity.declaration)
53
- add_identifier(name, entity.identifier)
64
+ def add_entity(context, entity, name, layer)
65
+ add_declaration(context, entity, layer)
66
+ add_identifier(entity, name)
54
67
  end
55
68
 
56
- def add_declaration(context, domain, declaration)
57
- declaration_type = context.declaration_type
58
- @declarations[domain][declaration_type] << declaration
69
+ def add_declaration(context, entity, layer)
70
+ (layer || instance_exec(&context.default_layer))
71
+ .declarations[context.declaration_type] << entity.declaration
59
72
  end
60
73
 
61
- def add_identifier(name, identifier)
62
- instance_variable_set("@#{name}", identifier)
74
+ def add_identifier(entity, name)
75
+ instance_variable_set("@#{name}", entity.identifier)
63
76
  attr_singleton_reader(name)
64
77
  export(name)
65
78
  end
@@ -17,9 +17,13 @@ module RgGen
17
17
  define_attribute :modport
18
18
  define_attribute :array_size
19
19
 
20
- def modport(name, ports = nil)
21
- @modport_name = name
22
- @modport_ports = ports
20
+ def modport(name_and_ports, ports = nil)
21
+ @modport_name, @modport_ports =
22
+ if ports
23
+ [name_and_ports, ports]
24
+ else
25
+ Array(name_and_ports)[0..1]
26
+ end
23
27
  end
24
28
 
25
29
  def declaration
@@ -10,8 +10,8 @@ module RgGen
10
10
  define_attribute :variables
11
11
  define_attribute :loop_size
12
12
 
13
- def top_scope
14
- @top_scope = true
13
+ def top_scope(value = true)
14
+ @top_scope = value
15
15
  end
16
16
 
17
17
  private
@@ -4,9 +4,7 @@ module RgGen
4
4
  module SystemVerilog
5
5
  module Common
6
6
  module Utility
7
- class StructureDefinition <
8
- Core::Utility::CodeUtility::StructureDefinition
9
-
7
+ class StructureDefinition < Core::Utility::CodeUtility::StructureDefinition
10
8
  include Core::Utility::AttributeSetter
11
9
 
12
10
  def initialize(default_attributes = {}, &block)
@@ -2,6 +2,7 @@
2
2
 
3
3
  require_relative 'common'
4
4
  require_relative 'ral/feature'
5
+ require_relative 'ral/register_common'
5
6
 
6
7
  module RgGen
7
8
  module SystemVerilog
@@ -15,7 +16,9 @@ module RgGen
15
16
  'ral/register/type',
16
17
  'ral/register/type/external',
17
18
  'ral/register/type/indirect',
18
- 'ral/register_block/sv_ral_package'
19
+ 'ral/register_block/sv_ral_model',
20
+ 'ral/register_block/sv_ral_package',
21
+ 'ral/register_file/sv_ral_model'
19
22
  ].freeze
20
23
 
21
24
  def self.version
@@ -17,11 +17,9 @@ RgGen.define_list_feature(:bit_field, :type) do
17
17
  export :constructors
18
18
 
19
19
  build do
20
- variable :register, :ral_model, {
21
- name: bit_field.name,
22
- data_type: model_name,
23
- array_size: array_size,
24
- random: true
20
+ variable :ral_model, {
21
+ name: bit_field.name, data_type: model_name,
22
+ array_size: array_size, random: true
25
23
  }
26
24
  end
27
25
 
@@ -36,9 +34,7 @@ RgGen.define_list_feature(:bit_field, :type) do
36
34
 
37
35
  def constructors
38
36
  (bit_field.sequence_size&.times || [nil]).map do |index|
39
- macro_call(
40
- :rggen_ral_create_field_model, arguments(index)
41
- )
37
+ macro_call(:rggen_ral_create_field, arguments(index))
42
38
  end
43
39
  end
44
40
 
@@ -50,8 +46,8 @@ RgGen.define_list_feature(:bit_field, :type) do
50
46
 
51
47
  def arguments(index)
52
48
  [
53
- ral_model[index], bit_field.lsb(index), bit_field.width,
54
- access, volatile, reset_value(index), valid_reset
49
+ ral_model[index], bit_field.lsb(index), bit_field.width, string(access),
50
+ volatile, reset_value(index), valid_reset, index || -1, string(reference)
55
51
  ]
56
52
  end
57
53
 
@@ -68,6 +64,15 @@ RgGen.define_list_feature(:bit_field, :type) do
68
64
  def valid_reset
69
65
  bit_field.initial_value? && 1 || 0
70
66
  end
67
+
68
+ def reference
69
+ if bit_field.reference?
70
+ reference_field = bit_field.reference
71
+ [reference_field.register.full_name('.'), reference_field.name].join('.')
72
+ else
73
+ ''
74
+ end
75
+ end
71
76
  end
72
77
 
73
78
  default_feature do
@@ -3,17 +3,7 @@
3
3
  RgGen.define_list_item_feature(:bit_field, :type, [:rwe, :rwl]) do
4
4
  sv_ral do
5
5
  model_name do
6
- "rggen_ral_#{bit_field.type}_field #(#{reference_names})"
7
- end
8
-
9
- private
10
-
11
- def reference_names
12
- reference = bit_field.reference
13
- register = reference&.register
14
- [register&.name, reference&.name]
15
- .map { |name| string(name) }
16
- .join(', ')
6
+ "rggen_ral_#{bit_field.type}_field"
17
7
  end
18
8
  end
19
9
  end
@@ -6,18 +6,18 @@ module RgGen
6
6
  class Feature < Common::Feature
7
7
  private
8
8
 
9
- def create_variable(_, attributes = {}, &block)
9
+ def create_variable(_, attributes, &block)
10
10
  DataObject.new(
11
11
  :variable, attributes.merge(array_format: :unpacked), &block
12
12
  )
13
13
  end
14
14
 
15
- def create_parameter(_, attributes = {}, &block)
15
+ def create_parameter(_, attributes, &block)
16
16
  DataObject.new(:parameter, attributes, &block)
17
17
  end
18
18
 
19
- define_entity :variable, :create_variable, :variable
20
- define_entity :parameter, :create_parameter, :parameter
19
+ define_entity :variable, :create_variable, :variable, -> { component.parent }
20
+ define_entity :parameter, :create_parameter, :parameter, -> { component.parent }
21
21
  end
22
22
  end
23
23
  end
@@ -3,6 +3,8 @@
3
3
  RgGen.define_list_feature(:register, :type) do
4
4
  sv_ral do
5
5
  base_feature do
6
+ include RgGen::SystemVerilog::RAL::RegisterCommon
7
+
6
8
  define_helpers do
7
9
  def model_name(&body)
8
10
  @model_name = body if block_given?
@@ -14,14 +16,6 @@ RgGen.define_list_feature(:register, :type) do
14
16
  @offset_address
15
17
  end
16
18
 
17
- def unmapped
18
- @unmapped = true
19
- end
20
-
21
- def unmapped?
22
- !@unmapped.nil?
23
- end
24
-
25
19
  def constructor(&body)
26
20
  @constructor = body if block_given?
27
21
  @constructor
@@ -31,18 +25,14 @@ RgGen.define_list_feature(:register, :type) do
31
25
  export :constructors
32
26
 
33
27
  build do
34
- variable :register_block, :ral_model, {
35
- name: register.name,
36
- data_type: model_name,
37
- array_size: register.array_size,
38
- random: true
28
+ variable :ral_model, {
29
+ name: register.name, data_type: model_name,
30
+ array_size: register.array_size, random: true
39
31
  }
40
32
  end
41
33
 
42
34
  def constructors
43
- (array_index_list || [nil]).map.with_index do |array_index, i|
44
- constructor_code(array_index, i)
45
- end
35
+ array_indices.map.with_index(&method(:constructor_code))
46
36
  end
47
37
 
48
38
  private
@@ -51,45 +41,25 @@ RgGen.define_list_feature(:register, :type) do
51
41
  if helper.model_name
52
42
  instance_eval(&helper.model_name)
53
43
  else
54
- "#{register.name}_reg_model"
44
+ "#{register.full_name('_')}_reg_model"
55
45
  end
56
46
  end
57
47
 
58
- def array_index_list
59
- (register.array? || nil) &&
60
- begin
61
- index_table = register.array_size.map { |size| (0...size).to_a }
62
- index_table[0].product(*index_table[1..-1])
63
- end
64
- end
65
-
66
48
  def constructor_code(array_index, index)
67
49
  if helper.constructor
68
50
  instance_exec(array_index, index, &helper.constructor)
69
51
  else
70
- macro_call(
71
- :rggen_ral_create_reg_model, arguments(array_index, index)
72
- )
52
+ macro_call(:rggen_ral_create_reg, arguments(array_index, index))
73
53
  end
74
54
  end
75
55
 
76
56
  def arguments(array_index, index)
77
57
  [
78
58
  ral_model[array_index], array(array_index), offset_address(index),
79
- access_rights, unmapped, hdl_path(array_index)
59
+ string(access_rights), string(hdl_path(array_index))
80
60
  ]
81
61
  end
82
62
 
83
- def offset_address(index = 0)
84
- address =
85
- if helper.offset_address
86
- instance_exec(index, &helper.offset_address)
87
- else
88
- register.offset_address + register.byte_width * index
89
- end
90
- hex(address, register_block.local_address_width)
91
- end
92
-
93
63
  def access_rights
94
64
  if read_only?
95
65
  'RO'
@@ -108,20 +78,8 @@ RgGen.define_list_feature(:register, :type) do
108
78
  register.writable? && !register.readable?
109
79
  end
110
80
 
111
- def unmapped
112
- helper.unmapped? && 1 || 0
113
- end
114
-
115
- def hdl_path(array_index)
116
- [
117
- "g_#{register.name}",
118
- *Array(array_index).map { |i| "g[#{i}]" },
119
- 'u_register'
120
- ].join('.')
121
- end
122
-
123
81
  def variables
124
- register.declarations(:register, :variable)
82
+ register.declarations[:variable]
125
83
  end
126
84
 
127
85
  def field_model_constructors
@@ -4,5 +4,5 @@ endfunction
4
4
  function void build();
5
5
  <% field_model_constructors.each do |constructor| %>
6
6
  <%= constructor %>
7
- <% end%>
7
+ <% end %>
8
8
  endfunction
@@ -3,15 +3,11 @@
3
3
  RgGen.define_list_item_feature(:register, :type, :external) do
4
4
  sv_ral do
5
5
  build do
6
- parameter :register_block, :model_type, {
7
- name: model_name,
8
- data_type: 'type',
9
- default: 'rggen_ral_block'
6
+ parameter :model_type, {
7
+ name: model_name, data_type: 'type', default: 'rggen_ral_block'
10
8
  }
11
- parameter :register_block, :integrate_model, {
12
- name: "INTEGRATE_#{model_name}",
13
- data_type: 'bit',
14
- default: 1
9
+ parameter :integrate_model, {
10
+ name: "INTEGRATE_#{model_name}", data_type: 'bit', default: 1
15
11
  }
16
12
  end
17
13
 
@@ -19,8 +15,8 @@ RgGen.define_list_item_feature(:register, :type, :external) do
19
15
 
20
16
  constructor do
21
17
  macro_call(
22
- 'rggen_ral_create_block_model',
23
- [ral_model, offset_address, 'this', integrate_model]
18
+ 'rggen_ral_create_block',
19
+ [ral_model, offset_address(0), 'this', integrate_model]
24
20
  )
25
21
  end
26
22
  end