passenger 5.3.3 → 5.3.4

data/src/cxx_supportlib/vendor-modified/boost/atomic/detail/ops_gcc_ppc_common.hpp

@@ -0,0 +1,70 @@
+/*
+ * Distributed under the Boost Software License, Version 1.0.
+ * (See accompanying file LICENSE_1_0.txt or copy at
+ * http://www.boost.org/LICENSE_1_0.txt)
+ *
+ * Copyright (c) 2009 Helge Bahmann
+ * Copyright (c) 2013 Tim Blechmann
+ * Copyright (c) 2014 Andrey Semashev
+ */
+/*!
+ * \file   atomic/detail/ops_gcc_ppc_common.hpp
+ *
+ * This header contains basic utilities for gcc PowerPC backend.
+ */
+
+#ifndef BOOST_ATOMIC_DETAIL_OPS_GCC_PPC_COMMON_HPP_INCLUDED_
+#define BOOST_ATOMIC_DETAIL_OPS_GCC_PPC_COMMON_HPP_INCLUDED_
+
+#include <boost/memory_order.hpp>
+#include <boost/atomic/detail/config.hpp>
+
+#ifdef BOOST_HAS_PRAGMA_ONCE
+#pragma once
+#endif
+
+namespace boost {
+namespace atomics {
+namespace detail {
+
+// The implementation below uses information from this document:
+// http://www.rdrop.com/users/paulmck/scalability/paper/N2745r.2010.02.19a.html
+
+// A note about memory_order_consume. Technically, this architecture allows to avoid
+// unnecessary memory barrier after consume load since it supports data dependency ordering.
+// However, some compiler optimizations may break a seemingly valid code relying on data
+// dependency tracking by injecting bogus branches to aid out of order execution.
+// This may happen not only in Boost.Atomic code but also in user's code, which we have no
+// control of. See this thread: http://lists.boost.org/Archives/boost/2014/06/213890.php.
+// For this reason we promote memory_order_consume to memory_order_acquire.
+
+struct gcc_ppc_operations_base
+{
+    static BOOST_CONSTEXPR_OR_CONST bool full_cas_based = false;
+    static BOOST_CONSTEXPR_OR_CONST bool is_always_lock_free = true;
+
+    static BOOST_FORCEINLINE void fence_before(memory_order order) BOOST_NOEXCEPT
+    {
+#if defined(__powerpc64__) || defined(__PPC64__)
+        if (order == memory_order_seq_cst)
+            __asm__ __volatile__ ("sync" ::: "memory");
+        else if ((static_cast< unsigned int >(order) & static_cast< unsigned int >(memory_order_release)) != 0u)
+            __asm__ __volatile__ ("lwsync" ::: "memory");
+#else
+        if ((static_cast< unsigned int >(order) & static_cast< unsigned int >(memory_order_release)) != 0u)
+            __asm__ __volatile__ ("sync" ::: "memory");
+#endif
+    }
+
+    static BOOST_FORCEINLINE void fence_after(memory_order order) BOOST_NOEXCEPT
+    {
+        if ((static_cast< unsigned int >(order) & (static_cast< unsigned int >(memory_order_consume) | static_cast< unsigned int >(memory_order_acquire))) != 0u)
+            __asm__ __volatile__ ("isync" ::: "memory");
+    }
+};
+
+} // namespace detail
+} // namespace atomics
+} // namespace boost
+
+#endif // BOOST_ATOMIC_DETAIL_OPS_GCC_PPC_COMMON_HPP_INCLUDED_

data/src/cxx_supportlib/vendor-modified/boost/atomic/detail/ops_gcc_sparc.hpp

@@ -16,6 +16,7 @@
 #ifndef BOOST_ATOMIC_DETAIL_OPS_GCC_SPARC_HPP_INCLUDED_
 #define BOOST_ATOMIC_DETAIL_OPS_GCC_SPARC_HPP_INCLUDED_
 
+#include <cstddef>
 #include <boost/memory_order.hpp>
 #include <boost/atomic/detail/config.hpp>
 #include <boost/atomic/detail/storage_type.hpp>
@@ -34,13 +35,14 @@ namespace detail {
 
 struct gcc_sparc_cas_base
 {
+    static BOOST_CONSTEXPR_OR_CONST bool full_cas_based = true;
     static BOOST_CONSTEXPR_OR_CONST bool is_always_lock_free = true;
 
     static BOOST_FORCEINLINE void fence_before(memory_order order) BOOST_NOEXCEPT
     {
         if (order == memory_order_seq_cst)
             __asm__ __volatile__ ("membar #Sync" ::: "memory");
-        else if ((order & memory_order_release) != 0)
+        else if ((static_cast< unsigned int >(order) & static_cast< unsigned int >(memory_order_release)) != 0u)
             __asm__ __volatile__ ("membar #StoreStore | #LoadStore" ::: "memory");
     }
 
@@ -48,7 +50,7 @@ struct gcc_sparc_cas_base
     {
         if (order == memory_order_seq_cst)
             __asm__ __volatile__ ("membar #Sync" ::: "memory");
-        else if ((order & (memory_order_consume | memory_order_acquire)) != 0)
+        else if ((static_cast< unsigned int >(order) & (static_cast< unsigned int >(memory_order_consume) | static_cast< unsigned int >(memory_order_acquire))) != 0u)
             __asm__ __volatile__ ("membar #StoreStore | #LoadStore" ::: "memory");
     }
 
@@ -63,8 +65,11 @@ template< bool Signed >
 struct gcc_sparc_cas32 :
     public gcc_sparc_cas_base
 {
-    typedef typename make_storage_type< 4u, Signed >::type storage_type;
-    typedef typename make_storage_type< 4u, Signed >::aligned aligned_storage_type;
+    typedef typename make_storage_type< 4u >::type storage_type;
+    typedef typename make_storage_type< 4u >::aligned aligned_storage_type;
+
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 4u;
+    static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -120,11 +125,6 @@ struct gcc_sparc_cas32 :
         fence_after(order);
         return v;
     }
-
-    static BOOST_FORCEINLINE bool is_lock_free(storage_type const volatile&) BOOST_NOEXCEPT
-    {
-        return true;
-    }
 };
 
 template< bool Signed >
@@ -149,8 +149,11 @@ template< bool Signed >
 struct gcc_sparc_cas64 :
     public gcc_sparc_cas_base
 {
-    typedef typename make_storage_type< 8u, Signed >::type storage_type;
-    typedef typename make_storage_type< 8u, Signed >::aligned aligned_storage_type;
+    typedef typename make_storage_type< 8u >::type storage_type;
+    typedef typename make_storage_type< 8u >::aligned aligned_storage_type;
+
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 8u;
+    static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -192,11 +195,6 @@ struct gcc_sparc_cas64 :
     {
         return compare_exchange_strong(storage, expected, desired, success_order, failure_order);
     }
-
-    static BOOST_FORCEINLINE bool is_lock_free(storage_type const volatile&) BOOST_NOEXCEPT
-    {
-        return true;
-    }
 };
 
 template< bool Signed >

data/src/cxx_supportlib/vendor-modified/boost/atomic/detail/ops_gcc_sync.hpp

@@ -16,6 +16,7 @@
 #ifndef BOOST_ATOMIC_DETAIL_OPS_GCC_SYNC_HPP_INCLUDED_
 #define BOOST_ATOMIC_DETAIL_OPS_GCC_SYNC_HPP_INCLUDED_
 
+#include <cstddef>
 #include <boost/memory_order.hpp>
 #include <boost/atomic/detail/config.hpp>
 #include <boost/atomic/detail/storage_type.hpp>
@@ -33,11 +34,12 @@ namespace detail {
 
 struct gcc_sync_operations_base
 {
+    static BOOST_CONSTEXPR_OR_CONST bool full_cas_based = false;
     static BOOST_CONSTEXPR_OR_CONST bool is_always_lock_free = true;
 
     static BOOST_FORCEINLINE void fence_before_store(memory_order order) BOOST_NOEXCEPT
     {
-        if ((order & memory_order_release) != 0)
+        if ((static_cast< unsigned int >(order) & static_cast< unsigned int >(memory_order_release)) != 0u)
             __sync_synchronize();
     }
 
@@ -49,16 +51,20 @@ struct gcc_sync_operations_base
 
     static BOOST_FORCEINLINE void fence_after_load(memory_order order) BOOST_NOEXCEPT
     {
-        if ((order & (memory_order_acquire | memory_order_consume)) != 0)
+        if ((static_cast< unsigned int >(order) & (static_cast< unsigned int >(memory_order_acquire) | static_cast< unsigned int >(memory_order_consume))) != 0u)
             __sync_synchronize();
     }
 };
 
-template< typename T >
+template< std::size_t Size, bool Signed >
 struct gcc_sync_operations :
     public gcc_sync_operations_base
 {
-    typedef T storage_type;
+    typedef typename make_storage_type< Size >::type storage_type;
+    typedef typename make_storage_type< Size >::aligned aligned_storage_type;
+
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = Size;
+    static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -89,7 +95,7 @@ struct gcc_sync_operations :
         // GCC docs mention that not all architectures may support full exchange semantics for this intrinsic. However, GCC's implementation of
         // std::atomic<> uses this intrinsic unconditionally. We do so as well. In case if some architectures actually don't support this, we can always
         // add a check here and fall back to a CAS loop.
-        if ((order & memory_order_release) != 0)
+        if ((static_cast< unsigned int >(order) & static_cast< unsigned int >(memory_order_release)) != 0u)
             __sync_synchronize();
         return __sync_lock_test_and_set(&storage, v);
     }
@@ -134,7 +140,7 @@ struct gcc_sync_operations :
 
     static BOOST_FORCEINLINE bool test_and_set(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
     {
-        if ((order & memory_order_release) != 0)
+        if ((static_cast< unsigned int >(order) & static_cast< unsigned int >(memory_order_release)) != 0u)
             __sync_synchronize();
         return !!__sync_lock_test_and_set(&storage, 1);
     }
@@ -145,39 +151,23 @@ struct gcc_sync_operations :
         if (order == memory_order_seq_cst)
             __sync_synchronize();
     }
-
-    static BOOST_FORCEINLINE bool is_lock_free(storage_type const volatile&) BOOST_NOEXCEPT
-    {
-        return true;
-    }
 };
 
 #if BOOST_ATOMIC_INT8_LOCK_FREE > 0
 template< bool Signed >
 struct operations< 1u, Signed > :
 #if defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1)
-    public gcc_sync_operations< typename make_storage_type< 1u, Signed >::type >
+    public gcc_sync_operations< 1u, Signed >
 #elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2)
-    public extending_cas_based_operations< gcc_sync_operations< typename make_storage_type< 2u, Signed >::type >, 1u, Signed >
+    public extending_cas_based_operations< gcc_sync_operations< 2u, Signed >, 1u, Signed >
 #elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
-    public extending_cas_based_operations< gcc_sync_operations< typename make_storage_type< 4u, Signed >::type >, 1u, Signed >
+    public extending_cas_based_operations< gcc_sync_operations< 4u, Signed >, 1u, Signed >
 #elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
-    public extending_cas_based_operations< gcc_sync_operations< typename make_storage_type< 8u, Signed >::type >, 1u, Signed >
+    public extending_cas_based_operations< gcc_sync_operations< 8u, Signed >, 1u, Signed >
 #else
-    public extending_cas_based_operations< gcc_sync_operations< typename make_storage_type< 16u, Signed >::type >, 1u, Signed >
+    public extending_cas_based_operations< gcc_sync_operations< 16u, Signed >, 1u, Signed >
 #endif
 {
-#if defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1)
-    typedef typename make_storage_type< 1u, Signed >::aligned aligned_storage_type;
-#elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2)
-    typedef typename make_storage_type< 2u, Signed >::aligned aligned_storage_type;
-#elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
-    typedef typename make_storage_type< 4u, Signed >::aligned aligned_storage_type;
-#elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
-    typedef typename make_storage_type< 8u, Signed >::aligned aligned_storage_type;
-#else
-    typedef typename make_storage_type< 16u, Signed >::aligned aligned_storage_type;
-#endif
 };
 #endif
 
@@ -185,24 +175,15 @@ struct operations< 1u, Signed > :
 template< bool Signed >
 struct operations< 2u, Signed > :
 #if defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2)
-    public gcc_sync_operations< typename make_storage_type< 2u, Signed >::type >
+    public gcc_sync_operations< 2u, Signed >
 #elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
-    public extending_cas_based_operations< gcc_sync_operations< typename make_storage_type< 4u, Signed >::type >, 2u, Signed >
+    public extending_cas_based_operations< gcc_sync_operations< 4u, Signed >, 2u, Signed >
 #elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
-    public extending_cas_based_operations< gcc_sync_operations< typename make_storage_type< 8u, Signed >::type >, 2u, Signed >
+    public extending_cas_based_operations< gcc_sync_operations< 8u, Signed >, 2u, Signed >
 #else
-    public extending_cas_based_operations< gcc_sync_operations< typename make_storage_type< 16u, Signed >::type >, 2u, Signed >
+    public extending_cas_based_operations< gcc_sync_operations< 16u, Signed >, 2u, Signed >
 #endif
 {
-#if defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2)
-    typedef typename make_storage_type< 2u, Signed >::aligned aligned_storage_type;
-#elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
-    typedef typename make_storage_type< 4u, Signed >::aligned aligned_storage_type;
-#elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
-    typedef typename make_storage_type< 8u, Signed >::aligned aligned_storage_type;
-#else
-    typedef typename make_storage_type< 16u, Signed >::aligned aligned_storage_type;
-#endif
 };
 #endif
 
@@ -210,20 +191,13 @@ struct operations< 2u, Signed > :
 template< bool Signed >
 struct operations< 4u, Signed > :
 #if defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
-    public gcc_sync_operations< typename make_storage_type< 4u, Signed >::type >
+    public gcc_sync_operations< 4u, Signed >
 #elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
-    public extending_cas_based_operations< gcc_sync_operations< typename make_storage_type< 8u, Signed >::type >, 4u, Signed >
+    public extending_cas_based_operations< gcc_sync_operations< 8u, Signed >, 4u, Signed >
 #else
-    public extending_cas_based_operations< gcc_sync_operations< typename make_storage_type< 16u, Signed >::type >, 4u, Signed >
+    public extending_cas_based_operations< gcc_sync_operations< 16u, Signed >, 4u, Signed >
 #endif
 {
-#if defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
-    typedef typename make_storage_type< 4u, Signed >::aligned aligned_storage_type;
-#elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
-    typedef typename make_storage_type< 8u, Signed >::aligned aligned_storage_type;
-#else
-    typedef typename make_storage_type< 16u, Signed >::aligned aligned_storage_type;
-#endif
 };
 #endif
 
@@ -231,25 +205,19 @@ struct operations< 4u, Signed > :
 template< bool Signed >
 struct operations< 8u, Signed > :
 #if defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
-    public gcc_sync_operations< typename make_storage_type< 8u, Signed >::type >
+    public gcc_sync_operations< 8u, Signed >
 #else
-    public extending_cas_based_operations< gcc_sync_operations< typename make_storage_type< 16u, Signed >::type >, 8u, Signed >
+    public extending_cas_based_operations< gcc_sync_operations< 16u, Signed >, 8u, Signed >
 #endif
 {
-#if defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
-    typedef typename make_storage_type< 8u, Signed >::aligned aligned_storage_type;
-#else
-    typedef typename make_storage_type< 16u, Signed >::aligned aligned_storage_type;
-#endif
 };
 #endif
 
 #if BOOST_ATOMIC_INT128_LOCK_FREE > 0
 template< bool Signed >
 struct operations< 16u, Signed > :
-    public gcc_sync_operations< typename make_storage_type< 16u, Signed >::type >
+    public gcc_sync_operations< 16u, Signed >
 {
-    typedef typename make_storage_type< 16u, Signed >::aligned aligned_storage_type;
 };
 #endif
 

data/src/cxx_supportlib/vendor-modified/boost/atomic/detail/ops_gcc_x86.hpp

@@ -16,6 +16,7 @@
 #ifndef BOOST_ATOMIC_DETAIL_OPS_GCC_X86_HPP_INCLUDED_
 #define BOOST_ATOMIC_DETAIL_OPS_GCC_X86_HPP_INCLUDED_
 
+#include <cstddef>
 #include <boost/memory_order.hpp>
 #include <boost/atomic/detail/config.hpp>
 #include <boost/atomic/detail/storage_type.hpp>
@@ -30,38 +31,33 @@
 #pragma once
 #endif
 
-#if defined(__x86_64__)
-#define BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER "rdx"
-#else
-#define BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER "edx"
-#endif
-
 namespace boost {
 namespace atomics {
 namespace detail {
 
 struct gcc_x86_operations_base
 {
+    static BOOST_CONSTEXPR_OR_CONST bool full_cas_based = false;
     static BOOST_CONSTEXPR_OR_CONST bool is_always_lock_free = true;
 
     static BOOST_FORCEINLINE void fence_before(memory_order order) BOOST_NOEXCEPT
     {
-        if ((order & memory_order_release) != 0)
+        if ((static_cast< unsigned int >(order) & static_cast< unsigned int >(memory_order_release)) != 0u)
             __asm__ __volatile__ ("" ::: "memory");
     }
 
     static BOOST_FORCEINLINE void fence_after(memory_order order) BOOST_NOEXCEPT
     {
-        if ((order & memory_order_acquire) != 0)
+        if ((static_cast< unsigned int >(order) & (static_cast< unsigned int >(memory_order_consume) | static_cast< unsigned int >(memory_order_acquire))) != 0u)
             __asm__ __volatile__ ("" ::: "memory");
     }
 };
 
-template< typename T, typename Derived >
+template< std::size_t Size, bool Signed, typename Derived >
 struct gcc_x86_operations :
     public gcc_x86_operations_base
 {
-    typedef T storage_type;
+    typedef typename make_storage_type< Size >::type storage_type;
 
     static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
     {
@@ -104,20 +100,19 @@ struct gcc_x86_operations :
     {
         store(storage, (storage_type)0, order);
     }
-
-    static BOOST_FORCEINLINE bool is_lock_free(storage_type const volatile&) BOOST_NOEXCEPT
-    {
-        return true;
-    }
 };
 
 template< bool Signed >
 struct operations< 1u, Signed > :
-    public gcc_x86_operations< typename make_storage_type< 1u, Signed >::type, operations< 1u, Signed > >
+    public gcc_x86_operations< 1u, Signed, operations< 1u, Signed > >
 {
-    typedef gcc_x86_operations< typename make_storage_type< 1u, Signed >::type, operations< 1u, Signed > > base_type;
+    typedef gcc_x86_operations< 1u, Signed, operations< 1u, Signed > > base_type;
     typedef typename base_type::storage_type storage_type;
-    typedef typename make_storage_type< 1u, Signed >::aligned aligned_storage_type;
+    typedef typename make_storage_type< 1u >::aligned aligned_storage_type;
+    typedef typename make_storage_type< 4u >::type temp_storage_type;
+
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 1u;
+    static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
     {
@@ -148,6 +143,15 @@ struct operations< 1u, Signed > :
     {
         storage_type previous = expected;
         bool success;
+#if defined(BOOST_ATOMIC_DETAIL_ASM_HAS_FLAG_OUTPUTS)
+        __asm__ __volatile__
+        (
+            "lock; cmpxchgb %3, %1"
+            : "+a" (previous), "+m" (storage), "=@ccz" (success)
+            : "q" (desired)
+            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+        );
+#else // defined(BOOST_ATOMIC_DETAIL_ASM_HAS_FLAG_OUTPUTS)
         __asm__ __volatile__
         (
             "lock; cmpxchgb %3, %1\n\t"
@@ -156,22 +160,23 @@ struct operations< 1u, Signed > :
             : "q" (desired)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
         );
+#endif // defined(BOOST_ATOMIC_DETAIL_ASM_HAS_FLAG_OUTPUTS)
         expected = previous;
         return success;
     }
 
 #define BOOST_ATOMIC_DETAIL_CAS_LOOP(op, argument, result)\
+    temp_storage_type new_val;\
     __asm__ __volatile__\
     (\
-        "xor %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER ", %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER "\n\t"\
         ".align 16\n\t"\
-        "1: movb %[arg], %%dl\n\t"\
-        op " %%al, %%dl\n\t"\
-        "lock; cmpxchgb %%dl, %[storage]\n\t"\
+        "1: mov %[arg], %2\n\t"\
+        op " %%al, %b2\n\t"\
+        "lock; cmpxchgb %b2, %[storage]\n\t"\
         "jne 1b"\
-        : [res] "+a" (result), [storage] "+m" (storage)\
-        : [arg] "q" (argument)\
-        : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER, "memory"\
+        : [res] "+a" (result), [storage] "+m" (storage), "=&q" (new_val)\
+        : [arg] "ir" ((temp_storage_type)argument)\
+        : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"\
     )
 
     static BOOST_FORCEINLINE storage_type fetch_and(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
@@ -200,11 +205,15 @@ struct operations< 1u, Signed > :
 
 template< bool Signed >
 struct operations< 2u, Signed > :
-    public gcc_x86_operations< typename make_storage_type< 2u, Signed >::type, operations< 2u, Signed > >
+    public gcc_x86_operations< 2u, Signed, operations< 2u, Signed > >
 {
-    typedef gcc_x86_operations< typename make_storage_type< 2u, Signed >::type, operations< 2u, Signed > > base_type;
+    typedef gcc_x86_operations< 2u, Signed, operations< 2u, Signed > > base_type;
     typedef typename base_type::storage_type storage_type;
-    typedef typename make_storage_type< 2u, Signed >::aligned aligned_storage_type;
+    typedef typename make_storage_type< 2u >::aligned aligned_storage_type;
+    typedef typename make_storage_type< 4u >::type temp_storage_type;
+
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 2u;
+    static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
     {
@@ -235,6 +244,15 @@ struct operations< 2u, Signed > :
     {
         storage_type previous = expected;
         bool success;
+#if defined(BOOST_ATOMIC_DETAIL_ASM_HAS_FLAG_OUTPUTS)
+        __asm__ __volatile__
+        (
+            "lock; cmpxchgw %3, %1"
+            : "+a" (previous), "+m" (storage), "=@ccz" (success)
+            : "q" (desired)
+            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+        );
+#else // defined(BOOST_ATOMIC_DETAIL_ASM_HAS_FLAG_OUTPUTS)
         __asm__ __volatile__
         (
             "lock; cmpxchgw %3, %1\n\t"
@@ -243,22 +261,23 @@ struct operations< 2u, Signed > :
             : "q" (desired)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
         );
+#endif // defined(BOOST_ATOMIC_DETAIL_ASM_HAS_FLAG_OUTPUTS)
         expected = previous;
         return success;
     }
 
 #define BOOST_ATOMIC_DETAIL_CAS_LOOP(op, argument, result)\
+    temp_storage_type new_val;\
     __asm__ __volatile__\
     (\
-        "xor %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER ", %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER "\n\t"\
         ".align 16\n\t"\
-        "1: movw %[arg], %%dx\n\t"\
-        op " %%ax, %%dx\n\t"\
-        "lock; cmpxchgw %%dx, %[storage]\n\t"\
+        "1: mov %[arg], %2\n\t"\
+        op " %%ax, %w2\n\t"\
+        "lock; cmpxchgw %w2, %[storage]\n\t"\
         "jne 1b"\
-        : [res] "+a" (result), [storage] "+m" (storage)\
-        : [arg] "q" (argument)\
-        : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER, "memory"\
+        : [res] "+a" (result), [storage] "+m" (storage), "=&q" (new_val)\
+        : [arg] "ir" ((temp_storage_type)argument)\
+        : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"\
     )
 
     static BOOST_FORCEINLINE storage_type fetch_and(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
@@ -287,11 +306,14 @@ struct operations< 2u, Signed > :
 
 template< bool Signed >
 struct operations< 4u, Signed > :
-    public gcc_x86_operations< typename make_storage_type< 4u, Signed >::type, operations< 4u, Signed > >
+    public gcc_x86_operations< 4u, Signed, operations< 4u, Signed > >
 {
-    typedef gcc_x86_operations< typename make_storage_type< 4u, Signed >::type, operations< 4u, Signed > > base_type;
+    typedef gcc_x86_operations< 4u, Signed, operations< 4u, Signed > > base_type;
     typedef typename base_type::storage_type storage_type;
-    typedef typename make_storage_type< 4u, Signed >::aligned aligned_storage_type;
+    typedef typename make_storage_type< 4u >::aligned aligned_storage_type;
+
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 4u;
+    static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
     {
@@ -322,6 +344,15 @@ struct operations< 4u, Signed > :
     {
         storage_type previous = expected;
         bool success;
+#if defined(BOOST_ATOMIC_DETAIL_ASM_HAS_FLAG_OUTPUTS)
+        __asm__ __volatile__
+        (
+            "lock; cmpxchgl %3, %1"
+            : "+a" (previous), "+m" (storage), "=@ccz" (success)
+            : "r" (desired)
+            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+        );
+#else // defined(BOOST_ATOMIC_DETAIL_ASM_HAS_FLAG_OUTPUTS)
         __asm__ __volatile__
         (
             "lock; cmpxchgl %3, %1\n\t"
@@ -330,22 +361,23 @@ struct operations< 4u, Signed > :
             : "r" (desired)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
         );
+#endif // defined(BOOST_ATOMIC_DETAIL_ASM_HAS_FLAG_OUTPUTS)
         expected = previous;
         return success;
     }
 
 #define BOOST_ATOMIC_DETAIL_CAS_LOOP(op, argument, result)\
+    storage_type new_val;\
     __asm__ __volatile__\
     (\
-        "xor %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER ", %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER "\n\t"\
         ".align 16\n\t"\
-        "1: movl %[arg], %%edx\n\t"\
-        op " %%eax, %%edx\n\t"\
-        "lock; cmpxchgl %%edx, %[storage]\n\t"\
+        "1: mov %[arg], %[new_val]\n\t"\
+        op " %%eax, %[new_val]\n\t"\
+        "lock; cmpxchgl %[new_val], %[storage]\n\t"\
         "jne 1b"\
-        : [res] "+a" (result), [storage] "+m" (storage)\
-        : [arg] "r" (argument)\
-        : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER, "memory"\
+        : [res] "+a" (result), [storage] "+m" (storage), [new_val] "=&r" (new_val)\
+        : [arg] "ir" (argument)\
+        : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"\
     )
 
     static BOOST_FORCEINLINE storage_type fetch_and(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
@@ -378,17 +410,22 @@ template< bool Signed >
 struct operations< 8u, Signed > :
     public cas_based_operations< gcc_dcas_x86< Signed > >
 {
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 8u;
+    static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
 };
 
 #elif defined(__x86_64__)
 
 template< bool Signed >
 struct operations< 8u, Signed > :
-    public gcc_x86_operations< typename make_storage_type< 8u, Signed >::type, operations< 8u, Signed > >
+    public gcc_x86_operations< 8u, Signed, operations< 8u, Signed > >
 {
-    typedef gcc_x86_operations< typename make_storage_type< 8u, Signed >::type, operations< 8u, Signed > > base_type;
+    typedef gcc_x86_operations< 8u, Signed, operations< 8u, Signed > > base_type;
     typedef typename base_type::storage_type storage_type;
-    typedef typename make_storage_type< 8u, Signed >::aligned aligned_storage_type;
+    typedef typename make_storage_type< 8u >::aligned aligned_storage_type;
+
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 8u;
+    static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
 
     static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
     {
@@ -419,6 +456,15 @@ struct operations< 8u, Signed > :
     {
         storage_type previous = expected;
         bool success;
+#if defined(BOOST_ATOMIC_DETAIL_ASM_HAS_FLAG_OUTPUTS)
+        __asm__ __volatile__
+        (
+            "lock; cmpxchgq %3, %1"
+            : "+a" (previous), "+m" (storage), "=@ccz" (success)
+            : "r" (desired)
+            : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+        );
+#else // defined(BOOST_ATOMIC_DETAIL_ASM_HAS_FLAG_OUTPUTS)
         __asm__ __volatile__
         (
             "lock; cmpxchgq %3, %1\n\t"
@@ -427,22 +473,23 @@ struct operations< 8u, Signed > :
             : "r" (desired)
             : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
         );
+#endif // defined(BOOST_ATOMIC_DETAIL_ASM_HAS_FLAG_OUTPUTS)
         expected = previous;
         return success;
     }
 
 #define BOOST_ATOMIC_DETAIL_CAS_LOOP(op, argument, result)\
+    storage_type new_val;\
     __asm__ __volatile__\
     (\
-        "xor %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER ", %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER "\n\t"\
         ".align 16\n\t"\
-        "1: movq %[arg], %%rdx\n\t"\
-        op " %%rax, %%rdx\n\t"\
-        "lock; cmpxchgq %%rdx, %[storage]\n\t"\
+        "1: movq %[arg], %[new_val]\n\t"\
+        op " %%rax, %[new_val]\n\t"\
+        "lock; cmpxchgq %[new_val], %[storage]\n\t"\
         "jne 1b"\
-        : [res] "+a" (result), [storage] "+m" (storage)\
+        : [res] "+a" (result), [storage] "+m" (storage), [new_val] "=&r" (new_val)\
         : [arg] "r" (argument)\
-        : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER, "memory"\
+        : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"\
     )
 
     static BOOST_FORCEINLINE storage_type fetch_and(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
@@ -477,6 +524,8 @@ template< bool Signed >
 struct operations< 16u, Signed > :
     public cas_based_operations< gcc_dcas_x86_64< Signed > >
 {
+    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 16u;
+    static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
 };
 
 #endif // defined(BOOST_ATOMIC_DETAIL_X86_HAS_CMPXCHG16B)
@@ -495,7 +544,7 @@ BOOST_FORCEINLINE void thread_fence(memory_order order) BOOST_NOEXCEPT
             ::: "memory"
         );
     }
-    else if ((order & (memory_order_acquire | memory_order_release)) != 0)
+    else if ((static_cast< unsigned int >(order) & (static_cast< unsigned int >(memory_order_acquire) | static_cast< unsigned int >(memory_order_release))) != 0u)
     {
         __asm__ __volatile__ ("" ::: "memory");
     }
@@ -511,6 +560,4 @@ BOOST_FORCEINLINE void signal_fence(memory_order order) BOOST_NOEXCEPT
 } // namespace atomics
 } // namespace boost
 
-#undef BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER
-
 #endif // BOOST_ATOMIC_DETAIL_OPS_GCC_X86_HPP_INCLUDED_