ipxact-ruby 0.11.1

data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_scml/1.0/tlmsrc/src/uart_register_bank.cc

@@ -0,0 +1,129 @@
+// 
+// Revision:    $Revision: 1506 $
+// Date:        $Date: 2009-04-26 01:51:56 -0500 (Sun, 26 Apr 2009) $
+// 
+// Copyright (c) 2005, 2006, 2007, 2008, 2009 The SPIRIT Consortium.
+// 
+// This work forms part of a deliverable of The SPIRIT Consortium.
+// 
+// Use of these materials are governed by the legal terms and conditions
+// outlined in the disclaimer available from www.spiritconsortium.org.
+// 
+// This source file is provided on an AS IS basis.  The SPIRIT
+// Consortium disclaims any warranty express or implied including
+// any warranty of merchantability and fitness for use for a
+// particular purpose.
+// 
+// The user of the source file shall indemnify and hold The SPIRIT
+// Consortium and its members harmless from any damages or liability.
+// Users are requested to provide feedback to The SPIRIT Consortium
+// using either mailto:feedback@lists.spiritconsortium.org or the forms at 
+// http://www.spiritconsortium.org/about/contact_us/
+// 
+// This file may be copied, and distributed, with or without
+// modifications; this notice must be included on any copy.
+
+// uart_register_bank.cpp
+
+//***************************
+//*		Includes			*
+//***************************
+#include "uart.h"
+
+//***********************************************************************************
+//*		UART Module: Register Call-backs										*
+//*		These functions are bound to the register aliases of the register bank.		*
+//***********************************************************************************
+// Non Blocking Write callback bound to RBR/THR register. A Write will access the THR
+void		uart::RegCB_RBR_THR_Write(DATA_TYPE WriteData, unsigned int AccessSize, unsigned int Offset) {
+	if (bFCR_FIFOE == 1)				// If FIFOs are enabled...
+		TX_FIFO.write(WriteData);		// Write data to the Transmit FIFO
+	else {
+		rTHR = WriteData;				// Write data to the Transmit Holding Register
+	}
+	bLSR_THRE = 0;						// Clear the THR Empty bit
+	TransmitEvent.notify();				// Trigger the Transmitter
+	InterruptEvent.notify();			// Check for Interrupts
+};
+// Non Blocking Read callback bound to RBR/THR register. A Read will access the RBR
+DATA_TYPE	uart::RegCB_RBR_THR_Read(unsigned int AccessSize, unsigned int Offset) {
+	DATA_TYPE ReturnValue;
+	if (bFCR_FIFOE == 1) {					// If FIFOs are enabled...
+		ReturnValue = RX_FIFO.read();		// Read data from the Receive FIFO
+		if (RX_FIFO.IsBelowTriggerLevel())	// If Receive FIFO is below the trigger level...
+			Clear_RX_Interrupt = true;		// Clear the Receive buffer full interrupt
+		if (RX_FIFO.IsEmpty()) {			// If Receive FIFO is empty...
+			bLSR_DR = 0;					// Clear the Data Ready bit
+		}
+	} else {
+		ReturnValue = rRBR;					// Read data from the Receive Buffer Register
+		rRBR = 0;							// Clear the RBR
+		bLSR_DR = 0;						// Clear the Data Ready bit
+		Clear_RX_Interrupt = true;			// Clear the Receive buffer full interrupt
+	}
+	InterruptEvent.notify();				// Update interrupts
+	return ReturnValue;						// Return the value
+};
+// Non Blocking Write callback bound to IIR/FCR register. A Write will access the FCR
+void		uart::RegCB_IIR_FCR_Write(DATA_TYPE WriteData, unsigned int AccessSize, unsigned int Offset) {
+  if (WriteData & 1) {							// If the first bit (FIFO Enable bit) is set...
+		switch ((WriteData >> 6) & 0x03) {			// Set the Receive FIFO trigger level
+			case 0x01:
+				RX_FIFO.SetTriggerLevel(RX_FIFO_SIZE/4);
+				break;
+			case 0x02:
+				RX_FIFO.SetTriggerLevel(RX_FIFO_SIZE/2);
+				break;
+			case 0x03:
+				RX_FIFO.SetTriggerLevel(RX_FIFO_SIZE-2);
+				break;
+			default:
+				RX_FIFO.SetTriggerLevel(1);
+				break;
+		}
+		switch ((WriteData >> 4) & 0x03) {			// Set the Transmit FIFO trigger level
+			case 0x01:
+				TX_FIFO.SetTriggerLevel(TX_FIFO_SIZE/4);
+				break;
+			case 0x02:
+				TX_FIFO.SetTriggerLevel(TX_FIFO_SIZE/2);
+				break;
+			case 0x03:
+				TX_FIFO.SetTriggerLevel(TX_FIFO_SIZE-2);
+				break;
+			default:
+				TX_FIFO.SetTriggerLevel(1);
+				break;
+		}
+	} else {										// If FIFOs are (being) disabled...
+		if (!RX_FIFO.IsEmpty())						// If the Receive FIFO is not empty...
+			rRBR = RX_FIFO.read();					// Transfer the top item of the Receive FIFO to the RBR
+		cout << sc_time_stamp() << ": " << name() << ": FIFOs Disabled." << endl;
+	}
+	rFCR = WriteData;								// Store the data word in the Fifo Control Register
+};
+// Non Blocking Read callback bound to IIR/FCR register. A Read will access the IIR
+DATA_TYPE	uart::RegCB_IIR_FCR_Read(unsigned int AccessSize, unsigned int Offset) {
+	DATA_TYPE	ReturnValue = rIIR;
+	
+	if ((ReturnValue & 0x0F) == UART_IRQ_TX) {				// If a Transmit buffer empty interrupt is returned...
+		Clear_TX_Interrupt = true;								// Clear the Transmit buffer empty interrupt
+	}
+
+	InterruptEvent.notify();									// Update interrupts
+	ReturnValue |= ((bFCR_FIFOE << 7) | (bFCR_FIFOE << 6));		// Set bit 6 and 7 to the same value as the FIFO Enable bit.
+	return ReturnValue;											// Return the value of Interrupt Identification Register
+};
+// Non Blocking Read callback bound to LSR register.
+DATA_TYPE	uart::RegCB_LSR_Read(unsigned int AccessSize, unsigned int Offset) {
+	DATA_TYPE ReturnValue = rLSR;
+	Clear_LS_Interrupt = true;									// Clear the Line Status Interrupt
+	InterruptEvent.notify();									// Update interrupts
+	return ReturnValue;											// Return the value of Line Status Register
+};
+// Non Blocking Write callback bound to IER register.
+void		uart::RegCB_IER_Write(DATA_TYPE WriteData, unsigned int AccessSize, unsigned int Offset) {
+	rIER = WriteData;											// Write data word to Interrupt Enable Register
+	InterruptEvent.notify();									// Update interrupts
+};
+

data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_scml/1.0/tlmsrc/src/uart_serial_tx_rx.cc

@@ -0,0 +1,145 @@
+// 
+// Revision:    $Revision: 1506 $
+// Date:        $Date: 2009-04-26 01:51:56 -0500 (Sun, 26 Apr 2009) $
+// 
+// Copyright (c) 2005, 2006, 2007, 2008, 2009 The SPIRIT Consortium.
+// 
+// This work forms part of a deliverable of The SPIRIT Consortium.
+// 
+// Use of these materials are governed by the legal terms and conditions
+// outlined in the disclaimer available from www.spiritconsortium.org.
+// 
+// This source file is provided on an AS IS basis.  The SPIRIT
+// Consortium disclaims any warranty express or implied including
+// any warranty of merchantability and fitness for use for a
+// particular purpose.
+// 
+// The user of the source file shall indemnify and hold The SPIRIT
+// Consortium and its members harmless from any damages or liability.
+// Users are requested to provide feedback to The SPIRIT Consortium
+// using either mailto:feedback@lists.spiritconsortium.org or the forms at 
+// http://www.spiritconsortium.org/about/contact_us/
+// 
+// This file may be copied, and distributed, with or without
+// modifications; this notice must be included on any copy.
+
+
+// uart_serial_tx_rx.cpp
+
+//***************************
+//*		Includes			*
+//***************************
+#include "uart.h"
+
+//***********************************************************************************
+//*		UART Module: put Interface Method										*
+//*		This method is bound to the 'tlm_blocking_put_if' of the pSerialIn export.	*
+//*		It handles the incomming serial data.										*
+//***********************************************************************************
+void uart::put(const SERIAL_DATA_STRUCTURE &DataStruct) {
+	DATA_TYPE ReceiveShiftRegister;
+	unsigned short NrOfDataBits = 5 + ((bLCR_WLS1 << 1) | bLCR_WLS0);	// Number of data bits in character frame
+	unsigned short WordMask = (0x1F << (NrOfDataBits-5)) | 0x07;		// Mask that has the lowest 'NrOfDataBits' set to 1
+
+	if (bFCR_FIFOE) {	// If the FIFOs are enabled...
+		if (RX_FIFO.IsFull()) {		// If the receive FIFO is full...
+			bLSR_OE = 1;			// Set the Overflow Error flag
+			cout << sc_time_stamp() << ": " << name() << ": RX FIFO Full! Discarding received character frame." << endl;
+		} else {
+			ReceiveShiftRegister = DataStruct.Data & WordMask;	// Store the data in 'ReceiveShiftRegister'
+			RX_FIFO.write(ReceiveShiftRegister);				// Write data to the FIFO
+		}
+	} else {
+		if (bLSR_DR) {			// If data is avialable in RBR...
+			bLSR_OE = 1;		// Set the Overflow Error flag
+			cout << sc_time_stamp() << ": " << name() << ": RBR Full! Discarding received character frame." << endl;
+		} else {
+			ReceiveShiftRegister = DataStruct.Data & WordMask;	// Store the data in 'ReceiveShiftRegister'
+
+			rRBR = ReceiveShiftRegister;						// Write data to the Receive Buffer Register
+		}
+	}
+	if (!bLSR_OE) {		// If there was no Overflow Error...
+		bLSR_DR = 1;	// Set the Data Ready flag
+		if (DataStruct.StartBit != 1)	// If Start Bit is invalid...
+			bLSR_BI = 1;				// Set the Break Indicator flag
+
+		if (bLCR_PEN) {								// If Parity is ENabled...
+			if (bLCR_SP) {							// If Stick Parity is enabled...
+				if (DataStruct.Parity == (bool)bLCR_EPS)	// If Parity bit does not match...
+					bLSR_PE = 1;					// Set Parity Error flag
+			} else {
+				// Check the parity of data bits + parity bit
+				bool ParityCheck = 1;	// 0 = odd, 1 = even
+				for (int i = 0; i < NrOfDataBits; i++) {
+					ParityCheck = ParityCheck ^ (ReceiveShiftRegister & 0x01);
+					ReceiveShiftRegister >>= 1;
+				}
+				ParityCheck = ParityCheck ^ DataStruct.Parity;
+				if (ParityCheck != (bool)bLCR_EPS)	// If the parity does not match...
+					bLSR_PE = 1;				// Set Parity Error flag
+			}
+		}
+		if (DataStruct.StopBit != 1)			// If Stop Bit is invalid...
+			bLSR_FE = 1;						// Set Framing Error flag
+		
+		cout << sc_time_stamp() << ": " << name() << ": Serial Character received: " << DataStruct.Data << "." << endl;
+	}
+	InterruptEvent.notify();					// Trigger the Interrupt handler to check for interrupts.
+}
+
+//***********************************************************************************
+//*		UART Module: Serial_Transmit()											*
+//*		This method is triggered by the 'TransmitEvent' event.						*
+//*		It sends a serial data frame to the 'pSerialOut' port.						*
+//***********************************************************************************
+void uart::Serial_Transmit() {
+	unsigned char TransmitShiftRegister;
+	SERIAL_DATA_STRUCTURE CharacterFrame;
+	unsigned short NrOfDataBits = 5 + ((bLCR_WLS1 << 1) | bLCR_WLS0);		// Number of data bits in character frame
+	unsigned short WordMask = (0x1F << (NrOfDataBits-5)) | 0x07;			// Mask that has the lowest 'NrOfDataBits' set to 1
+
+	if (bFCR_FIFOE == 1) {				// If FIFOs are enabled...
+		if (TX_FIFO.IsEmpty()) {		// If the transmit FIFO is empty...
+			cout << sc_time_stamp() << ": " << name() << ": TX FIFO Empty. Stopping Transmission" << endl;
+			return;						// Don't transmit anything
+		}
+		TransmitShiftRegister = TX_FIFO.read() & WordMask;		// Get character from the transmit FIFO
+		if (TX_FIFO.IsBelowTriggerLevel()) {					// If the transmit FIFO is below the trigger level...
+			bLSR_THRE = 1;										// Set the THR Empty bit
+		}
+	} else {
+		if (bLSR_THRE == 1) {					// If THR is empty....
+			cout << sc_time_stamp() << ": " << name() << ": THR Empty. Stopping Transmission" << endl;
+			return;								// Don't transmit anything
+		}
+		TransmitShiftRegister = rTHR & WordMask;		// Get character from the THR
+		rTHR = 0;										// Clear the THR
+		bLSR_THRE = 1;									// Set the THR Empty bit
+	}
+	cout << sc_time_stamp() << ": " << name() << ": Writing " << TransmitShiftRegister << " to pSerialOut" << endl;	
+	
+	CharacterFrame.StartBit = ~bLCR_SB;					// If Set Break bit is set, the Start Bit becomes 0, otherwise it is 1
+	CharacterFrame.Data = TransmitShiftRegister;		// Put the data from the 'TransmitShiftRegister' in the character frame
+	if (bLCR_PEN) {										// If Parity is ENabled...
+		if (bLCR_SP) {									// If Stick Parity is enabled...
+			CharacterFrame.Parity = !bLCR_EPS;			// Set parity bit to 1 if 'bLCR_EPS' == 0, and to 0 otherwise
+		} else {
+			// Calculate parity of data character
+			bool ParityCalc = 1;	// 0 = odd, 1 = even
+			for (int i = 0; i < NrOfDataBits; i++) {
+				ParityCalc = ParityCalc ^ (TransmitShiftRegister & 0x01);
+				TransmitShiftRegister >>= 1;
+			}
+			ParityCalc = ParityCalc ^ bLCR_EPS;
+			CharacterFrame.Parity = ParityCalc;			// Set the parity bit to match the selected (odd or even) parity
+		}
+		
+	} 
+	CharacterFrame.StopBit = 1;							// Set the stop bit
+	
+	pSerialOut->put(CharacterFrame);					// Put the character frame on the 'pSerialOut' port
+
+	TransmitEvent.notify();								// Trigger this function again, there may be more data to send
+	InterruptEvent.notify();							// Trigger the interrupt handler to check for interrupt conditions
+}

data/spec/test_data/spiritconsortium.org/Leon2TLM/uart_scml/1.0/uart_scml.xml

@@ -0,0 +1,372 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--
+// 
+// Revision:    $Revision: 1506 $
+// Date:        $Date: 2009-04-26 01:51:56 -0500 (Sun, 26 Apr 2009) $
+// 
+// Copyright (c) 2005, 2006, 2007, 2008, 2009 The SPIRIT Consortium.
+// 
+// This work forms part of a deliverable of The SPIRIT Consortium.
+// 
+// Use of these materials are governed by the legal terms and conditions
+// outlined in the disclaimer available from www.spiritconsortium.org.
+// 
+// This source file is provided on an AS IS basis.  The SPIRIT
+// Consortium disclaims any warranty express or implied including
+// any warranty of merchantability and fitness for use for a
+// particular purpose.
+// 
+// The user of the source file shall indemnify and hold The SPIRIT
+// Consortium and its members harmless from any damages or liability.
+// Users are requested to provide feedback to The SPIRIT Consortium
+// using either mailto:feedback@lists.spiritconsortium.org or the forms at 
+// http://www.spiritconsortium.org/about/contact_us/
+// 
+// This file may be copied, and distributed, with or without
+// modifications; but this notice must be included on any copy.
+-->
+<spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
+  <spirit:vendor>spiritconsortium.org</spirit:vendor>
+  <spirit:library>Leon2TLM</spirit:library>
+  <spirit:name>uart_scml</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>ambaAPB</spirit:name>
+      <spirit:busType spirit:library="AMBA2" spirit:name="APB" spirit:vendor="amba.com" spirit:version="r2p0_4"/>
+      <spirit:abstractionType spirit:library="SCML" spirit:name="APB_PV" spirit:vendor="coware.com" spirit:version="1.1"/>
+      <spirit:slave>
+        <spirit:memoryMapRef spirit:memoryMapRef="uartScmlMemoryMap"/>
+      </spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>PV</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>pPVTargetPort</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>Interrupt</spirit:name>
+      <spirit:busType spirit:library="busdef.interrupt" spirit:name="interrupt" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:abstractionType spirit:library="busdef.interrupt" spirit:name="interrupt_rtl" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:master/>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>IRQ</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>pInterrupt</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>SerialOut</spirit:name>
+      <spirit:busType spirit:library="busdef.generic" spirit:name="serial" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:abstractionType spirit:library="abstractiondef.tlm" spirit:name="serial_pv" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:master/>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>RW_TRANSACTION</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>pSerialOut</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>SerialIn</spirit:name>
+      <spirit:busType spirit:library="busdef.generic" spirit:name="serial" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:abstractionType spirit:library="abstractiondef.tlm" spirit:name="serial_pv" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:slave/>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>RW_TRANSACTION</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>pSerialIn</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:memoryMaps>
+    <spirit:memoryMap>
+      <spirit:name>uartScmlMemoryMap</spirit:name>
+      <spirit:addressBlock>
+        <spirit:name>UART_REG</spirit:name>
+        <spirit:description>Receiver Buffer Register</spirit:description>
+        <spirit:baseAddress spirit:id="uartScmlBaseAddress" spirit:resolve="user">0xB0000000</spirit:baseAddress>
+        <spirit:range>24</spirit:range>
+        <spirit:width>32</spirit:width>
+        <spirit:usage>register</spirit:usage>
+        <spirit:register>
+          <spirit:name>UART_REG_RBR</spirit:name>
+          <spirit:addressOffset>0x0</spirit:addressOffset>
+          <spirit:size>32</spirit:size>
+          <spirit:access>read-only</spirit:access>
+          <spirit:reset>
+            <spirit:value>0x00</spirit:value>
+          </spirit:reset>
+        </spirit:register>
+        <spirit:register>
+          <spirit:name>UART_REG_THR</spirit:name>
+          <spirit:description>Transmitter Holding Register</spirit:description>
+          <spirit:addressOffset>0x0</spirit:addressOffset>
+          <spirit:size>32</spirit:size>
+          <spirit:access>write-only</spirit:access>
+          <spirit:reset>
+            <spirit:value>0x00</spirit:value>
+          </spirit:reset>
+        </spirit:register>
+        <spirit:register>
+          <spirit:name>UART_REG_IER</spirit:name>
+          <spirit:description>Interrupt Enable (Mask) Register</spirit:description>
+          <spirit:addressOffset>0x4</spirit:addressOffset>
+          <spirit:size>32</spirit:size>
+          <spirit:access>read-write</spirit:access>
+          <spirit:reset>
+            <spirit:value>0x00</spirit:value>
+          </spirit:reset>
+        </spirit:register>
+        <spirit:register>
+          <spirit:name>UART_REG_IIR</spirit:name>
+          <spirit:description>Interrupt Identification Register</spirit:description>
+          <spirit:addressOffset>0x8</spirit:addressOffset>
+          <spirit:size>32</spirit:size>
+          <spirit:access>read-only</spirit:access>
+          <spirit:reset>
+            <spirit:value>0x01</spirit:value>
+          </spirit:reset>
+        </spirit:register>
+        <spirit:register>
+          <spirit:name>UART_REG_FCR</spirit:name>
+          <spirit:description>FIFO Control Register</spirit:description>
+          <spirit:addressOffset>0x8</spirit:addressOffset>
+          <spirit:size>32</spirit:size>
+          <spirit:access>write-only</spirit:access>
+          <spirit:reset>
+            <spirit:value>0x01</spirit:value>
+          </spirit:reset>
+        </spirit:register>
+        <spirit:register>
+          <spirit:name>UART_REG_LCR</spirit:name>
+          <spirit:description>Line Control Register</spirit:description>
+          <spirit:addressOffset>0xC</spirit:addressOffset>
+          <spirit:size>32</spirit:size>
+          <spirit:access>read-write</spirit:access>
+          <spirit:reset>
+            <spirit:value>0x0B</spirit:value>
+          </spirit:reset>
+        </spirit:register>
+        <spirit:register>
+          <spirit:name>UART_REG_LSR</spirit:name>
+          <spirit:description>Line Status Register</spirit:description>
+          <spirit:addressOffset>0x14</spirit:addressOffset>
+          <spirit:size>32</spirit:size>
+          <spirit:access>read-write</spirit:access>
+          <spirit:reset>
+            <spirit:value>0x20</spirit:value>
+          </spirit:reset>
+        </spirit:register>
+      </spirit:addressBlock>
+    </spirit:memoryMap>
+  </spirit:memoryMaps>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>PVPVT</spirit:name>
+        <spirit:envIdentifier>:*Simulation:</spirit:envIdentifier>
+        <spirit:language>systemc2.1</spirit:language>
+        <spirit:modelName>uart</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>uartScmlFileSet</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>pPVTargetPort</spirit:name>
+        <spirit:transactional>
+          <spirit:transTypeDef>
+            <spirit:typeName>PVTarget_port</spirit:typeName>
+            <spirit:typeDefinition>PV/PV.h</spirit:typeDefinition>
+          </spirit:transTypeDef>
+          <spirit:service>
+            <spirit:initiative>provides</spirit:initiative>
+            <spirit:serviceTypeDefs>
+              <spirit:serviceTypeDef>
+                <spirit:typeName spirit:implicit="true">SCML</spirit:typeName>
+                <spirit:parameters>
+                  <spirit:parameter>
+                    <spirit:name>DT</spirit:name>
+                    <spirit:value spirit:resolve="immediate">DATA_TYPE</spirit:value>
+                  </spirit:parameter>
+                  <spirit:parameter>
+                    <spirit:name>AT</spirit:name>
+                    <spirit:value spirit:resolve="immediate">ADDRESS_TYPE</spirit:value>
+                  </spirit:parameter>
+                </spirit:parameters>
+              </spirit:serviceTypeDef>
+            </spirit:serviceTypeDefs>
+          </spirit:service>
+        </spirit:transactional>
+        <spirit:access>
+          <spirit:portAccessType>ref</spirit:portAccessType>
+          <spirit:portAccessHandle>pPVTargetPort</spirit:portAccessHandle>
+        </spirit:access>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>pSerialOut</spirit:name>
+        <spirit:transactional>
+          <spirit:transTypeDef>
+            <spirit:typeName>sc_port</spirit:typeName>
+            <spirit:typeDefinition>systemc.h</spirit:typeDefinition>
+          </spirit:transTypeDef>
+          <spirit:service>
+            <spirit:initiative>requires</spirit:initiative>
+            <spirit:serviceTypeDefs>
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