ipxact-ruby 0.11.1

data/spec/test_data/spiritconsortium.org/Leon2TLM/dma/1.4/tlmsrc/dma.cc

@@ -0,0 +1,230 @@
+ /*------------------------------------------------------------------------------
+ * Simple TLM DMA
+ * 
+ * Revision:    $Revision: 1506 $
+ * Date:        $Date: 2009-04-26 01:51:56 -0500 (Sun, 26 Apr 2009) $
+ * 
+ * Copyright (c) 2006, 2007, 2008, 2009 The SPIRIT Consortium.
+ * 
+ * This work forms part of a deliverable of The SPIRIT Consortium.
+ * 
+ * Use of these materials are governed by the legal terms and conditions
+ * outlined in the disclaimer available from www.spiritconsortium.org.
+ * 
+ * This source file is provided on an AS IS basis.  The SPIRIT
+ * Consortium disclaims any warranty express or implied including
+ * any warranty of merchantability and fitness for use for a
+ * particular purpose.
+ * 
+ * The user of the source file shall indemnify and hold The SPIRIT
+ * Consortium and its members harmless from any damages or liability.
+ * Users are requested to provide feedback to The SPIRIT Consortium
+ * using either mailto:feedback@lists.spiritconsortium.org or the forms at 
+ * http: *www.spiritconsortium.org/about/contact_us/
+ * 
+ * This file may be copied, and distributed, with or without
+ * modifications; but this notice must be included on any copy.
+ *
+ * The following code is derived, directly or indirectly, from the SystemC
+ * source code Copyright (c) 1996-2006 by all Contributors.
+ * All Rights reserved.
+ *
+ * The contents of this file are subject to the restrictions and limitations
+ * set forth in the SystemC Open Source License Version 2.4 (the "License");
+ * You may not use this file except in compliance with such restrictions and
+ * limitations. You may obtain instructions on how to receive a copy of the
+ * License at http://www.systemc.org/. Software distributed by Contributors
+ * under the License is distributed on an "AS IS" basis, WITHOUT WARRANTY OF
+ * ANY KIND, either express or implied. See the License for the specific
+ * language governing rights and limitations under the License.
+ *
+ *------------------------------------------------------------------------------*/
+
+
+/*------------------------------------------------------------------------------
+ * Includes							       
+ *----------------------------------------------------------------------------*/
+#include "dma.h"
+
+
+/*------------------------------------------------------------------------------
+ * Constants							       
+ *----------------------------------------------------------------------------*/
+// Register relative addresses
+const int dma::SRC_ADDR;
+const int dma::DST_ADDR;
+const int dma::LENGTH;
+const int dma::CONTROL;
+
+// Control register bit
+const int dma::START;
+const int dma::IRQ;
+
+//----------------
+// Constructor
+//----------------
+dma::dma(sc_module_name module_name,
+	       tlm::tlm_endianness endian) :
+  sc_module(module_name),
+  pv_slave_base<ADDRESS_TYPE,DATA_TYPE>(name()),
+  apb_slave_port("apb_slave_port"),
+  ahb_master_port("ahb_master_port"),
+  m_endian(endian),
+  m_dma_src_addr(0),
+  m_dma_dst_addr(0),
+  m_dma_control(0) {
+
+  apb_slave_port(*this);
+
+  SC_METHOD(transfer);
+  sensitive << m_start_transfer;
+  dont_initialize();
+
+  SC_METHOD(irq);
+  sensitive << m_irq_to_change;
+  dont_initialize();
+  
+  int_master_port.initialize(false);
+
+  std::cout << name() << " module created - "<< ((m_endian == tlm::TLM_BIG_ENDIAN) ? "big": "little") << " endian\n";
+
+}
+
+
+//----------------------------------------
+// pv_if virtual method implementation
+//----------------------------------------
+
+//------------------------------------------------------------------------------
+// DMA read access 
+
+tlm::tlm_status dma::read(const ADDRESS_TYPE &addr , DATA_TYPE &data,
+			     const unsigned int byte_enable,
+			     const tlm::tlm_mode mode,
+			     const unsigned int export_id
+			     ) {
+  tlm::tlm_status status;
+  
+  switch (addr)
+    {      
+    case SRC_ADDR:       
+      data = m_dma_src_addr; // Read dma source address register
+    std::cout << "DEBUG\t" << name() << std::showbase << std::hex << ": read dma source address register, returns " << m_dma_src_addr << std::endl;
+      break;
+      
+    case DST_ADDR: 
+      data = m_dma_dst_addr; // Read dma destination address register
+    std::cout << "DEBUG\t" << name() << std::showbase << std::hex << ": read dma destination address register, returns " << m_dma_dst_addr << std::endl;
+      break;  
+      
+    case CONTROL: 
+      data= m_dma_control;
+      std::cout << "DEBUG\t" << name() << std::showbase << std::hex << ": read dma control register, returns " << (int)m_dma_control << std::endl;
+      wait(SC_ZERO_TIME); // control register is a system synchronization point
+      break;
+
+    default:       
+      std::cout << "ERROR\t" << name() << std::showbase << std::hex;
+      std::cout << ": DMA has received a request with input address out of range: " << addr << std::endl;
+      return(status);
+    }
+    
+  status.set_ok();
+
+  return(status);
+}
+
+
+//------------------------------------------------------------------------------
+// Write access 
+tlm::tlm_status dma::write(const ADDRESS_TYPE &addr , const DATA_TYPE &data,
+			      const unsigned int byte_enable,
+			      const tlm::tlm_mode mode,
+			      const unsigned int export_id
+			      ) {
+  tlm::tlm_status status;
+
+  switch (addr)
+    {
+    case SRC_ADDR: 
+      m_dma_src_addr  = data; // Write dma source address register
+      break;
+
+    case DST_ADDR: 
+      m_dma_dst_addr  = data; // Write dma destination address register
+      break;
+
+    case CONTROL: 
+      {	
+	if (data==0x1a08 ){
+	  //&& (!( m_dma_control & START))) {
+	  m_start_transfer.notify();
+	  m_dma_control |= START; 
+	}	
+	if ((!(data & IRQ)) && (m_dma_control & IRQ)) {
+	  m_dma_control &= ~IRQ;
+	  m_irq_to_change.notify();
+	}	
+      }
+      break;
+
+    default: 
+      std::cout << "ERROR\t[" << name() << "]:  received a request with input address out of range: "
+		<< std::showbase << std::hex << addr << std::endl;
+      return(status);
+    }
+  status.set_ok();
+  return(status);
+}
+
+
+//------------------------------------------------------------------------------
+// Transfer end IRQ signal management
+void dma::irq() {
+  if (m_dma_control & IRQ) {
+    int_master_port.write(true);
+    std::cout << "DEBUG\t" << name() << std::showbase << std::hex << ": rise transfer end IRQ \n";
+  } else {
+    int_master_port.write(false);  
+    std::cout << "DEBUG\t" << name() << std::showbase << std::hex << ": clear transfer end IRQ \n";
+  }
+}
+
+
+//------------------------------------------------------------------------------
+// dma transfer management
+void dma::transfer() {
+  tlm::tlm_status status;
+  //    if (m_dma_control & START) {
+  std::cout << "DEBUG\t" << name() << std::showbase << std::hex << ": dma transfer started. Source address: "
+	    << m_dma_src_addr << " - destination address: " << m_dma_dst_addr  << std::endl;
+  
+  // starts the memory transfer
+  // copy data from memory start address (SRC_ADDR) to memory destination address (DST_ADDR)
+  DATA_TYPE tmp;
+  for(int i = 0;i<LENGTH;i++) {
+    status = ahb_master_port.read(m_dma_src_addr + i,tmp);
+    if (status.is_error()) 
+      std::cout << "ERROR\t" << name() << ": read memory failure at " << (m_dma_src_addr +i) << std::endl;
+    else {
+      status = ahb_master_port.write(m_dma_dst_addr + i,tmp);
+      if (status.is_error()) 
+	std::cout << "ERROR\t" << name() << ": write memory failure at " << (m_dma_dst_addr +i) << std::endl;
+    }
+  }
+      
+  // Clear the START bit of the control register 
+  m_dma_control &= ~START;
+  
+  // Interrupt generation
+  if (!(m_dma_control&IRQ)) {
+    m_dma_control |= IRQ;
+    m_irq_to_change.notify();
+  }
+}
+
+
+
+
+
+/* END of dma.cc */

data/spec/test_data/spiritconsortium.org/Leon2TLM/dma/1.4/tlmsrc/dma.h

@@ -0,0 +1,116 @@
+/*------------------------------------------------------------------------------
+ * Simple TLM DMA
+ * 
+ * Revision:    $Revision: 1506 $
+ * Date:        $Date: 2009-04-26 01:51:56 -0500 (Sun, 26 Apr 2009) $
+ * 
+ * Copyright (c) 2005, 2006, 2007, 2008, 2009 The SPIRIT Consortium.
+ * 
+ * This work forms part of a deliverable of The SPIRIT Consortium.
+ * 
+ * Use of these materials are governed by the legal terms and conditions
+ * outlined in the disclaimer available from www.spiritconsortium.org.
+ * 
+ * This source file is provided on an AS IS basis.  The SPIRIT
+ * Consortium disclaims any warranty express or implied including
+ * any warranty of merchantability and fitness for use for a
+ * particular purpose.
+ * 
+ * The user of the source file shall indemnify and hold The SPIRIT
+ * Consortium and its members harmless from any damages or liability.
+ * Users are requested to provide feedback to The SPIRIT Consortium
+ * using either mailto:feedback@lists.spiritconsortium.org or the forms at 
+ * http: *www.spiritconsortium.org/about/contact_us/
+ * 
+ * This file may be copied, and distributed, with or without
+ * modifications; but this notice must be included on any copy.
+ *
+ * The following code is derived, directly or indirectly, from the SystemC
+ * source code Copyright (c) 1996-2006 by all Contributors.
+ * All Rights reserved.
+ *
+ * The contents of this file are subject to the restrictions and limitations
+ * set forth in the SystemC Open Source License Version 2.4 (the "License");
+ * You may not use this file except in compliance with such restrictions and
+ * limitations. You may obtain instructions on how to receive a copy of the
+ * License at http://www.systemc.org/. Software distributed by Contributors
+ * under the License is distributed on an "AS IS" basis, WITHOUT WARRANTY OF
+ * ANY KIND, either express or implied. See the License for the specific
+ * language governing rights and limitations under the License.
+ *------------------------------------------------------------------------------*/
+
+#ifndef _DMA_H_
+#define _DMA_H_
+
+/*------------------------------------------------------------------------------
+ * Includes
+ *----------------------------------------------------------------------------*/ 
+#include "systemc.h"
+#include "pv_slave_base.h"
+#include "pv_target_port.h"
+#include "pv_initiator_port.h"
+#include "user_types.h"
+
+//------------------------------------------------------------------------------
+class dma : 
+  public sc_module,
+  public pv_slave_base< ADDRESS_TYPE , DATA_TYPE >
+{
+public :
+
+  // Registers relative addresses
+  static const int SRC_ADDR  = 0x0000;  
+  static const int DST_ADDR  = 0x0004; 
+  static const int CONTROL   = 0x0008; 
+  // hardcoded lenght of the block transfer
+  static const int LENGTH    = 0x001F; 
+  
+  // Control register bits
+  static const int START = 0x1000;
+  static const int IRQ   = 0x0010;
+
+
+  //---------------
+  // Module ports
+  //---------------
+  pv_target_port<ADDRESS_TYPE , DATA_TYPE> apb_slave_port;
+  pv_initiator_port<ADDRESS_TYPE , DATA_TYPE> ahb_master_port;
+  sc_out<int> int_master_port;
+
+  //----------------
+  // Constructor
+  //----------------  
+  SC_HAS_PROCESS(dma);
+  dma(sc_module_name module_name,
+	 tlm::tlm_endianness endian = PV_HOST_ENDIAN);
+
+  //--------------------------------------------------------------------------------------------
+  //Abstract class pv_if methods implementation (overides pv_slave_base default implementation)
+  //--------------------------------------------------------------------------------------------
+  
+  tlm::tlm_status write( const ADDRESS_TYPE &addr , const DATA_TYPE &data,
+			 const unsigned int byte_enable = tlm::NO_BE,
+			 const tlm::tlm_mode mode = tlm::REGULAR,
+			 const unsigned int export_id = 0 );
+  tlm::tlm_status read( const ADDRESS_TYPE &addr , DATA_TYPE &data,
+			const unsigned int byte_enable = tlm::NO_BE,
+			const tlm::tlm_mode mode = tlm::REGULAR,
+			const unsigned int export_id = 0 );
+
+
+protected:
+  
+  tlm::tlm_endianness m_endian;       // dma endianness    
+  sc_event m_start_transfer;          // dma process related event (start)
+  sc_event m_irq_to_change;           // rise/clear interrupt signal related event
+  ADDRESS_TYPE m_dma_src_addr;       // Source address register
+  ADDRESS_TYPE m_dma_dst_addr;       // Destination address register
+  tlm::tlm_uint8_t m_dma_control;  // control register (8 bits register)    
+  
+  void transfer();                    // dma transfer management process 
+  void irq();                         // dma transfer end IRQ signal management process
+};
+
+#endif /* _DMA_H_ */
+
+

data/spec/test_data/spiritconsortium.org/Leon2TLM/irqctrl/1.4/irqctrl.xml

@@ -0,0 +1,530 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--
+// 
+// Revision:    $Revision: 1506 $
+// Date:        $Date: 2009-04-26 01:51:56 -0500 (Sun, 26 Apr 2009) $
+// 
+// Copyright (c) 2005, 2006, 2007, 2008, 2009 The SPIRIT Consortium.
+// 
+// This work forms part of a deliverable of The SPIRIT Consortium.
+// 
+// Use of these materials are governed by the legal terms and conditions
+// outlined in the disclaimer available from www.spiritconsortium.org.
+// 
+// This source file is provided on an AS IS basis.  The SPIRIT
+// Consortium disclaims any warranty express or implied including
+// any warranty of merchantability and fitness for use for a
+// particular purpose.
+// 
+// The user of the source file shall indemnify and hold The SPIRIT
+// Consortium and its members harmless from any damages or liability.
+// Users are requested to provide feedback to The SPIRIT Consortium
+// using either mailto:feedback@lists.spiritconsortium.org or the forms at 
+// http://www.spiritconsortium.org/about/contact_us/
+// 
+// This file may be copied, and distributed, with or without
+// modifications; but this notice must be included on any copy.
+-->
+<spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
+  <spirit:vendor>spiritconsortium.org</spirit:vendor>
+  <spirit:library>Leon2TLM</spirit:library>
+  <spirit:name>irqctrl</spirit:name>
+  <spirit:version>1.4</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>APB_Slave</spirit:name>
+      <spirit:busType spirit:library="AMBA2" spirit:name="APB" spirit:vendor="amba.com" spirit:version="r2p0_4"/>
+      <spirit:abstractionType spirit:library="abstractiondef.tlm" spirit:name="apb_pv" spirit:vendor="spiritconsortium.org" spirit:version="1.4"/>
+      <spirit:slave>
+        <spirit:memoryMapRef spirit:memoryMapRef="APB_MM"/>
+      </spirit:slave>
+      <spirit:connectionRequired>true</spirit:connectionRequired>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>PV_TRANS</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>apb_slave_port</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>INT_Master</spirit:name>
+      <spirit:busType spirit:library="busdef.leon2" spirit:name="IntProc" spirit:vendor="spiritconsortium.org" spirit:version="v1.0"/>
+      <spirit:abstractionType spirit:library="abstractiondef.tlm" spirit:name="IntProc_pv" spirit:vendor="spiritconsortium.org" spirit:version="1.4"/>
+      <spirit:master/>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>IRL</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>irlout</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>IRQVEC</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>irlin</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>INTack</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>intack</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>INT_Slave4</spirit:name>
+      <spirit:busType spirit:library="busdef.interrupt" spirit:name="interrupt" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:abstractionType spirit:library="busdef.interrupt" spirit:name="interrupt_rtl" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:slave/>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>IRQ</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>int4</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>INT_Slave3</spirit:name>
+      <spirit:busType spirit:library="busdef.interrupt" spirit:name="interrupt" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:abstractionType spirit:library="busdef.interrupt" spirit:name="interrupt_rtl" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:slave/>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>IRQ</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>int3</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>INT_Slave2</spirit:name>
+      <spirit:busType spirit:library="busdef.interrupt" spirit:name="interrupt" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:abstractionType spirit:library="busdef.interrupt" spirit:name="interrupt_rtl" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:slave/>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>IRQ</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>int2</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>INT_Slave1</spirit:name>
+      <spirit:busType spirit:library="busdef.interrupt" spirit:name="interrupt" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:abstractionType spirit:library="busdef.interrupt" spirit:name="interrupt_rtl" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:slave/>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>IRQ</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>int1</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>INT_Slave0</spirit:name>
+      <spirit:busType spirit:library="busdef.interrupt" spirit:name="interrupt" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:abstractionType spirit:library="busdef.interrupt" spirit:name="interrupt_rtl" spirit:vendor="spiritconsortium.org" spirit:version="1.0"/>
+      <spirit:slave/>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>IRQ</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>int0</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:memoryMaps>
+    <spirit:memoryMap>
+      <spirit:name>APB_MM</spirit:name>
+      <spirit:addressBlock>
+        <spirit:name>apbMemoryMap</spirit:name>
+        <spirit:baseAddress>0</spirit:baseAddress>
+        <spirit:range spirit:format="long">64</spirit:range>
+        <spirit:width spirit:id="width" spirit:format="long">32</spirit:width>
+        <spirit:register>
+          <spirit:name>interrupMaskandPriorityLevel</spirit:name>
+          <spirit:description>Interrupt Mask and Priority</spirit:description>
+          <spirit:addressOffset>0x0</spirit:addressOffset>
+          <spirit:size>32</spirit:size>
+          <spirit:access>read-write</spirit:access>
+          <spirit:reset>
+            <spirit:value>0x0</spirit:value>
+            <spirit:mask>0xFFFE</spirit:mask>
+          </spirit:reset>
+          <spirit:field>
+            <spirit:name>Reserved1</spirit:name>
+            <spirit:description>Reserved</spirit:description>
+            <spirit:bitOffset>0</spirit:bitOffset>
+            <spirit:bitWidth>1</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+          <spirit:field>
+            <spirit:name>imask</spirit:name>
+            <spirit:description>Indicates if an interrupt is masked (bit=0) or enabled (bit=1)</spirit:description>
+            <spirit:bitOffset>1</spirit:bitOffset>
+            <spirit:bitWidth>15</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+          <spirit:field>
+            <spirit:name>Reserved2</spirit:name>
+            <spirit:description>Reserved</spirit:description>
+            <spirit:bitOffset>16</spirit:bitOffset>
+            <spirit:bitWidth>1</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+          <spirit:field>
+            <spirit:name>ilevel</spirit:name>
+            <spirit:description>Indicates if an interrupt belongs to priority level 1 (bit=1) or 0 (bit=0)</spirit:description>
+            <spirit:bitOffset>17</spirit:bitOffset>
+            <spirit:bitWidth>15</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+        </spirit:register>
+        <spirit:register>
+          <spirit:name>interruptPendingRegister</spirit:name>
+          <spirit:description>Indicates if an interrupt is pending</spirit:description>
+          <spirit:addressOffset>0x4</spirit:addressOffset>
+          <spirit:size>32</spirit:size>
+          <spirit:access>read-write</spirit:access>
+          <spirit:field>
+            <spirit:name>Reserved1</spirit:name>
+            <spirit:description>Reserved</spirit:description>
+            <spirit:bitOffset>0</spirit:bitOffset>
+            <spirit:bitWidth>1</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+          <spirit:field>
+            <spirit:name>ipend</spirit:name>
+            <spirit:description>Indicates if an interrupt is pending (bit=1)</spirit:description>
+            <spirit:bitOffset>1</spirit:bitOffset>
+            <spirit:bitWidth>15</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+          <spirit:field>
+            <spirit:name>Reserved2</spirit:name>
+            <spirit:description>Reserved</spirit:description>
+            <spirit:bitOffset>16</spirit:bitOffset>
+            <spirit:bitWidth>16</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+        </spirit:register>
+        <spirit:register>
+          <spirit:name>interruptForceRegister</spirit:name>
+          <spirit:description>Indicates if an interrupt is being forced</spirit:description>
+          <spirit:addressOffset>0x8</spirit:addressOffset>
+          <spirit:size>32</spirit:size>
+          <spirit:access>read-write</spirit:access>
+          <spirit:field>
+            <spirit:name>Reserved1</spirit:name>
+            <spirit:description>Reserved</spirit:description>
+            <spirit:bitOffset>0</spirit:bitOffset>
+            <spirit:bitWidth>1</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+          <spirit:field>
+            <spirit:name>iforce</spirit:name>
+            <spirit:description>Indicates if an interrupt is being forced (bit=1)</spirit:description>
+            <spirit:bitOffset>1</spirit:bitOffset>
+            <spirit:bitWidth>15</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+          <spirit:field>
+            <spirit:name>Reserved2</spirit:name>
+            <spirit:description>Reserved</spirit:description>
+            <spirit:bitOffset>16</spirit:bitOffset>
+            <spirit:bitWidth>16</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+        </spirit:register>
+        <spirit:register>
+          <spirit:name>interruptClearRegister</spirit:name>
+          <spirit:description>If written with a '1', will clear corresponding bit(s) in interrupt pending register. A read returns 0.</spirit:description>
+          <spirit:addressOffset>0xc</spirit:addressOffset>
+          <spirit:size>32</spirit:size>
+          <spirit:access>read-write</spirit:access>
+          <spirit:field>
+            <spirit:name>Reserved1</spirit:name>
+            <spirit:description>Reserved</spirit:description>
+            <spirit:bitOffset>0</spirit:bitOffset>
+            <spirit:bitWidth>1</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+          <spirit:field>
+            <spirit:name>iforce</spirit:name>
+            <spirit:description>If written with a '1', will clear corresponding bit(s) in interrupt pending register. A read returns 0.</spirit:description>
+            <spirit:bitOffset>1</spirit:bitOffset>
+            <spirit:bitWidth>15</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+          <spirit:field>
+            <spirit:name>Reserved2</spirit:name>
+            <spirit:description>Reserved</spirit:description>
+            <spirit:bitOffset>16</spirit:bitOffset>
+            <spirit:bitWidth>16</spirit:bitWidth>
+            <spirit:volatile>true</spirit:volatile>
+            <spirit:access>read-write</spirit:access>
+            <spirit:testable>false</spirit:testable>
+          </spirit:field>
+        </spirit:register>
+        <spirit:register>
+          <spirit:name>interruptReadClearPendingRegister</spirit:name>
+          <spirit:description>interruptReadClearPendingRegister</spirit:description>
+          <spirit:addressOffset>0x10</spirit:addressOffset>
+          <spirit:size>32</spirit:size>
+          <spirit:volatile>true</spirit:volatile>
+          <spirit:access>read-write</spirit:access>
+        </spirit:register>
+      </spirit:addressBlock>
+    </spirit:memoryMap>
+  </spirit:memoryMaps>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>TLM_PV</spirit:name>
+        <spirit:envIdentifier>:*Simulation:</spirit:envIdentifier>
+        <spirit:language>systemc</spirit:language>
+        <spirit:modelName>irqctrl</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>sourceCode</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>apb_slave_port</spirit:name>
+        <spirit:transactional>
+          <spirit:transTypeDef>
+            <spirit:typeName>pv_target_port</spirit:typeName>
+            <spirit:typeDefinition>pv_target_port.h</spirit:typeDefinition>
+          </spirit:transTypeDef>
+          <spirit:service>
+            <spirit:initiative>provides</spirit:initiative>
+            <spirit:serviceTypeDefs>
+              <spirit:serviceTypeDef>
+                <spirit:typeName spirit:implicit="true">OSCI_TLM_PV</spirit:typeName>
+                <spirit:parameters>
+                  <spirit:parameter>
+                    <spirit:name>typedef1</spirit:name>
+                    <spirit:value>ADDRESS_TYPE</spirit:value>
+                  </spirit:parameter>
+                  <spirit:parameter>
+                    <spirit:name>typedef2</spirit:name>
+                    <spirit:value>DATA_TYPE</spirit:value>
+                  </spirit:parameter>
+                </spirit:parameters>
+              </spirit:serviceTypeDef>
+            </spirit:serviceTypeDefs>
+          </spirit:service>
+        </spirit:transactional>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>int0</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>int</spirit:typeName>
+              <spirit:typeDefinition>systemc.h</spirit:typeDefinition>
+              <spirit:viewNameRef>TLM_PV</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+          <spirit:driver>
+            <spirit:defaultValue>0</spirit:defaultValue>
+          </spirit:driver>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>int1</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>int</spirit:typeName>
+              <spirit:typeDefinition>systemc.h</spirit:typeDefinition>
+              <spirit:viewNameRef>TLM_PV</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+          <spirit:driver>
+            <spirit:defaultValue>0</spirit:defaultValue>
+          </spirit:driver>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>int2</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>int</spirit:typeName>
+              <spirit:typeDefinition>systemc.h</spirit:typeDefinition>
+              <spirit:viewNameRef>TLM_PV</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+          <spirit:driver>
+            <spirit:defaultValue>0</spirit:defaultValue>
+          </spirit:driver>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>int3</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>int</spirit:typeName>
+              <spirit:typeDefinition>systemc.h</spirit:typeDefinition>
+              <spirit:viewNameRef>TLM_PV</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+          <spirit:driver>
+            <spirit:defaultValue>0</spirit:defaultValue>
+          </spirit:driver>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>int4</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>int</spirit:typeName>
+              <spirit:typeDefinition>systemc.h</spirit:typeDefinition>
+              <spirit:viewNameRef>TLM_PV</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+          <spirit:driver>
+            <spirit:defaultValue>0</spirit:defaultValue>
+          </spirit:driver>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>irlout</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>int</spirit:typeName>
+              <spirit:typeDefinition>systemc.h</spirit:typeDefinition>
+              <spirit:viewNameRef>TLM_PV</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>irlin</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>int</spirit:typeName>
+              <spirit:typeDefinition>systemc.h</spirit:typeDefinition>
+              <spirit:viewNameRef>TLM_PV</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>intack</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>bool</spirit:typeName>
+              <spirit:typeDefinition>systemc.h</spirit:typeDefinition>
+              <spirit:viewNameRef>TLM_PV</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+          <spirit:driver>
+            <spirit:defaultValue>0</spirit:defaultValue>
+          </spirit:driver>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:fileSets>
+    <spirit:fileSet>
+      <spirit:name>sourceCode</spirit:name>
+      <spirit:file>
+        <spirit:name>tlmsrc/irqctrl.cc</spirit:name>
+        <spirit:fileType>systemCSource</spirit:fileType>
+        <spirit:dependency>tlmsrc</spirit:dependency>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>tlmsrc/irqctrl.h</spirit:name>
+        <spirit:fileType>systemCSource</spirit:fileType>
+        <spirit:isIncludeFile spirit:externalDeclarations="true">true</spirit:isIncludeFile>
+        <spirit:logicalName>timers</spirit:logicalName>
+        <spirit:dependency>../../PV</spirit:dependency>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>../../PV/pv_slave_base.h</spirit:name>
+        <spirit:fileType>unknown</spirit:fileType>
+        <spirit:isIncludeFile>true</spirit:isIncludeFile>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>../../PV/pv_target_port.h</spirit:name>
+        <spirit:fileType>unknown</spirit:fileType>
+        <spirit:isIncludeFile>true</spirit:isIncludeFile>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>../../PV/user_types.h</spirit:name>
+        <spirit:fileType>unknown</spirit:fileType>
+        <spirit:isIncludeFile>true</spirit:isIncludeFile>
+      </spirit:file>
+    </spirit:fileSet>
+  </spirit:fileSets>
+</spirit:component>