crabstone 4.0.3 → 5.0.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (54) hide show
  1. checksums.yaml +4 -4
  2. data/CHANGES.md +20 -0
  3. data/README.md +25 -8
  4. data/lib/crabstone/arch/3/constants.rb +86 -0
  5. data/lib/crabstone/arch/4/constants.rb +116 -0
  6. data/lib/crabstone/arch/5/arm.rb +111 -0
  7. data/lib/crabstone/arch/5/arm64.rb +131 -0
  8. data/lib/crabstone/arch/5/arm64_const.rb +3015 -0
  9. data/lib/crabstone/arch/5/arm_const.rb +840 -0
  10. data/lib/crabstone/arch/5/bpf.rb +81 -0
  11. data/lib/crabstone/arch/5/bpf_const.rb +124 -0
  12. data/lib/crabstone/arch/5/constants.rb +155 -0
  13. data/lib/crabstone/arch/5/evm.rb +20 -0
  14. data/lib/crabstone/arch/5/evm_const.rb +161 -0
  15. data/lib/crabstone/arch/5/m680x.rb +106 -0
  16. data/lib/crabstone/arch/5/m680x_const.rb +426 -0
  17. data/lib/crabstone/arch/5/m68k.rb +129 -0
  18. data/lib/crabstone/arch/5/m68k_const.rb +496 -0
  19. data/lib/crabstone/arch/5/mips.rb +57 -0
  20. data/lib/crabstone/arch/5/mips_const.rb +869 -0
  21. data/lib/crabstone/arch/5/mos65xx.rb +52 -0
  22. data/lib/crabstone/arch/5/mos65xx_const.rb +162 -0
  23. data/lib/crabstone/arch/5/ppc.rb +69 -0
  24. data/lib/crabstone/arch/5/ppc_const.rb +2024 -0
  25. data/lib/crabstone/arch/5/riscv.rb +58 -0
  26. data/lib/crabstone/arch/5/riscv_const.rb +455 -0
  27. data/lib/crabstone/arch/5/sh.rb +72 -0
  28. data/lib/crabstone/arch/5/sh_const.rb +376 -0
  29. data/lib/crabstone/arch/5/sparc.rb +60 -0
  30. data/lib/crabstone/arch/5/sparc_const.rb +439 -0
  31. data/lib/crabstone/arch/5/sysz.rb +60 -0
  32. data/lib/crabstone/arch/5/sysz_const.rb +2532 -0
  33. data/lib/crabstone/arch/5/tms320c64x.rb +87 -0
  34. data/lib/crabstone/arch/5/tms320c64x_const.rb +287 -0
  35. data/lib/crabstone/arch/5/tricore.rb +59 -0
  36. data/lib/crabstone/arch/5/tricore_const.rb +488 -0
  37. data/lib/crabstone/arch/5/wasm.rb +81 -0
  38. data/lib/crabstone/arch/5/wasm_const.rb +201 -0
  39. data/lib/crabstone/arch/5/x86.rb +98 -0
  40. data/lib/crabstone/arch/5/x86_const.rb +1999 -0
  41. data/lib/crabstone/arch/5/xcore.rb +59 -0
  42. data/lib/crabstone/arch/5/xcore_const.rb +171 -0
  43. data/lib/crabstone/arch/extension.rb +2 -1
  44. data/lib/crabstone/arch/register.rb +1 -1
  45. data/lib/crabstone/arch.rb +6 -0
  46. data/lib/crabstone/binding/5/detail.rb +47 -0
  47. data/lib/crabstone/binding/5/instruction.rb +23 -0
  48. data/lib/crabstone/binding.rb +4 -5
  49. data/lib/crabstone/constants.rb +2 -107
  50. data/lib/crabstone/cs_version.rb +2 -3
  51. data/lib/crabstone/disassembler.rb +2 -3
  52. data/lib/crabstone/instruction.rb +0 -1
  53. data/lib/crabstone/version.rb +1 -1
  54. metadata +51 -4
@@ -0,0 +1,81 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ require 'ffi'
6
+
7
+ require 'crabstone/arch/extension'
8
+ require_relative 'bpf_const'
9
+
10
+ module Crabstone
11
+ module BPF
12
+ class OperandMemory < FFI::Struct
13
+ layout(
14
+ :base, :uint8,
15
+ :disp, :int
16
+ )
17
+ end
18
+
19
+ class OperandValue < FFI::Union
20
+ layout(
21
+ :reg, :uint8,
22
+ :imm, :ulong,
23
+ :off, :uint,
24
+ :mem, OperandMemory,
25
+ :mmem, :uint,
26
+ :msh, :uint,
27
+ :ext, :uint
28
+ )
29
+ end
30
+
31
+ class Operand < FFI::Struct
32
+ layout(
33
+ :type, :uint,
34
+ :value, OperandValue,
35
+ :access, :uint8
36
+ )
37
+
38
+ include Crabstone::Extension::Operand
39
+
40
+ def reg?
41
+ self[:type] == OP_REG
42
+ end
43
+
44
+ def imm?
45
+ self[:type] == OP_IMM
46
+ end
47
+
48
+ def off?
49
+ self[:type] == OP_OFF
50
+ end
51
+
52
+ def mem?
53
+ [
54
+ OP_MEM,
55
+ OP_MMEM
56
+ ].include?(self[:type])
57
+ end
58
+
59
+ def mmem?
60
+ self[:type] == OP_MMEM
61
+ end
62
+
63
+ def msh?
64
+ self[:type] == OP_MSH
65
+ end
66
+
67
+ def ext?
68
+ self[:type] == OP_EXT
69
+ end
70
+ end
71
+
72
+ class Instruction < FFI::Struct
73
+ layout(
74
+ :op_count, :uint8,
75
+ :operands, [Operand, 4]
76
+ )
77
+
78
+ include Crabstone::Extension::Instruction
79
+ end
80
+ end
81
+ end
@@ -0,0 +1,124 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ require 'crabstone/arch/register'
6
+
7
+ module Crabstone
8
+ module BPF
9
+ OP_INVALID = 0
10
+ OP_REG = 1
11
+ OP_IMM = 2
12
+ OP_OFF = 3
13
+ OP_MEM = 4
14
+ OP_MMEM = 5
15
+ OP_MSH = 6
16
+ OP_EXT = 7
17
+
18
+ REG_INVALID = 0
19
+ REG_A = 1
20
+ REG_X = 2
21
+ REG_R0 = 3
22
+ REG_R1 = 4
23
+ REG_R2 = 5
24
+ REG_R3 = 6
25
+ REG_R4 = 7
26
+ REG_R5 = 8
27
+ REG_R6 = 9
28
+ REG_R7 = 10
29
+ REG_R8 = 11
30
+ REG_R9 = 12
31
+ REG_R10 = 13
32
+ REG_ENDING = 14
33
+
34
+ EXT_INVALID = 0
35
+ EXT_LEN = 1
36
+
37
+ INS_INVALID = 0
38
+ INS_ADD = 1
39
+ INS_SUB = 2
40
+ INS_MUL = 3
41
+ INS_DIV = 4
42
+ INS_OR = 5
43
+ INS_AND = 6
44
+ INS_LSH = 7
45
+ INS_RSH = 8
46
+ INS_NEG = 9
47
+ INS_MOD = 10
48
+ INS_XOR = 11
49
+ INS_MOV = 12
50
+ INS_ARSH = 13
51
+ INS_ADD64 = 14
52
+ INS_SUB64 = 15
53
+ INS_MUL64 = 16
54
+ INS_DIV64 = 17
55
+ INS_OR64 = 18
56
+ INS_AND64 = 19
57
+ INS_LSH64 = 20
58
+ INS_RSH64 = 21
59
+ INS_NEG64 = 22
60
+ INS_MOD64 = 23
61
+ INS_XOR64 = 24
62
+ INS_MOV64 = 25
63
+ INS_ARSH64 = 26
64
+ INS_LE16 = 27
65
+ INS_LE32 = 28
66
+ INS_LE64 = 29
67
+ INS_BE16 = 30
68
+ INS_BE32 = 31
69
+ INS_BE64 = 32
70
+ INS_LDW = 33
71
+ INS_LDH = 34
72
+ INS_LDB = 35
73
+ INS_LDDW = 36
74
+ INS_LDXW = 37
75
+ INS_LDXH = 38
76
+ INS_LDXB = 39
77
+ INS_LDXDW = 40
78
+ INS_STW = 41
79
+ INS_STH = 42
80
+ INS_STB = 43
81
+ INS_STDW = 44
82
+ INS_STXW = 45
83
+ INS_STXH = 46
84
+ INS_STXB = 47
85
+ INS_STXDW = 48
86
+ INS_XADDW = 49
87
+ INS_XADDDW = 50
88
+ INS_JMP = 51
89
+ INS_JEQ = 52
90
+ INS_JGT = 53
91
+ INS_JGE = 54
92
+ INS_JSET = 55
93
+ INS_JNE = 56
94
+ INS_JSGT = 57
95
+ INS_JSGE = 58
96
+ INS_CALL = 59
97
+ INS_CALLX = 60
98
+ INS_EXIT = 61
99
+ INS_JLT = 62
100
+ INS_JLE = 63
101
+ INS_JSLT = 64
102
+ INS_JSLE = 65
103
+ INS_RET = 66
104
+ INS_TAX = 67
105
+ INS_TXA = 68
106
+ INS_ENDING = 69
107
+ INS_LD = INS_LDW
108
+ INS_LDX = INS_LDXW
109
+ INS_ST = INS_STW
110
+ INS_STX = INS_STXW
111
+
112
+ GRP_INVALID = 0
113
+ GRP_LOAD = 1
114
+ GRP_STORE = 2
115
+ GRP_ALU = 3
116
+ GRP_JUMP = 4
117
+ GRP_CALL = 5
118
+ GRP_RETURN = 6
119
+ GRP_MISC = 7
120
+ GRP_ENDING = 8
121
+
122
+ extend Register
123
+ end
124
+ end
@@ -0,0 +1,155 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ module Crabstone
6
+ API_MAJOR = 5
7
+ API_MINOR = 0
8
+
9
+ VERSION_MAJOR = API_MAJOR
10
+ VERSION_MINOR = API_MINOR
11
+ VERSION_EXTRA = 1
12
+
13
+ ARCH_ARM = 0
14
+ ARCH_ARM64 = 1
15
+ ARCH_MIPS = 2
16
+ ARCH_X86 = 3
17
+ ARCH_PPC = 4
18
+ ARCH_SPARC = 5
19
+ ARCH_SYSZ = 6
20
+ ARCH_XCORE = 7
21
+ ARCH_M68K = 8
22
+ ARCH_TMS320C64X = 9
23
+ ARCH_M680X = 10
24
+ ARCH_EVM = 11
25
+ ARCH_MOS65XX = 12
26
+ ARCH_WASM = 13
27
+ ARCH_BPF = 14
28
+ ARCH_RISCV = 15
29
+ ARCH_SH = 16
30
+ ARCH_TRICORE = 17
31
+ ARCH_MAX = 18
32
+ ARCH_ALL = 0xFFFF
33
+
34
+ MODE_LITTLE_ENDIAN = 0 # little-endian mode (default mode)
35
+ MODE_ARM = 0 # ARM mode
36
+ MODE_16 = (1 << 1) # 16-bit mode (for X86)
37
+ MODE_32 = (1 << 2) # 32-bit mode (for X86)
38
+ MODE_64 = (1 << 3) # 64-bit mode (for X86, PPC)
39
+ MODE_THUMB = (1 << 4) # ARM's Thumb mode, including Thumb-2
40
+ MODE_MCLASS = (1 << 5) # ARM's Cortex-M series
41
+ MODE_V8 = (1 << 6) # ARMv8 A32 encodings for ARM
42
+ MODE_MICRO = (1 << 4) # MicroMips mode (MIPS architecture)
43
+ MODE_MIPS3 = (1 << 5) # Mips III ISA
44
+ MODE_MIPS32R6 = (1 << 6) # Mips32r6 ISA
45
+ MODE_MIPS2 = (1 << 7) # Mips II ISA
46
+ MODE_V9 = (1 << 4) # Sparc V9 mode (for Sparc)
47
+ MODE_QPX = (1 << 4) # Quad Processing eXtensions mode (PPC)
48
+ MODE_SPE = (1 << 5) # Signal Processing Engine mode (PPC)
49
+ MODE_BOOKE = (1 << 6) # Book-E mode (PPC)
50
+ MODE_PS = (1 << 7) # Paired-singles mode (PPC)
51
+ MODE_M68K_000 = (1 << 1) # M68K 68000 mode
52
+ MODE_M68K_010 = (1 << 2) # M68K 68010 mode
53
+ MODE_M68K_020 = (1 << 3) # M68K 68020 mode
54
+ MODE_M68K_030 = (1 << 4) # M68K 68030 mode
55
+ MODE_M68K_040 = (1 << 5) # M68K 68040 mode
56
+ MODE_M68K_060 = (1 << 6) # M68K 68060 mode
57
+ MODE_BIG_ENDIAN = (1 << 31) # big-endian mode
58
+ MODE_MIPS32 = MODE_32 # Mips32 ISA
59
+ MODE_MIPS64 = MODE_64 # Mips64 ISA
60
+ MODE_M680X_6301 = (1 << 1) # M680X HD6301/3 mode
61
+ MODE_M680X_6309 = (1 << 2) # M680X HD6309 mode
62
+ MODE_M680X_6800 = (1 << 3) # M680X M6800/2 mode
63
+ MODE_M680X_6801 = (1 << 4) # M680X M6801/3 mode
64
+ MODE_M680X_6805 = (1 << 5) # M680X M6805 mode
65
+ MODE_M680X_6808 = (1 << 6) # M680X M68HC08 mode
66
+ MODE_M680X_6809 = (1 << 7) # M680X M6809 mode
67
+ MODE_M680X_6811 = (1 << 8) # M680X M68HC11 mode
68
+ MODE_M680X_CPU12 = (1 << 9) # M680X CPU12 mode
69
+ MODE_M680X_HCS08 = (1 << 10) # M680X HCS08 mode
70
+ MODE_BPF_CLASSIC = 0 # Classic BPF mode (default)
71
+ MODE_BPF_EXTENDED = (1 << 0) # Extended BPF mode
72
+ MODE_RISCV32 = (1 << 0) # RISCV32 mode
73
+ MODE_RISCV64 = (1 << 1) # RISCV64 mode
74
+ MODE_RISCVC = (1 << 2) # RISCV compressed mode
75
+ MODE_MOS65XX_6502 = (1 << 1) # MOS65XXX MOS 6502
76
+ MODE_MOS65XX_65C02 = (1 << 2) # MOS65XXX WDC 65c02
77
+ MODE_MOS65XX_W65C02 = (1 << 3) # MOS65XXX WDC W65c02
78
+ MODE_MOS65XX_65816 = (1 << 4) # MOS65XXX WDC 65816, 8-bit m/x
79
+ MODE_MOS65XX_65816_LONG_M = (1 << 5) # MOS65XXX WDC 65816, 16-bit m, 8-bit x
80
+ MODE_MOS65XX_65816_LONG_X = (1 << 6) # MOS65XXX WDC 65816, 8-bit m, 16-bit x
81
+ MODE_MOS65XX_65816_LONG_MX = MODE_MOS65XX_65816_LONG_M | MODE_MOS65XX_65816_LONG_X
82
+ MODE_SH2 = 1 << 1 # SH2
83
+ MODE_SH2A = 1 << 2 # SH2A
84
+ MODE_SH3 = 1 << 3 # SH3
85
+ MODE_SH4 = 1 << 4 # SH4
86
+ MODE_SH4A = 1 << 5 # SH4A
87
+ MODE_SHFPU = 1 << 6 # w/ FPU
88
+ MODE_SHDSP = 1 << 7 # w/ DSP
89
+ MODE_TRICORE_110 = 1 << 1 # Tricore 1.1
90
+ MODE_TRICORE_120 = 1 << 2 # Tricore 1.2
91
+ MODE_TRICORE_130 = 1 << 3 # Tricore 1.3
92
+ MODE_TRICORE_131 = 1 << 4 # Tricore 1.3.1
93
+ MODE_TRICORE_160 = 1 << 5 # Tricore 1.6
94
+ MODE_TRICORE_161 = 1 << 6 # Tricore 1.6.1
95
+ MODE_TRICORE_162 = 1 << 7 # Tricore 1.6.2
96
+
97
+ OPT_INVALID = 0 # No option specified
98
+ OPT_SYNTAX = 1 # Intel X86 asm syntax (ARCH_X86 arch)
99
+ OPT_DETAIL = 2 # Break down instruction structure into details
100
+ OPT_MODE = 3 # Change engine's mode at run-time
101
+ OPT_MEM = 4 # Change engine's mode at run-time
102
+ OPT_SKIPDATA = 5 # Skip data when disassembling
103
+ OPT_SKIPDATA_SETUP = 6 # Setup user-defined function for SKIPDATA option
104
+ OPT_MNEMONIC = 7 # Customize instruction mnemonic
105
+ OPT_UNSIGNED = 8 # Print immediate in unsigned form
106
+ OPT_NO_BRANCH_OFFSET = 9 # ARM, prints branch immediates without offset.
107
+
108
+ OPT_OFF = 0 # Turn OFF an option - default option of OPT_DETAIL
109
+ OPT_ON = 3 # Turn ON an option (OPT_DETAIL)
110
+
111
+ OP_INVALID = 0 # uninitialized/invalid operand.
112
+ OP_REG = 1 # Register operand.
113
+ OP_IMM = 2 # Immediate operand.
114
+ OP_MEM = 3 # Memory operand. Can be ORed with another operand type.
115
+ OP_FP = 4 # Floating-Point operand.
116
+
117
+ GRP_INVALID = 0 # uninitialized/invalid group.
118
+ GRP_JUMP = 1 # all jump instructions (conditional+direct+indirect jumps)
119
+ GRP_CALL = 2 # all call instructions
120
+ GRP_RET = 3 # all return instructions
121
+ GRP_INT = 4 # all interrupt instructions (int+syscall)
122
+ GRP_IRET = 5 # all interrupt return instructions
123
+ GRP_PRIVILEGE = 6 # all privileged instructions
124
+ GRP_BRANCH_RELATIVE = 7 # all relative branching instructions
125
+
126
+ AC_INVALID = 0 # Invalid/unitialized access type.
127
+ AC_READ = (1 << 0) # Operand that is read from.
128
+ AC_WRITE = (1 << 1) # Operand that is written to.
129
+
130
+ OPT_SYNTAX_DEFAULT = 0 # Default assembly syntax of all platforms (OPT_SYNTAX)
131
+ OPT_SYNTAX_INTEL = 1 # Intel X86 asm syntax - default syntax on X86 (OPT_SYNTAX, ARCH_X86)
132
+ OPT_SYNTAX_ATT = 2 # ATT asm syntax (OPT_SYNTAX, ARCH_X86)
133
+ OPT_SYNTAX_NOREGNAME = 3 # Asm syntax prints register name with only number - (OPT_SYNTAX, ARCH_PPC, ARCH_ARM)
134
+ OPT_SYNTAX_MASM = 4 # MASM syntax (OPT_SYNTAX, ARCH_X86)
135
+ OPT_SYNTAX_MOTOROLA = 5 # MOS65XX use $ as hex prefix
136
+
137
+ ERR_OK = 0 # No error: everything was fine
138
+ ERR_MEM = 1 # Out-Of-Memory error: cs_open(), cs_disasm()
139
+ ERR_ARCH = 2 # Unsupported architecture: cs_open()
140
+ ERR_HANDLE = 3 # Invalid handle: cs_op_count(), cs_op_index()
141
+ ERR_CSH = 4 # Invalid csh argument: cs_close(), cs_errno(), cs_option()
142
+ ERR_MODE = 5 # Invalid/unsupported mode: cs_open()
143
+ ERR_OPTION = 6 # Invalid/unsupported option: cs_option()
144
+ ERR_DETAIL = 7 # Invalid/unsupported option: cs_option()
145
+ ERR_MEMSETUP = 8
146
+ ERR_VERSION = 9 # Unsupported version (bindings)
147
+ ERR_DIET = 10 # Information irrelevant in diet engine
148
+ ERR_SKIPDATA = 11 # Access irrelevant data for "data" instruction in SKIPDATA mode
149
+ ERR_X86_ATT = 12 # X86 AT&T syntax is unsupported (opt-out at compile time)
150
+ ERR_X86_INTEL = 13 # X86 Intel syntax is unsupported (opt-out at compile time)
151
+ ERR_X86_MASM = 14 # X86 Intel syntax is unsupported (opt-out at compile time)
152
+
153
+ SUPPORT_DIET = ARCH_ALL + 1
154
+ SUPPORT_X86_REDUCE = ARCH_ALL + 2
155
+ end
@@ -0,0 +1,20 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ require 'ffi'
6
+
7
+ require 'crabstone/arch/extension'
8
+ require_relative 'evm_const'
9
+
10
+ module Crabstone
11
+ module EVM
12
+ class Instruction < FFI::Struct
13
+ layout(
14
+ :pop, :int8,
15
+ :push, :int8,
16
+ :fee, :uint
17
+ )
18
+ end
19
+ end
20
+ end
@@ -0,0 +1,161 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ require 'crabstone/arch/register'
6
+
7
+ module Crabstone
8
+ module EVM
9
+ INS_STOP = 0
10
+ INS_ADD = 1
11
+ INS_MUL = 2
12
+ INS_SUB = 3
13
+ INS_DIV = 4
14
+ INS_SDIV = 5
15
+ INS_MOD = 6
16
+ INS_SMOD = 7
17
+ INS_ADDMOD = 8
18
+ INS_MULMOD = 9
19
+ INS_EXP = 10
20
+ INS_SIGNEXTEND = 11
21
+ INS_LT = 16
22
+ INS_GT = 17
23
+ INS_SLT = 18
24
+ INS_SGT = 19
25
+ INS_EQ = 20
26
+ INS_ISZERO = 21
27
+ INS_AND = 22
28
+ INS_OR = 23
29
+ INS_XOR = 24
30
+ INS_NOT = 25
31
+ INS_BYTE = 26
32
+ INS_SHA3 = 32
33
+ INS_ADDRESS = 48
34
+ INS_BALANCE = 49
35
+ INS_ORIGIN = 50
36
+ INS_CALLER = 51
37
+ INS_CALLVALUE = 52
38
+ INS_CALLDATALOAD = 53
39
+ INS_CALLDATASIZE = 54
40
+ INS_CALLDATACOPY = 55
41
+ INS_CODESIZE = 56
42
+ INS_CODECOPY = 57
43
+ INS_GASPRICE = 58
44
+ INS_EXTCODESIZE = 59
45
+ INS_EXTCODECOPY = 60
46
+ INS_RETURNDATASIZE = 61
47
+ INS_RETURNDATACOPY = 62
48
+ INS_BLOCKHASH = 64
49
+ INS_COINBASE = 65
50
+ INS_TIMESTAMP = 66
51
+ INS_NUMBER = 67
52
+ INS_DIFFICULTY = 68
53
+ INS_GASLIMIT = 69
54
+ INS_POP = 80
55
+ INS_MLOAD = 81
56
+ INS_MSTORE = 82
57
+ INS_MSTORE8 = 83
58
+ INS_SLOAD = 84
59
+ INS_SSTORE = 85
60
+ INS_JUMP = 86
61
+ INS_JUMPI = 87
62
+ INS_PC = 88
63
+ INS_MSIZE = 89
64
+ INS_GAS = 90
65
+ INS_JUMPDEST = 91
66
+ INS_PUSH1 = 96
67
+ INS_PUSH2 = 97
68
+ INS_PUSH3 = 98
69
+ INS_PUSH4 = 99
70
+ INS_PUSH5 = 100
71
+ INS_PUSH6 = 101
72
+ INS_PUSH7 = 102
73
+ INS_PUSH8 = 103
74
+ INS_PUSH9 = 104
75
+ INS_PUSH10 = 105
76
+ INS_PUSH11 = 106
77
+ INS_PUSH12 = 107
78
+ INS_PUSH13 = 108
79
+ INS_PUSH14 = 109
80
+ INS_PUSH15 = 110
81
+ INS_PUSH16 = 111
82
+ INS_PUSH17 = 112
83
+ INS_PUSH18 = 113
84
+ INS_PUSH19 = 114
85
+ INS_PUSH20 = 115
86
+ INS_PUSH21 = 116
87
+ INS_PUSH22 = 117
88
+ INS_PUSH23 = 118
89
+ INS_PUSH24 = 119
90
+ INS_PUSH25 = 120
91
+ INS_PUSH26 = 121
92
+ INS_PUSH27 = 122
93
+ INS_PUSH28 = 123
94
+ INS_PUSH29 = 124
95
+ INS_PUSH30 = 125
96
+ INS_PUSH31 = 126
97
+ INS_PUSH32 = 127
98
+ INS_DUP1 = 128
99
+ INS_DUP2 = 129
100
+ INS_DUP3 = 130
101
+ INS_DUP4 = 131
102
+ INS_DUP5 = 132
103
+ INS_DUP6 = 133
104
+ INS_DUP7 = 134
105
+ INS_DUP8 = 135
106
+ INS_DUP9 = 136
107
+ INS_DUP10 = 137
108
+ INS_DUP11 = 138
109
+ INS_DUP12 = 139
110
+ INS_DUP13 = 140
111
+ INS_DUP14 = 141
112
+ INS_DUP15 = 142
113
+ INS_DUP16 = 143
114
+ INS_SWAP1 = 144
115
+ INS_SWAP2 = 145
116
+ INS_SWAP3 = 146
117
+ INS_SWAP4 = 147
118
+ INS_SWAP5 = 148
119
+ INS_SWAP6 = 149
120
+ INS_SWAP7 = 150
121
+ INS_SWAP8 = 151
122
+ INS_SWAP9 = 152
123
+ INS_SWAP10 = 153
124
+ INS_SWAP11 = 154
125
+ INS_SWAP12 = 155
126
+ INS_SWAP13 = 156
127
+ INS_SWAP14 = 157
128
+ INS_SWAP15 = 158
129
+ INS_SWAP16 = 159
130
+ INS_LOG0 = 160
131
+ INS_LOG1 = 161
132
+ INS_LOG2 = 162
133
+ INS_LOG3 = 163
134
+ INS_LOG4 = 164
135
+ INS_CREATE = 240
136
+ INS_CALL = 241
137
+ INS_CALLCODE = 242
138
+ INS_RETURN = 243
139
+ INS_DELEGATECALL = 244
140
+ INS_CALLBLACKBOX = 245
141
+ INS_STATICCALL = 250
142
+ INS_REVERT = 253
143
+ INS_SUICIDE = 255
144
+ INS_INVALID = 512
145
+ INS_ENDING = 513
146
+
147
+ GRP_INVALID = 0
148
+ GRP_JUMP = 1
149
+ GRP_MATH = 8
150
+ GRP_STACK_WRITE = 9
151
+ GRP_STACK_READ = 10
152
+ GRP_MEM_WRITE = 11
153
+ GRP_MEM_READ = 12
154
+ GRP_STORE_WRITE = 13
155
+ GRP_STORE_READ = 14
156
+ GRP_HALT = 15
157
+ GRP_ENDING = 16
158
+
159
+ extend Register
160
+ end
161
+ end
@@ -0,0 +1,106 @@
1
+ # frozen_string_literal: true
2
+
3
+ # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
4
+
5
+ require 'ffi'
6
+
7
+ require 'crabstone/arch/extension'
8
+ require_relative 'm680x_const'
9
+
10
+ module Crabstone
11
+ module M680X
12
+ class OperandIdx < FFI::Struct
13
+ layout(
14
+ :base_reg, :uint,
15
+ :offset_reg, :uint,
16
+ :offset, :short,
17
+ :offset_addr, :ushort,
18
+ :offset_bits, :uint8,
19
+ :inc_dec, :int8,
20
+ :flags, :uint8
21
+ )
22
+ end
23
+
24
+ class OperandRel < FFI::Struct
25
+ layout(
26
+ :address, :ushort,
27
+ :offset, :short
28
+ )
29
+ end
30
+
31
+ class OperandExt < FFI::Struct
32
+ layout(
33
+ :address, :ushort,
34
+ :indirect, :bool
35
+ )
36
+ end
37
+
38
+ class OperandValue < FFI::Union
39
+ layout(
40
+ :imm, :int,
41
+ :reg, :uint,
42
+ :idx, OperandIdx,
43
+ :rel, OperandRel,
44
+ :ext, OperandExt,
45
+ :direct_addr, :uint8,
46
+ :const_val, :uint8
47
+ )
48
+ end
49
+
50
+ class Operand < FFI::Struct
51
+ layout(
52
+ :type, :uint,
53
+ :value, OperandValue,
54
+ :size, :uint8,
55
+ :access, :uint8
56
+ )
57
+
58
+ include Crabstone::Extension::Operand
59
+
60
+ def register?
61
+ self[:type] == OP_REGISTER
62
+ end
63
+
64
+ def immediate?
65
+ self[:type] == OP_IMMEDIATE
66
+ end
67
+
68
+ def indexed?
69
+ self[:type] == OP_INDEXED
70
+ end
71
+
72
+ def extended?
73
+ self[:type] == OP_EXTENDED
74
+ end
75
+
76
+ def direct?
77
+ self[:type] == OP_DIRECT
78
+ end
79
+
80
+ def relative?
81
+ self[:type] == OP_RELATIVE
82
+ end
83
+
84
+ def constant?
85
+ self[:type] == OP_CONSTANT
86
+ end
87
+ alias reg? register?
88
+ alias imm? immediate?
89
+ alias idx? indexed?
90
+ alias ext? extended?
91
+ alias direct_addr? direct?
92
+ alias rel? relative?
93
+ alias const_val? constant?
94
+ end
95
+
96
+ class Instruction < FFI::Struct
97
+ layout(
98
+ :flags, :uint8,
99
+ :op_count, :uint8,
100
+ :operands, [Operand, 9]
101
+ )
102
+
103
+ include Crabstone::Extension::Instruction
104
+ end
105
+ end
106
+ end