crabstone 4.0.3 → 5.0.0

data/lib/crabstone/arch/5/sh_const.rb

@@ -0,0 +1,376 @@
+# frozen_string_literal: true
+
+# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
+
+require 'crabstone/arch/register'
+
+module Crabstone
+  module SH
+    REG_INVALID = 0
+    REG_R0 = 1
+    REG_R1 = 2
+    REG_R2 = 3
+    REG_R3 = 4
+    REG_R4 = 5
+    REG_R5 = 6
+    REG_R6 = 7
+    REG_R7 = 8
+    REG_R8 = 9
+    REG_R9 = 10
+    REG_R10 = 11
+    REG_R11 = 12
+    REG_R12 = 13
+    REG_R13 = 14
+    REG_R14 = 15
+    REG_R15 = 16
+    REG_R0_BANK = 17
+    REG_R1_BANK = 18
+    REG_R2_BANK = 19
+    REG_R3_BANK = 20
+    REG_R4_BANK = 21
+    REG_R5_BANK = 22
+    REG_R6_BANK = 23
+    REG_R7_BANK = 24
+    REG_FR0 = 25
+    REG_FR1 = 26
+    REG_FR2 = 27
+    REG_FR3 = 28
+    REG_FR4 = 29
+    REG_FR5 = 30
+    REG_FR6 = 31
+    REG_FR7 = 32
+    REG_FR8 = 33
+    REG_FR9 = 34
+    REG_FR10 = 35
+    REG_FR11 = 36
+    REG_FR12 = 37
+    REG_FR13 = 38
+    REG_FR14 = 39
+    REG_FR15 = 40
+    REG_DR0 = 41
+    REG_DR2 = 42
+    REG_DR4 = 43
+    REG_DR6 = 44
+    REG_DR8 = 45
+    REG_DR10 = 46
+    REG_DR12 = 47
+    REG_DR14 = 48
+    REG_XD0 = 49
+    REG_XD2 = 50
+    REG_XD4 = 51
+    REG_XD6 = 52
+    REG_XD8 = 53
+    REG_XD10 = 54
+    REG_XD12 = 55
+    REG_XD14 = 56
+    REG_XF0 = 57
+    REG_XF1 = 58
+    REG_XF2 = 59
+    REG_XF3 = 60
+    REG_XF4 = 61
+    REG_XF5 = 62
+    REG_XF6 = 63
+    REG_XF7 = 64
+    REG_XF8 = 65
+    REG_XF9 = 66
+    REG_XF10 = 67
+    REG_XF11 = 68
+    REG_XF12 = 69
+    REG_XF13 = 70
+    REG_XF14 = 71
+    REG_XF15 = 72
+    REG_FV0 = 73
+    REG_FV4 = 74
+    REG_FV8 = 75
+    REG_FV12 = 76
+    REG_XMATRX = 77
+    REG_PC = 78
+    REG_PR = 79
+    REG_MACH = 80
+    REG_MACL = 81
+    REG_SR = 82
+    REG_GBR = 83
+    REG_SSR = 84
+    REG_SPC = 85
+    REG_SGR = 86
+    REG_DBR = 87
+    REG_VBR = 88
+    REG_TBR = 89
+    REG_RS = 90
+    REG_RE = 91
+    REG_MOD = 92
+    REG_FPUL = 93
+    REG_FPSCR = 94
+    REG_DSP_X0 = 95
+    REG_DSP_X1 = 96
+    REG_DSP_Y0 = 97
+    REG_DSP_Y1 = 98
+    REG_DSP_A0 = 99
+    REG_DSP_A1 = 100
+    REG_DSP_A0G = 101
+    REG_DSP_A1G = 102
+    REG_DSP_M0 = 103
+    REG_DSP_M1 = 104
+    REG_DSP_DSR = 105
+    REG_DSP_RSV0 = 106
+    REG_DSP_RSV1 = 107
+    REG_DSP_RSV2 = 108
+    REG_DSP_RSV3 = 109
+    REG_DSP_RSV4 = 110
+    REG_DSP_RSV5 = 111
+    REG_DSP_RSV6 = 112
+    REG_DSP_RSV7 = 113
+    REG_DSP_RSV8 = 114
+    REG_DSP_RSV9 = 115
+    REG_DSP_RSVA = 116
+    REG_DSP_RSVB = 117
+    REG_DSP_RSVC = 118
+    REG_DSP_RSVD = 119
+    REG_DSP_RSVE = 120
+    REG_DSP_RSVF = 121
+    REG_ENDING = 122
+
+    OP_INVALID = 0
+    OP_REG = 1
+    OP_IMM = 2
+    OP_MEM = 3
+
+    OP_MEM_INVALID = 0
+    OP_MEM_REG_IND = 1
+    OP_MEM_REG_POST = 2
+    OP_MEM_REG_PRE = 3
+    OP_MEM_REG_DISP = 4
+    OP_MEM_REG_R0 = 5
+    OP_MEM_GBR_DISP = 6
+    OP_MEM_GBR_R0 = 7
+    OP_MEM_PCR = 8
+    OP_MEM_TBR_DISP = 9
+    INS_DSP_INVALID = 10
+    INS_DSP_DOUBLE = 11
+    INS_DSP_SINGLE = 12
+    INS_DSP_PARALLEL = 13
+    INS_DSP_NOP = 1
+    INS_DSP_MOV = 2
+    INS_DSP_PSHL = 3
+    INS_DSP_PSHA = 4
+    INS_DSP_PMULS = 5
+    INS_DSP_PCLR_PMULS = 6
+    INS_DSP_PSUB_PMULS = 7
+    INS_DSP_PADD_PMULS = 8
+    INS_DSP_PSUBC = 9
+    INS_DSP_PADDC = 10
+    INS_DSP_PCMP = 11
+    INS_DSP_PABS = 12
+    INS_DSP_PRND = 13
+    INS_DSP_PSUB = 14
+    INS_DSP_PSUBr = 15
+    INS_DSP_PADD = 16
+    INS_DSP_PAND = 17
+    INS_DSP_PXOR = 18
+    INS_DSP_POR = 19
+    INS_DSP_PDEC = 20
+    INS_DSP_PINC = 21
+    INS_DSP_PCLR = 22
+    INS_DSP_PDMSB = 23
+    INS_DSP_PNEG = 24
+    INS_DSP_PCOPY = 25
+    INS_DSP_PSTS = 26
+    INS_DSP_PLDS = 27
+    INS_DSP_PSWAP = 28
+    INS_DSP_PWAD = 29
+    INS_DSP_PWSB = 30
+    OP_DSP_INVALID = 31
+    OP_DSP_REG_PRE = 32
+    OP_DSP_REG_IND = 33
+    OP_DSP_REG_POST = 34
+    OP_DSP_REG_INDEX = 35
+    OP_DSP_REG = 36
+    OP_DSP_IMM = 37
+    DSP_CC_INVALID = 38
+    DSP_CC_NONE = 39
+    DSP_CC_DCT = 40
+    DSP_CC_DCF = 41
+    INS_INVALID = 42
+    INS_ADD_r = 43
+    INS_ADD = 44
+    INS_ADDC = 45
+    INS_ADDV = 46
+    INS_AND = 47
+    INS_BAND = 48
+    INS_BANDNOT = 49
+    INS_BCLR = 50
+    INS_BF = 51
+    INS_BF_S = 52
+    INS_BLD = 53
+    INS_BLDNOT = 54
+    INS_BOR = 55
+    INS_BORNOT = 56
+    INS_BRA = 57
+    INS_BRAF = 58
+    INS_BSET = 59
+    INS_BSR = 60
+    INS_BSRF = 61
+    INS_BST = 62
+    INS_BT = 63
+    INS_BT_S = 64
+    INS_BXOR = 65
+    INS_CLIPS = 66
+    INS_CLIPU = 67
+    INS_CLRDMXY = 68
+    INS_CLRMAC = 69
+    INS_CLRS = 70
+    INS_CLRT = 71
+    INS_CMP_EQ = 72
+    INS_CMP_GE = 73
+    INS_CMP_GT = 74
+    INS_CMP_HI = 75
+    INS_CMP_HS = 76
+    INS_CMP_PL = 77
+    INS_CMP_PZ = 78
+    INS_CMP_STR = 79
+    INS_DIV0S = 80
+    INS_DIV0U = 81
+    INS_DIV1 = 82
+    INS_DIVS = 83
+    INS_DIVU = 84
+    INS_DMULS_L = 85
+    INS_DMULU_L = 86
+    INS_DT = 87
+    INS_EXTS_B = 88
+    INS_EXTS_W = 89
+    INS_EXTU_B = 90
+    INS_EXTU_W = 91
+    INS_FABS = 92
+    INS_FADD = 93
+    INS_FCMP_EQ = 94
+    INS_FCMP_GT = 95
+    INS_FCNVDS = 96
+    INS_FCNVSD = 97
+    INS_FDIV = 98
+    INS_FIPR = 99
+    INS_FLDI0 = 100
+    INS_FLDI1 = 101
+    INS_FLDS = 102
+    INS_FLOAT = 103
+    INS_FMAC = 104
+    INS_FMOV = 105
+    INS_FMUL = 106
+    INS_FNEG = 107
+    INS_FPCHG = 108
+    INS_FRCHG = 109
+    INS_FSCA = 110
+    INS_FSCHG = 111
+    INS_FSQRT = 112
+    INS_FSRRA = 113
+    INS_FSTS = 114
+    INS_FSUB = 115
+    INS_FTRC = 116
+    INS_FTRV = 117
+    INS_ICBI = 118
+    INS_JMP = 119
+    INS_JSR = 120
+    INS_JSR_N = 121
+    INS_LDBANK = 122
+    INS_LDC = 123
+    INS_LDRC = 124
+    INS_LDRE = 125
+    INS_LDRS = 126
+    INS_LDS = 127
+    INS_LDTLB = 128
+    INS_MAC_L = 129
+    INS_MAC_W = 130
+    INS_MOV = 131
+    INS_MOVA = 132
+    INS_MOVCA = 133
+    INS_MOVCO = 134
+    INS_MOVI20 = 135
+    INS_MOVI20S = 136
+    INS_MOVLI = 137
+    INS_MOVML = 138
+    INS_MOVMU = 139
+    INS_MOVRT = 140
+    INS_MOVT = 141
+    INS_MOVU = 142
+    INS_MOVUA = 143
+    INS_MUL_L = 144
+    INS_MULR = 145
+    INS_MULS_W = 146
+    INS_MULU_W = 147
+    INS_NEG = 148
+    INS_NEGC = 149
+    INS_NOP = 150
+    INS_NOT = 151
+    INS_NOTT = 152
+    INS_OCBI = 153
+    INS_OCBP = 154
+    INS_OCBWB = 155
+    INS_OR = 156
+    INS_PREF = 157
+    INS_PREFI = 158
+    INS_RESBANK = 159
+    INS_ROTCL = 160
+    INS_ROTCR = 161
+    INS_ROTL = 162
+    INS_ROTR = 163
+    INS_RTE = 164
+    INS_RTS = 165
+    INS_RTS_N = 166
+    INS_RTV_N = 167
+    INS_SETDMX = 168
+    INS_SETDMY = 169
+    INS_SETRC = 170
+    INS_SETS = 171
+    INS_SETT = 172
+    INS_SHAD = 173
+    INS_SHAL = 174
+    INS_SHAR = 175
+    INS_SHLD = 176
+    INS_SHLL = 177
+    INS_SHLL16 = 178
+    INS_SHLL2 = 179
+    INS_SHLL8 = 180
+    INS_SHLR = 181
+    INS_SHLR16 = 182
+    INS_SHLR2 = 183
+    INS_SHLR8 = 184
+    INS_SLEEP = 185
+    INS_STBANK = 186
+    INS_STC = 187
+    INS_STS = 188
+    INS_SUB = 189
+    INS_SUBC = 190
+    INS_SUBV = 191
+    INS_SWAP_B = 192
+    INS_SWAP_W = 193
+    INS_SYNCO = 194
+    INS_TAS = 195
+    INS_TRAPA = 196
+    INS_TST = 197
+    INS_XOR = 198
+    INS_XTRCT = 199
+    INS_DSP = 200
+    INS_ENDING = 201
+
+    GRP_INVALID = 0
+    GRP_JUMP = 1
+    GRP_CALL = 2
+    GRP_INT = 3
+    GRP_RET = 4
+    GRP_IRET = 5
+    GRP_PRIVILEGE = 6
+    GRP_BRANCH_RELATIVE = 7
+    GRP_SH1 = 8
+    GRP_SH2 = 9
+    GRP_SH2E = 10
+    GRP_SH2DSP = 11
+    GRP_SH2A = 12
+    GRP_SH2AFPU = 13
+    GRP_SH3 = 14
+    GRP_SH3DSP = 15
+    GRP_SH4 = 16
+    GRP_SH4A = 17
+    GRP_ENDING = 18
+
+    extend Register
+  end
+end

data/lib/crabstone/arch/5/sparc.rb

@@ -0,0 +1,60 @@
+# frozen_string_literal: true
+
+# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
+
+require 'ffi'
+
+require 'crabstone/arch/extension'
+require_relative 'sparc_const'
+
+module Crabstone
+  module Sparc
+    class OperandMemory < FFI::Struct
+      layout(
+        :base, :uint8,
+        :index, :uint8,
+        :disp, :int
+      )
+    end
+
+    class OperandValue < FFI::Union
+      layout(
+        :reg, :uint,
+        :imm, :long,
+        :mem, OperandMemory
+      )
+    end
+
+    class Operand < FFI::Struct
+      layout(
+        :type, :uint,
+        :value, OperandValue
+      )
+
+      include Crabstone::Extension::Operand
+
+      def reg?
+        self[:type] == OP_REG
+      end
+
+      def imm?
+        self[:type] == OP_IMM
+      end
+
+      def mem?
+        self[:type] == OP_MEM
+      end
+    end
+
+    class Instruction < FFI::Struct
+      layout(
+        :cc, :uint,
+        :hint, :uint,
+        :op_count, :uint8,
+        :operands, [Operand, 4]
+      )
+
+      include Crabstone::Extension::Instruction
+    end
+  end
+end