crabstone 4.0.3 → 5.0.0
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +4 -4
- data/CHANGES.md +20 -0
- data/README.md +25 -8
- data/lib/crabstone/arch/3/constants.rb +86 -0
- data/lib/crabstone/arch/4/constants.rb +116 -0
- data/lib/crabstone/arch/5/arm.rb +111 -0
- data/lib/crabstone/arch/5/arm64.rb +131 -0
- data/lib/crabstone/arch/5/arm64_const.rb +3015 -0
- data/lib/crabstone/arch/5/arm_const.rb +840 -0
- data/lib/crabstone/arch/5/bpf.rb +81 -0
- data/lib/crabstone/arch/5/bpf_const.rb +124 -0
- data/lib/crabstone/arch/5/constants.rb +155 -0
- data/lib/crabstone/arch/5/evm.rb +20 -0
- data/lib/crabstone/arch/5/evm_const.rb +161 -0
- data/lib/crabstone/arch/5/m680x.rb +106 -0
- data/lib/crabstone/arch/5/m680x_const.rb +426 -0
- data/lib/crabstone/arch/5/m68k.rb +129 -0
- data/lib/crabstone/arch/5/m68k_const.rb +496 -0
- data/lib/crabstone/arch/5/mips.rb +57 -0
- data/lib/crabstone/arch/5/mips_const.rb +869 -0
- data/lib/crabstone/arch/5/mos65xx.rb +52 -0
- data/lib/crabstone/arch/5/mos65xx_const.rb +162 -0
- data/lib/crabstone/arch/5/ppc.rb +69 -0
- data/lib/crabstone/arch/5/ppc_const.rb +2024 -0
- data/lib/crabstone/arch/5/riscv.rb +58 -0
- data/lib/crabstone/arch/5/riscv_const.rb +455 -0
- data/lib/crabstone/arch/5/sh.rb +72 -0
- data/lib/crabstone/arch/5/sh_const.rb +376 -0
- data/lib/crabstone/arch/5/sparc.rb +60 -0
- data/lib/crabstone/arch/5/sparc_const.rb +439 -0
- data/lib/crabstone/arch/5/sysz.rb +60 -0
- data/lib/crabstone/arch/5/sysz_const.rb +2532 -0
- data/lib/crabstone/arch/5/tms320c64x.rb +87 -0
- data/lib/crabstone/arch/5/tms320c64x_const.rb +287 -0
- data/lib/crabstone/arch/5/tricore.rb +59 -0
- data/lib/crabstone/arch/5/tricore_const.rb +488 -0
- data/lib/crabstone/arch/5/wasm.rb +81 -0
- data/lib/crabstone/arch/5/wasm_const.rb +201 -0
- data/lib/crabstone/arch/5/x86.rb +98 -0
- data/lib/crabstone/arch/5/x86_const.rb +1999 -0
- data/lib/crabstone/arch/5/xcore.rb +59 -0
- data/lib/crabstone/arch/5/xcore_const.rb +171 -0
- data/lib/crabstone/arch/extension.rb +2 -1
- data/lib/crabstone/arch/register.rb +1 -1
- data/lib/crabstone/arch.rb +6 -0
- data/lib/crabstone/binding/5/detail.rb +47 -0
- data/lib/crabstone/binding/5/instruction.rb +23 -0
- data/lib/crabstone/binding.rb +4 -5
- data/lib/crabstone/constants.rb +2 -107
- data/lib/crabstone/cs_version.rb +2 -3
- data/lib/crabstone/disassembler.rb +2 -3
- data/lib/crabstone/instruction.rb +0 -1
- data/lib/crabstone/version.rb +1 -1
- metadata +51 -4
checksums.yaml
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SHA256:
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metadata.gz:
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data.tar.gz:
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metadata.gz: 61a5d2f9b0883060f78093231c7679e9d31fff9d30e90eb624f3dd08b2b3b046
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data.tar.gz: 781b06af4e9ef704e2e076c5ebd66e679cd6e2a7e4bf9af9d1f98dd30b130b5a
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metadata.gz: 3cbdd4aebed09844010ed984f2ec2013bac24c99966bd405f9448bf9043bdaec5ab29ffcd24fa287a3f2a02037825990f1f34da6c7a944e81cb618fd236b3f2c
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data.tar.gz: c2fd2bac156c6156285bf144aa16a243499e3630de3b7eda720cf0abd2e9788d704e6dc70037b040f59651fdfc3d6ff6cc68356c77beba1cc0788454e37bcf7d
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data/CHANGES.md
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## 5.0.0
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* Support Capstone 5!
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* New architectures: BPF, MOS65XX, RISC-V, TriCore, SuperH, and WASM
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* Ensured Ruby version support 3.1 ~ 3.3
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* [Diff from previous release](https://github.com/david942j/crabstone/compare/v4.0.4...v5.0.0)
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## 4.0.4
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* Ensured Ruby version support 2.6 ~ 3.1
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* [Diff from previous release](https://github.com/david942j/crabstone/compare/v4.0.3...v4.0.4)
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## 4.0.3
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* Fixed Instruction class redefinition ([#12](https://github.com/david942j/crabstone/pull/12))
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* [Diff from previous release](https://github.com/david942j/crabstone/compare/v4.0.2...v4.0.3)
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## 4.0.2
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* Supported binding Capstone 4.0.2
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* Raised errors when the version of libcapstone is not supported
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* Internal refactors and code cleanup
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* [Diff from previous release](https://github.com/david942j/crabstone/compare/4.0.0...v4.0.2)
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## 4.0.0
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* Supported *both* Capstone 3.x and 4.x.
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* Supported 4 new architectures: M68K, M680X, TMS320C64x, and EVM.
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data/README.md
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[](https://badge.fury.io/rb/crabstone)
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[](https://github.com/david942j/crabstone/actions)
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[](https://codeclimate.com/github/david942j/crabstone)
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[](https://codeclimate.com/github/david942j/crabstone/coverage)
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[](https://opensource.org/licenses/BSD-3-Clause)
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crabstone
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====
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Current library support: Capstone 3 \& 4
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Current library support: Capstone 3 \& 4 \& 5
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----
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( FROM THE CAPSTONE README )
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To install:
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----
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First install the capstone library from either https://github.com/
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First install the capstone library from either https://github.com/capstone-engine/capstone
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or http://www.capstone-engine.org
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Then:
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To write code:
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----
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Check the tests in [Capstone](https://github.com/
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Check the tests in [Capstone](https://github.com/capstone-engine/capstone) for
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more examples. Here is "Hello World":
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```ruby
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require 'crabstone'
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-
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arm =
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"\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22" \
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"\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3"
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begin
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cs = Disassembler.new(ARCH_ARM, MODE_ARM)
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cs = Crabstone::Disassembler.new(Crabstone::ARCH_ARM, Crabstone::MODE_ARM)
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puts "Hello from Capstone v#{cs.version.join('.')}!"
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puts 'Disasm:'
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cs.disasm(arm, 0x1000).each do |i|
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printf("0x%x:\t%s\t\t%s\n", i.address, i.mnemonic, i.op_str)
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end
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rescue
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rescue Crabstone::Error => e
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raise "Disassembly error: #{e.message}"
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ensure
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cs.close
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end
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rescue
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rescue Crabstone::Error => e
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raise "Unable to open engine: #{e.message}"
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end
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```
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Sample output (exact content may differ according to the Capstone engine version
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you are using):
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```
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Hello from Capstone v3.0!
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Disasm:
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0x1000: bl #0xfbc
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0x1004: str lr, [sp, #-4]!
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0x1008: andeq r0, r0, r0
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0x100c: str r8, [r2, #-0x3e0]!
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0x1010: mcreq p2, #0, r0, c3, c1, #7
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0x1014: mov r0, #0
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0x1018: strb r3, [r1, r2]
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0x101c: cmp r3, #0
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```
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Contributing:
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----
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# frozen_string_literal: true
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# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
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module Crabstone
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API_MAJOR = 3
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API_MINOR = 0
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VERSION_MAJOR = API_MAJOR
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VERSION_MINOR = API_MINOR
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VERSION_EXTRA = 5
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ARCH_ARM = 0
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ARCH_ARM64 = 1
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ARCH_MIPS = 2
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ARCH_X86 = 3
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ARCH_PPC = 4
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ARCH_SPARC = 5
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ARCH_SYSZ = 6
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ARCH_XCORE = 7
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ARCH_MAX = 8
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ARCH_ALL = 0xFFFF
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MODE_LITTLE_ENDIAN = 0 # little-endian mode (default mode)
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MODE_ARM = 0 # ARM mode
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MODE_16 = (1 << 1) # 16-bit mode (for X86)
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MODE_32 = (1 << 2) # 32-bit mode (for X86)
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MODE_64 = (1 << 3) # 64-bit mode (for X86, PPC)
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MODE_THUMB = (1 << 4) # ARM's Thumb mode, including Thumb-2
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MODE_MCLASS = (1 << 5) # ARM's Cortex-M series
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MODE_V8 = (1 << 6) # ARMv8 A32 encodings for ARM
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MODE_MICRO = (1 << 4) # MicroMips mode (MIPS architecture)
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MODE_MIPS3 = (1 << 5) # Mips III ISA
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MODE_MIPS32R6 = (1 << 6) # Mips32r6 ISA
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MODE_MIPSGP64 = (1 << 7) # General Purpose Registers are 64-bit wide (MIPS arch)
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MODE_V9 = (1 << 4) # Sparc V9 mode (for Sparc)
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MODE_BIG_ENDIAN = (1 << 31) # big-endian mode
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MODE_MIPS32 = MODE_32 # Mips32 ISA
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MODE_MIPS64 = MODE_64 # Mips64 ISA
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OPT_SYNTAX = 1 # Intel X86 asm syntax (ARCH_X86 arch)
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OPT_DETAIL = 2 # Break down instruction structure into details
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OPT_MODE = 3 # Change engine's mode at run-time
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OPT_MEM = 4 # Change engine's mode at run-time
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OPT_SKIPDATA = 5 # Skip data when disassembling
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OPT_SKIPDATA_SETUP = 6 # Setup user-defined function for SKIPDATA option
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OPT_OFF = 0 # Turn OFF an option - default option of OPT_DETAIL
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OPT_ON = 3 # Turn ON an option (OPT_DETAIL)
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OP_INVALID = 0
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OP_REG = 1
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OP_IMM = 2
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OP_MEM = 3
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OP_FP = 4
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GRP_INVALID = 0 # uninitialized/invalid group.
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GRP_JUMP = 1 # all jump instructions (conditional+direct+indirect jumps)
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GRP_CALL = 2 # all call instructions
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GRP_RET = 3 # all return instructions
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GRP_INT = 4 # all interrupt instructions (int+syscall)
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GRP_IRET = 5 # all interrupt return instructions
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OPT_SYNTAX_DEFAULT = 0 # Default assembly syntax of all platforms (OPT_SYNTAX)
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OPT_SYNTAX_INTEL = 1 # Intel X86 asm syntax - default syntax on X86 (OPT_SYNTAX, ARCH_X86)
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OPT_SYNTAX_ATT = 2 # ATT asm syntax (OPT_SYNTAX, ARCH_X86)
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OPT_SYNTAX_NOREGNAME = 3 # Asm syntax prints register name with only number - (OPT_SYNTAX, ARCH_PPC, ARCH_ARM)
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ERR_OK = 0 # No error: everything was fine
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ERR_MEM = 1 # Out-Of-Memory error: cs_open(), cs_disasm()
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ERR_ARCH = 2 # Unsupported architecture: cs_open()
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ERR_HANDLE = 3 # Invalid handle: cs_op_count(), cs_op_index()
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ERR_CSH = 4 # Invalid csh argument: cs_close(), cs_errno(), cs_option()
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ERR_MODE = 5 # Invalid/unsupported mode: cs_open()
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ERR_OPTION = 6 # Invalid/unsupported option: cs_option()
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ERR_DETAIL = 7 # Invalid/unsupported option: cs_option()
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ERR_MEMSETUP = 8
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ERR_VERSION = 9 # Unsupported version (bindings)
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ERR_DIET = 10 # Information irrelevant in diet engine
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ERR_SKIPDATA = 11 # Access irrelevant data for "data" instruction in SKIPDATA mode
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ERR_X86_ATT = 12 # X86 AT&T syntax is unsupported (opt-out at compile time)
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ERR_X86_INTEL = 13 # X86 Intel syntax is unsupported (opt-out at compile time)
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SUPPORT_DIET = ARCH_ALL + 1
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SUPPORT_X86_REDUCE = ARCH_ALL + 2
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end
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# frozen_string_literal: true
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# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
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module Crabstone
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API_MAJOR = 4
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API_MINOR = 0
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VERSION_MAJOR = API_MAJOR
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VERSION_MINOR = API_MINOR
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VERSION_EXTRA = 2
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ARCH_ARM = 0
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ARCH_ARM64 = 1
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ARCH_MIPS = 2
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ARCH_X86 = 3
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ARCH_PPC = 4
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ARCH_SPARC = 5
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ARCH_SYSZ = 6
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ARCH_XCORE = 7
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ARCH_M68K = 8
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ARCH_TMS320C64X = 9
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ARCH_M680X = 10
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ARCH_EVM = 11
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ARCH_MAX = 12
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ARCH_ALL = 0xFFFF
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MODE_LITTLE_ENDIAN = 0 # little-endian mode (default mode)
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MODE_ARM = 0 # ARM mode
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MODE_16 = (1 << 1) # 16-bit mode (for X86)
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MODE_32 = (1 << 2) # 32-bit mode (for X86)
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MODE_64 = (1 << 3) # 64-bit mode (for X86, PPC)
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MODE_THUMB = (1 << 4) # ARM's Thumb mode, including Thumb-2
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MODE_MCLASS = (1 << 5) # ARM's Cortex-M series
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MODE_V8 = (1 << 6) # ARMv8 A32 encodings for ARM
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MODE_MICRO = (1 << 4) # MicroMips mode (MIPS architecture)
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MODE_MIPS3 = (1 << 5) # Mips III ISA
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MODE_MIPS32R6 = (1 << 6) # Mips32r6 ISA
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MODE_MIPS2 = (1 << 7) # Mips II ISA
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MODE_V9 = (1 << 4) # Sparc V9 mode (for Sparc)
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MODE_QPX = (1 << 4) # Quad Processing eXtensions mode (PPC)
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MODE_M68K_000 = (1 << 1) # M68K 68000 mode
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MODE_M68K_010 = (1 << 2) # M68K 68010 mode
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MODE_M68K_020 = (1 << 3) # M68K 68020 mode
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MODE_M68K_030 = (1 << 4) # M68K 68030 mode
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MODE_M68K_040 = (1 << 5) # M68K 68040 mode
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MODE_M68K_060 = (1 << 6) # M68K 68060 mode
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MODE_BIG_ENDIAN = (1 << 31) # big-endian mode
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MODE_MIPS32 = MODE_32 # Mips32 ISA
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MODE_MIPS64 = MODE_64 # Mips64 ISA
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MODE_M680X_6301 = (1 << 1) # M680X HD6301/3 mode
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MODE_M680X_6309 = (1 << 2) # M680X HD6309 mode
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MODE_M680X_6800 = (1 << 3) # M680X M6800/2 mode
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MODE_M680X_6801 = (1 << 4) # M680X M6801/3 mode
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MODE_M680X_6805 = (1 << 5) # M680X M6805 mode
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MODE_M680X_6808 = (1 << 6) # M680X M68HC08 mode
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MODE_M680X_6809 = (1 << 7) # M680X M6809 mode
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MODE_M680X_6811 = (1 << 8) # M680X M68HC11 mode
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MODE_M680X_CPU12 = (1 << 9) # M680X CPU12 mode
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|
+
MODE_M680X_HCS08 = (1 << 10) # M680X HCS08 mode
|
61
|
+
|
62
|
+
OPT_SYNTAX = 1 # Intel X86 asm syntax (ARCH_X86 arch)
|
63
|
+
OPT_DETAIL = 2 # Break down instruction structure into details
|
64
|
+
OPT_MODE = 3 # Change engine's mode at run-time
|
65
|
+
OPT_MEM = 4 # Change engine's mode at run-time
|
66
|
+
OPT_SKIPDATA = 5 # Skip data when disassembling
|
67
|
+
OPT_SKIPDATA_SETUP = 6 # Setup user-defined function for SKIPDATA option
|
68
|
+
OPT_MNEMONIC = 7 # Customize instruction mnemonic
|
69
|
+
OPT_UNSIGNED = 8 # Print immediate in unsigned form
|
70
|
+
|
71
|
+
OPT_OFF = 0 # Turn OFF an option - default option of OPT_DETAIL
|
72
|
+
OPT_ON = 3 # Turn ON an option (OPT_DETAIL)
|
73
|
+
|
74
|
+
OP_INVALID = 0
|
75
|
+
OP_REG = 1
|
76
|
+
OP_IMM = 2
|
77
|
+
OP_MEM = 3
|
78
|
+
OP_FP = 4
|
79
|
+
|
80
|
+
GRP_INVALID = 0 # uninitialized/invalid group.
|
81
|
+
GRP_JUMP = 1 # all jump instructions (conditional+direct+indirect jumps)
|
82
|
+
GRP_CALL = 2 # all call instructions
|
83
|
+
GRP_RET = 3 # all return instructions
|
84
|
+
GRP_INT = 4 # all interrupt instructions (int+syscall)
|
85
|
+
GRP_IRET = 5 # all interrupt return instructions
|
86
|
+
GRP_PRIVILEGE = 6 # all privileged instructions
|
87
|
+
|
88
|
+
AC_INVALID = 0 # Invalid/unitialized access type.
|
89
|
+
AC_READ = (1 << 0) # Operand that is read from.
|
90
|
+
AC_WRITE = (1 << 1) # Operand that is written to.
|
91
|
+
|
92
|
+
OPT_SYNTAX_DEFAULT = 0 # Default assembly syntax of all platforms (OPT_SYNTAX)
|
93
|
+
OPT_SYNTAX_INTEL = 1 # Intel X86 asm syntax - default syntax on X86 (OPT_SYNTAX, ARCH_X86)
|
94
|
+
OPT_SYNTAX_ATT = 2 # ATT asm syntax (OPT_SYNTAX, ARCH_X86)
|
95
|
+
OPT_SYNTAX_NOREGNAME = 3 # Asm syntax prints register name with only number - (OPT_SYNTAX, ARCH_PPC, ARCH_ARM)
|
96
|
+
OPT_SYNTAX_MASM = 4 # MASM syntax (OPT_SYNTAX, ARCH_X86)
|
97
|
+
|
98
|
+
ERR_OK = 0 # No error: everything was fine
|
99
|
+
ERR_MEM = 1 # Out-Of-Memory error: cs_open(), cs_disasm()
|
100
|
+
ERR_ARCH = 2 # Unsupported architecture: cs_open()
|
101
|
+
ERR_HANDLE = 3 # Invalid handle: cs_op_count(), cs_op_index()
|
102
|
+
ERR_CSH = 4 # Invalid csh argument: cs_close(), cs_errno(), cs_option()
|
103
|
+
ERR_MODE = 5 # Invalid/unsupported mode: cs_open()
|
104
|
+
ERR_OPTION = 6 # Invalid/unsupported option: cs_option()
|
105
|
+
ERR_DETAIL = 7 # Invalid/unsupported option: cs_option()
|
106
|
+
ERR_MEMSETUP = 8
|
107
|
+
ERR_VERSION = 9 # Unsupported version (bindings)
|
108
|
+
ERR_DIET = 10 # Information irrelevant in diet engine
|
109
|
+
ERR_SKIPDATA = 11 # Access irrelevant data for "data" instruction in SKIPDATA mode
|
110
|
+
ERR_X86_ATT = 12 # X86 AT&T syntax is unsupported (opt-out at compile time)
|
111
|
+
ERR_X86_INTEL = 13 # X86 Intel syntax is unsupported (opt-out at compile time)
|
112
|
+
ERR_X86_MASM = 14 # X86 Intel syntax is unsupported (opt-out at compile time)
|
113
|
+
|
114
|
+
SUPPORT_DIET = ARCH_ALL + 1
|
115
|
+
SUPPORT_X86_REDUCE = ARCH_ALL + 2
|
116
|
+
end
|
@@ -0,0 +1,111 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
|
4
|
+
|
5
|
+
require 'ffi'
|
6
|
+
|
7
|
+
require 'crabstone/arch/extension'
|
8
|
+
require_relative 'arm_const'
|
9
|
+
|
10
|
+
module Crabstone
|
11
|
+
module ARM
|
12
|
+
class OperandShift < FFI::Struct
|
13
|
+
layout(
|
14
|
+
:type, :uint,
|
15
|
+
:value, :uint
|
16
|
+
)
|
17
|
+
end
|
18
|
+
|
19
|
+
class OperandMemory < FFI::Struct
|
20
|
+
layout(
|
21
|
+
:base, :uint,
|
22
|
+
:index, :uint,
|
23
|
+
:scale, :int,
|
24
|
+
:disp, :int,
|
25
|
+
:lshift, :int
|
26
|
+
)
|
27
|
+
end
|
28
|
+
|
29
|
+
class OperandValue < FFI::Union
|
30
|
+
layout(
|
31
|
+
:reg, :uint,
|
32
|
+
:imm, :int,
|
33
|
+
:fp, :double,
|
34
|
+
:mem, OperandMemory,
|
35
|
+
:setend, :int
|
36
|
+
)
|
37
|
+
end
|
38
|
+
|
39
|
+
class Operand < FFI::Struct
|
40
|
+
layout(
|
41
|
+
:vector_index, :int,
|
42
|
+
:shift, OperandShift,
|
43
|
+
:type, :uint,
|
44
|
+
:value, OperandValue,
|
45
|
+
:subtracted, :bool,
|
46
|
+
:access, :uint8,
|
47
|
+
:neon_lane, :int8
|
48
|
+
)
|
49
|
+
|
50
|
+
include Crabstone::Extension::Operand
|
51
|
+
|
52
|
+
def reg?
|
53
|
+
[
|
54
|
+
OP_REG,
|
55
|
+
OP_SYSREG
|
56
|
+
].include?(self[:type])
|
57
|
+
end
|
58
|
+
|
59
|
+
def imm?
|
60
|
+
[
|
61
|
+
OP_IMM,
|
62
|
+
OP_CIMM,
|
63
|
+
OP_PIMM
|
64
|
+
].include?(self[:type])
|
65
|
+
end
|
66
|
+
|
67
|
+
def mem?
|
68
|
+
self[:type] == OP_MEM
|
69
|
+
end
|
70
|
+
|
71
|
+
def fp?
|
72
|
+
self[:type] == OP_FP
|
73
|
+
end
|
74
|
+
|
75
|
+
def cimm?
|
76
|
+
self[:type] == OP_CIMM
|
77
|
+
end
|
78
|
+
|
79
|
+
def pimm?
|
80
|
+
self[:type] == OP_PIMM
|
81
|
+
end
|
82
|
+
|
83
|
+
def setend?
|
84
|
+
self[:type] == OP_SETEND
|
85
|
+
end
|
86
|
+
|
87
|
+
def sysreg?
|
88
|
+
self[:type] == OP_SYSREG
|
89
|
+
end
|
90
|
+
end
|
91
|
+
|
92
|
+
class Instruction < FFI::Struct
|
93
|
+
layout(
|
94
|
+
:usermode, :bool,
|
95
|
+
:vector_size, :int,
|
96
|
+
:vector_data, :int,
|
97
|
+
:cps_mode, :int,
|
98
|
+
:cps_flag, :int,
|
99
|
+
:cc, :uint,
|
100
|
+
:update_flags, :bool,
|
101
|
+
:writeback, :bool,
|
102
|
+
:post_index, :bool,
|
103
|
+
:mem_barrier, :int,
|
104
|
+
:op_count, :uint8,
|
105
|
+
:operands, [Operand, 36]
|
106
|
+
)
|
107
|
+
|
108
|
+
include Crabstone::Extension::Instruction
|
109
|
+
end
|
110
|
+
end
|
111
|
+
end
|
@@ -0,0 +1,131 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
|
4
|
+
|
5
|
+
require 'ffi'
|
6
|
+
|
7
|
+
require 'crabstone/arch/extension'
|
8
|
+
require_relative 'arm64_const'
|
9
|
+
|
10
|
+
module Crabstone
|
11
|
+
module ARM64
|
12
|
+
class OperandShift < FFI::Struct
|
13
|
+
layout(
|
14
|
+
:type, :uint,
|
15
|
+
:value, :uint
|
16
|
+
)
|
17
|
+
end
|
18
|
+
|
19
|
+
class OperandMemory < FFI::Struct
|
20
|
+
layout(
|
21
|
+
:base, :uint,
|
22
|
+
:index, :uint,
|
23
|
+
:disp, :int
|
24
|
+
)
|
25
|
+
end
|
26
|
+
|
27
|
+
class OperandSmeIndex < FFI::Struct
|
28
|
+
layout(
|
29
|
+
:reg, :uint,
|
30
|
+
:base, :uint,
|
31
|
+
:disp, :int
|
32
|
+
)
|
33
|
+
end
|
34
|
+
|
35
|
+
class OperandValue < FFI::Union
|
36
|
+
layout(
|
37
|
+
:reg, :uint,
|
38
|
+
:imm, :long,
|
39
|
+
:fp, :double,
|
40
|
+
:mem, OperandMemory,
|
41
|
+
:pstate, :int,
|
42
|
+
:sys, :uint,
|
43
|
+
:prefetch, :int,
|
44
|
+
:barrier, :int,
|
45
|
+
:sme_index, OperandSmeIndex
|
46
|
+
)
|
47
|
+
end
|
48
|
+
|
49
|
+
class Operand < FFI::Struct
|
50
|
+
layout(
|
51
|
+
:vector_index, :int,
|
52
|
+
:vas, :int,
|
53
|
+
:shift, OperandShift,
|
54
|
+
:ext, :uint,
|
55
|
+
:type, :uint,
|
56
|
+
:svcr, :uint,
|
57
|
+
:value, OperandValue,
|
58
|
+
:access, :uint8
|
59
|
+
)
|
60
|
+
def shift?
|
61
|
+
self[:shift][:type] != SFT_INVALID
|
62
|
+
end
|
63
|
+
|
64
|
+
def ext?
|
65
|
+
self[:ext] != EXT_INVALID
|
66
|
+
end
|
67
|
+
|
68
|
+
include Crabstone::Extension::Operand
|
69
|
+
|
70
|
+
def reg?
|
71
|
+
self[:type] == OP_REG
|
72
|
+
end
|
73
|
+
|
74
|
+
def imm?
|
75
|
+
[
|
76
|
+
OP_IMM,
|
77
|
+
OP_CIMM
|
78
|
+
].include?(self[:type])
|
79
|
+
end
|
80
|
+
|
81
|
+
def mem?
|
82
|
+
self[:type] == OP_MEM
|
83
|
+
end
|
84
|
+
|
85
|
+
def fp?
|
86
|
+
self[:type] == OP_FP
|
87
|
+
end
|
88
|
+
|
89
|
+
def cimm?
|
90
|
+
self[:type] == OP_CIMM
|
91
|
+
end
|
92
|
+
|
93
|
+
def pstate?
|
94
|
+
self[:type] == OP_PSTATE
|
95
|
+
end
|
96
|
+
|
97
|
+
def sys?
|
98
|
+
self[:type] == OP_SYS
|
99
|
+
end
|
100
|
+
|
101
|
+
def svcr?
|
102
|
+
self[:type] == OP_SVCR
|
103
|
+
end
|
104
|
+
|
105
|
+
def prefetch?
|
106
|
+
self[:type] == OP_PREFETCH
|
107
|
+
end
|
108
|
+
|
109
|
+
def barrier?
|
110
|
+
self[:type] == OP_BARRIER
|
111
|
+
end
|
112
|
+
|
113
|
+
def sme_index?
|
114
|
+
self[:type] == OP_SME_INDEX
|
115
|
+
end
|
116
|
+
end
|
117
|
+
|
118
|
+
class Instruction < FFI::Struct
|
119
|
+
layout(
|
120
|
+
:cc, :uint,
|
121
|
+
:update_flags, :bool,
|
122
|
+
:writeback, :bool,
|
123
|
+
:post_index, :bool,
|
124
|
+
:op_count, :uint8,
|
125
|
+
:operands, [Operand, 8]
|
126
|
+
)
|
127
|
+
|
128
|
+
include Crabstone::Extension::Instruction
|
129
|
+
end
|
130
|
+
end
|
131
|
+
end
|