ceedling 0.0.2 → 0.0.3

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Files changed (857) hide show
  1. data/README.md +17 -0
  2. data/bin/ceedling +17 -0
  3. data/ceedling-gem.sublime-project +442 -0
  4. data/ceedling.gemspec +2 -1
  5. data/examples/temp_sensor/project.yml +71 -0
  6. data/examples/temp_sensor/rakefile.rb +4 -0
  7. data/{new_project_template/vendor/ceedling/vendor/cmock/examples → examples/temp_sensor}/src/AT91SAM7X256.h +0 -0
  8. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcConductor.c +0 -0
  9. data/{new_project_template/vendor/ceedling/vendor/cmock/examples → examples/temp_sensor}/src/AdcConductor.h +0 -0
  10. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcHardware.c +0 -0
  11. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcHardware.h +0 -0
  12. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcHardwareConfigurator.c +0 -0
  13. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcHardwareConfigurator.h +0 -0
  14. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcModel.c +0 -0
  15. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcModel.h +0 -0
  16. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcTemperatureSensor.c +0 -0
  17. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcTemperatureSensor.h +0 -0
  18. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/Executor.c +0 -0
  19. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/Executor.h +0 -0
  20. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/IntrinsicsWrapper.c +0 -0
  21. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/IntrinsicsWrapper.h +0 -0
  22. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/Main.c +0 -0
  23. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/Main.h +0 -0
  24. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/Model.c +0 -0
  25. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/Model.h +0 -0
  26. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/ModelConfig.h +0 -0
  27. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TaskScheduler.c +0 -0
  28. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TaskScheduler.h +0 -0
  29. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TemperatureCalculator.c +0 -0
  30. data/{new_project_template/vendor/ceedling/vendor/cmock/examples → examples/temp_sensor}/src/TemperatureCalculator.h +0 -0
  31. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TemperatureFilter.c +0 -0
  32. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TemperatureFilter.h +0 -0
  33. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerConductor.c +0 -0
  34. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerConductor.h +0 -0
  35. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerConfigurator.c +0 -0
  36. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerConfigurator.h +0 -0
  37. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerHardware.c +0 -0
  38. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerHardware.h +0 -0
  39. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerInterruptConfigurator.c +0 -0
  40. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerInterruptConfigurator.h +0 -0
  41. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerInterruptHandler.c +0 -0
  42. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerInterruptHandler.h +0 -0
  43. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerModel.c +0 -0
  44. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerModel.h +0 -0
  45. data/{new_project_template/vendor/ceedling/vendor/cmock/examples → examples/temp_sensor}/src/Types.h +0 -0
  46. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartBaudRateRegisterCalculator.c +0 -0
  47. data/{new_project_template/vendor/ceedling/vendor/cmock/examples → examples/temp_sensor}/src/UsartBaudRateRegisterCalculator.h +0 -0
  48. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartConductor.c +0 -0
  49. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartConductor.h +0 -0
  50. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartConfigurator.c +0 -0
  51. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartConfigurator.h +0 -0
  52. data/examples/temp_sensor/src/UsartGetChar.c +6 -0
  53. data/examples/temp_sensor/src/UsartGetChar.h +8 -0
  54. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartHardware.c +12 -0
  55. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartHardware.h +1 -0
  56. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartModel.c +0 -0
  57. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartModel.h +0 -0
  58. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartPutChar.c +0 -0
  59. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartPutChar.h +0 -0
  60. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartTransmitBufferStatus.c +0 -0
  61. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartTransmitBufferStatus.h +0 -0
  62. data/{new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/helper → examples/temp_sensor/test/support}/UnityHelper.c +0 -0
  63. data/{new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/helper → examples/temp_sensor/test/support}/UnityHelper.h +0 -0
  64. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestAdcConductor.c → examples/temp_sensor/test/test_AdcConductor.c} +0 -0
  65. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestAdcHardware.c → examples/temp_sensor/test/test_AdcHardware.c} +0 -0
  66. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestAdcHardwareConfigurator.c → examples/temp_sensor/test/test_AdcHardwareConfigurator.c} +0 -0
  67. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestAdcTemperatureSensor.c → examples/temp_sensor/test/test_AdcTemperatureSensor.c} +0 -0
  68. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestExecutor.c → examples/temp_sensor/test/test_Executor.c} +0 -0
  69. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestModel.c → examples/temp_sensor/test/test_Model.c} +0 -0
  70. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestTaskScheduler.c → examples/temp_sensor/test/test_TaskScheduler.c} +0 -0
  71. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestTemperatureCalculator.c → examples/temp_sensor/test/test_TemperatureCalculator.c} +0 -0
  72. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestTemperatureFilter.c → examples/temp_sensor/test/test_TemperatureFilter.c} +2 -0
  73. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestAdcModel.c → examples/temp_sensor/test/test_TestAdcModel.c} +0 -0
  74. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestMain.c → examples/temp_sensor/test/test_TestMain.c} +0 -0
  75. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestTimerConductor.c → examples/temp_sensor/test/test_TimerConductor.c} +0 -0
  76. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestTimerConfigurator.c → examples/temp_sensor/test/test_TimerConfigurator.c} +0 -0
  77. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestTimerHardware.c → examples/temp_sensor/test/test_TimerHardware.c} +0 -0
  78. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestTimerInterruptConfigurator.c → examples/temp_sensor/test/test_TimerInterruptConfigurator.c} +0 -0
  79. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestTimerInterruptHandler.c → examples/temp_sensor/test/test_TimerInterruptHandler.c} +0 -0
  80. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestTimerModel.c → examples/temp_sensor/test/test_TimerModel.c} +0 -0
  81. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestUsartBaudRateRegisterCalculator.c → examples/temp_sensor/test/test_UsartBaudRateRegisterCalculator.c} +0 -0
  82. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestUsartConductor.c → examples/temp_sensor/test/test_UsartConductor.c} +1 -1
  83. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestUsartConfigurator.c → examples/temp_sensor/test/test_UsartConfigurator.c} +0 -0
  84. data/examples/temp_sensor/test/test_UsartGetChar.c +17 -0
  85. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestUsartHardware.c → examples/temp_sensor/test/test_UsartHardware.c} +19 -0
  86. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestUsartModel.c → examples/temp_sensor/test/test_UsartModel.c} +0 -0
  87. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestUsartPutChar.c → examples/temp_sensor/test/test_UsartPutChar.c} +0 -0
  88. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestUsartTransmitBufferStatus.c → examples/temp_sensor/test/test_UsartTransmitBufferStatus.c} +0 -0
  89. data/lib/ceedling/version.rb +1 -1
  90. data/new_project_template/project.yml +1 -1
  91. metadata +121 -849
  92. data/new_project_template/vendor/ceedling/config/test_environment.rb +0 -12
  93. data/new_project_template/vendor/ceedling/examples/temp_sensor/gcc.yml +0 -42
  94. data/new_project_template/vendor/ceedling/examples/temp_sensor/iar_v4.yml +0 -91
  95. data/new_project_template/vendor/ceedling/examples/temp_sensor/iar_v5.yml +0 -80
  96. data/new_project_template/vendor/ceedling/examples/temp_sensor/project.yml +0 -65
  97. data/new_project_template/vendor/ceedling/examples/temp_sensor/rakefile.rb +0 -5
  98. data/new_project_template/vendor/ceedling/examples/temp_sensor/src/AdcConductor.h +0 -13
  99. data/new_project_template/vendor/ceedling/examples/temp_sensor/src/TemperatureCalculator.h +0 -8
  100. data/new_project_template/vendor/ceedling/examples/temp_sensor/src/Types.h +0 -90
  101. data/new_project_template/vendor/ceedling/examples/temp_sensor/src/UsartBaudRateRegisterCalculator.h +0 -8
  102. data/new_project_template/vendor/ceedling/examples/temp_sensor/test/TestUsartHardware.c +0 -36
  103. data/new_project_template/vendor/ceedling/examples/temp_sensor/test/support/UnityHelper.c +0 -12
  104. data/new_project_template/vendor/ceedling/examples/temp_sensor/test/support/UnityHelper.h +0 -8
  105. data/new_project_template/vendor/ceedling/test/integration/paths.yml +0 -17
  106. data/new_project_template/vendor/ceedling/test/integration/paths_test.rb +0 -80
  107. data/new_project_template/vendor/ceedling/test/integration/rake_rules_aux_dependencies_test.rb +0 -75
  108. data/new_project_template/vendor/ceedling/test/integration/rake_rules_cmock_test.rb +0 -74
  109. data/new_project_template/vendor/ceedling/test/integration/rake_rules_preprocess_test.rb +0 -178
  110. data/new_project_template/vendor/ceedling/test/integration/rake_rules_test.rb +0 -268
  111. data/new_project_template/vendor/ceedling/test/integration/rake_tasks_test.rb +0 -103
  112. data/new_project_template/vendor/ceedling/test/integration_test_helper.rb +0 -34
  113. data/new_project_template/vendor/ceedling/test/rakefile_rules.rb +0 -10
  114. data/new_project_template/vendor/ceedling/test/rakefile_rules_aux_dependencies.rb +0 -10
  115. data/new_project_template/vendor/ceedling/test/rakefile_rules_cmock.rb +0 -10
  116. data/new_project_template/vendor/ceedling/test/rakefile_rules_preprocess.rb +0 -10
  117. data/new_project_template/vendor/ceedling/test/rakefile_tasks.rb +0 -10
  118. data/new_project_template/vendor/ceedling/test/system/file_system_dependencies.yml +0 -20
  119. data/new_project_template/vendor/ceedling/test/system/file_system_kitchen_sink.yml +0 -20
  120. data/new_project_template/vendor/ceedling/test/system/file_system_mocks.yml +0 -20
  121. data/new_project_template/vendor/ceedling/test/system/file_system_preprocess.yml +0 -20
  122. data/new_project_template/vendor/ceedling/test/system/file_system_simple.yml +0 -20
  123. data/new_project_template/vendor/ceedling/test/system/file_system_test.rb +0 -78
  124. data/new_project_template/vendor/ceedling/test/system/mocks/include/a_file.h +0 -2
  125. data/new_project_template/vendor/ceedling/test/system/mocks/include/other_stuff.h +0 -2
  126. data/new_project_template/vendor/ceedling/test/system/mocks/include/stuff.h +0 -3
  127. data/new_project_template/vendor/ceedling/test/system/mocks/source/a_file.c +0 -9
  128. data/new_project_template/vendor/ceedling/test/system/mocks/test/test_a_file.c +0 -41
  129. data/new_project_template/vendor/ceedling/test/system/mocks/test/test_no_file.c +0 -14
  130. data/new_project_template/vendor/ceedling/test/system/project_mocks.yml +0 -43
  131. data/new_project_template/vendor/ceedling/test/system/project_mocks_test.rb +0 -38
  132. data/new_project_template/vendor/ceedling/test/system/project_simple.yml +0 -36
  133. data/new_project_template/vendor/ceedling/test/system/project_simple_test.rb +0 -39
  134. data/new_project_template/vendor/ceedling/test/system/rule_mocks_test.rb +0 -44
  135. data/new_project_template/vendor/ceedling/test/system/rule_runners_test.rb +0 -44
  136. data/new_project_template/vendor/ceedling/test/system/simple/include/other_stuff.h +0 -2
  137. data/new_project_template/vendor/ceedling/test/system/simple/include/stuff.h +0 -3
  138. data/new_project_template/vendor/ceedling/test/system/simple/source/other_stuff.c +0 -6
  139. data/new_project_template/vendor/ceedling/test/system/simple/source/stuff.c +0 -7
  140. data/new_project_template/vendor/ceedling/test/system/simple/test/test_other_stuff.c +0 -30
  141. data/new_project_template/vendor/ceedling/test/system/simple/test/test_stuff.c +0 -51
  142. data/new_project_template/vendor/ceedling/test/system_test_helper.rb +0 -73
  143. data/new_project_template/vendor/ceedling/test/test_helper.rb +0 -93
  144. data/new_project_template/vendor/ceedling/test/unit/busted/configurator_builder_test.rb +0 -571
  145. data/new_project_template/vendor/ceedling/test/unit/busted/configurator_helper_test.rb +0 -234
  146. data/new_project_template/vendor/ceedling/test/unit/busted/configurator_test.rb +0 -232
  147. data/new_project_template/vendor/ceedling/test/unit/busted/configurator_validator_test.rb +0 -169
  148. data/new_project_template/vendor/ceedling/test/unit/busted/deep_merge_fix_test.rb +0 -55
  149. data/new_project_template/vendor/ceedling/test/unit/busted/dependinator_test.rb +0 -129
  150. data/new_project_template/vendor/ceedling/test/unit/busted/file_finder_helper_test.rb +0 -45
  151. data/new_project_template/vendor/ceedling/test/unit/busted/file_finder_test.rb +0 -114
  152. data/new_project_template/vendor/ceedling/test/unit/busted/file_path_utils_test.rb +0 -97
  153. data/new_project_template/vendor/ceedling/test/unit/busted/file_system_utils_test.rb +0 -21
  154. data/new_project_template/vendor/ceedling/test/unit/busted/generator_test.rb +0 -187
  155. data/new_project_template/vendor/ceedling/test/unit/busted/generator_test_results_test.rb +0 -129
  156. data/new_project_template/vendor/ceedling/test/unit/busted/generator_test_runner_test.rb +0 -478
  157. data/new_project_template/vendor/ceedling/test/unit/busted/preprocessinator_extractor_test.rb +0 -729
  158. data/new_project_template/vendor/ceedling/test/unit/busted/preprocessinator_file_handler_test.rb +0 -38
  159. data/new_project_template/vendor/ceedling/test/unit/busted/preprocessinator_helper_test.rb +0 -156
  160. data/new_project_template/vendor/ceedling/test/unit/busted/preprocessinator_includes_handler_test.rb +0 -93
  161. data/new_project_template/vendor/ceedling/test/unit/busted/preprocessinator_test.rb +0 -57
  162. data/new_project_template/vendor/ceedling/test/unit/busted/project_file_loader_test.rb +0 -142
  163. data/new_project_template/vendor/ceedling/test/unit/busted/setupinator_test.rb +0 -45
  164. data/new_project_template/vendor/ceedling/test/unit/busted/streaminator_test.rb +0 -49
  165. data/new_project_template/vendor/ceedling/test/unit/busted/task_invoker_test.rb +0 -69
  166. data/new_project_template/vendor/ceedling/test/unit/busted/test_includes_extractor_test.rb +0 -111
  167. data/new_project_template/vendor/ceedling/test/unit/busted/test_invoker_helper_test.rb +0 -62
  168. data/new_project_template/vendor/ceedling/test/unit/busted/test_invoker_test.rb +0 -47
  169. data/new_project_template/vendor/ceedling/test/unit/busted/tool_executor_helper_test.rb +0 -100
  170. data/new_project_template/vendor/ceedling/test/unit/busted/tool_executor_test.rb +0 -351
  171. data/new_project_template/vendor/ceedling/test/unit/busted/verbosinator_test.rb +0 -65
  172. data/new_project_template/vendor/ceedling/test/unit_test_helper.rb +0 -16
  173. data/new_project_template/vendor/ceedling/vendor/behaviors/Manifest.txt +0 -9
  174. data/new_project_template/vendor/ceedling/vendor/behaviors/Rakefile +0 -19
  175. data/new_project_template/vendor/ceedling/vendor/behaviors/lib/behaviors.rb +0 -76
  176. data/new_project_template/vendor/ceedling/vendor/behaviors/lib/behaviors/reporttask.rb +0 -158
  177. data/new_project_template/vendor/ceedling/vendor/behaviors/test/behaviors_tasks_test.rb +0 -73
  178. data/new_project_template/vendor/ceedling/vendor/behaviors/test/behaviors_test.rb +0 -50
  179. data/new_project_template/vendor/ceedling/vendor/behaviors/test/tasks_test/Rakefile +0 -19
  180. data/new_project_template/vendor/ceedling/vendor/behaviors/test/tasks_test/lib/user.rb +0 -2
  181. data/new_project_template/vendor/ceedling/vendor/behaviors/test/tasks_test/test/user_test.rb +0 -17
  182. data/new_project_template/vendor/ceedling/vendor/c_exception/makefile +0 -24
  183. data/new_project_template/vendor/ceedling/vendor/c_exception/rakefile.rb +0 -41
  184. data/new_project_template/vendor/ceedling/vendor/c_exception/test/CExceptionConfig.h +0 -27
  185. data/new_project_template/vendor/ceedling/vendor/c_exception/test/TestException.c +0 -291
  186. data/new_project_template/vendor/ceedling/vendor/c_exception/test/TestException_Runner.c +0 -62
  187. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/colour_prompt.rb +0 -94
  188. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/colour_reporter.rb +0 -39
  189. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/generate_config.yml +0 -36
  190. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/generate_module.rb +0 -202
  191. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/generate_test_runner.rb +0 -303
  192. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/test_file_filter.rb +0 -23
  193. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/unity_test_summary.rb +0 -126
  194. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/docs/Unity Summary.odt +0 -0
  195. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/docs/license.txt +0 -31
  196. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/makefile +0 -40
  197. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/rakefile.rb +0 -32
  198. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/rakefile_helper.rb +0 -260
  199. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/readme.txt +0 -18
  200. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/src/ProductionCode.c +0 -24
  201. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/src/ProductionCode.h +0 -3
  202. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/src/ProductionCode2.c +0 -9
  203. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/src/ProductionCode2.h +0 -2
  204. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/test/TestProductionCode.c +0 -62
  205. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/test/TestProductionCode2.c +0 -26
  206. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/test/no_ruby/TestProductionCode2_Runner.c +0 -46
  207. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/test/no_ruby/TestProductionCode_Runner.c +0 -50
  208. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/extras/fixture/build/MakefileWorker.mk +0 -331
  209. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/extras/fixture/build/filterGcov.sh +0 -61
  210. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/extras/fixture/rakefile.rb +0 -37
  211. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/extras/fixture/rakefile_helper.rb +0 -178
  212. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/extras/fixture/readme.txt +0 -9
  213. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/extras/fixture/src/unity_fixture.c +0 -381
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  809. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/build/filterGcov.sh +0 -61
  810. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/rakefile.rb +0 -37
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  857. data/new_project_template/vendor/ceedling/vendor/unity/test/testunity.c +0 -1510
@@ -1,4211 +0,0 @@
1
- //* ----------------------------------------------------------------------------
2
- //* ATMEL Microcontroller Software Support - ROUSSET -
3
- //* ----------------------------------------------------------------------------
4
- //* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
5
- //* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
6
- //* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
7
- //* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
8
- //* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
9
- //* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
10
- //* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
11
- //* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
12
- //* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
13
- //* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
14
- //* ----------------------------------------------------------------------------
15
- //* File Name : lib_AT91SAM7X256.h
16
- //* Object : AT91SAM7X256 inlined functions
17
- //* Generated : AT91 SW Application Group 11/02/2005 (15:17:24)
18
- //*
19
- //* CVS Reference : /lib_dbgu.h/1.1/Thu Aug 25 12:56:22 2005//
20
- //* CVS Reference : /lib_pmc_SAM7X.h/1.4/Tue Aug 30 13:00:36 2005//
21
- //* CVS Reference : /lib_VREG_6085B.h/1.1/Tue Feb 1 16:20:47 2005//
22
- //* CVS Reference : /lib_rstc_6098A.h/1.1/Wed Oct 6 10:39:20 2004//
23
- //* CVS Reference : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003//
24
- //* CVS Reference : /lib_wdtc_6080A.h/1.1/Wed Oct 6 10:38:30 2004//
25
- //* CVS Reference : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002//
26
- //* CVS Reference : /lib_spi2.h/1.2/Tue Aug 23 15:37:28 2005//
27
- //* CVS Reference : /lib_pitc_6079A.h/1.2/Tue Nov 9 14:43:56 2004//
28
- //* CVS Reference : /lib_aic_6075b.h/1.2/Thu Jul 7 07:48:22 2005//
29
- //* CVS Reference : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004//
30
- //* CVS Reference : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003//
31
- //* CVS Reference : /lib_rttc_6081A.h/1.1/Wed Oct 6 10:39:38 2004//
32
- //* CVS Reference : /lib_udp.h/1.5/Tue Aug 30 12:13:47 2005//
33
- //* CVS Reference : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003//
34
- //* CVS Reference : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004//
35
- //* CVS Reference : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003//
36
- //* CVS Reference : /lib_can_AT91.h/1.5/Tue Aug 23 15:37:07 2005//
37
- //* CVS Reference : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004//
38
- //* CVS Reference : /lib_pdc.h/1.2/Tue Jul 2 13:29:40 2002//
39
- //* ----------------------------------------------------------------------------
40
-
41
- #ifndef lib_AT91SAM7X256_H
42
- #define lib_AT91SAM7X256_H
43
-
44
- /* *****************************************************************************
45
- SOFTWARE API FOR AIC
46
- ***************************************************************************** */
47
- #define AT91C_AIC_BRANCH_OPCODE ((void (*) ()) 0xE51FFF20) // ldr, pc, [pc, #-&F20]
48
-
49
- //*----------------------------------------------------------------------------
50
- //* \fn AT91F_AIC_ConfigureIt
51
- //* \brief Interrupt Handler Initialization
52
- //*----------------------------------------------------------------------------
53
- __inline unsigned int AT91F_AIC_ConfigureIt (
54
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
55
- unsigned int irq_id, // \arg interrupt number to initialize
56
- unsigned int priority, // \arg priority to give to the interrupt
57
- unsigned int src_type, // \arg activation and sense of activation
58
- void (*newHandler) () ) // \arg address of the interrupt handler
59
- {
60
- unsigned int oldHandler;
61
- unsigned int mask ;
62
-
63
- oldHandler = pAic->AIC_SVR[irq_id];
64
-
65
- mask = 0x1 << irq_id ;
66
- //* Disable the interrupt on the interrupt controller
67
- pAic->AIC_IDCR = mask ;
68
- //* Save the interrupt handler routine pointer and the interrupt priority
69
- pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;
70
- //* Store the Source Mode Register
71
- pAic->AIC_SMR[irq_id] = src_type | priority ;
72
- //* Clear the interrupt on the interrupt controller
73
- pAic->AIC_ICCR = mask ;
74
-
75
- return oldHandler;
76
- }
77
-
78
- //*----------------------------------------------------------------------------
79
- //* \fn AT91F_AIC_EnableIt
80
- //* \brief Enable corresponding IT number
81
- //*----------------------------------------------------------------------------
82
- __inline void AT91F_AIC_EnableIt (
83
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
84
- unsigned int irq_id ) // \arg interrupt number to initialize
85
- {
86
- //* Enable the interrupt on the interrupt controller
87
- pAic->AIC_IECR = 0x1 << irq_id ;
88
- }
89
-
90
- //*----------------------------------------------------------------------------
91
- //* \fn AT91F_AIC_DisableIt
92
- //* \brief Disable corresponding IT number
93
- //*----------------------------------------------------------------------------
94
- __inline void AT91F_AIC_DisableIt (
95
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
96
- unsigned int irq_id ) // \arg interrupt number to initialize
97
- {
98
- unsigned int mask = 0x1 << irq_id;
99
- //* Disable the interrupt on the interrupt controller
100
- pAic->AIC_IDCR = mask ;
101
- //* Clear the interrupt on the Interrupt Controller ( if one is pending )
102
- pAic->AIC_ICCR = mask ;
103
- }
104
-
105
- //*----------------------------------------------------------------------------
106
- //* \fn AT91F_AIC_ClearIt
107
- //* \brief Clear corresponding IT number
108
- //*----------------------------------------------------------------------------
109
- __inline void AT91F_AIC_ClearIt (
110
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
111
- unsigned int irq_id) // \arg interrupt number to initialize
112
- {
113
- //* Clear the interrupt on the Interrupt Controller ( if one is pending )
114
- pAic->AIC_ICCR = (0x1 << irq_id);
115
- }
116
-
117
- //*----------------------------------------------------------------------------
118
- //* \fn AT91F_AIC_AcknowledgeIt
119
- //* \brief Acknowledge corresponding IT number
120
- //*----------------------------------------------------------------------------
121
- __inline void AT91F_AIC_AcknowledgeIt (
122
- AT91PS_AIC pAic) // \arg pointer to the AIC registers
123
- {
124
- pAic->AIC_EOICR = pAic->AIC_EOICR;
125
- }
126
-
127
- //*----------------------------------------------------------------------------
128
- //* \fn AT91F_AIC_SetExceptionVector
129
- //* \brief Configure vector handler
130
- //*----------------------------------------------------------------------------
131
- __inline unsigned int AT91F_AIC_SetExceptionVector (
132
- unsigned int *pVector, // \arg pointer to the AIC registers
133
- void (*Handler) () ) // \arg Interrupt Handler
134
- {
135
- unsigned int oldVector = *pVector;
136
-
137
- if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE)
138
- *pVector = (unsigned int) AT91C_AIC_BRANCH_OPCODE;
139
- else
140
- *pVector = (((((unsigned int) Handler) - ((unsigned int) pVector) - 0x8) >> 2) & 0x00FFFFFF) | 0xEA000000;
141
-
142
- return oldVector;
143
- }
144
-
145
- //*----------------------------------------------------------------------------
146
- //* \fn AT91F_AIC_Trig
147
- //* \brief Trig an IT
148
- //*----------------------------------------------------------------------------
149
- __inline void AT91F_AIC_Trig (
150
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
151
- unsigned int irq_id) // \arg interrupt number
152
- {
153
- pAic->AIC_ISCR = (0x1 << irq_id) ;
154
- }
155
-
156
- //*----------------------------------------------------------------------------
157
- //* \fn AT91F_AIC_IsActive
158
- //* \brief Test if an IT is active
159
- //*----------------------------------------------------------------------------
160
- __inline unsigned int AT91F_AIC_IsActive (
161
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
162
- unsigned int irq_id) // \arg Interrupt Number
163
- {
164
- return (pAic->AIC_ISR & (0x1 << irq_id));
165
- }
166
-
167
- //*----------------------------------------------------------------------------
168
- //* \fn AT91F_AIC_IsPending
169
- //* \brief Test if an IT is pending
170
- //*----------------------------------------------------------------------------
171
- __inline unsigned int AT91F_AIC_IsPending (
172
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
173
- unsigned int irq_id) // \arg Interrupt Number
174
- {
175
- return (pAic->AIC_IPR & (0x1 << irq_id));
176
- }
177
-
178
- //*----------------------------------------------------------------------------
179
- //* \fn AT91F_AIC_Open
180
- //* \brief Set exception vectors and AIC registers to default values
181
- //*----------------------------------------------------------------------------
182
- __inline void AT91F_AIC_Open(
183
- AT91PS_AIC pAic, // \arg pointer to the AIC registers
184
- void (*IrqHandler) (), // \arg Default IRQ vector exception
185
- void (*FiqHandler) (), // \arg Default FIQ vector exception
186
- void (*DefaultHandler) (), // \arg Default Handler set in ISR
187
- void (*SpuriousHandler) (), // \arg Default Spurious Handler
188
- unsigned int protectMode) // \arg Debug Control Register
189
- {
190
- int i;
191
-
192
- // Disable all interrupts and set IVR to the default handler
193
- for (i = 0; i < 32; ++i) {
194
- AT91F_AIC_DisableIt(pAic, i);
195
- AT91F_AIC_ConfigureIt(pAic, i, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_HIGH_LEVEL, DefaultHandler);
196
- }
197
-
198
- // Set the IRQ exception vector
199
- AT91F_AIC_SetExceptionVector((unsigned int *) 0x18, IrqHandler);
200
- // Set the Fast Interrupt exception vector
201
- AT91F_AIC_SetExceptionVector((unsigned int *) 0x1C, FiqHandler);
202
-
203
- pAic->AIC_SPU = (unsigned int) SpuriousHandler;
204
- pAic->AIC_DCR = protectMode;
205
- }
206
- /* *****************************************************************************
207
- SOFTWARE API FOR PDC
208
- ***************************************************************************** */
209
- //*----------------------------------------------------------------------------
210
- //* \fn AT91F_PDC_SetNextRx
211
- //* \brief Set the next receive transfer descriptor
212
- //*----------------------------------------------------------------------------
213
- __inline void AT91F_PDC_SetNextRx (
214
- AT91PS_PDC pPDC, // \arg pointer to a PDC controller
215
- char *address, // \arg address to the next bloc to be received
216
- unsigned int bytes) // \arg number of bytes to be received
217
- {
218
- pPDC->PDC_RNPR = (unsigned int) address;
219
- pPDC->PDC_RNCR = bytes;
220
- }
221
-
222
- //*----------------------------------------------------------------------------
223
- //* \fn AT91F_PDC_SetNextTx
224
- //* \brief Set the next transmit transfer descriptor
225
- //*----------------------------------------------------------------------------
226
- __inline void AT91F_PDC_SetNextTx (
227
- AT91PS_PDC pPDC, // \arg pointer to a PDC controller
228
- char *address, // \arg address to the next bloc to be transmitted
229
- unsigned int bytes) // \arg number of bytes to be transmitted
230
- {
231
- pPDC->PDC_TNPR = (unsigned int) address;
232
- pPDC->PDC_TNCR = bytes;
233
- }
234
-
235
- //*----------------------------------------------------------------------------
236
- //* \fn AT91F_PDC_SetRx
237
- //* \brief Set the receive transfer descriptor
238
- //*----------------------------------------------------------------------------
239
- __inline void AT91F_PDC_SetRx (
240
- AT91PS_PDC pPDC, // \arg pointer to a PDC controller
241
- char *address, // \arg address to the next bloc to be received
242
- unsigned int bytes) // \arg number of bytes to be received
243
- {
244
- pPDC->PDC_RPR = (unsigned int) address;
245
- pPDC->PDC_RCR = bytes;
246
- }
247
-
248
- //*----------------------------------------------------------------------------
249
- //* \fn AT91F_PDC_SetTx
250
- //* \brief Set the transmit transfer descriptor
251
- //*----------------------------------------------------------------------------
252
- __inline void AT91F_PDC_SetTx (
253
- AT91PS_PDC pPDC, // \arg pointer to a PDC controller
254
- char *address, // \arg address to the next bloc to be transmitted
255
- unsigned int bytes) // \arg number of bytes to be transmitted
256
- {
257
- pPDC->PDC_TPR = (unsigned int) address;
258
- pPDC->PDC_TCR = bytes;
259
- }
260
-
261
- //*----------------------------------------------------------------------------
262
- //* \fn AT91F_PDC_EnableTx
263
- //* \brief Enable transmit
264
- //*----------------------------------------------------------------------------
265
- __inline void AT91F_PDC_EnableTx (
266
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
267
- {
268
- pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
269
- }
270
-
271
- //*----------------------------------------------------------------------------
272
- //* \fn AT91F_PDC_EnableRx
273
- //* \brief Enable receive
274
- //*----------------------------------------------------------------------------
275
- __inline void AT91F_PDC_EnableRx (
276
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
277
- {
278
- pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
279
- }
280
-
281
- //*----------------------------------------------------------------------------
282
- //* \fn AT91F_PDC_DisableTx
283
- //* \brief Disable transmit
284
- //*----------------------------------------------------------------------------
285
- __inline void AT91F_PDC_DisableTx (
286
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
287
- {
288
- pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
289
- }
290
-
291
- //*----------------------------------------------------------------------------
292
- //* \fn AT91F_PDC_DisableRx
293
- //* \brief Disable receive
294
- //*----------------------------------------------------------------------------
295
- __inline void AT91F_PDC_DisableRx (
296
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
297
- {
298
- pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
299
- }
300
-
301
- //*----------------------------------------------------------------------------
302
- //* \fn AT91F_PDC_IsTxEmpty
303
- //* \brief Test if the current transfer descriptor has been sent
304
- //*----------------------------------------------------------------------------
305
- __inline int AT91F_PDC_IsTxEmpty ( // \return return 1 if transfer is complete
306
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
307
- {
308
- return !(pPDC->PDC_TCR);
309
- }
310
-
311
- //*----------------------------------------------------------------------------
312
- //* \fn AT91F_PDC_IsNextTxEmpty
313
- //* \brief Test if the next transfer descriptor has been moved to the current td
314
- //*----------------------------------------------------------------------------
315
- __inline int AT91F_PDC_IsNextTxEmpty ( // \return return 1 if transfer is complete
316
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
317
- {
318
- return !(pPDC->PDC_TNCR);
319
- }
320
-
321
- //*----------------------------------------------------------------------------
322
- //* \fn AT91F_PDC_IsRxEmpty
323
- //* \brief Test if the current transfer descriptor has been filled
324
- //*----------------------------------------------------------------------------
325
- __inline int AT91F_PDC_IsRxEmpty ( // \return return 1 if transfer is complete
326
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
327
- {
328
- return !(pPDC->PDC_RCR);
329
- }
330
-
331
- //*----------------------------------------------------------------------------
332
- //* \fn AT91F_PDC_IsNextRxEmpty
333
- //* \brief Test if the next transfer descriptor has been moved to the current td
334
- //*----------------------------------------------------------------------------
335
- __inline int AT91F_PDC_IsNextRxEmpty ( // \return return 1 if transfer is complete
336
- AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
337
- {
338
- return !(pPDC->PDC_RNCR);
339
- }
340
-
341
- //*----------------------------------------------------------------------------
342
- //* \fn AT91F_PDC_Open
343
- //* \brief Open PDC: disable TX and RX reset transfer descriptors, re-enable RX and TX
344
- //*----------------------------------------------------------------------------
345
- __inline void AT91F_PDC_Open (
346
- AT91PS_PDC pPDC) // \arg pointer to a PDC controller
347
- {
348
- //* Disable the RX and TX PDC transfer requests
349
- AT91F_PDC_DisableRx(pPDC);
350
- AT91F_PDC_DisableTx(pPDC);
351
-
352
- //* Reset all Counter register Next buffer first
353
- AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
354
- AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
355
- AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
356
- AT91F_PDC_SetRx(pPDC, (char *) 0, 0);
357
-
358
- //* Enable the RX and TX PDC transfer requests
359
- AT91F_PDC_EnableRx(pPDC);
360
- AT91F_PDC_EnableTx(pPDC);
361
- }
362
-
363
- //*----------------------------------------------------------------------------
364
- //* \fn AT91F_PDC_Close
365
- //* \brief Close PDC: disable TX and RX reset transfer descriptors
366
- //*----------------------------------------------------------------------------
367
- __inline void AT91F_PDC_Close (
368
- AT91PS_PDC pPDC) // \arg pointer to a PDC controller
369
- {
370
- //* Disable the RX and TX PDC transfer requests
371
- AT91F_PDC_DisableRx(pPDC);
372
- AT91F_PDC_DisableTx(pPDC);
373
-
374
- //* Reset all Counter register Next buffer first
375
- AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
376
- AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
377
- AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
378
- AT91F_PDC_SetRx(pPDC, (char *) 0, 0);
379
-
380
- }
381
-
382
- //*----------------------------------------------------------------------------
383
- //* \fn AT91F_PDC_SendFrame
384
- //* \brief Close PDC: disable TX and RX reset transfer descriptors
385
- //*----------------------------------------------------------------------------
386
- __inline unsigned int AT91F_PDC_SendFrame(
387
- AT91PS_PDC pPDC,
388
- char *pBuffer,
389
- unsigned int szBuffer,
390
- char *pNextBuffer,
391
- unsigned int szNextBuffer )
392
- {
393
- if (AT91F_PDC_IsTxEmpty(pPDC)) {
394
- //* Buffer and next buffer can be initialized
395
- AT91F_PDC_SetTx(pPDC, pBuffer, szBuffer);
396
- AT91F_PDC_SetNextTx(pPDC, pNextBuffer, szNextBuffer);
397
- return 2;
398
- }
399
- else if (AT91F_PDC_IsNextTxEmpty(pPDC)) {
400
- //* Only one buffer can be initialized
401
- AT91F_PDC_SetNextTx(pPDC, pBuffer, szBuffer);
402
- return 1;
403
- }
404
- else {
405
- //* All buffer are in use...
406
- return 0;
407
- }
408
- }
409
-
410
- //*----------------------------------------------------------------------------
411
- //* \fn AT91F_PDC_ReceiveFrame
412
- //* \brief Close PDC: disable TX and RX reset transfer descriptors
413
- //*----------------------------------------------------------------------------
414
- __inline unsigned int AT91F_PDC_ReceiveFrame (
415
- AT91PS_PDC pPDC,
416
- char *pBuffer,
417
- unsigned int szBuffer,
418
- char *pNextBuffer,
419
- unsigned int szNextBuffer )
420
- {
421
- if (AT91F_PDC_IsRxEmpty(pPDC)) {
422
- //* Buffer and next buffer can be initialized
423
- AT91F_PDC_SetRx(pPDC, pBuffer, szBuffer);
424
- AT91F_PDC_SetNextRx(pPDC, pNextBuffer, szNextBuffer);
425
- return 2;
426
- }
427
- else if (AT91F_PDC_IsNextRxEmpty(pPDC)) {
428
- //* Only one buffer can be initialized
429
- AT91F_PDC_SetNextRx(pPDC, pBuffer, szBuffer);
430
- return 1;
431
- }
432
- else {
433
- //* All buffer are in use...
434
- return 0;
435
- }
436
- }
437
- /* *****************************************************************************
438
- SOFTWARE API FOR DBGU
439
- ***************************************************************************** */
440
- //*----------------------------------------------------------------------------
441
- //* \fn AT91F_DBGU_InterruptEnable
442
- //* \brief Enable DBGU Interrupt
443
- //*----------------------------------------------------------------------------
444
- __inline void AT91F_DBGU_InterruptEnable(
445
- AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller
446
- unsigned int flag) // \arg dbgu interrupt to be enabled
447
- {
448
- pDbgu->DBGU_IER = flag;
449
- }
450
-
451
- //*----------------------------------------------------------------------------
452
- //* \fn AT91F_DBGU_InterruptDisable
453
- //* \brief Disable DBGU Interrupt
454
- //*----------------------------------------------------------------------------
455
- __inline void AT91F_DBGU_InterruptDisable(
456
- AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller
457
- unsigned int flag) // \arg dbgu interrupt to be disabled
458
- {
459
- pDbgu->DBGU_IDR = flag;
460
- }
461
-
462
- //*----------------------------------------------------------------------------
463
- //* \fn AT91F_DBGU_GetInterruptMaskStatus
464
- //* \brief Return DBGU Interrupt Mask Status
465
- //*----------------------------------------------------------------------------
466
- __inline unsigned int AT91F_DBGU_GetInterruptMaskStatus( // \return DBGU Interrupt Mask Status
467
- AT91PS_DBGU pDbgu) // \arg pointer to a DBGU controller
468
- {
469
- return pDbgu->DBGU_IMR;
470
- }
471
-
472
- //*----------------------------------------------------------------------------
473
- //* \fn AT91F_DBGU_IsInterruptMasked
474
- //* \brief Test if DBGU Interrupt is Masked
475
- //*----------------------------------------------------------------------------
476
- __inline int AT91F_DBGU_IsInterruptMasked(
477
- AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller
478
- unsigned int flag) // \arg flag to be tested
479
- {
480
- return (AT91F_DBGU_GetInterruptMaskStatus(pDbgu) & flag);
481
- }
482
-
483
- /* *****************************************************************************
484
- SOFTWARE API FOR PIO
485
- ***************************************************************************** */
486
- //*----------------------------------------------------------------------------
487
- //* \fn AT91F_PIO_CfgPeriph
488
- //* \brief Enable pins to be drived by peripheral
489
- //*----------------------------------------------------------------------------
490
- __inline void AT91F_PIO_CfgPeriph(
491
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
492
- unsigned int periphAEnable, // \arg PERIPH A to enable
493
- unsigned int periphBEnable) // \arg PERIPH B to enable
494
-
495
- {
496
- pPio->PIO_ASR = periphAEnable;
497
- pPio->PIO_BSR = periphBEnable;
498
- pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
499
- }
500
-
501
- //*----------------------------------------------------------------------------
502
- //* \fn AT91F_PIO_CfgOutput
503
- //* \brief Enable PIO in output mode
504
- //*----------------------------------------------------------------------------
505
- __inline void AT91F_PIO_CfgOutput(
506
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
507
- unsigned int pioEnable) // \arg PIO to be enabled
508
- {
509
- pPio->PIO_PER = pioEnable; // Set in PIO mode
510
- pPio->PIO_OER = pioEnable; // Configure in Output
511
- }
512
-
513
- //*----------------------------------------------------------------------------
514
- //* \fn AT91F_PIO_CfgInput
515
- //* \brief Enable PIO in input mode
516
- //*----------------------------------------------------------------------------
517
- __inline void AT91F_PIO_CfgInput(
518
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
519
- unsigned int inputEnable) // \arg PIO to be enabled
520
- {
521
- // Disable output
522
- pPio->PIO_ODR = inputEnable;
523
- pPio->PIO_PER = inputEnable;
524
- }
525
-
526
- //*----------------------------------------------------------------------------
527
- //* \fn AT91F_PIO_CfgOpendrain
528
- //* \brief Configure PIO in open drain
529
- //*----------------------------------------------------------------------------
530
- __inline void AT91F_PIO_CfgOpendrain(
531
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
532
- unsigned int multiDrvEnable) // \arg pio to be configured in open drain
533
- {
534
- // Configure the multi-drive option
535
- pPio->PIO_MDDR = ~multiDrvEnable;
536
- pPio->PIO_MDER = multiDrvEnable;
537
- }
538
-
539
- //*----------------------------------------------------------------------------
540
- //* \fn AT91F_PIO_CfgPullup
541
- //* \brief Enable pullup on PIO
542
- //*----------------------------------------------------------------------------
543
- __inline void AT91F_PIO_CfgPullup(
544
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
545
- unsigned int pullupEnable) // \arg enable pullup on PIO
546
- {
547
- // Connect or not Pullup
548
- pPio->PIO_PPUDR = ~pullupEnable;
549
- pPio->PIO_PPUER = pullupEnable;
550
- }
551
-
552
- //*----------------------------------------------------------------------------
553
- //* \fn AT91F_PIO_CfgDirectDrive
554
- //* \brief Enable direct drive on PIO
555
- //*----------------------------------------------------------------------------
556
- __inline void AT91F_PIO_CfgDirectDrive(
557
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
558
- unsigned int directDrive) // \arg PIO to be configured with direct drive
559
-
560
- {
561
- // Configure the Direct Drive
562
- pPio->PIO_OWDR = ~directDrive;
563
- pPio->PIO_OWER = directDrive;
564
- }
565
-
566
- //*----------------------------------------------------------------------------
567
- //* \fn AT91F_PIO_CfgInputFilter
568
- //* \brief Enable input filter on input PIO
569
- //*----------------------------------------------------------------------------
570
- __inline void AT91F_PIO_CfgInputFilter(
571
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
572
- unsigned int inputFilter) // \arg PIO to be configured with input filter
573
-
574
- {
575
- // Configure the Direct Drive
576
- pPio->PIO_IFDR = ~inputFilter;
577
- pPio->PIO_IFER = inputFilter;
578
- }
579
-
580
- //*----------------------------------------------------------------------------
581
- //* \fn AT91F_PIO_GetInput
582
- //* \brief Return PIO input value
583
- //*----------------------------------------------------------------------------
584
- __inline unsigned int AT91F_PIO_GetInput( // \return PIO input
585
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
586
- {
587
- return pPio->PIO_PDSR;
588
- }
589
-
590
- //*----------------------------------------------------------------------------
591
- //* \fn AT91F_PIO_IsInputSet
592
- //* \brief Test if PIO is input flag is active
593
- //*----------------------------------------------------------------------------
594
- __inline int AT91F_PIO_IsInputSet(
595
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
596
- unsigned int flag) // \arg flag to be tested
597
- {
598
- return (AT91F_PIO_GetInput(pPio) & flag);
599
- }
600
-
601
-
602
- //*----------------------------------------------------------------------------
603
- //* \fn AT91F_PIO_SetOutput
604
- //* \brief Set to 1 output PIO
605
- //*----------------------------------------------------------------------------
606
- __inline void AT91F_PIO_SetOutput(
607
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
608
- unsigned int flag) // \arg output to be set
609
- {
610
- pPio->PIO_SODR = flag;
611
- }
612
-
613
- //*----------------------------------------------------------------------------
614
- //* \fn AT91F_PIO_ClearOutput
615
- //* \brief Set to 0 output PIO
616
- //*----------------------------------------------------------------------------
617
- __inline void AT91F_PIO_ClearOutput(
618
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
619
- unsigned int flag) // \arg output to be cleared
620
- {
621
- pPio->PIO_CODR = flag;
622
- }
623
-
624
- //*----------------------------------------------------------------------------
625
- //* \fn AT91F_PIO_ForceOutput
626
- //* \brief Force output when Direct drive option is enabled
627
- //*----------------------------------------------------------------------------
628
- __inline void AT91F_PIO_ForceOutput(
629
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
630
- unsigned int flag) // \arg output to be forced
631
- {
632
- pPio->PIO_ODSR = flag;
633
- }
634
-
635
- //*----------------------------------------------------------------------------
636
- //* \fn AT91F_PIO_Enable
637
- //* \brief Enable PIO
638
- //*----------------------------------------------------------------------------
639
- __inline void AT91F_PIO_Enable(
640
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
641
- unsigned int flag) // \arg pio to be enabled
642
- {
643
- pPio->PIO_PER = flag;
644
- }
645
-
646
- //*----------------------------------------------------------------------------
647
- //* \fn AT91F_PIO_Disable
648
- //* \brief Disable PIO
649
- //*----------------------------------------------------------------------------
650
- __inline void AT91F_PIO_Disable(
651
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
652
- unsigned int flag) // \arg pio to be disabled
653
- {
654
- pPio->PIO_PDR = flag;
655
- }
656
-
657
- //*----------------------------------------------------------------------------
658
- //* \fn AT91F_PIO_GetStatus
659
- //* \brief Return PIO Status
660
- //*----------------------------------------------------------------------------
661
- __inline unsigned int AT91F_PIO_GetStatus( // \return PIO Status
662
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
663
- {
664
- return pPio->PIO_PSR;
665
- }
666
-
667
- //*----------------------------------------------------------------------------
668
- //* \fn AT91F_PIO_IsSet
669
- //* \brief Test if PIO is Set
670
- //*----------------------------------------------------------------------------
671
- __inline int AT91F_PIO_IsSet(
672
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
673
- unsigned int flag) // \arg flag to be tested
674
- {
675
- return (AT91F_PIO_GetStatus(pPio) & flag);
676
- }
677
-
678
- //*----------------------------------------------------------------------------
679
- //* \fn AT91F_PIO_OutputEnable
680
- //* \brief Output Enable PIO
681
- //*----------------------------------------------------------------------------
682
- __inline void AT91F_PIO_OutputEnable(
683
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
684
- unsigned int flag) // \arg pio output to be enabled
685
- {
686
- pPio->PIO_OER = flag;
687
- }
688
-
689
- //*----------------------------------------------------------------------------
690
- //* \fn AT91F_PIO_OutputDisable
691
- //* \brief Output Enable PIO
692
- //*----------------------------------------------------------------------------
693
- __inline void AT91F_PIO_OutputDisable(
694
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
695
- unsigned int flag) // \arg pio output to be disabled
696
- {
697
- pPio->PIO_ODR = flag;
698
- }
699
-
700
- //*----------------------------------------------------------------------------
701
- //* \fn AT91F_PIO_GetOutputStatus
702
- //* \brief Return PIO Output Status
703
- //*----------------------------------------------------------------------------
704
- __inline unsigned int AT91F_PIO_GetOutputStatus( // \return PIO Output Status
705
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
706
- {
707
- return pPio->PIO_OSR;
708
- }
709
-
710
- //*----------------------------------------------------------------------------
711
- //* \fn AT91F_PIO_IsOuputSet
712
- //* \brief Test if PIO Output is Set
713
- //*----------------------------------------------------------------------------
714
- __inline int AT91F_PIO_IsOutputSet(
715
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
716
- unsigned int flag) // \arg flag to be tested
717
- {
718
- return (AT91F_PIO_GetOutputStatus(pPio) & flag);
719
- }
720
-
721
- //*----------------------------------------------------------------------------
722
- //* \fn AT91F_PIO_InputFilterEnable
723
- //* \brief Input Filter Enable PIO
724
- //*----------------------------------------------------------------------------
725
- __inline void AT91F_PIO_InputFilterEnable(
726
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
727
- unsigned int flag) // \arg pio input filter to be enabled
728
- {
729
- pPio->PIO_IFER = flag;
730
- }
731
-
732
- //*----------------------------------------------------------------------------
733
- //* \fn AT91F_PIO_InputFilterDisable
734
- //* \brief Input Filter Disable PIO
735
- //*----------------------------------------------------------------------------
736
- __inline void AT91F_PIO_InputFilterDisable(
737
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
738
- unsigned int flag) // \arg pio input filter to be disabled
739
- {
740
- pPio->PIO_IFDR = flag;
741
- }
742
-
743
- //*----------------------------------------------------------------------------
744
- //* \fn AT91F_PIO_GetInputFilterStatus
745
- //* \brief Return PIO Input Filter Status
746
- //*----------------------------------------------------------------------------
747
- __inline unsigned int AT91F_PIO_GetInputFilterStatus( // \return PIO Input Filter Status
748
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
749
- {
750
- return pPio->PIO_IFSR;
751
- }
752
-
753
- //*----------------------------------------------------------------------------
754
- //* \fn AT91F_PIO_IsInputFilterSet
755
- //* \brief Test if PIO Input filter is Set
756
- //*----------------------------------------------------------------------------
757
- __inline int AT91F_PIO_IsInputFilterSet(
758
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
759
- unsigned int flag) // \arg flag to be tested
760
- {
761
- return (AT91F_PIO_GetInputFilterStatus(pPio) & flag);
762
- }
763
-
764
- //*----------------------------------------------------------------------------
765
- //* \fn AT91F_PIO_GetOutputDataStatus
766
- //* \brief Return PIO Output Data Status
767
- //*----------------------------------------------------------------------------
768
- __inline unsigned int AT91F_PIO_GetOutputDataStatus( // \return PIO Output Data Status
769
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
770
- {
771
- return pPio->PIO_ODSR;
772
- }
773
-
774
- //*----------------------------------------------------------------------------
775
- //* \fn AT91F_PIO_InterruptEnable
776
- //* \brief Enable PIO Interrupt
777
- //*----------------------------------------------------------------------------
778
- __inline void AT91F_PIO_InterruptEnable(
779
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
780
- unsigned int flag) // \arg pio interrupt to be enabled
781
- {
782
- pPio->PIO_IER = flag;
783
- }
784
-
785
- //*----------------------------------------------------------------------------
786
- //* \fn AT91F_PIO_InterruptDisable
787
- //* \brief Disable PIO Interrupt
788
- //*----------------------------------------------------------------------------
789
- __inline void AT91F_PIO_InterruptDisable(
790
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
791
- unsigned int flag) // \arg pio interrupt to be disabled
792
- {
793
- pPio->PIO_IDR = flag;
794
- }
795
-
796
- //*----------------------------------------------------------------------------
797
- //* \fn AT91F_PIO_GetInterruptMaskStatus
798
- //* \brief Return PIO Interrupt Mask Status
799
- //*----------------------------------------------------------------------------
800
- __inline unsigned int AT91F_PIO_GetInterruptMaskStatus( // \return PIO Interrupt Mask Status
801
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
802
- {
803
- return pPio->PIO_IMR;
804
- }
805
-
806
- //*----------------------------------------------------------------------------
807
- //* \fn AT91F_PIO_GetInterruptStatus
808
- //* \brief Return PIO Interrupt Status
809
- //*----------------------------------------------------------------------------
810
- __inline unsigned int AT91F_PIO_GetInterruptStatus( // \return PIO Interrupt Status
811
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
812
- {
813
- return pPio->PIO_ISR;
814
- }
815
-
816
- //*----------------------------------------------------------------------------
817
- //* \fn AT91F_PIO_IsInterruptMasked
818
- //* \brief Test if PIO Interrupt is Masked
819
- //*----------------------------------------------------------------------------
820
- __inline int AT91F_PIO_IsInterruptMasked(
821
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
822
- unsigned int flag) // \arg flag to be tested
823
- {
824
- return (AT91F_PIO_GetInterruptMaskStatus(pPio) & flag);
825
- }
826
-
827
- //*----------------------------------------------------------------------------
828
- //* \fn AT91F_PIO_IsInterruptSet
829
- //* \brief Test if PIO Interrupt is Set
830
- //*----------------------------------------------------------------------------
831
- __inline int AT91F_PIO_IsInterruptSet(
832
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
833
- unsigned int flag) // \arg flag to be tested
834
- {
835
- return (AT91F_PIO_GetInterruptStatus(pPio) & flag);
836
- }
837
-
838
- //*----------------------------------------------------------------------------
839
- //* \fn AT91F_PIO_MultiDriverEnable
840
- //* \brief Multi Driver Enable PIO
841
- //*----------------------------------------------------------------------------
842
- __inline void AT91F_PIO_MultiDriverEnable(
843
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
844
- unsigned int flag) // \arg pio to be enabled
845
- {
846
- pPio->PIO_MDER = flag;
847
- }
848
-
849
- //*----------------------------------------------------------------------------
850
- //* \fn AT91F_PIO_MultiDriverDisable
851
- //* \brief Multi Driver Disable PIO
852
- //*----------------------------------------------------------------------------
853
- __inline void AT91F_PIO_MultiDriverDisable(
854
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
855
- unsigned int flag) // \arg pio to be disabled
856
- {
857
- pPio->PIO_MDDR = flag;
858
- }
859
-
860
- //*----------------------------------------------------------------------------
861
- //* \fn AT91F_PIO_GetMultiDriverStatus
862
- //* \brief Return PIO Multi Driver Status
863
- //*----------------------------------------------------------------------------
864
- __inline unsigned int AT91F_PIO_GetMultiDriverStatus( // \return PIO Multi Driver Status
865
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
866
- {
867
- return pPio->PIO_MDSR;
868
- }
869
-
870
- //*----------------------------------------------------------------------------
871
- //* \fn AT91F_PIO_IsMultiDriverSet
872
- //* \brief Test if PIO MultiDriver is Set
873
- //*----------------------------------------------------------------------------
874
- __inline int AT91F_PIO_IsMultiDriverSet(
875
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
876
- unsigned int flag) // \arg flag to be tested
877
- {
878
- return (AT91F_PIO_GetMultiDriverStatus(pPio) & flag);
879
- }
880
-
881
- //*----------------------------------------------------------------------------
882
- //* \fn AT91F_PIO_A_RegisterSelection
883
- //* \brief PIO A Register Selection
884
- //*----------------------------------------------------------------------------
885
- __inline void AT91F_PIO_A_RegisterSelection(
886
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
887
- unsigned int flag) // \arg pio A register selection
888
- {
889
- pPio->PIO_ASR = flag;
890
- }
891
-
892
- //*----------------------------------------------------------------------------
893
- //* \fn AT91F_PIO_B_RegisterSelection
894
- //* \brief PIO B Register Selection
895
- //*----------------------------------------------------------------------------
896
- __inline void AT91F_PIO_B_RegisterSelection(
897
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
898
- unsigned int flag) // \arg pio B register selection
899
- {
900
- pPio->PIO_BSR = flag;
901
- }
902
-
903
- //*----------------------------------------------------------------------------
904
- //* \fn AT91F_PIO_Get_AB_RegisterStatus
905
- //* \brief Return PIO Interrupt Status
906
- //*----------------------------------------------------------------------------
907
- __inline unsigned int AT91F_PIO_Get_AB_RegisterStatus( // \return PIO AB Register Status
908
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
909
- {
910
- return pPio->PIO_ABSR;
911
- }
912
-
913
- //*----------------------------------------------------------------------------
914
- //* \fn AT91F_PIO_IsAB_RegisterSet
915
- //* \brief Test if PIO AB Register is Set
916
- //*----------------------------------------------------------------------------
917
- __inline int AT91F_PIO_IsAB_RegisterSet(
918
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
919
- unsigned int flag) // \arg flag to be tested
920
- {
921
- return (AT91F_PIO_Get_AB_RegisterStatus(pPio) & flag);
922
- }
923
-
924
- //*----------------------------------------------------------------------------
925
- //* \fn AT91F_PIO_OutputWriteEnable
926
- //* \brief Output Write Enable PIO
927
- //*----------------------------------------------------------------------------
928
- __inline void AT91F_PIO_OutputWriteEnable(
929
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
930
- unsigned int flag) // \arg pio output write to be enabled
931
- {
932
- pPio->PIO_OWER = flag;
933
- }
934
-
935
- //*----------------------------------------------------------------------------
936
- //* \fn AT91F_PIO_OutputWriteDisable
937
- //* \brief Output Write Disable PIO
938
- //*----------------------------------------------------------------------------
939
- __inline void AT91F_PIO_OutputWriteDisable(
940
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
941
- unsigned int flag) // \arg pio output write to be disabled
942
- {
943
- pPio->PIO_OWDR = flag;
944
- }
945
-
946
- //*----------------------------------------------------------------------------
947
- //* \fn AT91F_PIO_GetOutputWriteStatus
948
- //* \brief Return PIO Output Write Status
949
- //*----------------------------------------------------------------------------
950
- __inline unsigned int AT91F_PIO_GetOutputWriteStatus( // \return PIO Output Write Status
951
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
952
- {
953
- return pPio->PIO_OWSR;
954
- }
955
-
956
- //*----------------------------------------------------------------------------
957
- //* \fn AT91F_PIO_IsOutputWriteSet
958
- //* \brief Test if PIO OutputWrite is Set
959
- //*----------------------------------------------------------------------------
960
- __inline int AT91F_PIO_IsOutputWriteSet(
961
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
962
- unsigned int flag) // \arg flag to be tested
963
- {
964
- return (AT91F_PIO_GetOutputWriteStatus(pPio) & flag);
965
- }
966
-
967
- //*----------------------------------------------------------------------------
968
- //* \fn AT91F_PIO_GetCfgPullup
969
- //* \brief Return PIO Configuration Pullup
970
- //*----------------------------------------------------------------------------
971
- __inline unsigned int AT91F_PIO_GetCfgPullup( // \return PIO Configuration Pullup
972
- AT91PS_PIO pPio) // \arg pointer to a PIO controller
973
- {
974
- return pPio->PIO_PPUSR;
975
- }
976
-
977
- //*----------------------------------------------------------------------------
978
- //* \fn AT91F_PIO_IsOutputDataStatusSet
979
- //* \brief Test if PIO Output Data Status is Set
980
- //*----------------------------------------------------------------------------
981
- __inline int AT91F_PIO_IsOutputDataStatusSet(
982
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
983
- unsigned int flag) // \arg flag to be tested
984
- {
985
- return (AT91F_PIO_GetOutputDataStatus(pPio) & flag);
986
- }
987
-
988
- //*----------------------------------------------------------------------------
989
- //* \fn AT91F_PIO_IsCfgPullupStatusSet
990
- //* \brief Test if PIO Configuration Pullup Status is Set
991
- //*----------------------------------------------------------------------------
992
- __inline int AT91F_PIO_IsCfgPullupStatusSet(
993
- AT91PS_PIO pPio, // \arg pointer to a PIO controller
994
- unsigned int flag) // \arg flag to be tested
995
- {
996
- return (~AT91F_PIO_GetCfgPullup(pPio) & flag);
997
- }
998
-
999
- /* *****************************************************************************
1000
- SOFTWARE API FOR PMC
1001
- ***************************************************************************** */
1002
- //*----------------------------------------------------------------------------
1003
- //* \fn AT91F_PMC_CfgSysClkEnableReg
1004
- //* \brief Configure the System Clock Enable Register of the PMC controller
1005
- //*----------------------------------------------------------------------------
1006
- __inline void AT91F_PMC_CfgSysClkEnableReg (
1007
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
1008
- unsigned int mode)
1009
- {
1010
- //* Write to the SCER register
1011
- pPMC->PMC_SCER = mode;
1012
- }
1013
-
1014
- //*----------------------------------------------------------------------------
1015
- //* \fn AT91F_PMC_CfgSysClkDisableReg
1016
- //* \brief Configure the System Clock Disable Register of the PMC controller
1017
- //*----------------------------------------------------------------------------
1018
- __inline void AT91F_PMC_CfgSysClkDisableReg (
1019
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
1020
- unsigned int mode)
1021
- {
1022
- //* Write to the SCDR register
1023
- pPMC->PMC_SCDR = mode;
1024
- }
1025
-
1026
- //*----------------------------------------------------------------------------
1027
- //* \fn AT91F_PMC_GetSysClkStatusReg
1028
- //* \brief Return the System Clock Status Register of the PMC controller
1029
- //*----------------------------------------------------------------------------
1030
- __inline unsigned int AT91F_PMC_GetSysClkStatusReg (
1031
- AT91PS_PMC pPMC // pointer to a CAN controller
1032
- )
1033
- {
1034
- return pPMC->PMC_SCSR;
1035
- }
1036
-
1037
- //*----------------------------------------------------------------------------
1038
- //* \fn AT91F_PMC_EnablePeriphClock
1039
- //* \brief Enable peripheral clock
1040
- //*----------------------------------------------------------------------------
1041
- __inline void AT91F_PMC_EnablePeriphClock (
1042
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
1043
- unsigned int periphIds) // \arg IDs of peripherals to enable
1044
- {
1045
- pPMC->PMC_PCER = periphIds;
1046
- }
1047
-
1048
- //*----------------------------------------------------------------------------
1049
- //* \fn AT91F_PMC_DisablePeriphClock
1050
- //* \brief Disable peripheral clock
1051
- //*----------------------------------------------------------------------------
1052
- __inline void AT91F_PMC_DisablePeriphClock (
1053
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
1054
- unsigned int periphIds) // \arg IDs of peripherals to enable
1055
- {
1056
- pPMC->PMC_PCDR = periphIds;
1057
- }
1058
-
1059
- //*----------------------------------------------------------------------------
1060
- //* \fn AT91F_PMC_GetPeriphClock
1061
- //* \brief Get peripheral clock status
1062
- //*----------------------------------------------------------------------------
1063
- __inline unsigned int AT91F_PMC_GetPeriphClock (
1064
- AT91PS_PMC pPMC) // \arg pointer to PMC controller
1065
- {
1066
- return pPMC->PMC_PCSR;
1067
- }
1068
-
1069
- //*----------------------------------------------------------------------------
1070
- //* \fn AT91F_CKGR_CfgMainOscillatorReg
1071
- //* \brief Cfg the main oscillator
1072
- //*----------------------------------------------------------------------------
1073
- __inline void AT91F_CKGR_CfgMainOscillatorReg (
1074
- AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
1075
- unsigned int mode)
1076
- {
1077
- pCKGR->CKGR_MOR = mode;
1078
- }
1079
-
1080
- //*----------------------------------------------------------------------------
1081
- //* \fn AT91F_CKGR_GetMainOscillatorReg
1082
- //* \brief Cfg the main oscillator
1083
- //*----------------------------------------------------------------------------
1084
- __inline unsigned int AT91F_CKGR_GetMainOscillatorReg (
1085
- AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
1086
- {
1087
- return pCKGR->CKGR_MOR;
1088
- }
1089
-
1090
- //*----------------------------------------------------------------------------
1091
- //* \fn AT91F_CKGR_EnableMainOscillator
1092
- //* \brief Enable the main oscillator
1093
- //*----------------------------------------------------------------------------
1094
- __inline void AT91F_CKGR_EnableMainOscillator(
1095
- AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
1096
- {
1097
- pCKGR->CKGR_MOR |= AT91C_CKGR_MOSCEN;
1098
- }
1099
-
1100
- //*----------------------------------------------------------------------------
1101
- //* \fn AT91F_CKGR_DisableMainOscillator
1102
- //* \brief Disable the main oscillator
1103
- //*----------------------------------------------------------------------------
1104
- __inline void AT91F_CKGR_DisableMainOscillator (
1105
- AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
1106
- {
1107
- pCKGR->CKGR_MOR &= ~AT91C_CKGR_MOSCEN;
1108
- }
1109
-
1110
- //*----------------------------------------------------------------------------
1111
- //* \fn AT91F_CKGR_CfgMainOscStartUpTime
1112
- //* \brief Cfg MOR Register according to the main osc startup time
1113
- //*----------------------------------------------------------------------------
1114
- __inline void AT91F_CKGR_CfgMainOscStartUpTime (
1115
- AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
1116
- unsigned int startup_time, // \arg main osc startup time in microsecond (us)
1117
- unsigned int slowClock) // \arg slowClock in Hz
1118
- {
1119
- pCKGR->CKGR_MOR &= ~AT91C_CKGR_OSCOUNT;
1120
- pCKGR->CKGR_MOR |= ((slowClock * startup_time)/(8*1000000)) << 8;
1121
- }
1122
-
1123
- //*----------------------------------------------------------------------------
1124
- //* \fn AT91F_CKGR_GetMainClockFreqReg
1125
- //* \brief Cfg the main oscillator
1126
- //*----------------------------------------------------------------------------
1127
- __inline unsigned int AT91F_CKGR_GetMainClockFreqReg (
1128
- AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
1129
- {
1130
- return pCKGR->CKGR_MCFR;
1131
- }
1132
-
1133
- //*----------------------------------------------------------------------------
1134
- //* \fn AT91F_CKGR_GetMainClock
1135
- //* \brief Return Main clock in Hz
1136
- //*----------------------------------------------------------------------------
1137
- __inline unsigned int AT91F_CKGR_GetMainClock (
1138
- AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
1139
- unsigned int slowClock) // \arg slowClock in Hz
1140
- {
1141
- return ((pCKGR->CKGR_MCFR & AT91C_CKGR_MAINF) * slowClock) >> 4;
1142
- }
1143
-
1144
- //*----------------------------------------------------------------------------
1145
- //* \fn AT91F_PMC_CfgMCKReg
1146
- //* \brief Cfg Master Clock Register
1147
- //*----------------------------------------------------------------------------
1148
- __inline void AT91F_PMC_CfgMCKReg (
1149
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
1150
- unsigned int mode)
1151
- {
1152
- pPMC->PMC_MCKR = mode;
1153
- }
1154
-
1155
- //*----------------------------------------------------------------------------
1156
- //* \fn AT91F_PMC_GetMCKReg
1157
- //* \brief Return Master Clock Register
1158
- //*----------------------------------------------------------------------------
1159
- __inline unsigned int AT91F_PMC_GetMCKReg(
1160
- AT91PS_PMC pPMC) // \arg pointer to PMC controller
1161
- {
1162
- return pPMC->PMC_MCKR;
1163
- }
1164
-
1165
- //*------------------------------------------------------------------------------
1166
- //* \fn AT91F_PMC_GetMasterClock
1167
- //* \brief Return master clock in Hz which correponds to processor clock for ARM7
1168
- //*------------------------------------------------------------------------------
1169
- __inline unsigned int AT91F_PMC_GetMasterClock (
1170
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
1171
- AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
1172
- unsigned int slowClock) // \arg slowClock in Hz
1173
- {
1174
- unsigned int reg = pPMC->PMC_MCKR;
1175
- unsigned int prescaler = (1 << ((reg & AT91C_PMC_PRES) >> 2));
1176
- unsigned int pllDivider, pllMultiplier;
1177
-
1178
- switch (reg & AT91C_PMC_CSS) {
1179
- case AT91C_PMC_CSS_SLOW_CLK: // Slow clock selected
1180
- return slowClock / prescaler;
1181
- case AT91C_PMC_CSS_MAIN_CLK: // Main clock is selected
1182
- return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / prescaler;
1183
- case AT91C_PMC_CSS_PLL_CLK: // PLLB clock is selected
1184
- reg = pCKGR->CKGR_PLLR;
1185
- pllDivider = (reg & AT91C_CKGR_DIV);
1186
- pllMultiplier = ((reg & AT91C_CKGR_MUL) >> 16) + 1;
1187
- return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / pllDivider * pllMultiplier / prescaler;
1188
- }
1189
- return 0;
1190
- }
1191
-
1192
- //*----------------------------------------------------------------------------
1193
- //* \fn AT91F_PMC_EnablePCK
1194
- //* \brief Enable peripheral clock
1195
- //*----------------------------------------------------------------------------
1196
- __inline void AT91F_PMC_EnablePCK (
1197
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
1198
- unsigned int pck, // \arg Peripheral clock identifier 0 .. 7
1199
- unsigned int mode)
1200
- {
1201
- pPMC->PMC_PCKR[pck] = mode;
1202
- pPMC->PMC_SCER = (1 << pck) << 8;
1203
- }
1204
-
1205
- //*----------------------------------------------------------------------------
1206
- //* \fn AT91F_PMC_DisablePCK
1207
- //* \brief Enable peripheral clock
1208
- //*----------------------------------------------------------------------------
1209
- __inline void AT91F_PMC_DisablePCK (
1210
- AT91PS_PMC pPMC, // \arg pointer to PMC controller
1211
- unsigned int pck) // \arg Peripheral clock identifier 0 .. 7
1212
- {
1213
- pPMC->PMC_SCDR = (1 << pck) << 8;
1214
- }
1215
-
1216
- //*----------------------------------------------------------------------------
1217
- //* \fn AT91F_PMC_EnableIt
1218
- //* \brief Enable PMC interrupt
1219
- //*----------------------------------------------------------------------------
1220
- __inline void AT91F_PMC_EnableIt (
1221
- AT91PS_PMC pPMC, // pointer to a PMC controller
1222
- unsigned int flag) // IT to be enabled
1223
- {
1224
- //* Write to the IER register
1225
- pPMC->PMC_IER = flag;
1226
- }
1227
-
1228
- //*----------------------------------------------------------------------------
1229
- //* \fn AT91F_PMC_DisableIt
1230
- //* \brief Disable PMC interrupt
1231
- //*----------------------------------------------------------------------------
1232
- __inline void AT91F_PMC_DisableIt (
1233
- AT91PS_PMC pPMC, // pointer to a PMC controller
1234
- unsigned int flag) // IT to be disabled
1235
- {
1236
- //* Write to the IDR register
1237
- pPMC->PMC_IDR = flag;
1238
- }
1239
-
1240
- //*----------------------------------------------------------------------------
1241
- //* \fn AT91F_PMC_GetStatus
1242
- //* \brief Return PMC Interrupt Status
1243
- //*----------------------------------------------------------------------------
1244
- __inline unsigned int AT91F_PMC_GetStatus( // \return PMC Interrupt Status
1245
- AT91PS_PMC pPMC) // pointer to a PMC controller
1246
- {
1247
- return pPMC->PMC_SR;
1248
- }
1249
-
1250
- //*----------------------------------------------------------------------------
1251
- //* \fn AT91F_PMC_GetInterruptMaskStatus
1252
- //* \brief Return PMC Interrupt Mask Status
1253
- //*----------------------------------------------------------------------------
1254
- __inline unsigned int AT91F_PMC_GetInterruptMaskStatus( // \return PMC Interrupt Mask Status
1255
- AT91PS_PMC pPMC) // pointer to a PMC controller
1256
- {
1257
- return pPMC->PMC_IMR;
1258
- }
1259
-
1260
- //*----------------------------------------------------------------------------
1261
- //* \fn AT91F_PMC_IsInterruptMasked
1262
- //* \brief Test if PMC Interrupt is Masked
1263
- //*----------------------------------------------------------------------------
1264
- __inline unsigned int AT91F_PMC_IsInterruptMasked(
1265
- AT91PS_PMC pPMC, // \arg pointer to a PMC controller
1266
- unsigned int flag) // \arg flag to be tested
1267
- {
1268
- return (AT91F_PMC_GetInterruptMaskStatus(pPMC) & flag);
1269
- }
1270
-
1271
- //*----------------------------------------------------------------------------
1272
- //* \fn AT91F_PMC_IsStatusSet
1273
- //* \brief Test if PMC Status is Set
1274
- //*----------------------------------------------------------------------------
1275
- __inline unsigned int AT91F_PMC_IsStatusSet(
1276
- AT91PS_PMC pPMC, // \arg pointer to a PMC controller
1277
- unsigned int flag) // \arg flag to be tested
1278
- {
1279
- return (AT91F_PMC_GetStatus(pPMC) & flag);
1280
- }
1281
-
1282
- // ----------------------------------------------------------------------------
1283
- // \fn AT91F_CKGR_CfgPLLReg
1284
- // \brief Cfg the PLL Register
1285
- // ----------------------------------------------------------------------------
1286
- __inline void AT91F_CKGR_CfgPLLReg (
1287
- AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
1288
- unsigned int mode)
1289
- {
1290
- pCKGR->CKGR_PLLR = mode;
1291
- }
1292
-
1293
- // ----------------------------------------------------------------------------
1294
- // \fn AT91F_CKGR_GetPLLReg
1295
- // \brief Get the PLL Register
1296
- // ----------------------------------------------------------------------------
1297
- __inline unsigned int AT91F_CKGR_GetPLLReg (
1298
- AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
1299
- {
1300
- return pCKGR->CKGR_PLLR;
1301
- }
1302
-
1303
-
1304
- /* *****************************************************************************
1305
- SOFTWARE API FOR RSTC
1306
- ***************************************************************************** */
1307
- //*----------------------------------------------------------------------------
1308
- //* \fn AT91F_RSTSoftReset
1309
- //* \brief Start Software Reset
1310
- //*----------------------------------------------------------------------------
1311
- __inline void AT91F_RSTSoftReset(
1312
- AT91PS_RSTC pRSTC,
1313
- unsigned int reset)
1314
- {
1315
- pRSTC->RSTC_RCR = (0xA5000000 | reset);
1316
- }
1317
-
1318
- //*----------------------------------------------------------------------------
1319
- //* \fn AT91F_RSTSetMode
1320
- //* \brief Set Reset Mode
1321
- //*----------------------------------------------------------------------------
1322
- __inline void AT91F_RSTSetMode(
1323
- AT91PS_RSTC pRSTC,
1324
- unsigned int mode)
1325
- {
1326
- pRSTC->RSTC_RMR = (0xA5000000 | mode);
1327
- }
1328
-
1329
- //*----------------------------------------------------------------------------
1330
- //* \fn AT91F_RSTGetMode
1331
- //* \brief Get Reset Mode
1332
- //*----------------------------------------------------------------------------
1333
- __inline unsigned int AT91F_RSTGetMode(
1334
- AT91PS_RSTC pRSTC)
1335
- {
1336
- return (pRSTC->RSTC_RMR);
1337
- }
1338
-
1339
- //*----------------------------------------------------------------------------
1340
- //* \fn AT91F_RSTGetStatus
1341
- //* \brief Get Reset Status
1342
- //*----------------------------------------------------------------------------
1343
- __inline unsigned int AT91F_RSTGetStatus(
1344
- AT91PS_RSTC pRSTC)
1345
- {
1346
- return (pRSTC->RSTC_RSR);
1347
- }
1348
-
1349
- //*----------------------------------------------------------------------------
1350
- //* \fn AT91F_RSTIsSoftRstActive
1351
- //* \brief Return !=0 if software reset is still not completed
1352
- //*----------------------------------------------------------------------------
1353
- __inline unsigned int AT91F_RSTIsSoftRstActive(
1354
- AT91PS_RSTC pRSTC)
1355
- {
1356
- return ((pRSTC->RSTC_RSR) & AT91C_RSTC_SRCMP);
1357
- }
1358
- /* *****************************************************************************
1359
- SOFTWARE API FOR RTTC
1360
- ***************************************************************************** */
1361
- //*--------------------------------------------------------------------------------------
1362
- //* \fn AT91F_SetRTT_TimeBase()
1363
- //* \brief Set the RTT prescaler according to the TimeBase in ms
1364
- //*--------------------------------------------------------------------------------------
1365
- __inline unsigned int AT91F_RTTSetTimeBase(
1366
- AT91PS_RTTC pRTTC,
1367
- unsigned int ms)
1368
- {
1369
- if (ms > 2000)
1370
- return 1; // AT91C_TIME_OUT_OF_RANGE
1371
- pRTTC->RTTC_RTMR &= ~0xFFFF;
1372
- pRTTC->RTTC_RTMR |= (((ms << 15) /1000) & 0xFFFF);
1373
- return 0;
1374
- }
1375
-
1376
- //*--------------------------------------------------------------------------------------
1377
- //* \fn AT91F_RTTSetPrescaler()
1378
- //* \brief Set the new prescaler value
1379
- //*--------------------------------------------------------------------------------------
1380
- __inline unsigned int AT91F_RTTSetPrescaler(
1381
- AT91PS_RTTC pRTTC,
1382
- unsigned int rtpres)
1383
- {
1384
- pRTTC->RTTC_RTMR &= ~0xFFFF;
1385
- pRTTC->RTTC_RTMR |= (rtpres & 0xFFFF);
1386
- return (pRTTC->RTTC_RTMR);
1387
- }
1388
-
1389
- //*--------------------------------------------------------------------------------------
1390
- //* \fn AT91F_RTTRestart()
1391
- //* \brief Restart the RTT prescaler
1392
- //*--------------------------------------------------------------------------------------
1393
- __inline void AT91F_RTTRestart(
1394
- AT91PS_RTTC pRTTC)
1395
- {
1396
- pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTRST;
1397
- }
1398
-
1399
-
1400
- //*--------------------------------------------------------------------------------------
1401
- //* \fn AT91F_RTT_SetAlarmINT()
1402
- //* \brief Enable RTT Alarm Interrupt
1403
- //*--------------------------------------------------------------------------------------
1404
- __inline void AT91F_RTTSetAlarmINT(
1405
- AT91PS_RTTC pRTTC)
1406
- {
1407
- pRTTC->RTTC_RTMR |= AT91C_RTTC_ALMIEN;
1408
- }
1409
-
1410
- //*--------------------------------------------------------------------------------------
1411
- //* \fn AT91F_RTT_ClearAlarmINT()
1412
- //* \brief Disable RTT Alarm Interrupt
1413
- //*--------------------------------------------------------------------------------------
1414
- __inline void AT91F_RTTClearAlarmINT(
1415
- AT91PS_RTTC pRTTC)
1416
- {
1417
- pRTTC->RTTC_RTMR &= ~AT91C_RTTC_ALMIEN;
1418
- }
1419
-
1420
- //*--------------------------------------------------------------------------------------
1421
- //* \fn AT91F_RTT_SetRttIncINT()
1422
- //* \brief Enable RTT INC Interrupt
1423
- //*--------------------------------------------------------------------------------------
1424
- __inline void AT91F_RTTSetRttIncINT(
1425
- AT91PS_RTTC pRTTC)
1426
- {
1427
- pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTINCIEN;
1428
- }
1429
-
1430
- //*--------------------------------------------------------------------------------------
1431
- //* \fn AT91F_RTT_ClearRttIncINT()
1432
- //* \brief Disable RTT INC Interrupt
1433
- //*--------------------------------------------------------------------------------------
1434
- __inline void AT91F_RTTClearRttIncINT(
1435
- AT91PS_RTTC pRTTC)
1436
- {
1437
- pRTTC->RTTC_RTMR &= ~AT91C_RTTC_RTTINCIEN;
1438
- }
1439
-
1440
- //*--------------------------------------------------------------------------------------
1441
- //* \fn AT91F_RTT_SetAlarmValue()
1442
- //* \brief Set RTT Alarm Value
1443
- //*--------------------------------------------------------------------------------------
1444
- __inline void AT91F_RTTSetAlarmValue(
1445
- AT91PS_RTTC pRTTC, unsigned int alarm)
1446
- {
1447
- pRTTC->RTTC_RTAR = alarm;
1448
- }
1449
-
1450
- //*--------------------------------------------------------------------------------------
1451
- //* \fn AT91F_RTT_GetAlarmValue()
1452
- //* \brief Get RTT Alarm Value
1453
- //*--------------------------------------------------------------------------------------
1454
- __inline unsigned int AT91F_RTTGetAlarmValue(
1455
- AT91PS_RTTC pRTTC)
1456
- {
1457
- return(pRTTC->RTTC_RTAR);
1458
- }
1459
-
1460
- //*--------------------------------------------------------------------------------------
1461
- //* \fn AT91F_RTTGetStatus()
1462
- //* \brief Read the RTT status
1463
- //*--------------------------------------------------------------------------------------
1464
- __inline unsigned int AT91F_RTTGetStatus(
1465
- AT91PS_RTTC pRTTC)
1466
- {
1467
- return(pRTTC->RTTC_RTSR);
1468
- }
1469
-
1470
- //*--------------------------------------------------------------------------------------
1471
- //* \fn AT91F_RTT_ReadValue()
1472
- //* \brief Read the RTT value
1473
- //*--------------------------------------------------------------------------------------
1474
- __inline unsigned int AT91F_RTTReadValue(
1475
- AT91PS_RTTC pRTTC)
1476
- {
1477
- register volatile unsigned int val1,val2;
1478
- do
1479
- {
1480
- val1 = pRTTC->RTTC_RTVR;
1481
- val2 = pRTTC->RTTC_RTVR;
1482
- }
1483
- while(val1 != val2);
1484
- return(val1);
1485
- }
1486
- /* *****************************************************************************
1487
- SOFTWARE API FOR PITC
1488
- ***************************************************************************** */
1489
- //*----------------------------------------------------------------------------
1490
- //* \fn AT91F_PITInit
1491
- //* \brief System timer init : period in �second, system clock freq in MHz
1492
- //*----------------------------------------------------------------------------
1493
- __inline void AT91F_PITInit(
1494
- AT91PS_PITC pPITC,
1495
- unsigned int period,
1496
- unsigned int pit_frequency)
1497
- {
1498
- pPITC->PITC_PIMR = period? (period * pit_frequency + 8) >> 4 : 0; // +8 to avoid %10 and /10
1499
- pPITC->PITC_PIMR |= AT91C_PITC_PITEN;
1500
- }
1501
-
1502
- //*----------------------------------------------------------------------------
1503
- //* \fn AT91F_PITSetPIV
1504
- //* \brief Set the PIT Periodic Interval Value
1505
- //*----------------------------------------------------------------------------
1506
- __inline void AT91F_PITSetPIV(
1507
- AT91PS_PITC pPITC,
1508
- unsigned int piv)
1509
- {
1510
- pPITC->PITC_PIMR = piv | (pPITC->PITC_PIMR & (AT91C_PITC_PITEN | AT91C_PITC_PITIEN));
1511
- }
1512
-
1513
- //*----------------------------------------------------------------------------
1514
- //* \fn AT91F_PITEnableInt
1515
- //* \brief Enable PIT periodic interrupt
1516
- //*----------------------------------------------------------------------------
1517
- __inline void AT91F_PITEnableInt(
1518
- AT91PS_PITC pPITC)
1519
- {
1520
- pPITC->PITC_PIMR |= AT91C_PITC_PITIEN;
1521
- }
1522
-
1523
- //*----------------------------------------------------------------------------
1524
- //* \fn AT91F_PITDisableInt
1525
- //* \brief Disable PIT periodic interrupt
1526
- //*----------------------------------------------------------------------------
1527
- __inline void AT91F_PITDisableInt(
1528
- AT91PS_PITC pPITC)
1529
- {
1530
- pPITC->PITC_PIMR &= ~AT91C_PITC_PITIEN;
1531
- }
1532
-
1533
- //*----------------------------------------------------------------------------
1534
- //* \fn AT91F_PITGetMode
1535
- //* \brief Read PIT mode register
1536
- //*----------------------------------------------------------------------------
1537
- __inline unsigned int AT91F_PITGetMode(
1538
- AT91PS_PITC pPITC)
1539
- {
1540
- return(pPITC->PITC_PIMR);
1541
- }
1542
-
1543
- //*----------------------------------------------------------------------------
1544
- //* \fn AT91F_PITGetStatus
1545
- //* \brief Read PIT status register
1546
- //*----------------------------------------------------------------------------
1547
- __inline unsigned int AT91F_PITGetStatus(
1548
- AT91PS_PITC pPITC)
1549
- {
1550
- return(pPITC->PITC_PISR);
1551
- }
1552
-
1553
- //*----------------------------------------------------------------------------
1554
- //* \fn AT91F_PITGetPIIR
1555
- //* \brief Read PIT CPIV and PICNT without ressetting the counters
1556
- //*----------------------------------------------------------------------------
1557
- __inline unsigned int AT91F_PITGetPIIR(
1558
- AT91PS_PITC pPITC)
1559
- {
1560
- return(pPITC->PITC_PIIR);
1561
- }
1562
-
1563
- //*----------------------------------------------------------------------------
1564
- //* \fn AT91F_PITGetPIVR
1565
- //* \brief Read System timer CPIV and PICNT without ressetting the counters
1566
- //*----------------------------------------------------------------------------
1567
- __inline unsigned int AT91F_PITGetPIVR(
1568
- AT91PS_PITC pPITC)
1569
- {
1570
- return(pPITC->PITC_PIVR);
1571
- }
1572
- /* *****************************************************************************
1573
- SOFTWARE API FOR WDTC
1574
- ***************************************************************************** */
1575
- //*----------------------------------------------------------------------------
1576
- //* \fn AT91F_WDTSetMode
1577
- //* \brief Set Watchdog Mode Register
1578
- //*----------------------------------------------------------------------------
1579
- __inline void AT91F_WDTSetMode(
1580
- AT91PS_WDTC pWDTC,
1581
- unsigned int Mode)
1582
- {
1583
- pWDTC->WDTC_WDMR = Mode;
1584
- }
1585
-
1586
- //*----------------------------------------------------------------------------
1587
- //* \fn AT91F_WDTRestart
1588
- //* \brief Restart Watchdog
1589
- //*----------------------------------------------------------------------------
1590
- __inline void AT91F_WDTRestart(
1591
- AT91PS_WDTC pWDTC)
1592
- {
1593
- pWDTC->WDTC_WDCR = 0xA5000001;
1594
- }
1595
-
1596
- //*----------------------------------------------------------------------------
1597
- //* \fn AT91F_WDTSGettatus
1598
- //* \brief Get Watchdog Status
1599
- //*----------------------------------------------------------------------------
1600
- __inline unsigned int AT91F_WDTSGettatus(
1601
- AT91PS_WDTC pWDTC)
1602
- {
1603
- return(pWDTC->WDTC_WDSR & 0x3);
1604
- }
1605
-
1606
- //*----------------------------------------------------------------------------
1607
- //* \fn AT91F_WDTGetPeriod
1608
- //* \brief Translate ms into Watchdog Compatible value
1609
- //*----------------------------------------------------------------------------
1610
- __inline unsigned int AT91F_WDTGetPeriod(unsigned int ms)
1611
- {
1612
- if ((ms < 4) || (ms > 16000))
1613
- return 0;
1614
- return((ms << 8) / 1000);
1615
- }
1616
- /* *****************************************************************************
1617
- SOFTWARE API FOR VREG
1618
- ***************************************************************************** */
1619
- //*----------------------------------------------------------------------------
1620
- //* \fn AT91F_VREG_Enable_LowPowerMode
1621
- //* \brief Enable VREG Low Power Mode
1622
- //*----------------------------------------------------------------------------
1623
- __inline void AT91F_VREG_Enable_LowPowerMode(
1624
- AT91PS_VREG pVREG)
1625
- {
1626
- pVREG->VREG_MR |= AT91C_VREG_PSTDBY;
1627
- }
1628
-
1629
- //*----------------------------------------------------------------------------
1630
- //* \fn AT91F_VREG_Disable_LowPowerMode
1631
- //* \brief Disable VREG Low Power Mode
1632
- //*----------------------------------------------------------------------------
1633
- __inline void AT91F_VREG_Disable_LowPowerMode(
1634
- AT91PS_VREG pVREG)
1635
- {
1636
- pVREG->VREG_MR &= ~AT91C_VREG_PSTDBY;
1637
- }/* *****************************************************************************
1638
- SOFTWARE API FOR MC
1639
- ***************************************************************************** */
1640
-
1641
- #define AT91C_MC_CORRECT_KEY ((unsigned int) 0x5A << 24) // (MC) Correct Protect Key
1642
-
1643
- //*----------------------------------------------------------------------------
1644
- //* \fn AT91F_MC_Remap
1645
- //* \brief Make Remap
1646
- //*----------------------------------------------------------------------------
1647
- __inline void AT91F_MC_Remap (void) //
1648
- {
1649
- AT91PS_MC pMC = (AT91PS_MC) AT91C_BASE_MC;
1650
-
1651
- pMC->MC_RCR = AT91C_MC_RCB;
1652
- }
1653
-
1654
- //*----------------------------------------------------------------------------
1655
- //* \fn AT91F_MC_EFC_CfgModeReg
1656
- //* \brief Configure the EFC Mode Register of the MC controller
1657
- //*----------------------------------------------------------------------------
1658
- __inline void AT91F_MC_EFC_CfgModeReg (
1659
- AT91PS_MC pMC, // pointer to a MC controller
1660
- unsigned int mode) // mode register
1661
- {
1662
- // Write to the FMR register
1663
- pMC->MC_FMR = mode;
1664
- }
1665
-
1666
- //*----------------------------------------------------------------------------
1667
- //* \fn AT91F_MC_EFC_GetModeReg
1668
- //* \brief Return MC EFC Mode Regsiter
1669
- //*----------------------------------------------------------------------------
1670
- __inline unsigned int AT91F_MC_EFC_GetModeReg(
1671
- AT91PS_MC pMC) // pointer to a MC controller
1672
- {
1673
- return pMC->MC_FMR;
1674
- }
1675
-
1676
- //*----------------------------------------------------------------------------
1677
- //* \fn AT91F_MC_EFC_ComputeFMCN
1678
- //* \brief Return MC EFC Mode Regsiter
1679
- //*----------------------------------------------------------------------------
1680
- __inline unsigned int AT91F_MC_EFC_ComputeFMCN(
1681
- int master_clock) // master clock in Hz
1682
- {
1683
- return (master_clock/1000000 +2);
1684
- }
1685
-
1686
- //*----------------------------------------------------------------------------
1687
- //* \fn AT91F_MC_EFC_PerformCmd
1688
- //* \brief Perform EFC Command
1689
- //*----------------------------------------------------------------------------
1690
- __inline void AT91F_MC_EFC_PerformCmd (
1691
- AT91PS_MC pMC, // pointer to a MC controller
1692
- unsigned int transfer_cmd)
1693
- {
1694
- pMC->MC_FCR = transfer_cmd;
1695
- }
1696
-
1697
- //*----------------------------------------------------------------------------
1698
- //* \fn AT91F_MC_EFC_GetStatus
1699
- //* \brief Return MC EFC Status
1700
- //*----------------------------------------------------------------------------
1701
- __inline unsigned int AT91F_MC_EFC_GetStatus(
1702
- AT91PS_MC pMC) // pointer to a MC controller
1703
- {
1704
- return pMC->MC_FSR;
1705
- }
1706
-
1707
- //*----------------------------------------------------------------------------
1708
- //* \fn AT91F_MC_EFC_IsInterruptMasked
1709
- //* \brief Test if EFC MC Interrupt is Masked
1710
- //*----------------------------------------------------------------------------
1711
- __inline unsigned int AT91F_MC_EFC_IsInterruptMasked(
1712
- AT91PS_MC pMC, // \arg pointer to a MC controller
1713
- unsigned int flag) // \arg flag to be tested
1714
- {
1715
- return (AT91F_MC_EFC_GetModeReg(pMC) & flag);
1716
- }
1717
-
1718
- //*----------------------------------------------------------------------------
1719
- //* \fn AT91F_MC_EFC_IsInterruptSet
1720
- //* \brief Test if EFC MC Interrupt is Set
1721
- //*----------------------------------------------------------------------------
1722
- __inline unsigned int AT91F_MC_EFC_IsInterruptSet(
1723
- AT91PS_MC pMC, // \arg pointer to a MC controller
1724
- unsigned int flag) // \arg flag to be tested
1725
- {
1726
- return (AT91F_MC_EFC_GetStatus(pMC) & flag);
1727
- }
1728
-
1729
- /* *****************************************************************************
1730
- SOFTWARE API FOR SPI
1731
- ***************************************************************************** */
1732
- //*----------------------------------------------------------------------------
1733
- //* \fn AT91F_SPI_CfgCs
1734
- //* \brief Configure SPI chip select register
1735
- //*----------------------------------------------------------------------------
1736
- __inline void AT91F_SPI_CfgCs (
1737
- AT91PS_SPI pSPI, // pointer to a SPI controller
1738
- int cs, // SPI cs number (0 to 3)
1739
- int val) // chip select register
1740
- {
1741
- //* Write to the CSR register
1742
- *(pSPI->SPI_CSR + cs) = val;
1743
- }
1744
-
1745
- //*----------------------------------------------------------------------------
1746
- //* \fn AT91F_SPI_EnableIt
1747
- //* \brief Enable SPI interrupt
1748
- //*----------------------------------------------------------------------------
1749
- __inline void AT91F_SPI_EnableIt (
1750
- AT91PS_SPI pSPI, // pointer to a SPI controller
1751
- unsigned int flag) // IT to be enabled
1752
- {
1753
- //* Write to the IER register
1754
- pSPI->SPI_IER = flag;
1755
- }
1756
-
1757
- //*----------------------------------------------------------------------------
1758
- //* \fn AT91F_SPI_DisableIt
1759
- //* \brief Disable SPI interrupt
1760
- //*----------------------------------------------------------------------------
1761
- __inline void AT91F_SPI_DisableIt (
1762
- AT91PS_SPI pSPI, // pointer to a SPI controller
1763
- unsigned int flag) // IT to be disabled
1764
- {
1765
- //* Write to the IDR register
1766
- pSPI->SPI_IDR = flag;
1767
- }
1768
-
1769
- //*----------------------------------------------------------------------------
1770
- //* \fn AT91F_SPI_Reset
1771
- //* \brief Reset the SPI controller
1772
- //*----------------------------------------------------------------------------
1773
- __inline void AT91F_SPI_Reset (
1774
- AT91PS_SPI pSPI // pointer to a SPI controller
1775
- )
1776
- {
1777
- //* Write to the CR register
1778
- pSPI->SPI_CR = AT91C_SPI_SWRST;
1779
- }
1780
-
1781
- //*----------------------------------------------------------------------------
1782
- //* \fn AT91F_SPI_Enable
1783
- //* \brief Enable the SPI controller
1784
- //*----------------------------------------------------------------------------
1785
- __inline void AT91F_SPI_Enable (
1786
- AT91PS_SPI pSPI // pointer to a SPI controller
1787
- )
1788
- {
1789
- //* Write to the CR register
1790
- pSPI->SPI_CR = AT91C_SPI_SPIEN;
1791
- }
1792
-
1793
- //*----------------------------------------------------------------------------
1794
- //* \fn AT91F_SPI_Disable
1795
- //* \brief Disable the SPI controller
1796
- //*----------------------------------------------------------------------------
1797
- __inline void AT91F_SPI_Disable (
1798
- AT91PS_SPI pSPI // pointer to a SPI controller
1799
- )
1800
- {
1801
- //* Write to the CR register
1802
- pSPI->SPI_CR = AT91C_SPI_SPIDIS;
1803
- }
1804
-
1805
- //*----------------------------------------------------------------------------
1806
- //* \fn AT91F_SPI_CfgMode
1807
- //* \brief Enable the SPI controller
1808
- //*----------------------------------------------------------------------------
1809
- __inline void AT91F_SPI_CfgMode (
1810
- AT91PS_SPI pSPI, // pointer to a SPI controller
1811
- int mode) // mode register
1812
- {
1813
- //* Write to the MR register
1814
- pSPI->SPI_MR = mode;
1815
- }
1816
-
1817
- //*----------------------------------------------------------------------------
1818
- //* \fn AT91F_SPI_CfgPCS
1819
- //* \brief Switch to the correct PCS of SPI Mode Register : Fixed Peripheral Selected
1820
- //*----------------------------------------------------------------------------
1821
- __inline void AT91F_SPI_CfgPCS (
1822
- AT91PS_SPI pSPI, // pointer to a SPI controller
1823
- char PCS_Device) // PCS of the Device
1824
- {
1825
- //* Write to the MR register
1826
- pSPI->SPI_MR &= 0xFFF0FFFF;
1827
- pSPI->SPI_MR |= ( (PCS_Device<<16) & AT91C_SPI_PCS );
1828
- }
1829
-
1830
- //*----------------------------------------------------------------------------
1831
- //* \fn AT91F_SPI_ReceiveFrame
1832
- //* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
1833
- //*----------------------------------------------------------------------------
1834
- __inline unsigned int AT91F_SPI_ReceiveFrame (
1835
- AT91PS_SPI pSPI,
1836
- char *pBuffer,
1837
- unsigned int szBuffer,
1838
- char *pNextBuffer,
1839
- unsigned int szNextBuffer )
1840
- {
1841
- return AT91F_PDC_ReceiveFrame(
1842
- (AT91PS_PDC) &(pSPI->SPI_RPR),
1843
- pBuffer,
1844
- szBuffer,
1845
- pNextBuffer,
1846
- szNextBuffer);
1847
- }
1848
-
1849
- //*----------------------------------------------------------------------------
1850
- //* \fn AT91F_SPI_SendFrame
1851
- //* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is bSPIy
1852
- //*----------------------------------------------------------------------------
1853
- __inline unsigned int AT91F_SPI_SendFrame(
1854
- AT91PS_SPI pSPI,
1855
- char *pBuffer,
1856
- unsigned int szBuffer,
1857
- char *pNextBuffer,
1858
- unsigned int szNextBuffer )
1859
- {
1860
- return AT91F_PDC_SendFrame(
1861
- (AT91PS_PDC) &(pSPI->SPI_RPR),
1862
- pBuffer,
1863
- szBuffer,
1864
- pNextBuffer,
1865
- szNextBuffer);
1866
- }
1867
-
1868
- //*----------------------------------------------------------------------------
1869
- //* \fn AT91F_SPI_Close
1870
- //* \brief Close SPI: disable IT disable transfert, close PDC
1871
- //*----------------------------------------------------------------------------
1872
- __inline void AT91F_SPI_Close (
1873
- AT91PS_SPI pSPI) // \arg pointer to a SPI controller
1874
- {
1875
- //* Reset all the Chip Select register
1876
- pSPI->SPI_CSR[0] = 0 ;
1877
- pSPI->SPI_CSR[1] = 0 ;
1878
- pSPI->SPI_CSR[2] = 0 ;
1879
- pSPI->SPI_CSR[3] = 0 ;
1880
-
1881
- //* Reset the SPI mode
1882
- pSPI->SPI_MR = 0 ;
1883
-
1884
- //* Disable all interrupts
1885
- pSPI->SPI_IDR = 0xFFFFFFFF ;
1886
-
1887
- //* Abort the Peripheral Data Transfers
1888
- AT91F_PDC_Close((AT91PS_PDC) &(pSPI->SPI_RPR));
1889
-
1890
- //* Disable receiver and transmitter and stop any activity immediately
1891
- pSPI->SPI_CR = AT91C_SPI_SPIDIS;
1892
- }
1893
-
1894
- //*----------------------------------------------------------------------------
1895
- //* \fn AT91F_SPI_PutChar
1896
- //* \brief Send a character,does not check if ready to send
1897
- //*----------------------------------------------------------------------------
1898
- __inline void AT91F_SPI_PutChar (
1899
- AT91PS_SPI pSPI,
1900
- unsigned int character,
1901
- unsigned int cs_number )
1902
- {
1903
- unsigned int value_for_cs;
1904
- value_for_cs = (~(1 << cs_number)) & 0xF; //Place a zero among a 4 ONEs number
1905
- pSPI->SPI_TDR = (character & 0xFFFF) | (value_for_cs << 16);
1906
- }
1907
-
1908
- //*----------------------------------------------------------------------------
1909
- //* \fn AT91F_SPI_GetChar
1910
- //* \brief Receive a character,does not check if a character is available
1911
- //*----------------------------------------------------------------------------
1912
- __inline int AT91F_SPI_GetChar (
1913
- const AT91PS_SPI pSPI)
1914
- {
1915
- return((pSPI->SPI_RDR) & 0xFFFF);
1916
- }
1917
-
1918
- //*----------------------------------------------------------------------------
1919
- //* \fn AT91F_SPI_GetInterruptMaskStatus
1920
- //* \brief Return SPI Interrupt Mask Status
1921
- //*----------------------------------------------------------------------------
1922
- __inline unsigned int AT91F_SPI_GetInterruptMaskStatus( // \return SPI Interrupt Mask Status
1923
- AT91PS_SPI pSpi) // \arg pointer to a SPI controller
1924
- {
1925
- return pSpi->SPI_IMR;
1926
- }
1927
-
1928
- //*----------------------------------------------------------------------------
1929
- //* \fn AT91F_SPI_IsInterruptMasked
1930
- //* \brief Test if SPI Interrupt is Masked
1931
- //*----------------------------------------------------------------------------
1932
- __inline int AT91F_SPI_IsInterruptMasked(
1933
- AT91PS_SPI pSpi, // \arg pointer to a SPI controller
1934
- unsigned int flag) // \arg flag to be tested
1935
- {
1936
- return (AT91F_SPI_GetInterruptMaskStatus(pSpi) & flag);
1937
- }
1938
-
1939
- /* *****************************************************************************
1940
- SOFTWARE API FOR USART
1941
- ***************************************************************************** */
1942
- //*----------------------------------------------------------------------------
1943
- //* \fn AT91F_US_Baudrate
1944
- //* \brief Calculate the baudrate
1945
- //* Standard Asynchronous Mode : 8 bits , 1 stop , no parity
1946
- #define AT91C_US_ASYNC_MODE ( AT91C_US_USMODE_NORMAL + \
1947
- AT91C_US_NBSTOP_1_BIT + \
1948
- AT91C_US_PAR_NONE + \
1949
- AT91C_US_CHRL_8_BITS + \
1950
- AT91C_US_CLKS_CLOCK )
1951
-
1952
- //* Standard External Asynchronous Mode : 8 bits , 1 stop , no parity
1953
- #define AT91C_US_ASYNC_SCK_MODE ( AT91C_US_USMODE_NORMAL + \
1954
- AT91C_US_NBSTOP_1_BIT + \
1955
- AT91C_US_PAR_NONE + \
1956
- AT91C_US_CHRL_8_BITS + \
1957
- AT91C_US_CLKS_EXT )
1958
-
1959
- //* Standard Synchronous Mode : 8 bits , 1 stop , no parity
1960
- #define AT91C_US_SYNC_MODE ( AT91C_US_SYNC + \
1961
- AT91C_US_USMODE_NORMAL + \
1962
- AT91C_US_NBSTOP_1_BIT + \
1963
- AT91C_US_PAR_NONE + \
1964
- AT91C_US_CHRL_8_BITS + \
1965
- AT91C_US_CLKS_CLOCK )
1966
-
1967
- //* SCK used Label
1968
- #define AT91C_US_SCK_USED (AT91C_US_CKLO | AT91C_US_CLKS_EXT)
1969
-
1970
- //* Standard ISO T=0 Mode : 8 bits , 1 stop , parity
1971
- #define AT91C_US_ISO_READER_MODE ( AT91C_US_USMODE_ISO7816_0 + \
1972
- AT91C_US_CLKS_CLOCK +\
1973
- AT91C_US_NBSTOP_1_BIT + \
1974
- AT91C_US_PAR_EVEN + \
1975
- AT91C_US_CHRL_8_BITS + \
1976
- AT91C_US_CKLO +\
1977
- AT91C_US_OVER)
1978
-
1979
- //* Standard IRDA mode
1980
- #define AT91C_US_ASYNC_IRDA_MODE ( AT91C_US_USMODE_IRDA + \
1981
- AT91C_US_NBSTOP_1_BIT + \
1982
- AT91C_US_PAR_NONE + \
1983
- AT91C_US_CHRL_8_BITS + \
1984
- AT91C_US_CLKS_CLOCK )
1985
-
1986
- //*----------------------------------------------------------------------------
1987
- //* \fn AT91F_US_Baudrate
1988
- //* \brief Caluculate baud_value according to the main clock and the baud rate
1989
- //*----------------------------------------------------------------------------
1990
- __inline unsigned int AT91F_US_Baudrate (
1991
- const unsigned int main_clock, // \arg peripheral clock
1992
- const unsigned int baud_rate) // \arg UART baudrate
1993
- {
1994
- unsigned int baud_value = ((main_clock*10)/(baud_rate * 16));
1995
- if ((baud_value % 10) >= 5)
1996
- baud_value = (baud_value / 10) + 1;
1997
- else
1998
- baud_value /= 10;
1999
- return baud_value;
2000
- }
2001
-
2002
- //*----------------------------------------------------------------------------
2003
- //* \fn AT91F_US_SetBaudrate
2004
- //* \brief Set the baudrate according to the CPU clock
2005
- //*----------------------------------------------------------------------------
2006
- __inline void AT91F_US_SetBaudrate (
2007
- AT91PS_USART pUSART, // \arg pointer to a USART controller
2008
- unsigned int mainClock, // \arg peripheral clock
2009
- unsigned int speed) // \arg UART baudrate
2010
- {
2011
- //* Define the baud rate divisor register
2012
- pUSART->US_BRGR = AT91F_US_Baudrate(mainClock, speed);
2013
- }
2014
-
2015
- //*----------------------------------------------------------------------------
2016
- //* \fn AT91F_US_SetTimeguard
2017
- //* \brief Set USART timeguard
2018
- //*----------------------------------------------------------------------------
2019
- __inline void AT91F_US_SetTimeguard (
2020
- AT91PS_USART pUSART, // \arg pointer to a USART controller
2021
- unsigned int timeguard) // \arg timeguard value
2022
- {
2023
- //* Write the Timeguard Register
2024
- pUSART->US_TTGR = timeguard ;
2025
- }
2026
-
2027
- //*----------------------------------------------------------------------------
2028
- //* \fn AT91F_US_EnableIt
2029
- //* \brief Enable USART IT
2030
- //*----------------------------------------------------------------------------
2031
- __inline void AT91F_US_EnableIt (
2032
- AT91PS_USART pUSART, // \arg pointer to a USART controller
2033
- unsigned int flag) // \arg IT to be enabled
2034
- {
2035
- //* Write to the IER register
2036
- pUSART->US_IER = flag;
2037
- }
2038
-
2039
- //*----------------------------------------------------------------------------
2040
- //* \fn AT91F_US_DisableIt
2041
- //* \brief Disable USART IT
2042
- //*----------------------------------------------------------------------------
2043
- __inline void AT91F_US_DisableIt (
2044
- AT91PS_USART pUSART, // \arg pointer to a USART controller
2045
- unsigned int flag) // \arg IT to be disabled
2046
- {
2047
- //* Write to the IER register
2048
- pUSART->US_IDR = flag;
2049
- }
2050
-
2051
- //*----------------------------------------------------------------------------
2052
- //* \fn AT91F_US_Configure
2053
- //* \brief Configure USART
2054
- //*----------------------------------------------------------------------------
2055
- __inline void AT91F_US_Configure (
2056
- AT91PS_USART pUSART, // \arg pointer to a USART controller
2057
- unsigned int mainClock, // \arg peripheral clock
2058
- unsigned int mode , // \arg mode Register to be programmed
2059
- unsigned int baudRate , // \arg baudrate to be programmed
2060
- unsigned int timeguard ) // \arg timeguard to be programmed
2061
- {
2062
- //* Disable interrupts
2063
- pUSART->US_IDR = (unsigned int) -1;
2064
-
2065
- //* Reset receiver and transmitter
2066
- pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS ;
2067
-
2068
- //* Define the baud rate divisor register
2069
- AT91F_US_SetBaudrate(pUSART, mainClock, baudRate);
2070
-
2071
- //* Write the Timeguard Register
2072
- AT91F_US_SetTimeguard(pUSART, timeguard);
2073
-
2074
- //* Clear Transmit and Receive Counters
2075
- AT91F_PDC_Open((AT91PS_PDC) &(pUSART->US_RPR));
2076
-
2077
- //* Define the USART mode
2078
- pUSART->US_MR = mode ;
2079
-
2080
- }
2081
-
2082
- //*----------------------------------------------------------------------------
2083
- //* \fn AT91F_US_EnableRx
2084
- //* \brief Enable receiving characters
2085
- //*----------------------------------------------------------------------------
2086
- __inline void AT91F_US_EnableRx (
2087
- AT91PS_USART pUSART) // \arg pointer to a USART controller
2088
- {
2089
- //* Enable receiver
2090
- pUSART->US_CR = AT91C_US_RXEN;
2091
- }
2092
-
2093
- //*----------------------------------------------------------------------------
2094
- //* \fn AT91F_US_EnableTx
2095
- //* \brief Enable sending characters
2096
- //*----------------------------------------------------------------------------
2097
- __inline void AT91F_US_EnableTx (
2098
- AT91PS_USART pUSART) // \arg pointer to a USART controller
2099
- {
2100
- //* Enable transmitter
2101
- pUSART->US_CR = AT91C_US_TXEN;
2102
- }
2103
-
2104
- //*----------------------------------------------------------------------------
2105
- //* \fn AT91F_US_ResetRx
2106
- //* \brief Reset Receiver and re-enable it
2107
- //*----------------------------------------------------------------------------
2108
- __inline void AT91F_US_ResetRx (
2109
- AT91PS_USART pUSART) // \arg pointer to a USART controller
2110
- {
2111
- //* Reset receiver
2112
- pUSART->US_CR = AT91C_US_RSTRX;
2113
- //* Re-Enable receiver
2114
- pUSART->US_CR = AT91C_US_RXEN;
2115
- }
2116
-
2117
- //*----------------------------------------------------------------------------
2118
- //* \fn AT91F_US_ResetTx
2119
- //* \brief Reset Transmitter and re-enable it
2120
- //*----------------------------------------------------------------------------
2121
- __inline void AT91F_US_ResetTx (
2122
- AT91PS_USART pUSART) // \arg pointer to a USART controller
2123
- {
2124
- //* Reset transmitter
2125
- pUSART->US_CR = AT91C_US_RSTTX;
2126
- //* Enable transmitter
2127
- pUSART->US_CR = AT91C_US_TXEN;
2128
- }
2129
-
2130
- //*----------------------------------------------------------------------------
2131
- //* \fn AT91F_US_DisableRx
2132
- //* \brief Disable Receiver
2133
- //*----------------------------------------------------------------------------
2134
- __inline void AT91F_US_DisableRx (
2135
- AT91PS_USART pUSART) // \arg pointer to a USART controller
2136
- {
2137
- //* Disable receiver
2138
- pUSART->US_CR = AT91C_US_RXDIS;
2139
- }
2140
-
2141
- //*----------------------------------------------------------------------------
2142
- //* \fn AT91F_US_DisableTx
2143
- //* \brief Disable Transmitter
2144
- //*----------------------------------------------------------------------------
2145
- __inline void AT91F_US_DisableTx (
2146
- AT91PS_USART pUSART) // \arg pointer to a USART controller
2147
- {
2148
- //* Disable transmitter
2149
- pUSART->US_CR = AT91C_US_TXDIS;
2150
- }
2151
-
2152
- //*----------------------------------------------------------------------------
2153
- //* \fn AT91F_US_Close
2154
- //* \brief Close USART: disable IT disable receiver and transmitter, close PDC
2155
- //*----------------------------------------------------------------------------
2156
- __inline void AT91F_US_Close (
2157
- AT91PS_USART pUSART) // \arg pointer to a USART controller
2158
- {
2159
- //* Reset the baud rate divisor register
2160
- pUSART->US_BRGR = 0 ;
2161
-
2162
- //* Reset the USART mode
2163
- pUSART->US_MR = 0 ;
2164
-
2165
- //* Reset the Timeguard Register
2166
- pUSART->US_TTGR = 0;
2167
-
2168
- //* Disable all interrupts
2169
- pUSART->US_IDR = 0xFFFFFFFF ;
2170
-
2171
- //* Abort the Peripheral Data Transfers
2172
- AT91F_PDC_Close((AT91PS_PDC) &(pUSART->US_RPR));
2173
-
2174
- //* Disable receiver and transmitter and stop any activity immediately
2175
- pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX ;
2176
- }
2177
-
2178
- //*----------------------------------------------------------------------------
2179
- //* \fn AT91F_US_TxReady
2180
- //* \brief Return 1 if a character can be written in US_THR
2181
- //*----------------------------------------------------------------------------
2182
- __inline unsigned int AT91F_US_TxReady (
2183
- AT91PS_USART pUSART ) // \arg pointer to a USART controller
2184
- {
2185
- return (pUSART->US_CSR & AT91C_US_TXRDY);
2186
- }
2187
-
2188
- //*----------------------------------------------------------------------------
2189
- //* \fn AT91F_US_RxReady
2190
- //* \brief Return 1 if a character can be read in US_RHR
2191
- //*----------------------------------------------------------------------------
2192
- __inline unsigned int AT91F_US_RxReady (
2193
- AT91PS_USART pUSART ) // \arg pointer to a USART controller
2194
- {
2195
- return (pUSART->US_CSR & AT91C_US_RXRDY);
2196
- }
2197
-
2198
- //*----------------------------------------------------------------------------
2199
- //* \fn AT91F_US_Error
2200
- //* \brief Return the error flag
2201
- //*----------------------------------------------------------------------------
2202
- __inline unsigned int AT91F_US_Error (
2203
- AT91PS_USART pUSART ) // \arg pointer to a USART controller
2204
- {
2205
- return (pUSART->US_CSR &
2206
- (AT91C_US_OVRE | // Overrun error
2207
- AT91C_US_FRAME | // Framing error
2208
- AT91C_US_PARE)); // Parity error
2209
- }
2210
-
2211
- //*----------------------------------------------------------------------------
2212
- //* \fn AT91F_US_PutChar
2213
- //* \brief Send a character,does not check if ready to send
2214
- //*----------------------------------------------------------------------------
2215
- __inline void AT91F_US_PutChar (
2216
- AT91PS_USART pUSART,
2217
- int character )
2218
- {
2219
- pUSART->US_THR = (character & 0x1FF);
2220
- }
2221
-
2222
- //*----------------------------------------------------------------------------
2223
- //* \fn AT91F_US_GetChar
2224
- //* \brief Receive a character,does not check if a character is available
2225
- //*----------------------------------------------------------------------------
2226
- __inline int AT91F_US_GetChar (
2227
- const AT91PS_USART pUSART)
2228
- {
2229
- return((pUSART->US_RHR) & 0x1FF);
2230
- }
2231
-
2232
- //*----------------------------------------------------------------------------
2233
- //* \fn AT91F_US_SendFrame
2234
- //* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
2235
- //*----------------------------------------------------------------------------
2236
- __inline unsigned int AT91F_US_SendFrame(
2237
- AT91PS_USART pUSART,
2238
- char *pBuffer,
2239
- unsigned int szBuffer,
2240
- char *pNextBuffer,
2241
- unsigned int szNextBuffer )
2242
- {
2243
- return AT91F_PDC_SendFrame(
2244
- (AT91PS_PDC) &(pUSART->US_RPR),
2245
- pBuffer,
2246
- szBuffer,
2247
- pNextBuffer,
2248
- szNextBuffer);
2249
- }
2250
-
2251
- //*----------------------------------------------------------------------------
2252
- //* \fn AT91F_US_ReceiveFrame
2253
- //* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
2254
- //*----------------------------------------------------------------------------
2255
- __inline unsigned int AT91F_US_ReceiveFrame (
2256
- AT91PS_USART pUSART,
2257
- char *pBuffer,
2258
- unsigned int szBuffer,
2259
- char *pNextBuffer,
2260
- unsigned int szNextBuffer )
2261
- {
2262
- return AT91F_PDC_ReceiveFrame(
2263
- (AT91PS_PDC) &(pUSART->US_RPR),
2264
- pBuffer,
2265
- szBuffer,
2266
- pNextBuffer,
2267
- szNextBuffer);
2268
- }
2269
-
2270
- //*----------------------------------------------------------------------------
2271
- //* \fn AT91F_US_SetIrdaFilter
2272
- //* \brief Set the value of IrDa filter tregister
2273
- //*----------------------------------------------------------------------------
2274
- __inline void AT91F_US_SetIrdaFilter (
2275
- AT91PS_USART pUSART,
2276
- unsigned char value
2277
- )
2278
- {
2279
- pUSART->US_IF = value;
2280
- }
2281
-
2282
- /* *****************************************************************************
2283
- SOFTWARE API FOR SSC
2284
- ***************************************************************************** */
2285
- //* Define the standard I2S mode configuration
2286
-
2287
- //* Configuration to set in the SSC Transmit Clock Mode Register
2288
- //* Parameters : nb_bit_by_slot : 8, 16 or 32 bits
2289
- //* nb_slot_by_frame : number of channels
2290
- #define AT91C_I2S_ASY_MASTER_TX_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
2291
- AT91C_SSC_CKS_DIV +\
2292
- AT91C_SSC_CKO_CONTINOUS +\
2293
- AT91C_SSC_CKG_NONE +\
2294
- AT91C_SSC_START_FALL_RF +\
2295
- AT91C_SSC_STTOUT +\
2296
- ((1<<16) & AT91C_SSC_STTDLY) +\
2297
- ((((nb_bit_by_slot*nb_slot_by_frame)/2)-1) <<24))
2298
-
2299
-
2300
- //* Configuration to set in the SSC Transmit Frame Mode Register
2301
- //* Parameters : nb_bit_by_slot : 8, 16 or 32 bits
2302
- //* nb_slot_by_frame : number of channels
2303
- #define AT91C_I2S_ASY_TX_FRAME_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
2304
- (nb_bit_by_slot-1) +\
2305
- AT91C_SSC_MSBF +\
2306
- (((nb_slot_by_frame-1)<<8) & AT91C_SSC_DATNB) +\
2307
- (((nb_bit_by_slot-1)<<16) & AT91C_SSC_FSLEN) +\
2308
- AT91C_SSC_FSOS_NEGATIVE)
2309
-
2310
-
2311
- //*----------------------------------------------------------------------------
2312
- //* \fn AT91F_SSC_SetBaudrate
2313
- //* \brief Set the baudrate according to the CPU clock
2314
- //*----------------------------------------------------------------------------
2315
- __inline void AT91F_SSC_SetBaudrate (
2316
- AT91PS_SSC pSSC, // \arg pointer to a SSC controller
2317
- unsigned int mainClock, // \arg peripheral clock
2318
- unsigned int speed) // \arg SSC baudrate
2319
- {
2320
- unsigned int baud_value;
2321
- //* Define the baud rate divisor register
2322
- if (speed == 0)
2323
- baud_value = 0;
2324
- else
2325
- {
2326
- baud_value = (unsigned int) (mainClock * 10)/(2*speed);
2327
- if ((baud_value % 10) >= 5)
2328
- baud_value = (baud_value / 10) + 1;
2329
- else
2330
- baud_value /= 10;
2331
- }
2332
-
2333
- pSSC->SSC_CMR = baud_value;
2334
- }
2335
-
2336
- //*----------------------------------------------------------------------------
2337
- //* \fn AT91F_SSC_Configure
2338
- //* \brief Configure SSC
2339
- //*----------------------------------------------------------------------------
2340
- __inline void AT91F_SSC_Configure (
2341
- AT91PS_SSC pSSC, // \arg pointer to a SSC controller
2342
- unsigned int syst_clock, // \arg System Clock Frequency
2343
- unsigned int baud_rate, // \arg Expected Baud Rate Frequency
2344
- unsigned int clock_rx, // \arg Receiver Clock Parameters
2345
- unsigned int mode_rx, // \arg mode Register to be programmed
2346
- unsigned int clock_tx, // \arg Transmitter Clock Parameters
2347
- unsigned int mode_tx) // \arg mode Register to be programmed
2348
- {
2349
- //* Disable interrupts
2350
- pSSC->SSC_IDR = (unsigned int) -1;
2351
-
2352
- //* Reset receiver and transmitter
2353
- pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS ;
2354
-
2355
- //* Define the Clock Mode Register
2356
- AT91F_SSC_SetBaudrate(pSSC, syst_clock, baud_rate);
2357
-
2358
- //* Write the Receive Clock Mode Register
2359
- pSSC->SSC_RCMR = clock_rx;
2360
-
2361
- //* Write the Transmit Clock Mode Register
2362
- pSSC->SSC_TCMR = clock_tx;
2363
-
2364
- //* Write the Receive Frame Mode Register
2365
- pSSC->SSC_RFMR = mode_rx;
2366
-
2367
- //* Write the Transmit Frame Mode Register
2368
- pSSC->SSC_TFMR = mode_tx;
2369
-
2370
- //* Clear Transmit and Receive Counters
2371
- AT91F_PDC_Open((AT91PS_PDC) &(pSSC->SSC_RPR));
2372
-
2373
-
2374
- }
2375
-
2376
- //*----------------------------------------------------------------------------
2377
- //* \fn AT91F_SSC_EnableRx
2378
- //* \brief Enable receiving datas
2379
- //*----------------------------------------------------------------------------
2380
- __inline void AT91F_SSC_EnableRx (
2381
- AT91PS_SSC pSSC) // \arg pointer to a SSC controller
2382
- {
2383
- //* Enable receiver
2384
- pSSC->SSC_CR = AT91C_SSC_RXEN;
2385
- }
2386
-
2387
- //*----------------------------------------------------------------------------
2388
- //* \fn AT91F_SSC_DisableRx
2389
- //* \brief Disable receiving datas
2390
- //*----------------------------------------------------------------------------
2391
- __inline void AT91F_SSC_DisableRx (
2392
- AT91PS_SSC pSSC) // \arg pointer to a SSC controller
2393
- {
2394
- //* Disable receiver
2395
- pSSC->SSC_CR = AT91C_SSC_RXDIS;
2396
- }
2397
-
2398
- //*----------------------------------------------------------------------------
2399
- //* \fn AT91F_SSC_EnableTx
2400
- //* \brief Enable sending datas
2401
- //*----------------------------------------------------------------------------
2402
- __inline void AT91F_SSC_EnableTx (
2403
- AT91PS_SSC pSSC) // \arg pointer to a SSC controller
2404
- {
2405
- //* Enable transmitter
2406
- pSSC->SSC_CR = AT91C_SSC_TXEN;
2407
- }
2408
-
2409
- //*----------------------------------------------------------------------------
2410
- //* \fn AT91F_SSC_DisableTx
2411
- //* \brief Disable sending datas
2412
- //*----------------------------------------------------------------------------
2413
- __inline void AT91F_SSC_DisableTx (
2414
- AT91PS_SSC pSSC) // \arg pointer to a SSC controller
2415
- {
2416
- //* Disable transmitter
2417
- pSSC->SSC_CR = AT91C_SSC_TXDIS;
2418
- }
2419
-
2420
- //*----------------------------------------------------------------------------
2421
- //* \fn AT91F_SSC_EnableIt
2422
- //* \brief Enable SSC IT
2423
- //*----------------------------------------------------------------------------
2424
- __inline void AT91F_SSC_EnableIt (
2425
- AT91PS_SSC pSSC, // \arg pointer to a SSC controller
2426
- unsigned int flag) // \arg IT to be enabled
2427
- {
2428
- //* Write to the IER register
2429
- pSSC->SSC_IER = flag;
2430
- }
2431
-
2432
- //*----------------------------------------------------------------------------
2433
- //* \fn AT91F_SSC_DisableIt
2434
- //* \brief Disable SSC IT
2435
- //*----------------------------------------------------------------------------
2436
- __inline void AT91F_SSC_DisableIt (
2437
- AT91PS_SSC pSSC, // \arg pointer to a SSC controller
2438
- unsigned int flag) // \arg IT to be disabled
2439
- {
2440
- //* Write to the IDR register
2441
- pSSC->SSC_IDR = flag;
2442
- }
2443
-
2444
- //*----------------------------------------------------------------------------
2445
- //* \fn AT91F_SSC_ReceiveFrame
2446
- //* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy
2447
- //*----------------------------------------------------------------------------
2448
- __inline unsigned int AT91F_SSC_ReceiveFrame (
2449
- AT91PS_SSC pSSC,
2450
- char *pBuffer,
2451
- unsigned int szBuffer,
2452
- char *pNextBuffer,
2453
- unsigned int szNextBuffer )
2454
- {
2455
- return AT91F_PDC_ReceiveFrame(
2456
- (AT91PS_PDC) &(pSSC->SSC_RPR),
2457
- pBuffer,
2458
- szBuffer,
2459
- pNextBuffer,
2460
- szNextBuffer);
2461
- }
2462
-
2463
- //*----------------------------------------------------------------------------
2464
- //* \fn AT91F_SSC_SendFrame
2465
- //* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy
2466
- //*----------------------------------------------------------------------------
2467
- __inline unsigned int AT91F_SSC_SendFrame(
2468
- AT91PS_SSC pSSC,
2469
- char *pBuffer,
2470
- unsigned int szBuffer,
2471
- char *pNextBuffer,
2472
- unsigned int szNextBuffer )
2473
- {
2474
- return AT91F_PDC_SendFrame(
2475
- (AT91PS_PDC) &(pSSC->SSC_RPR),
2476
- pBuffer,
2477
- szBuffer,
2478
- pNextBuffer,
2479
- szNextBuffer);
2480
- }
2481
-
2482
- //*----------------------------------------------------------------------------
2483
- //* \fn AT91F_SSC_GetInterruptMaskStatus
2484
- //* \brief Return SSC Interrupt Mask Status
2485
- //*----------------------------------------------------------------------------
2486
- __inline unsigned int AT91F_SSC_GetInterruptMaskStatus( // \return SSC Interrupt Mask Status
2487
- AT91PS_SSC pSsc) // \arg pointer to a SSC controller
2488
- {
2489
- return pSsc->SSC_IMR;
2490
- }
2491
-
2492
- //*----------------------------------------------------------------------------
2493
- //* \fn AT91F_SSC_IsInterruptMasked
2494
- //* \brief Test if SSC Interrupt is Masked
2495
- //*----------------------------------------------------------------------------
2496
- __inline int AT91F_SSC_IsInterruptMasked(
2497
- AT91PS_SSC pSsc, // \arg pointer to a SSC controller
2498
- unsigned int flag) // \arg flag to be tested
2499
- {
2500
- return (AT91F_SSC_GetInterruptMaskStatus(pSsc) & flag);
2501
- }
2502
-
2503
- /* *****************************************************************************
2504
- SOFTWARE API FOR TWI
2505
- ***************************************************************************** */
2506
- //*----------------------------------------------------------------------------
2507
- //* \fn AT91F_TWI_EnableIt
2508
- //* \brief Enable TWI IT
2509
- //*----------------------------------------------------------------------------
2510
- __inline void AT91F_TWI_EnableIt (
2511
- AT91PS_TWI pTWI, // \arg pointer to a TWI controller
2512
- unsigned int flag) // \arg IT to be enabled
2513
- {
2514
- //* Write to the IER register
2515
- pTWI->TWI_IER = flag;
2516
- }
2517
-
2518
- //*----------------------------------------------------------------------------
2519
- //* \fn AT91F_TWI_DisableIt
2520
- //* \brief Disable TWI IT
2521
- //*----------------------------------------------------------------------------
2522
- __inline void AT91F_TWI_DisableIt (
2523
- AT91PS_TWI pTWI, // \arg pointer to a TWI controller
2524
- unsigned int flag) // \arg IT to be disabled
2525
- {
2526
- //* Write to the IDR register
2527
- pTWI->TWI_IDR = flag;
2528
- }
2529
-
2530
- //*----------------------------------------------------------------------------
2531
- //* \fn AT91F_TWI_Configure
2532
- //* \brief Configure TWI in master mode
2533
- //*----------------------------------------------------------------------------
2534
- __inline void AT91F_TWI_Configure ( AT91PS_TWI pTWI ) // \arg pointer to a TWI controller
2535
- {
2536
- //* Disable interrupts
2537
- pTWI->TWI_IDR = (unsigned int) -1;
2538
-
2539
- //* Reset peripheral
2540
- pTWI->TWI_CR = AT91C_TWI_SWRST;
2541
-
2542
- //* Set Master mode
2543
- pTWI->TWI_CR = AT91C_TWI_MSEN;
2544
-
2545
- }
2546
-
2547
- //*----------------------------------------------------------------------------
2548
- //* \fn AT91F_TWI_GetInterruptMaskStatus
2549
- //* \brief Return TWI Interrupt Mask Status
2550
- //*----------------------------------------------------------------------------
2551
- __inline unsigned int AT91F_TWI_GetInterruptMaskStatus( // \return TWI Interrupt Mask Status
2552
- AT91PS_TWI pTwi) // \arg pointer to a TWI controller
2553
- {
2554
- return pTwi->TWI_IMR;
2555
- }
2556
-
2557
- //*----------------------------------------------------------------------------
2558
- //* \fn AT91F_TWI_IsInterruptMasked
2559
- //* \brief Test if TWI Interrupt is Masked
2560
- //*----------------------------------------------------------------------------
2561
- __inline int AT91F_TWI_IsInterruptMasked(
2562
- AT91PS_TWI pTwi, // \arg pointer to a TWI controller
2563
- unsigned int flag) // \arg flag to be tested
2564
- {
2565
- return (AT91F_TWI_GetInterruptMaskStatus(pTwi) & flag);
2566
- }
2567
-
2568
- /* *****************************************************************************
2569
- SOFTWARE API FOR PWMC
2570
- ***************************************************************************** */
2571
- //*----------------------------------------------------------------------------
2572
- //* \fn AT91F_PWM_GetStatus
2573
- //* \brief Return PWM Interrupt Status
2574
- //*----------------------------------------------------------------------------
2575
- __inline unsigned int AT91F_PWMC_GetStatus( // \return PWM Interrupt Status
2576
- AT91PS_PWMC pPWM) // pointer to a PWM controller
2577
- {
2578
- return pPWM->PWMC_SR;
2579
- }
2580
-
2581
- //*----------------------------------------------------------------------------
2582
- //* \fn AT91F_PWM_InterruptEnable
2583
- //* \brief Enable PWM Interrupt
2584
- //*----------------------------------------------------------------------------
2585
- __inline void AT91F_PWMC_InterruptEnable(
2586
- AT91PS_PWMC pPwm, // \arg pointer to a PWM controller
2587
- unsigned int flag) // \arg PWM interrupt to be enabled
2588
- {
2589
- pPwm->PWMC_IER = flag;
2590
- }
2591
-
2592
- //*----------------------------------------------------------------------------
2593
- //* \fn AT91F_PWM_InterruptDisable
2594
- //* \brief Disable PWM Interrupt
2595
- //*----------------------------------------------------------------------------
2596
- __inline void AT91F_PWMC_InterruptDisable(
2597
- AT91PS_PWMC pPwm, // \arg pointer to a PWM controller
2598
- unsigned int flag) // \arg PWM interrupt to be disabled
2599
- {
2600
- pPwm->PWMC_IDR = flag;
2601
- }
2602
-
2603
- //*----------------------------------------------------------------------------
2604
- //* \fn AT91F_PWM_GetInterruptMaskStatus
2605
- //* \brief Return PWM Interrupt Mask Status
2606
- //*----------------------------------------------------------------------------
2607
- __inline unsigned int AT91F_PWMC_GetInterruptMaskStatus( // \return PWM Interrupt Mask Status
2608
- AT91PS_PWMC pPwm) // \arg pointer to a PWM controller
2609
- {
2610
- return pPwm->PWMC_IMR;
2611
- }
2612
-
2613
- //*----------------------------------------------------------------------------
2614
- //* \fn AT91F_PWM_IsInterruptMasked
2615
- //* \brief Test if PWM Interrupt is Masked
2616
- //*----------------------------------------------------------------------------
2617
- __inline unsigned int AT91F_PWMC_IsInterruptMasked(
2618
- AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
2619
- unsigned int flag) // \arg flag to be tested
2620
- {
2621
- return (AT91F_PWMC_GetInterruptMaskStatus(pPWM) & flag);
2622
- }
2623
-
2624
- //*----------------------------------------------------------------------------
2625
- //* \fn AT91F_PWM_IsStatusSet
2626
- //* \brief Test if PWM Interrupt is Set
2627
- //*----------------------------------------------------------------------------
2628
- __inline unsigned int AT91F_PWMC_IsStatusSet(
2629
- AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
2630
- unsigned int flag) // \arg flag to be tested
2631
- {
2632
- return (AT91F_PWMC_GetStatus(pPWM) & flag);
2633
- }
2634
-
2635
- //*----------------------------------------------------------------------------
2636
- //* \fn AT91F_PWM_CfgChannel
2637
- //* \brief Test if PWM Interrupt is Set
2638
- //*----------------------------------------------------------------------------
2639
- __inline void AT91F_PWMC_CfgChannel(
2640
- AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
2641
- unsigned int channelId, // \arg PWM channel ID
2642
- unsigned int mode, // \arg PWM mode
2643
- unsigned int period, // \arg PWM period
2644
- unsigned int duty) // \arg PWM duty cycle
2645
- {
2646
- pPWM->PWMC_CH[channelId].PWMC_CMR = mode;
2647
- pPWM->PWMC_CH[channelId].PWMC_CDTYR = duty;
2648
- pPWM->PWMC_CH[channelId].PWMC_CPRDR = period;
2649
- }
2650
-
2651
- //*----------------------------------------------------------------------------
2652
- //* \fn AT91F_PWM_StartChannel
2653
- //* \brief Enable channel
2654
- //*----------------------------------------------------------------------------
2655
- __inline void AT91F_PWMC_StartChannel(
2656
- AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
2657
- unsigned int flag) // \arg Channels IDs to be enabled
2658
- {
2659
- pPWM->PWMC_ENA = flag;
2660
- }
2661
-
2662
- //*----------------------------------------------------------------------------
2663
- //* \fn AT91F_PWM_StopChannel
2664
- //* \brief Disable channel
2665
- //*----------------------------------------------------------------------------
2666
- __inline void AT91F_PWMC_StopChannel(
2667
- AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
2668
- unsigned int flag) // \arg Channels IDs to be enabled
2669
- {
2670
- pPWM->PWMC_DIS = flag;
2671
- }
2672
-
2673
- //*----------------------------------------------------------------------------
2674
- //* \fn AT91F_PWM_UpdateChannel
2675
- //* \brief Update Period or Duty Cycle
2676
- //*----------------------------------------------------------------------------
2677
- __inline void AT91F_PWMC_UpdateChannel(
2678
- AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
2679
- unsigned int channelId, // \arg PWM channel ID
2680
- unsigned int update) // \arg Channels IDs to be enabled
2681
- {
2682
- pPWM->PWMC_CH[channelId].PWMC_CUPDR = update;
2683
- }
2684
-
2685
- /* *****************************************************************************
2686
- SOFTWARE API FOR UDP
2687
- ***************************************************************************** */
2688
- //*----------------------------------------------------------------------------
2689
- //* \fn AT91F_UDP_EnableIt
2690
- //* \brief Enable UDP IT
2691
- //*----------------------------------------------------------------------------
2692
- __inline void AT91F_UDP_EnableIt (
2693
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2694
- unsigned int flag) // \arg IT to be enabled
2695
- {
2696
- //* Write to the IER register
2697
- pUDP->UDP_IER = flag;
2698
- }
2699
-
2700
- //*----------------------------------------------------------------------------
2701
- //* \fn AT91F_UDP_DisableIt
2702
- //* \brief Disable UDP IT
2703
- //*----------------------------------------------------------------------------
2704
- __inline void AT91F_UDP_DisableIt (
2705
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2706
- unsigned int flag) // \arg IT to be disabled
2707
- {
2708
- //* Write to the IDR register
2709
- pUDP->UDP_IDR = flag;
2710
- }
2711
-
2712
- //*----------------------------------------------------------------------------
2713
- //* \fn AT91F_UDP_SetAddress
2714
- //* \brief Set UDP functional address
2715
- //*----------------------------------------------------------------------------
2716
- __inline void AT91F_UDP_SetAddress (
2717
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2718
- unsigned char address) // \arg new UDP address
2719
- {
2720
- pUDP->UDP_FADDR = (AT91C_UDP_FEN | address);
2721
- }
2722
-
2723
- //*----------------------------------------------------------------------------
2724
- //* \fn AT91F_UDP_EnableEp
2725
- //* \brief Enable Endpoint
2726
- //*----------------------------------------------------------------------------
2727
- __inline void AT91F_UDP_EnableEp (
2728
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2729
- unsigned char endpoint) // \arg endpoint number
2730
- {
2731
- pUDP->UDP_CSR[endpoint] |= AT91C_UDP_EPEDS;
2732
- }
2733
-
2734
- //*----------------------------------------------------------------------------
2735
- //* \fn AT91F_UDP_DisableEp
2736
- //* \brief Enable Endpoint
2737
- //*----------------------------------------------------------------------------
2738
- __inline void AT91F_UDP_DisableEp (
2739
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2740
- unsigned char endpoint) // \arg endpoint number
2741
- {
2742
- pUDP->UDP_CSR[endpoint] &= ~AT91C_UDP_EPEDS;
2743
- }
2744
-
2745
- //*----------------------------------------------------------------------------
2746
- //* \fn AT91F_UDP_SetState
2747
- //* \brief Set UDP Device state
2748
- //*----------------------------------------------------------------------------
2749
- __inline void AT91F_UDP_SetState (
2750
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2751
- unsigned int flag) // \arg new UDP address
2752
- {
2753
- pUDP->UDP_GLBSTATE &= ~(AT91C_UDP_FADDEN | AT91C_UDP_CONFG);
2754
- pUDP->UDP_GLBSTATE |= flag;
2755
- }
2756
-
2757
- //*----------------------------------------------------------------------------
2758
- //* \fn AT91F_UDP_GetState
2759
- //* \brief return UDP Device state
2760
- //*----------------------------------------------------------------------------
2761
- __inline unsigned int AT91F_UDP_GetState ( // \return the UDP device state
2762
- AT91PS_UDP pUDP) // \arg pointer to a UDP controller
2763
- {
2764
- return (pUDP->UDP_GLBSTATE & (AT91C_UDP_FADDEN | AT91C_UDP_CONFG));
2765
- }
2766
-
2767
- //*----------------------------------------------------------------------------
2768
- //* \fn AT91F_UDP_ResetEp
2769
- //* \brief Reset UDP endpoint
2770
- //*----------------------------------------------------------------------------
2771
- __inline void AT91F_UDP_ResetEp ( // \return the UDP device state
2772
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2773
- unsigned int flag) // \arg Endpoints to be reset
2774
- {
2775
- pUDP->UDP_RSTEP = flag;
2776
- pUDP->UDP_RSTEP = 0;
2777
- }
2778
-
2779
- //*----------------------------------------------------------------------------
2780
- //* \fn AT91F_UDP_EpStall
2781
- //* \brief Endpoint will STALL requests
2782
- //*----------------------------------------------------------------------------
2783
- __inline void AT91F_UDP_EpStall(
2784
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2785
- unsigned char endpoint) // \arg endpoint number
2786
- {
2787
- pUDP->UDP_CSR[endpoint] |= AT91C_UDP_FORCESTALL;
2788
- }
2789
-
2790
- //*----------------------------------------------------------------------------
2791
- //* \fn AT91F_UDP_EpWrite
2792
- //* \brief Write value in the DPR
2793
- //*----------------------------------------------------------------------------
2794
- __inline void AT91F_UDP_EpWrite(
2795
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2796
- unsigned char endpoint, // \arg endpoint number
2797
- unsigned char value) // \arg value to be written in the DPR
2798
- {
2799
- pUDP->UDP_FDR[endpoint] = value;
2800
- }
2801
-
2802
- //*----------------------------------------------------------------------------
2803
- //* \fn AT91F_UDP_EpRead
2804
- //* \brief Return value from the DPR
2805
- //*----------------------------------------------------------------------------
2806
- __inline unsigned int AT91F_UDP_EpRead(
2807
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2808
- unsigned char endpoint) // \arg endpoint number
2809
- {
2810
- return pUDP->UDP_FDR[endpoint];
2811
- }
2812
-
2813
- //*----------------------------------------------------------------------------
2814
- //* \fn AT91F_UDP_EpEndOfWr
2815
- //* \brief Notify the UDP that values in DPR are ready to be sent
2816
- //*----------------------------------------------------------------------------
2817
- __inline void AT91F_UDP_EpEndOfWr(
2818
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2819
- unsigned char endpoint) // \arg endpoint number
2820
- {
2821
- pUDP->UDP_CSR[endpoint] |= AT91C_UDP_TXPKTRDY;
2822
- }
2823
-
2824
- //*----------------------------------------------------------------------------
2825
- //* \fn AT91F_UDP_EpClear
2826
- //* \brief Clear flag in the endpoint CSR register
2827
- //*----------------------------------------------------------------------------
2828
- __inline void AT91F_UDP_EpClear(
2829
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2830
- unsigned char endpoint, // \arg endpoint number
2831
- unsigned int flag) // \arg flag to be cleared
2832
- {
2833
- pUDP->UDP_CSR[endpoint] &= ~(flag);
2834
- }
2835
-
2836
- //*----------------------------------------------------------------------------
2837
- //* \fn AT91F_UDP_EpSet
2838
- //* \brief Set flag in the endpoint CSR register
2839
- //*----------------------------------------------------------------------------
2840
- __inline void AT91F_UDP_EpSet(
2841
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2842
- unsigned char endpoint, // \arg endpoint number
2843
- unsigned int flag) // \arg flag to be cleared
2844
- {
2845
- pUDP->UDP_CSR[endpoint] |= flag;
2846
- }
2847
-
2848
- //*----------------------------------------------------------------------------
2849
- //* \fn AT91F_UDP_EpStatus
2850
- //* \brief Return the endpoint CSR register
2851
- //*----------------------------------------------------------------------------
2852
- __inline unsigned int AT91F_UDP_EpStatus(
2853
- AT91PS_UDP pUDP, // \arg pointer to a UDP controller
2854
- unsigned char endpoint) // \arg endpoint number
2855
- {
2856
- return pUDP->UDP_CSR[endpoint];
2857
- }
2858
-
2859
- //*----------------------------------------------------------------------------
2860
- //* \fn AT91F_UDP_GetInterruptMaskStatus
2861
- //* \brief Return UDP Interrupt Mask Status
2862
- //*----------------------------------------------------------------------------
2863
- __inline unsigned int AT91F_UDP_GetInterruptMaskStatus(
2864
- AT91PS_UDP pUdp) // \arg pointer to a UDP controller
2865
- {
2866
- return pUdp->UDP_IMR;
2867
- }
2868
-
2869
- //*----------------------------------------------------------------------------
2870
- //* \fn AT91F_UDP_IsInterruptMasked
2871
- //* \brief Test if UDP Interrupt is Masked
2872
- //*----------------------------------------------------------------------------
2873
- __inline int AT91F_UDP_IsInterruptMasked(
2874
- AT91PS_UDP pUdp, // \arg pointer to a UDP controller
2875
- unsigned int flag) // \arg flag to be tested
2876
- {
2877
- return (AT91F_UDP_GetInterruptMaskStatus(pUdp) & flag);
2878
- }
2879
-
2880
- // ----------------------------------------------------------------------------
2881
- // \fn AT91F_UDP_InterruptStatusRegister
2882
- // \brief Return the Interrupt Status Register
2883
- // ----------------------------------------------------------------------------
2884
- __inline unsigned int AT91F_UDP_InterruptStatusRegister(
2885
- AT91PS_UDP pUDP ) // \arg pointer to a UDP controller
2886
- {
2887
- return pUDP->UDP_ISR;
2888
- }
2889
-
2890
- // ----------------------------------------------------------------------------
2891
- // \fn AT91F_UDP_InterruptClearRegister
2892
- // \brief Clear Interrupt Register
2893
- // ----------------------------------------------------------------------------
2894
- __inline void AT91F_UDP_InterruptClearRegister (
2895
- AT91PS_UDP pUDP, // \arg pointer to UDP controller
2896
- unsigned int flag) // \arg IT to be cleat
2897
- {
2898
- pUDP->UDP_ICR = flag;
2899
- }
2900
-
2901
- // ----------------------------------------------------------------------------
2902
- // \fn AT91F_UDP_EnableTransceiver
2903
- // \brief Enable transceiver
2904
- // ----------------------------------------------------------------------------
2905
- __inline void AT91F_UDP_EnableTransceiver(
2906
- AT91PS_UDP pUDP ) // \arg pointer to a UDP controller
2907
- {
2908
- pUDP->UDP_TXVC &= ~AT91C_UDP_TXVDIS;
2909
- }
2910
-
2911
- // ----------------------------------------------------------------------------
2912
- // \fn AT91F_UDP_DisableTransceiver
2913
- // \brief Disable transceiver
2914
- // ----------------------------------------------------------------------------
2915
- __inline void AT91F_UDP_DisableTransceiver(
2916
- AT91PS_UDP pUDP ) // \arg pointer to a UDP controller
2917
- {
2918
- pUDP->UDP_TXVC = AT91C_UDP_TXVDIS;
2919
- }
2920
-
2921
- /* *****************************************************************************
2922
- SOFTWARE API FOR TC
2923
- ***************************************************************************** */
2924
- //*----------------------------------------------------------------------------
2925
- //* \fn AT91F_TC_InterruptEnable
2926
- //* \brief Enable TC Interrupt
2927
- //*----------------------------------------------------------------------------
2928
- __inline void AT91F_TC_InterruptEnable(
2929
- AT91PS_TC pTc, // \arg pointer to a TC controller
2930
- unsigned int flag) // \arg TC interrupt to be enabled
2931
- {
2932
- pTc->TC_IER = flag;
2933
- }
2934
-
2935
- //*----------------------------------------------------------------------------
2936
- //* \fn AT91F_TC_InterruptDisable
2937
- //* \brief Disable TC Interrupt
2938
- //*----------------------------------------------------------------------------
2939
- __inline void AT91F_TC_InterruptDisable(
2940
- AT91PS_TC pTc, // \arg pointer to a TC controller
2941
- unsigned int flag) // \arg TC interrupt to be disabled
2942
- {
2943
- pTc->TC_IDR = flag;
2944
- }
2945
-
2946
- //*----------------------------------------------------------------------------
2947
- //* \fn AT91F_TC_GetInterruptMaskStatus
2948
- //* \brief Return TC Interrupt Mask Status
2949
- //*----------------------------------------------------------------------------
2950
- __inline unsigned int AT91F_TC_GetInterruptMaskStatus( // \return TC Interrupt Mask Status
2951
- AT91PS_TC pTc) // \arg pointer to a TC controller
2952
- {
2953
- return pTc->TC_IMR;
2954
- }
2955
-
2956
- //*----------------------------------------------------------------------------
2957
- //* \fn AT91F_TC_IsInterruptMasked
2958
- //* \brief Test if TC Interrupt is Masked
2959
- //*----------------------------------------------------------------------------
2960
- __inline int AT91F_TC_IsInterruptMasked(
2961
- AT91PS_TC pTc, // \arg pointer to a TC controller
2962
- unsigned int flag) // \arg flag to be tested
2963
- {
2964
- return (AT91F_TC_GetInterruptMaskStatus(pTc) & flag);
2965
- }
2966
-
2967
- /* *****************************************************************************
2968
- SOFTWARE API FOR CAN
2969
- ***************************************************************************** */
2970
- #define STANDARD_FORMAT 0
2971
- #define EXTENDED_FORMAT 1
2972
-
2973
- //*----------------------------------------------------------------------------
2974
- //* \fn AT91F_InitMailboxRegisters()
2975
- //* \brief Configure the corresponding mailbox
2976
- //*----------------------------------------------------------------------------
2977
- __inline void AT91F_InitMailboxRegisters(AT91PS_CAN_MB CAN_Mailbox,
2978
- int mode_reg,
2979
- int acceptance_mask_reg,
2980
- int id_reg,
2981
- int data_low_reg,
2982
- int data_high_reg,
2983
- int control_reg)
2984
- {
2985
- CAN_Mailbox->CAN_MB_MCR = 0x0;
2986
- CAN_Mailbox->CAN_MB_MMR = mode_reg;
2987
- CAN_Mailbox->CAN_MB_MAM = acceptance_mask_reg;
2988
- CAN_Mailbox->CAN_MB_MID = id_reg;
2989
- CAN_Mailbox->CAN_MB_MDL = data_low_reg;
2990
- CAN_Mailbox->CAN_MB_MDH = data_high_reg;
2991
- CAN_Mailbox->CAN_MB_MCR = control_reg;
2992
- }
2993
-
2994
- //*----------------------------------------------------------------------------
2995
- //* \fn AT91F_EnableCAN()
2996
- //* \brief
2997
- //*----------------------------------------------------------------------------
2998
- __inline void AT91F_EnableCAN(
2999
- AT91PS_CAN pCAN) // pointer to a CAN controller
3000
- {
3001
- pCAN->CAN_MR |= AT91C_CAN_CANEN;
3002
-
3003
- // Wait for WAKEUP flag raising <=> 11-recessive-bit were scanned by the transceiver
3004
- while( (pCAN->CAN_SR & AT91C_CAN_WAKEUP) != AT91C_CAN_WAKEUP );
3005
- }
3006
-
3007
- //*----------------------------------------------------------------------------
3008
- //* \fn AT91F_DisableCAN()
3009
- //* \brief
3010
- //*----------------------------------------------------------------------------
3011
- __inline void AT91F_DisableCAN(
3012
- AT91PS_CAN pCAN) // pointer to a CAN controller
3013
- {
3014
- pCAN->CAN_MR &= ~AT91C_CAN_CANEN;
3015
- }
3016
-
3017
- //*----------------------------------------------------------------------------
3018
- //* \fn AT91F_CAN_EnableIt
3019
- //* \brief Enable CAN interrupt
3020
- //*----------------------------------------------------------------------------
3021
- __inline void AT91F_CAN_EnableIt (
3022
- AT91PS_CAN pCAN, // pointer to a CAN controller
3023
- unsigned int flag) // IT to be enabled
3024
- {
3025
- //* Write to the IER register
3026
- pCAN->CAN_IER = flag;
3027
- }
3028
-
3029
- //*----------------------------------------------------------------------------
3030
- //* \fn AT91F_CAN_DisableIt
3031
- //* \brief Disable CAN interrupt
3032
- //*----------------------------------------------------------------------------
3033
- __inline void AT91F_CAN_DisableIt (
3034
- AT91PS_CAN pCAN, // pointer to a CAN controller
3035
- unsigned int flag) // IT to be disabled
3036
- {
3037
- //* Write to the IDR register
3038
- pCAN->CAN_IDR = flag;
3039
- }
3040
-
3041
- //*----------------------------------------------------------------------------
3042
- //* \fn AT91F_CAN_GetStatus
3043
- //* \brief Return CAN Interrupt Status
3044
- //*----------------------------------------------------------------------------
3045
- __inline unsigned int AT91F_CAN_GetStatus( // \return CAN Interrupt Status
3046
- AT91PS_CAN pCAN) // pointer to a CAN controller
3047
- {
3048
- return pCAN->CAN_SR;
3049
- }
3050
-
3051
- //*----------------------------------------------------------------------------
3052
- //* \fn AT91F_CAN_GetInterruptMaskStatus
3053
- //* \brief Return CAN Interrupt Mask Status
3054
- //*----------------------------------------------------------------------------
3055
- __inline unsigned int AT91F_CAN_GetInterruptMaskStatus( // \return CAN Interrupt Mask Status
3056
- AT91PS_CAN pCAN) // pointer to a CAN controller
3057
- {
3058
- return pCAN->CAN_IMR;
3059
- }
3060
-
3061
- //*----------------------------------------------------------------------------
3062
- //* \fn AT91F_CAN_IsInterruptMasked
3063
- //* \brief Test if CAN Interrupt is Masked
3064
- //*----------------------------------------------------------------------------
3065
- __inline unsigned int AT91F_CAN_IsInterruptMasked(
3066
- AT91PS_CAN pCAN, // \arg pointer to a CAN controller
3067
- unsigned int flag) // \arg flag to be tested
3068
- {
3069
- return (AT91F_CAN_GetInterruptMaskStatus(pCAN) & flag);
3070
- }
3071
-
3072
- //*----------------------------------------------------------------------------
3073
- //* \fn AT91F_CAN_IsStatusSet
3074
- //* \brief Test if CAN Interrupt is Set
3075
- //*----------------------------------------------------------------------------
3076
- __inline unsigned int AT91F_CAN_IsStatusSet(
3077
- AT91PS_CAN pCAN, // \arg pointer to a CAN controller
3078
- unsigned int flag) // \arg flag to be tested
3079
- {
3080
- return (AT91F_CAN_GetStatus(pCAN) & flag);
3081
- }
3082
-
3083
- //*----------------------------------------------------------------------------
3084
- //* \fn AT91F_CAN_CfgModeReg
3085
- //* \brief Configure the Mode Register of the CAN controller
3086
- //*----------------------------------------------------------------------------
3087
- __inline void AT91F_CAN_CfgModeReg (
3088
- AT91PS_CAN pCAN, // pointer to a CAN controller
3089
- unsigned int mode) // mode register
3090
- {
3091
- //* Write to the MR register
3092
- pCAN->CAN_MR = mode;
3093
- }
3094
-
3095
- //*----------------------------------------------------------------------------
3096
- //* \fn AT91F_CAN_GetModeReg
3097
- //* \brief Return the Mode Register of the CAN controller value
3098
- //*----------------------------------------------------------------------------
3099
- __inline unsigned int AT91F_CAN_GetModeReg (
3100
- AT91PS_CAN pCAN // pointer to a CAN controller
3101
- )
3102
- {
3103
- return pCAN->CAN_MR;
3104
- }
3105
-
3106
- //*----------------------------------------------------------------------------
3107
- //* \fn AT91F_CAN_CfgBaudrateReg
3108
- //* \brief Configure the Baudrate of the CAN controller for the network
3109
- //*----------------------------------------------------------------------------
3110
- __inline void AT91F_CAN_CfgBaudrateReg (
3111
- AT91PS_CAN pCAN, // pointer to a CAN controller
3112
- unsigned int baudrate_cfg)
3113
- {
3114
- //* Write to the BR register
3115
- pCAN->CAN_BR = baudrate_cfg;
3116
- }
3117
-
3118
- //*----------------------------------------------------------------------------
3119
- //* \fn AT91F_CAN_GetBaudrate
3120
- //* \brief Return the Baudrate of the CAN controller for the network value
3121
- //*----------------------------------------------------------------------------
3122
- __inline unsigned int AT91F_CAN_GetBaudrate (
3123
- AT91PS_CAN pCAN // pointer to a CAN controller
3124
- )
3125
- {
3126
- return pCAN->CAN_BR;
3127
- }
3128
-
3129
- //*----------------------------------------------------------------------------
3130
- //* \fn AT91F_CAN_GetInternalCounter
3131
- //* \brief Return CAN Timer Regsiter Value
3132
- //*----------------------------------------------------------------------------
3133
- __inline unsigned int AT91F_CAN_GetInternalCounter (
3134
- AT91PS_CAN pCAN // pointer to a CAN controller
3135
- )
3136
- {
3137
- return pCAN->CAN_TIM;
3138
- }
3139
-
3140
- //*----------------------------------------------------------------------------
3141
- //* \fn AT91F_CAN_GetTimestamp
3142
- //* \brief Return CAN Timestamp Register Value
3143
- //*----------------------------------------------------------------------------
3144
- __inline unsigned int AT91F_CAN_GetTimestamp (
3145
- AT91PS_CAN pCAN // pointer to a CAN controller
3146
- )
3147
- {
3148
- return pCAN->CAN_TIMESTP;
3149
- }
3150
-
3151
- //*----------------------------------------------------------------------------
3152
- //* \fn AT91F_CAN_GetErrorCounter
3153
- //* \brief Return CAN Error Counter Register Value
3154
- //*----------------------------------------------------------------------------
3155
- __inline unsigned int AT91F_CAN_GetErrorCounter (
3156
- AT91PS_CAN pCAN // pointer to a CAN controller
3157
- )
3158
- {
3159
- return pCAN->CAN_ECR;
3160
- }
3161
-
3162
- //*----------------------------------------------------------------------------
3163
- //* \fn AT91F_CAN_InitTransferRequest
3164
- //* \brief Request for a transfer on the corresponding mailboxes
3165
- //*----------------------------------------------------------------------------
3166
- __inline void AT91F_CAN_InitTransferRequest (
3167
- AT91PS_CAN pCAN, // pointer to a CAN controller
3168
- unsigned int transfer_cmd)
3169
- {
3170
- pCAN->CAN_TCR = transfer_cmd;
3171
- }
3172
-
3173
- //*----------------------------------------------------------------------------
3174
- //* \fn AT91F_CAN_InitAbortRequest
3175
- //* \brief Abort the corresponding mailboxes
3176
- //*----------------------------------------------------------------------------
3177
- __inline void AT91F_CAN_InitAbortRequest (
3178
- AT91PS_CAN pCAN, // pointer to a CAN controller
3179
- unsigned int abort_cmd)
3180
- {
3181
- pCAN->CAN_ACR = abort_cmd;
3182
- }
3183
-
3184
- //*----------------------------------------------------------------------------
3185
- //* \fn AT91F_CAN_CfgMessageModeReg
3186
- //* \brief Program the Message Mode Register
3187
- //*----------------------------------------------------------------------------
3188
- __inline void AT91F_CAN_CfgMessageModeReg (
3189
- AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
3190
- unsigned int mode)
3191
- {
3192
- CAN_Mailbox->CAN_MB_MMR = mode;
3193
- }
3194
-
3195
- //*----------------------------------------------------------------------------
3196
- //* \fn AT91F_CAN_GetMessageModeReg
3197
- //* \brief Return the Message Mode Register
3198
- //*----------------------------------------------------------------------------
3199
- __inline unsigned int AT91F_CAN_GetMessageModeReg (
3200
- AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
3201
- {
3202
- return CAN_Mailbox->CAN_MB_MMR;
3203
- }
3204
-
3205
- //*----------------------------------------------------------------------------
3206
- //* \fn AT91F_CAN_CfgMessageIDReg
3207
- //* \brief Program the Message ID Register
3208
- //* \brief Version == 0 for Standard messsage, Version == 1 for Extended
3209
- //*----------------------------------------------------------------------------
3210
- __inline void AT91F_CAN_CfgMessageIDReg (
3211
- AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
3212
- unsigned int id,
3213
- unsigned char version)
3214
- {
3215
- if(version==0) // IDvA Standard Format
3216
- CAN_Mailbox->CAN_MB_MID = id<<18;
3217
- else // IDvB Extended Format
3218
- CAN_Mailbox->CAN_MB_MID = id | (1<<29); // set MIDE bit
3219
- }
3220
-
3221
- //*----------------------------------------------------------------------------
3222
- //* \fn AT91F_CAN_GetMessageIDReg
3223
- //* \brief Return the Message ID Register
3224
- //*----------------------------------------------------------------------------
3225
- __inline unsigned int AT91F_CAN_GetMessageIDReg (
3226
- AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
3227
- {
3228
- return CAN_Mailbox->CAN_MB_MID;
3229
- }
3230
-
3231
- //*----------------------------------------------------------------------------
3232
- //* \fn AT91F_CAN_CfgMessageAcceptanceMaskReg
3233
- //* \brief Program the Message Acceptance Mask Register
3234
- //*----------------------------------------------------------------------------
3235
- __inline void AT91F_CAN_CfgMessageAcceptanceMaskReg (
3236
- AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
3237
- unsigned int mask)
3238
- {
3239
- CAN_Mailbox->CAN_MB_MAM = mask;
3240
- }
3241
-
3242
- //*----------------------------------------------------------------------------
3243
- //* \fn AT91F_CAN_GetMessageAcceptanceMaskReg
3244
- //* \brief Return the Message Acceptance Mask Register
3245
- //*----------------------------------------------------------------------------
3246
- __inline unsigned int AT91F_CAN_GetMessageAcceptanceMaskReg (
3247
- AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
3248
- {
3249
- return CAN_Mailbox->CAN_MB_MAM;
3250
- }
3251
-
3252
- //*----------------------------------------------------------------------------
3253
- //* \fn AT91F_CAN_GetFamilyID
3254
- //* \brief Return the Message ID Register
3255
- //*----------------------------------------------------------------------------
3256
- __inline unsigned int AT91F_CAN_GetFamilyID (
3257
- AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
3258
- {
3259
- return CAN_Mailbox->CAN_MB_MFID;
3260
- }
3261
-
3262
- //*----------------------------------------------------------------------------
3263
- //* \fn AT91F_CAN_CfgMessageCtrl
3264
- //* \brief Request and config for a transfer on the corresponding mailbox
3265
- //*----------------------------------------------------------------------------
3266
- __inline void AT91F_CAN_CfgMessageCtrlReg (
3267
- AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
3268
- unsigned int message_ctrl_cmd)
3269
- {
3270
- CAN_Mailbox->CAN_MB_MCR = message_ctrl_cmd;
3271
- }
3272
-
3273
- //*----------------------------------------------------------------------------
3274
- //* \fn AT91F_CAN_GetMessageStatus
3275
- //* \brief Return CAN Mailbox Status
3276
- //*----------------------------------------------------------------------------
3277
- __inline unsigned int AT91F_CAN_GetMessageStatus (
3278
- AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
3279
- {
3280
- return CAN_Mailbox->CAN_MB_MSR;
3281
- }
3282
-
3283
- //*----------------------------------------------------------------------------
3284
- //* \fn AT91F_CAN_CfgMessageDataLow
3285
- //* \brief Program data low value
3286
- //*----------------------------------------------------------------------------
3287
- __inline void AT91F_CAN_CfgMessageDataLow (
3288
- AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
3289
- unsigned int data)
3290
- {
3291
- CAN_Mailbox->CAN_MB_MDL = data;
3292
- }
3293
-
3294
- //*----------------------------------------------------------------------------
3295
- //* \fn AT91F_CAN_GetMessageDataLow
3296
- //* \brief Return data low value
3297
- //*----------------------------------------------------------------------------
3298
- __inline unsigned int AT91F_CAN_GetMessageDataLow (
3299
- AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
3300
- {
3301
- return CAN_Mailbox->CAN_MB_MDL;
3302
- }
3303
-
3304
- //*----------------------------------------------------------------------------
3305
- //* \fn AT91F_CAN_CfgMessageDataHigh
3306
- //* \brief Program data high value
3307
- //*----------------------------------------------------------------------------
3308
- __inline void AT91F_CAN_CfgMessageDataHigh (
3309
- AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
3310
- unsigned int data)
3311
- {
3312
- CAN_Mailbox->CAN_MB_MDH = data;
3313
- }
3314
-
3315
- //*----------------------------------------------------------------------------
3316
- //* \fn AT91F_CAN_GetMessageDataHigh
3317
- //* \brief Return data high value
3318
- //*----------------------------------------------------------------------------
3319
- __inline unsigned int AT91F_CAN_GetMessageDataHigh (
3320
- AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
3321
- {
3322
- return CAN_Mailbox->CAN_MB_MDH;
3323
- }
3324
-
3325
- /* *****************************************************************************
3326
- SOFTWARE API FOR ADC
3327
- ***************************************************************************** */
3328
- //*----------------------------------------------------------------------------
3329
- //* \fn AT91F_ADC_EnableIt
3330
- //* \brief Enable ADC interrupt
3331
- //*----------------------------------------------------------------------------
3332
- __inline void AT91F_ADC_EnableIt (
3333
- AT91PS_ADC pADC, // pointer to a ADC controller
3334
- unsigned int flag) // IT to be enabled
3335
- {
3336
- //* Write to the IER register
3337
- pADC->ADC_IER = flag;
3338
- }
3339
-
3340
- //*----------------------------------------------------------------------------
3341
- //* \fn AT91F_ADC_DisableIt
3342
- //* \brief Disable ADC interrupt
3343
- //*----------------------------------------------------------------------------
3344
- __inline void AT91F_ADC_DisableIt (
3345
- AT91PS_ADC pADC, // pointer to a ADC controller
3346
- unsigned int flag) // IT to be disabled
3347
- {
3348
- //* Write to the IDR register
3349
- pADC->ADC_IDR = flag;
3350
- }
3351
-
3352
- //*----------------------------------------------------------------------------
3353
- //* \fn AT91F_ADC_GetStatus
3354
- //* \brief Return ADC Interrupt Status
3355
- //*----------------------------------------------------------------------------
3356
- __inline unsigned int AT91F_ADC_GetStatus( // \return ADC Interrupt Status
3357
- AT91PS_ADC pADC) // pointer to a ADC controller
3358
- {
3359
- return pADC->ADC_SR;
3360
- }
3361
-
3362
- //*----------------------------------------------------------------------------
3363
- //* \fn AT91F_ADC_GetInterruptMaskStatus
3364
- //* \brief Return ADC Interrupt Mask Status
3365
- //*----------------------------------------------------------------------------
3366
- __inline unsigned int AT91F_ADC_GetInterruptMaskStatus( // \return ADC Interrupt Mask Status
3367
- AT91PS_ADC pADC) // pointer to a ADC controller
3368
- {
3369
- return pADC->ADC_IMR;
3370
- }
3371
-
3372
- //*----------------------------------------------------------------------------
3373
- //* \fn AT91F_ADC_IsInterruptMasked
3374
- //* \brief Test if ADC Interrupt is Masked
3375
- //*----------------------------------------------------------------------------
3376
- __inline unsigned int AT91F_ADC_IsInterruptMasked(
3377
- AT91PS_ADC pADC, // \arg pointer to a ADC controller
3378
- unsigned int flag) // \arg flag to be tested
3379
- {
3380
- return (AT91F_ADC_GetInterruptMaskStatus(pADC) & flag);
3381
- }
3382
-
3383
- //*----------------------------------------------------------------------------
3384
- //* \fn AT91F_ADC_IsStatusSet
3385
- //* \brief Test if ADC Status is Set
3386
- //*----------------------------------------------------------------------------
3387
- __inline unsigned int AT91F_ADC_IsStatusSet(
3388
- AT91PS_ADC pADC, // \arg pointer to a ADC controller
3389
- unsigned int flag) // \arg flag to be tested
3390
- {
3391
- return (AT91F_ADC_GetStatus(pADC) & flag);
3392
- }
3393
-
3394
- //*----------------------------------------------------------------------------
3395
- //* \fn AT91F_ADC_CfgModeReg
3396
- //* \brief Configure the Mode Register of the ADC controller
3397
- //*----------------------------------------------------------------------------
3398
- __inline void AT91F_ADC_CfgModeReg (
3399
- AT91PS_ADC pADC, // pointer to a ADC controller
3400
- unsigned int mode) // mode register
3401
- {
3402
- //* Write to the MR register
3403
- pADC->ADC_MR = mode;
3404
- }
3405
-
3406
- //*----------------------------------------------------------------------------
3407
- //* \fn AT91F_ADC_GetModeReg
3408
- //* \brief Return the Mode Register of the ADC controller value
3409
- //*----------------------------------------------------------------------------
3410
- __inline unsigned int AT91F_ADC_GetModeReg (
3411
- AT91PS_ADC pADC // pointer to a ADC controller
3412
- )
3413
- {
3414
- return pADC->ADC_MR;
3415
- }
3416
-
3417
- //*----------------------------------------------------------------------------
3418
- //* \fn AT91F_ADC_CfgTimings
3419
- //* \brief Configure the different necessary timings of the ADC controller
3420
- //*----------------------------------------------------------------------------
3421
- __inline void AT91F_ADC_CfgTimings (
3422
- AT91PS_ADC pADC, // pointer to a ADC controller
3423
- unsigned int mck_clock, // in MHz
3424
- unsigned int adc_clock, // in MHz
3425
- unsigned int startup_time, // in us
3426
- unsigned int sample_and_hold_time) // in ns
3427
- {
3428
- unsigned int prescal,startup,shtim;
3429
-
3430
- prescal = mck_clock/(2*adc_clock) - 1;
3431
- startup = adc_clock*startup_time/8 - 1;
3432
- shtim = adc_clock*sample_and_hold_time/1000 - 1;
3433
-
3434
- //* Write to the MR register
3435
- pADC->ADC_MR = ( (prescal<<8) & AT91C_ADC_PRESCAL) | ( (startup<<16) & AT91C_ADC_STARTUP) | ( (shtim<<24) & AT91C_ADC_SHTIM);
3436
- }
3437
-
3438
- //*----------------------------------------------------------------------------
3439
- //* \fn AT91F_ADC_EnableChannel
3440
- //* \brief Return ADC Timer Register Value
3441
- //*----------------------------------------------------------------------------
3442
- __inline void AT91F_ADC_EnableChannel (
3443
- AT91PS_ADC pADC, // pointer to a ADC controller
3444
- unsigned int channel) // mode register
3445
- {
3446
- //* Write to the CHER register
3447
- pADC->ADC_CHER = channel;
3448
- }
3449
-
3450
- //*----------------------------------------------------------------------------
3451
- //* \fn AT91F_ADC_DisableChannel
3452
- //* \brief Return ADC Timer Register Value
3453
- //*----------------------------------------------------------------------------
3454
- __inline void AT91F_ADC_DisableChannel (
3455
- AT91PS_ADC pADC, // pointer to a ADC controller
3456
- unsigned int channel) // mode register
3457
- {
3458
- //* Write to the CHDR register
3459
- pADC->ADC_CHDR = channel;
3460
- }
3461
-
3462
- //*----------------------------------------------------------------------------
3463
- //* \fn AT91F_ADC_GetChannelStatus
3464
- //* \brief Return ADC Timer Register Value
3465
- //*----------------------------------------------------------------------------
3466
- __inline unsigned int AT91F_ADC_GetChannelStatus (
3467
- AT91PS_ADC pADC // pointer to a ADC controller
3468
- )
3469
- {
3470
- return pADC->ADC_CHSR;
3471
- }
3472
-
3473
- //*----------------------------------------------------------------------------
3474
- //* \fn AT91F_ADC_StartConversion
3475
- //* \brief Software request for a analog to digital conversion
3476
- //*----------------------------------------------------------------------------
3477
- __inline void AT91F_ADC_StartConversion (
3478
- AT91PS_ADC pADC // pointer to a ADC controller
3479
- )
3480
- {
3481
- pADC->ADC_CR = AT91C_ADC_START;
3482
- }
3483
-
3484
- //*----------------------------------------------------------------------------
3485
- //* \fn AT91F_ADC_SoftReset
3486
- //* \brief Software reset
3487
- //*----------------------------------------------------------------------------
3488
- __inline void AT91F_ADC_SoftReset (
3489
- AT91PS_ADC pADC // pointer to a ADC controller
3490
- )
3491
- {
3492
- pADC->ADC_CR = AT91C_ADC_SWRST;
3493
- }
3494
-
3495
- //*----------------------------------------------------------------------------
3496
- //* \fn AT91F_ADC_GetLastConvertedData
3497
- //* \brief Return the Last Converted Data
3498
- //*----------------------------------------------------------------------------
3499
- __inline unsigned int AT91F_ADC_GetLastConvertedData (
3500
- AT91PS_ADC pADC // pointer to a ADC controller
3501
- )
3502
- {
3503
- return pADC->ADC_LCDR;
3504
- }
3505
-
3506
- //*----------------------------------------------------------------------------
3507
- //* \fn AT91F_ADC_GetConvertedDataCH0
3508
- //* \brief Return the Channel 0 Converted Data
3509
- //*----------------------------------------------------------------------------
3510
- __inline unsigned int AT91F_ADC_GetConvertedDataCH0 (
3511
- AT91PS_ADC pADC // pointer to a ADC controller
3512
- )
3513
- {
3514
- return pADC->ADC_CDR0;
3515
- }
3516
-
3517
- //*----------------------------------------------------------------------------
3518
- //* \fn AT91F_ADC_GetConvertedDataCH1
3519
- //* \brief Return the Channel 1 Converted Data
3520
- //*----------------------------------------------------------------------------
3521
- __inline unsigned int AT91F_ADC_GetConvertedDataCH1 (
3522
- AT91PS_ADC pADC // pointer to a ADC controller
3523
- )
3524
- {
3525
- return pADC->ADC_CDR1;
3526
- }
3527
-
3528
- //*----------------------------------------------------------------------------
3529
- //* \fn AT91F_ADC_GetConvertedDataCH2
3530
- //* \brief Return the Channel 2 Converted Data
3531
- //*----------------------------------------------------------------------------
3532
- __inline unsigned int AT91F_ADC_GetConvertedDataCH2 (
3533
- AT91PS_ADC pADC // pointer to a ADC controller
3534
- )
3535
- {
3536
- return pADC->ADC_CDR2;
3537
- }
3538
-
3539
- //*----------------------------------------------------------------------------
3540
- //* \fn AT91F_ADC_GetConvertedDataCH3
3541
- //* \brief Return the Channel 3 Converted Data
3542
- //*----------------------------------------------------------------------------
3543
- __inline unsigned int AT91F_ADC_GetConvertedDataCH3 (
3544
- AT91PS_ADC pADC // pointer to a ADC controller
3545
- )
3546
- {
3547
- return pADC->ADC_CDR3;
3548
- }
3549
-
3550
- //*----------------------------------------------------------------------------
3551
- //* \fn AT91F_ADC_GetConvertedDataCH4
3552
- //* \brief Return the Channel 4 Converted Data
3553
- //*----------------------------------------------------------------------------
3554
- __inline unsigned int AT91F_ADC_GetConvertedDataCH4 (
3555
- AT91PS_ADC pADC // pointer to a ADC controller
3556
- )
3557
- {
3558
- return pADC->ADC_CDR4;
3559
- }
3560
-
3561
- //*----------------------------------------------------------------------------
3562
- //* \fn AT91F_ADC_GetConvertedDataCH5
3563
- //* \brief Return the Channel 5 Converted Data
3564
- //*----------------------------------------------------------------------------
3565
- __inline unsigned int AT91F_ADC_GetConvertedDataCH5 (
3566
- AT91PS_ADC pADC // pointer to a ADC controller
3567
- )
3568
- {
3569
- return pADC->ADC_CDR5;
3570
- }
3571
-
3572
- //*----------------------------------------------------------------------------
3573
- //* \fn AT91F_ADC_GetConvertedDataCH6
3574
- //* \brief Return the Channel 6 Converted Data
3575
- //*----------------------------------------------------------------------------
3576
- __inline unsigned int AT91F_ADC_GetConvertedDataCH6 (
3577
- AT91PS_ADC pADC // pointer to a ADC controller
3578
- )
3579
- {
3580
- return pADC->ADC_CDR6;
3581
- }
3582
-
3583
- //*----------------------------------------------------------------------------
3584
- //* \fn AT91F_ADC_GetConvertedDataCH7
3585
- //* \brief Return the Channel 7 Converted Data
3586
- //*----------------------------------------------------------------------------
3587
- __inline unsigned int AT91F_ADC_GetConvertedDataCH7 (
3588
- AT91PS_ADC pADC // pointer to a ADC controller
3589
- )
3590
- {
3591
- return pADC->ADC_CDR7;
3592
- }
3593
-
3594
- //*----------------------------------------------------------------------------
3595
- //* \fn AT91F_DBGU_CfgPMC
3596
- //* \brief Enable Peripheral clock in PMC for DBGU
3597
- //*----------------------------------------------------------------------------
3598
- __inline void AT91F_DBGU_CfgPMC (void)
3599
- {
3600
- AT91F_PMC_EnablePeriphClock(
3601
- AT91C_BASE_PMC, // PIO controller base address
3602
- ((unsigned int) 1 << AT91C_ID_SYS));
3603
- }
3604
-
3605
- //*----------------------------------------------------------------------------
3606
- //* \fn AT91F_DBGU_CfgPIO
3607
- //* \brief Configure PIO controllers to drive DBGU signals
3608
- //*----------------------------------------------------------------------------
3609
- __inline void AT91F_DBGU_CfgPIO (void)
3610
- {
3611
- // Configure PIO controllers to periph mode
3612
- AT91F_PIO_CfgPeriph(
3613
- AT91C_BASE_PIOA, // PIO controller base address
3614
- ((unsigned int) AT91C_PA27_DRXD ) |
3615
- ((unsigned int) AT91C_PA28_DTXD ), // Peripheral A
3616
- 0); // Peripheral B
3617
- }
3618
-
3619
- //*----------------------------------------------------------------------------
3620
- //* \fn AT91F_PMC_CfgPMC
3621
- //* \brief Enable Peripheral clock in PMC for PMC
3622
- //*----------------------------------------------------------------------------
3623
- __inline void AT91F_PMC_CfgPMC (void)
3624
- {
3625
- AT91F_PMC_EnablePeriphClock(
3626
- AT91C_BASE_PMC, // PIO controller base address
3627
- ((unsigned int) 1 << AT91C_ID_SYS));
3628
- }
3629
-
3630
- //*----------------------------------------------------------------------------
3631
- //* \fn AT91F_PMC_CfgPIO
3632
- //* \brief Configure PIO controllers to drive PMC signals
3633
- //*----------------------------------------------------------------------------
3634
- __inline void AT91F_PMC_CfgPIO (void)
3635
- {
3636
- // Configure PIO controllers to periph mode
3637
- AT91F_PIO_CfgPeriph(
3638
- AT91C_BASE_PIOB, // PIO controller base address
3639
- ((unsigned int) AT91C_PB30_PCK2 ) |
3640
- ((unsigned int) AT91C_PB29_PCK1 ), // Peripheral A
3641
- ((unsigned int) AT91C_PB20_PCK0 ) |
3642
- ((unsigned int) AT91C_PB0_PCK0 ) |
3643
- ((unsigned int) AT91C_PB22_PCK2 ) |
3644
- ((unsigned int) AT91C_PB21_PCK1 )); // Peripheral B
3645
- // Configure PIO controllers to periph mode
3646
- AT91F_PIO_CfgPeriph(
3647
- AT91C_BASE_PIOA, // PIO controller base address
3648
- 0, // Peripheral A
3649
- ((unsigned int) AT91C_PA30_PCK2 ) |
3650
- ((unsigned int) AT91C_PA13_PCK1 ) |
3651
- ((unsigned int) AT91C_PA27_PCK3 )); // Peripheral B
3652
- }
3653
-
3654
- //*----------------------------------------------------------------------------
3655
- //* \fn AT91F_VREG_CfgPMC
3656
- //* \brief Enable Peripheral clock in PMC for VREG
3657
- //*----------------------------------------------------------------------------
3658
- __inline void AT91F_VREG_CfgPMC (void)
3659
- {
3660
- AT91F_PMC_EnablePeriphClock(
3661
- AT91C_BASE_PMC, // PIO controller base address
3662
- ((unsigned int) 1 << AT91C_ID_SYS));
3663
- }
3664
-
3665
- //*----------------------------------------------------------------------------
3666
- //* \fn AT91F_RSTC_CfgPMC
3667
- //* \brief Enable Peripheral clock in PMC for RSTC
3668
- //*----------------------------------------------------------------------------
3669
- __inline void AT91F_RSTC_CfgPMC (void)
3670
- {
3671
- AT91F_PMC_EnablePeriphClock(
3672
- AT91C_BASE_PMC, // PIO controller base address
3673
- ((unsigned int) 1 << AT91C_ID_SYS));
3674
- }
3675
-
3676
- //*----------------------------------------------------------------------------
3677
- //* \fn AT91F_SSC_CfgPMC
3678
- //* \brief Enable Peripheral clock in PMC for SSC
3679
- //*----------------------------------------------------------------------------
3680
- __inline void AT91F_SSC_CfgPMC (void)
3681
- {
3682
- AT91F_PMC_EnablePeriphClock(
3683
- AT91C_BASE_PMC, // PIO controller base address
3684
- ((unsigned int) 1 << AT91C_ID_SSC));
3685
- }
3686
-
3687
- //*----------------------------------------------------------------------------
3688
- //* \fn AT91F_SSC_CfgPIO
3689
- //* \brief Configure PIO controllers to drive SSC signals
3690
- //*----------------------------------------------------------------------------
3691
- __inline void AT91F_SSC_CfgPIO (void)
3692
- {
3693
- // Configure PIO controllers to periph mode
3694
- AT91F_PIO_CfgPeriph(
3695
- AT91C_BASE_PIOA, // PIO controller base address
3696
- ((unsigned int) AT91C_PA25_RK ) |
3697
- ((unsigned int) AT91C_PA22_TK ) |
3698
- ((unsigned int) AT91C_PA21_TF ) |
3699
- ((unsigned int) AT91C_PA24_RD ) |
3700
- ((unsigned int) AT91C_PA26_RF ) |
3701
- ((unsigned int) AT91C_PA23_TD ), // Peripheral A
3702
- 0); // Peripheral B
3703
- }
3704
-
3705
- //*----------------------------------------------------------------------------
3706
- //* \fn AT91F_WDTC_CfgPMC
3707
- //* \brief Enable Peripheral clock in PMC for WDTC
3708
- //*----------------------------------------------------------------------------
3709
- __inline void AT91F_WDTC_CfgPMC (void)
3710
- {
3711
- AT91F_PMC_EnablePeriphClock(
3712
- AT91C_BASE_PMC, // PIO controller base address
3713
- ((unsigned int) 1 << AT91C_ID_SYS));
3714
- }
3715
-
3716
- //*----------------------------------------------------------------------------
3717
- //* \fn AT91F_US1_CfgPMC
3718
- //* \brief Enable Peripheral clock in PMC for US1
3719
- //*----------------------------------------------------------------------------
3720
- __inline void AT91F_US1_CfgPMC (void)
3721
- {
3722
- AT91F_PMC_EnablePeriphClock(
3723
- AT91C_BASE_PMC, // PIO controller base address
3724
- ((unsigned int) 1 << AT91C_ID_US1));
3725
- }
3726
-
3727
- //*----------------------------------------------------------------------------
3728
- //* \fn AT91F_US1_CfgPIO
3729
- //* \brief Configure PIO controllers to drive US1 signals
3730
- //*----------------------------------------------------------------------------
3731
- __inline void AT91F_US1_CfgPIO (void)
3732
- {
3733
- // Configure PIO controllers to periph mode
3734
- AT91F_PIO_CfgPeriph(
3735
- AT91C_BASE_PIOB, // PIO controller base address
3736
- 0, // Peripheral A
3737
- ((unsigned int) AT91C_PB26_RI1 ) |
3738
- ((unsigned int) AT91C_PB24_DSR1 ) |
3739
- ((unsigned int) AT91C_PB23_DCD1 ) |
3740
- ((unsigned int) AT91C_PB25_DTR1 )); // Peripheral B
3741
- // Configure PIO controllers to periph mode
3742
- AT91F_PIO_CfgPeriph(
3743
- AT91C_BASE_PIOA, // PIO controller base address
3744
- ((unsigned int) AT91C_PA7_SCK1 ) |
3745
- ((unsigned int) AT91C_PA8_RTS1 ) |
3746
- ((unsigned int) AT91C_PA6_TXD1 ) |
3747
- ((unsigned int) AT91C_PA5_RXD1 ) |
3748
- ((unsigned int) AT91C_PA9_CTS1 ), // Peripheral A
3749
- 0); // Peripheral B
3750
- }
3751
-
3752
- //*----------------------------------------------------------------------------
3753
- //* \fn AT91F_US0_CfgPMC
3754
- //* \brief Enable Peripheral clock in PMC for US0
3755
- //*----------------------------------------------------------------------------
3756
- __inline void AT91F_US0_CfgPMC (void)
3757
- {
3758
- AT91F_PMC_EnablePeriphClock(
3759
- AT91C_BASE_PMC, // PIO controller base address
3760
- ((unsigned int) 1 << AT91C_ID_US0));
3761
- }
3762
-
3763
- //*----------------------------------------------------------------------------
3764
- //* \fn AT91F_US0_CfgPIO
3765
- //* \brief Configure PIO controllers to drive US0 signals
3766
- //*----------------------------------------------------------------------------
3767
- __inline void AT91F_US0_CfgPIO (void)
3768
- {
3769
- // Configure PIO controllers to periph mode
3770
- AT91F_PIO_CfgPeriph(
3771
- AT91C_BASE_PIOA, // PIO controller base address
3772
- ((unsigned int) AT91C_PA0_RXD0 ) |
3773
- ((unsigned int) AT91C_PA4_CTS0 ) |
3774
- ((unsigned int) AT91C_PA3_RTS0 ) |
3775
- ((unsigned int) AT91C_PA2_SCK0 ) |
3776
- ((unsigned int) AT91C_PA1_TXD0 ), // Peripheral A
3777
- 0); // Peripheral B
3778
- }
3779
-
3780
- //*----------------------------------------------------------------------------
3781
- //* \fn AT91F_SPI1_CfgPMC
3782
- //* \brief Enable Peripheral clock in PMC for SPI1
3783
- //*----------------------------------------------------------------------------
3784
- __inline void AT91F_SPI1_CfgPMC (void)
3785
- {
3786
- AT91F_PMC_EnablePeriphClock(
3787
- AT91C_BASE_PMC, // PIO controller base address
3788
- ((unsigned int) 1 << AT91C_ID_SPI1));
3789
- }
3790
-
3791
- //*----------------------------------------------------------------------------
3792
- //* \fn AT91F_SPI1_CfgPIO
3793
- //* \brief Configure PIO controllers to drive SPI1 signals
3794
- //*----------------------------------------------------------------------------
3795
- __inline void AT91F_SPI1_CfgPIO (void)
3796
- {
3797
- // Configure PIO controllers to periph mode
3798
- AT91F_PIO_CfgPeriph(
3799
- AT91C_BASE_PIOB, // PIO controller base address
3800
- 0, // Peripheral A
3801
- ((unsigned int) AT91C_PB11_SPI1_NPCS2) |
3802
- ((unsigned int) AT91C_PB10_SPI1_NPCS1) |
3803
- ((unsigned int) AT91C_PB16_SPI1_NPCS3)); // Peripheral B
3804
- // Configure PIO controllers to periph mode
3805
- AT91F_PIO_CfgPeriph(
3806
- AT91C_BASE_PIOA, // PIO controller base address
3807
- 0, // Peripheral A
3808
- ((unsigned int) AT91C_PA22_SPI1_SPCK) |
3809
- ((unsigned int) AT91C_PA3_SPI1_NPCS2) |
3810
- ((unsigned int) AT91C_PA26_SPI1_NPCS2) |
3811
- ((unsigned int) AT91C_PA25_SPI1_NPCS1) |
3812
- ((unsigned int) AT91C_PA2_SPI1_NPCS1) |
3813
- ((unsigned int) AT91C_PA24_SPI1_MISO) |
3814
- ((unsigned int) AT91C_PA4_SPI1_NPCS3) |
3815
- ((unsigned int) AT91C_PA29_SPI1_NPCS3) |
3816
- ((unsigned int) AT91C_PA21_SPI1_NPCS0) |
3817
- ((unsigned int) AT91C_PA23_SPI1_MOSI)); // Peripheral B
3818
- }
3819
-
3820
- //*----------------------------------------------------------------------------
3821
- //* \fn AT91F_SPI0_CfgPMC
3822
- //* \brief Enable Peripheral clock in PMC for SPI0
3823
- //*----------------------------------------------------------------------------
3824
- __inline void AT91F_SPI0_CfgPMC (void)
3825
- {
3826
- AT91F_PMC_EnablePeriphClock(
3827
- AT91C_BASE_PMC, // PIO controller base address
3828
- ((unsigned int) 1 << AT91C_ID_SPI0));
3829
- }
3830
-
3831
- //*----------------------------------------------------------------------------
3832
- //* \fn AT91F_SPI0_CfgPIO
3833
- //* \brief Configure PIO controllers to drive SPI0 signals
3834
- //*----------------------------------------------------------------------------
3835
- __inline void AT91F_SPI0_CfgPIO (void)
3836
- {
3837
- // Configure PIO controllers to periph mode
3838
- AT91F_PIO_CfgPeriph(
3839
- AT91C_BASE_PIOB, // PIO controller base address
3840
- 0, // Peripheral A
3841
- ((unsigned int) AT91C_PB13_SPI0_NPCS1) |
3842
- ((unsigned int) AT91C_PB14_SPI0_NPCS2) |
3843
- ((unsigned int) AT91C_PB17_SPI0_NPCS3)); // Peripheral B
3844
- // Configure PIO controllers to periph mode
3845
- AT91F_PIO_CfgPeriph(
3846
- AT91C_BASE_PIOA, // PIO controller base address
3847
- ((unsigned int) AT91C_PA16_SPI0_MISO) |
3848
- ((unsigned int) AT91C_PA13_SPI0_NPCS1) |
3849
- ((unsigned int) AT91C_PA14_SPI0_NPCS2) |
3850
- ((unsigned int) AT91C_PA12_SPI0_NPCS0) |
3851
- ((unsigned int) AT91C_PA17_SPI0_MOSI) |
3852
- ((unsigned int) AT91C_PA15_SPI0_NPCS3) |
3853
- ((unsigned int) AT91C_PA18_SPI0_SPCK), // Peripheral A
3854
- ((unsigned int) AT91C_PA7_SPI0_NPCS1) |
3855
- ((unsigned int) AT91C_PA8_SPI0_NPCS2) |
3856
- ((unsigned int) AT91C_PA9_SPI0_NPCS3)); // Peripheral B
3857
- }
3858
-
3859
- //*----------------------------------------------------------------------------
3860
- //* \fn AT91F_PITC_CfgPMC
3861
- //* \brief Enable Peripheral clock in PMC for PITC
3862
- //*----------------------------------------------------------------------------
3863
- __inline void AT91F_PITC_CfgPMC (void)
3864
- {
3865
- AT91F_PMC_EnablePeriphClock(
3866
- AT91C_BASE_PMC, // PIO controller base address
3867
- ((unsigned int) 1 << AT91C_ID_SYS));
3868
- }
3869
-
3870
- //*----------------------------------------------------------------------------
3871
- //* \fn AT91F_AIC_CfgPMC
3872
- //* \brief Enable Peripheral clock in PMC for AIC
3873
- //*----------------------------------------------------------------------------
3874
- __inline void AT91F_AIC_CfgPMC (void)
3875
- {
3876
- AT91F_PMC_EnablePeriphClock(
3877
- AT91C_BASE_PMC, // PIO controller base address
3878
- ((unsigned int) 1 << AT91C_ID_FIQ) |
3879
- ((unsigned int) 1 << AT91C_ID_IRQ0) |
3880
- ((unsigned int) 1 << AT91C_ID_IRQ1));
3881
- }
3882
-
3883
- //*----------------------------------------------------------------------------
3884
- //* \fn AT91F_AIC_CfgPIO
3885
- //* \brief Configure PIO controllers to drive AIC signals
3886
- //*----------------------------------------------------------------------------
3887
- __inline void AT91F_AIC_CfgPIO (void)
3888
- {
3889
- // Configure PIO controllers to periph mode
3890
- AT91F_PIO_CfgPeriph(
3891
- AT91C_BASE_PIOA, // PIO controller base address
3892
- ((unsigned int) AT91C_PA30_IRQ0 ) |
3893
- ((unsigned int) AT91C_PA29_FIQ ), // Peripheral A
3894
- ((unsigned int) AT91C_PA14_IRQ1 )); // Peripheral B
3895
- }
3896
-
3897
- //*----------------------------------------------------------------------------
3898
- //* \fn AT91F_TWI_CfgPMC
3899
- //* \brief Enable Peripheral clock in PMC for TWI
3900
- //*----------------------------------------------------------------------------
3901
- __inline void AT91F_TWI_CfgPMC (void)
3902
- {
3903
- AT91F_PMC_EnablePeriphClock(
3904
- AT91C_BASE_PMC, // PIO controller base address
3905
- ((unsigned int) 1 << AT91C_ID_TWI));
3906
- }
3907
-
3908
- //*----------------------------------------------------------------------------
3909
- //* \fn AT91F_TWI_CfgPIO
3910
- //* \brief Configure PIO controllers to drive TWI signals
3911
- //*----------------------------------------------------------------------------
3912
- __inline void AT91F_TWI_CfgPIO (void)
3913
- {
3914
- // Configure PIO controllers to periph mode
3915
- AT91F_PIO_CfgPeriph(
3916
- AT91C_BASE_PIOA, // PIO controller base address
3917
- ((unsigned int) AT91C_PA11_TWCK ) |
3918
- ((unsigned int) AT91C_PA10_TWD ), // Peripheral A
3919
- 0); // Peripheral B
3920
- }
3921
-
3922
- //*----------------------------------------------------------------------------
3923
- //* \fn AT91F_ADC_CfgPMC
3924
- //* \brief Enable Peripheral clock in PMC for ADC
3925
- //*----------------------------------------------------------------------------
3926
- __inline void AT91F_ADC_CfgPMC (void)
3927
- {
3928
- AT91F_PMC_EnablePeriphClock(
3929
- AT91C_BASE_PMC, // PIO controller base address
3930
- ((unsigned int) 1 << AT91C_ID_ADC));
3931
- }
3932
-
3933
- //*----------------------------------------------------------------------------
3934
- //* \fn AT91F_ADC_CfgPIO
3935
- //* \brief Configure PIO controllers to drive ADC signals
3936
- //*----------------------------------------------------------------------------
3937
- __inline void AT91F_ADC_CfgPIO (void)
3938
- {
3939
- // Configure PIO controllers to periph mode
3940
- AT91F_PIO_CfgPeriph(
3941
- AT91C_BASE_PIOB, // PIO controller base address
3942
- 0, // Peripheral A
3943
- ((unsigned int) AT91C_PB18_ADTRG )); // Peripheral B
3944
- }
3945
-
3946
- //*----------------------------------------------------------------------------
3947
- //* \fn AT91F_PWMC_CH3_CfgPIO
3948
- //* \brief Configure PIO controllers to drive PWMC_CH3 signals
3949
- //*----------------------------------------------------------------------------
3950
- __inline void AT91F_PWMC_CH3_CfgPIO (void)
3951
- {
3952
- // Configure PIO controllers to periph mode
3953
- AT91F_PIO_CfgPeriph(
3954
- AT91C_BASE_PIOB, // PIO controller base address
3955
- ((unsigned int) AT91C_PB22_PWM3 ), // Peripheral A
3956
- ((unsigned int) AT91C_PB30_PWM3 )); // Peripheral B
3957
- }
3958
-
3959
- //*----------------------------------------------------------------------------
3960
- //* \fn AT91F_PWMC_CH2_CfgPIO
3961
- //* \brief Configure PIO controllers to drive PWMC_CH2 signals
3962
- //*----------------------------------------------------------------------------
3963
- __inline void AT91F_PWMC_CH2_CfgPIO (void)
3964
- {
3965
- // Configure PIO controllers to periph mode
3966
- AT91F_PIO_CfgPeriph(
3967
- AT91C_BASE_PIOB, // PIO controller base address
3968
- ((unsigned int) AT91C_PB21_PWM2 ), // Peripheral A
3969
- ((unsigned int) AT91C_PB29_PWM2 )); // Peripheral B
3970
- }
3971
-
3972
- //*----------------------------------------------------------------------------
3973
- //* \fn AT91F_PWMC_CH1_CfgPIO
3974
- //* \brief Configure PIO controllers to drive PWMC_CH1 signals
3975
- //*----------------------------------------------------------------------------
3976
- __inline void AT91F_PWMC_CH1_CfgPIO (void)
3977
- {
3978
- // Configure PIO controllers to periph mode
3979
- AT91F_PIO_CfgPeriph(
3980
- AT91C_BASE_PIOB, // PIO controller base address
3981
- ((unsigned int) AT91C_PB20_PWM1 ), // Peripheral A
3982
- ((unsigned int) AT91C_PB28_PWM1 )); // Peripheral B
3983
- }
3984
-
3985
- //*----------------------------------------------------------------------------
3986
- //* \fn AT91F_PWMC_CH0_CfgPIO
3987
- //* \brief Configure PIO controllers to drive PWMC_CH0 signals
3988
- //*----------------------------------------------------------------------------
3989
- __inline void AT91F_PWMC_CH0_CfgPIO (void)
3990
- {
3991
- // Configure PIO controllers to periph mode
3992
- AT91F_PIO_CfgPeriph(
3993
- AT91C_BASE_PIOB, // PIO controller base address
3994
- ((unsigned int) AT91C_PB19_PWM0 ), // Peripheral A
3995
- ((unsigned int) AT91C_PB27_PWM0 )); // Peripheral B
3996
- }
3997
-
3998
- //*----------------------------------------------------------------------------
3999
- //* \fn AT91F_RTTC_CfgPMC
4000
- //* \brief Enable Peripheral clock in PMC for RTTC
4001
- //*----------------------------------------------------------------------------
4002
- __inline void AT91F_RTTC_CfgPMC (void)
4003
- {
4004
- AT91F_PMC_EnablePeriphClock(
4005
- AT91C_BASE_PMC, // PIO controller base address
4006
- ((unsigned int) 1 << AT91C_ID_SYS));
4007
- }
4008
-
4009
- //*----------------------------------------------------------------------------
4010
- //* \fn AT91F_UDP_CfgPMC
4011
- //* \brief Enable Peripheral clock in PMC for UDP
4012
- //*----------------------------------------------------------------------------
4013
- __inline void AT91F_UDP_CfgPMC (void)
4014
- {
4015
- AT91F_PMC_EnablePeriphClock(
4016
- AT91C_BASE_PMC, // PIO controller base address
4017
- ((unsigned int) 1 << AT91C_ID_UDP));
4018
- }
4019
-
4020
- //*----------------------------------------------------------------------------
4021
- //* \fn AT91F_EMAC_CfgPMC
4022
- //* \brief Enable Peripheral clock in PMC for EMAC
4023
- //*----------------------------------------------------------------------------
4024
- __inline void AT91F_EMAC_CfgPMC (void)
4025
- {
4026
- AT91F_PMC_EnablePeriphClock(
4027
- AT91C_BASE_PMC, // PIO controller base address
4028
- ((unsigned int) 1 << AT91C_ID_EMAC));
4029
- }
4030
-
4031
- //*----------------------------------------------------------------------------
4032
- //* \fn AT91F_EMAC_CfgPIO
4033
- //* \brief Configure PIO controllers to drive EMAC signals
4034
- //*----------------------------------------------------------------------------
4035
- __inline void AT91F_EMAC_CfgPIO (void)
4036
- {
4037
- // Configure PIO controllers to periph mode
4038
- AT91F_PIO_CfgPeriph(
4039
- AT91C_BASE_PIOB, // PIO controller base address
4040
- ((unsigned int) AT91C_PB2_ETX0 ) |
4041
- ((unsigned int) AT91C_PB12_ETXER ) |
4042
- ((unsigned int) AT91C_PB16_ECOL ) |
4043
- ((unsigned int) AT91C_PB15_ERXDV_ECRSDV) |
4044
- ((unsigned int) AT91C_PB11_ETX3 ) |
4045
- ((unsigned int) AT91C_PB6_ERX1 ) |
4046
- ((unsigned int) AT91C_PB13_ERX2 ) |
4047
- ((unsigned int) AT91C_PB3_ETX1 ) |
4048
- ((unsigned int) AT91C_PB4_ECRS ) |
4049
- ((unsigned int) AT91C_PB8_EMDC ) |
4050
- ((unsigned int) AT91C_PB5_ERX0 ) |
4051
- ((unsigned int) AT91C_PB18_EF100 ) |
4052
- ((unsigned int) AT91C_PB14_ERX3 ) |
4053
- ((unsigned int) AT91C_PB1_ETXEN ) |
4054
- ((unsigned int) AT91C_PB10_ETX2 ) |
4055
- ((unsigned int) AT91C_PB0_ETXCK_EREFCK) |
4056
- ((unsigned int) AT91C_PB9_EMDIO ) |
4057
- ((unsigned int) AT91C_PB7_ERXER ) |
4058
- ((unsigned int) AT91C_PB17_ERXCK ), // Peripheral A
4059
- 0); // Peripheral B
4060
- }
4061
-
4062
- //*----------------------------------------------------------------------------
4063
- //* \fn AT91F_TC0_CfgPMC
4064
- //* \brief Enable Peripheral clock in PMC for TC0
4065
- //*----------------------------------------------------------------------------
4066
- __inline void AT91F_TC0_CfgPMC (void)
4067
- {
4068
- AT91F_PMC_EnablePeriphClock(
4069
- AT91C_BASE_PMC, // PIO controller base address
4070
- ((unsigned int) 1 << AT91C_ID_TC0));
4071
- }
4072
-
4073
- //*----------------------------------------------------------------------------
4074
- //* \fn AT91F_TC0_CfgPIO
4075
- //* \brief Configure PIO controllers to drive TC0 signals
4076
- //*----------------------------------------------------------------------------
4077
- __inline void AT91F_TC0_CfgPIO (void)
4078
- {
4079
- // Configure PIO controllers to periph mode
4080
- AT91F_PIO_CfgPeriph(
4081
- AT91C_BASE_PIOB, // PIO controller base address
4082
- ((unsigned int) AT91C_PB23_TIOA0 ) |
4083
- ((unsigned int) AT91C_PB24_TIOB0 ), // Peripheral A
4084
- ((unsigned int) AT91C_PB12_TCLK0 )); // Peripheral B
4085
- }
4086
-
4087
- //*----------------------------------------------------------------------------
4088
- //* \fn AT91F_TC1_CfgPMC
4089
- //* \brief Enable Peripheral clock in PMC for TC1
4090
- //*----------------------------------------------------------------------------
4091
- __inline void AT91F_TC1_CfgPMC (void)
4092
- {
4093
- AT91F_PMC_EnablePeriphClock(
4094
- AT91C_BASE_PMC, // PIO controller base address
4095
- ((unsigned int) 1 << AT91C_ID_TC1));
4096
- }
4097
-
4098
- //*----------------------------------------------------------------------------
4099
- //* \fn AT91F_TC1_CfgPIO
4100
- //* \brief Configure PIO controllers to drive TC1 signals
4101
- //*----------------------------------------------------------------------------
4102
- __inline void AT91F_TC1_CfgPIO (void)
4103
- {
4104
- // Configure PIO controllers to periph mode
4105
- AT91F_PIO_CfgPeriph(
4106
- AT91C_BASE_PIOB, // PIO controller base address
4107
- ((unsigned int) AT91C_PB25_TIOA1 ) |
4108
- ((unsigned int) AT91C_PB26_TIOB1 ), // Peripheral A
4109
- ((unsigned int) AT91C_PB19_TCLK1 )); // Peripheral B
4110
- }
4111
-
4112
- //*----------------------------------------------------------------------------
4113
- //* \fn AT91F_TC2_CfgPMC
4114
- //* \brief Enable Peripheral clock in PMC for TC2
4115
- //*----------------------------------------------------------------------------
4116
- __inline void AT91F_TC2_CfgPMC (void)
4117
- {
4118
- AT91F_PMC_EnablePeriphClock(
4119
- AT91C_BASE_PMC, // PIO controller base address
4120
- ((unsigned int) 1 << AT91C_ID_TC2));
4121
- }
4122
-
4123
- //*----------------------------------------------------------------------------
4124
- //* \fn AT91F_TC2_CfgPIO
4125
- //* \brief Configure PIO controllers to drive TC2 signals
4126
- //*----------------------------------------------------------------------------
4127
- __inline void AT91F_TC2_CfgPIO (void)
4128
- {
4129
- // Configure PIO controllers to periph mode
4130
- AT91F_PIO_CfgPeriph(
4131
- AT91C_BASE_PIOB, // PIO controller base address
4132
- ((unsigned int) AT91C_PB28_TIOB2 ) |
4133
- ((unsigned int) AT91C_PB27_TIOA2 ), // Peripheral A
4134
- 0); // Peripheral B
4135
- // Configure PIO controllers to periph mode
4136
- AT91F_PIO_CfgPeriph(
4137
- AT91C_BASE_PIOA, // PIO controller base address
4138
- 0, // Peripheral A
4139
- ((unsigned int) AT91C_PA15_TCLK2 )); // Peripheral B
4140
- }
4141
-
4142
- //*----------------------------------------------------------------------------
4143
- //* \fn AT91F_MC_CfgPMC
4144
- //* \brief Enable Peripheral clock in PMC for MC
4145
- //*----------------------------------------------------------------------------
4146
- __inline void AT91F_MC_CfgPMC (void)
4147
- {
4148
- AT91F_PMC_EnablePeriphClock(
4149
- AT91C_BASE_PMC, // PIO controller base address
4150
- ((unsigned int) 1 << AT91C_ID_SYS));
4151
- }
4152
-
4153
- //*----------------------------------------------------------------------------
4154
- //* \fn AT91F_PIOA_CfgPMC
4155
- //* \brief Enable Peripheral clock in PMC for PIOA
4156
- //*----------------------------------------------------------------------------
4157
- __inline void AT91F_PIOA_CfgPMC (void)
4158
- {
4159
- AT91F_PMC_EnablePeriphClock(
4160
- AT91C_BASE_PMC, // PIO controller base address
4161
- ((unsigned int) 1 << AT91C_ID_PIOA));
4162
- }
4163
-
4164
- //*----------------------------------------------------------------------------
4165
- //* \fn AT91F_PIOB_CfgPMC
4166
- //* \brief Enable Peripheral clock in PMC for PIOB
4167
- //*----------------------------------------------------------------------------
4168
- __inline void AT91F_PIOB_CfgPMC (void)
4169
- {
4170
- AT91F_PMC_EnablePeriphClock(
4171
- AT91C_BASE_PMC, // PIO controller base address
4172
- ((unsigned int) 1 << AT91C_ID_PIOB));
4173
- }
4174
-
4175
- //*----------------------------------------------------------------------------
4176
- //* \fn AT91F_CAN_CfgPMC
4177
- //* \brief Enable Peripheral clock in PMC for CAN
4178
- //*----------------------------------------------------------------------------
4179
- __inline void AT91F_CAN_CfgPMC (void)
4180
- {
4181
- AT91F_PMC_EnablePeriphClock(
4182
- AT91C_BASE_PMC, // PIO controller base address
4183
- ((unsigned int) 1 << AT91C_ID_CAN));
4184
- }
4185
-
4186
- //*----------------------------------------------------------------------------
4187
- //* \fn AT91F_CAN_CfgPIO
4188
- //* \brief Configure PIO controllers to drive CAN signals
4189
- //*----------------------------------------------------------------------------
4190
- __inline void AT91F_CAN_CfgPIO (void)
4191
- {
4192
- // Configure PIO controllers to periph mode
4193
- AT91F_PIO_CfgPeriph(
4194
- AT91C_BASE_PIOA, // PIO controller base address
4195
- ((unsigned int) AT91C_PA20_CANTX ) |
4196
- ((unsigned int) AT91C_PA19_CANRX ), // Peripheral A
4197
- 0); // Peripheral B
4198
- }
4199
-
4200
- //*----------------------------------------------------------------------------
4201
- //* \fn AT91F_PWMC_CfgPMC
4202
- //* \brief Enable Peripheral clock in PMC for PWMC
4203
- //*----------------------------------------------------------------------------
4204
- __inline void AT91F_PWMC_CfgPMC (void)
4205
- {
4206
- AT91F_PMC_EnablePeriphClock(
4207
- AT91C_BASE_PMC, // PIO controller base address
4208
- ((unsigned int) 1 << AT91C_ID_PWMC));
4209
- }
4210
-
4211
- #endif // lib_AT91SAM7X256_H