ceedling 0.0.2 → 0.0.3

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Files changed (857) hide show
  1. data/README.md +17 -0
  2. data/bin/ceedling +17 -0
  3. data/ceedling-gem.sublime-project +442 -0
  4. data/ceedling.gemspec +2 -1
  5. data/examples/temp_sensor/project.yml +71 -0
  6. data/examples/temp_sensor/rakefile.rb +4 -0
  7. data/{new_project_template/vendor/ceedling/vendor/cmock/examples → examples/temp_sensor}/src/AT91SAM7X256.h +0 -0
  8. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcConductor.c +0 -0
  9. data/{new_project_template/vendor/ceedling/vendor/cmock/examples → examples/temp_sensor}/src/AdcConductor.h +0 -0
  10. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcHardware.c +0 -0
  11. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcHardware.h +0 -0
  12. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcHardwareConfigurator.c +0 -0
  13. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcHardwareConfigurator.h +0 -0
  14. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcModel.c +0 -0
  15. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcModel.h +0 -0
  16. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcTemperatureSensor.c +0 -0
  17. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/AdcTemperatureSensor.h +0 -0
  18. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/Executor.c +0 -0
  19. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/Executor.h +0 -0
  20. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/IntrinsicsWrapper.c +0 -0
  21. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/IntrinsicsWrapper.h +0 -0
  22. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/Main.c +0 -0
  23. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/Main.h +0 -0
  24. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/Model.c +0 -0
  25. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/Model.h +0 -0
  26. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/ModelConfig.h +0 -0
  27. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TaskScheduler.c +0 -0
  28. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TaskScheduler.h +0 -0
  29. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TemperatureCalculator.c +0 -0
  30. data/{new_project_template/vendor/ceedling/vendor/cmock/examples → examples/temp_sensor}/src/TemperatureCalculator.h +0 -0
  31. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TemperatureFilter.c +0 -0
  32. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TemperatureFilter.h +0 -0
  33. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerConductor.c +0 -0
  34. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerConductor.h +0 -0
  35. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerConfigurator.c +0 -0
  36. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerConfigurator.h +0 -0
  37. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerHardware.c +0 -0
  38. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerHardware.h +0 -0
  39. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerInterruptConfigurator.c +0 -0
  40. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerInterruptConfigurator.h +0 -0
  41. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerInterruptHandler.c +0 -0
  42. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerInterruptHandler.h +0 -0
  43. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerModel.c +0 -0
  44. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/TimerModel.h +0 -0
  45. data/{new_project_template/vendor/ceedling/vendor/cmock/examples → examples/temp_sensor}/src/Types.h +0 -0
  46. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartBaudRateRegisterCalculator.c +0 -0
  47. data/{new_project_template/vendor/ceedling/vendor/cmock/examples → examples/temp_sensor}/src/UsartBaudRateRegisterCalculator.h +0 -0
  48. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartConductor.c +0 -0
  49. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartConductor.h +0 -0
  50. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartConfigurator.c +0 -0
  51. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartConfigurator.h +0 -0
  52. data/examples/temp_sensor/src/UsartGetChar.c +6 -0
  53. data/examples/temp_sensor/src/UsartGetChar.h +8 -0
  54. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartHardware.c +12 -0
  55. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartHardware.h +1 -0
  56. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartModel.c +0 -0
  57. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartModel.h +0 -0
  58. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartPutChar.c +0 -0
  59. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartPutChar.h +0 -0
  60. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartTransmitBufferStatus.c +0 -0
  61. data/{new_project_template/vendor/ceedling/examples → examples}/temp_sensor/src/UsartTransmitBufferStatus.h +0 -0
  62. data/{new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/helper → examples/temp_sensor/test/support}/UnityHelper.c +0 -0
  63. data/{new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/helper → examples/temp_sensor/test/support}/UnityHelper.h +0 -0
  64. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestAdcConductor.c → examples/temp_sensor/test/test_AdcConductor.c} +0 -0
  65. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestAdcHardware.c → examples/temp_sensor/test/test_AdcHardware.c} +0 -0
  66. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestAdcHardwareConfigurator.c → examples/temp_sensor/test/test_AdcHardwareConfigurator.c} +0 -0
  67. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestAdcTemperatureSensor.c → examples/temp_sensor/test/test_AdcTemperatureSensor.c} +0 -0
  68. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestExecutor.c → examples/temp_sensor/test/test_Executor.c} +0 -0
  69. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestModel.c → examples/temp_sensor/test/test_Model.c} +0 -0
  70. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestTaskScheduler.c → examples/temp_sensor/test/test_TaskScheduler.c} +0 -0
  71. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestTemperatureCalculator.c → examples/temp_sensor/test/test_TemperatureCalculator.c} +0 -0
  72. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestTemperatureFilter.c → examples/temp_sensor/test/test_TemperatureFilter.c} +2 -0
  73. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestAdcModel.c → examples/temp_sensor/test/test_TestAdcModel.c} +0 -0
  74. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestMain.c → examples/temp_sensor/test/test_TestMain.c} +0 -0
  75. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestTimerConductor.c → examples/temp_sensor/test/test_TimerConductor.c} +0 -0
  76. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestTimerConfigurator.c → examples/temp_sensor/test/test_TimerConfigurator.c} +0 -0
  77. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestTimerHardware.c → examples/temp_sensor/test/test_TimerHardware.c} +0 -0
  78. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestTimerInterruptConfigurator.c → examples/temp_sensor/test/test_TimerInterruptConfigurator.c} +0 -0
  79. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestTimerInterruptHandler.c → examples/temp_sensor/test/test_TimerInterruptHandler.c} +0 -0
  80. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestTimerModel.c → examples/temp_sensor/test/test_TimerModel.c} +0 -0
  81. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestUsartBaudRateRegisterCalculator.c → examples/temp_sensor/test/test_UsartBaudRateRegisterCalculator.c} +0 -0
  82. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestUsartConductor.c → examples/temp_sensor/test/test_UsartConductor.c} +1 -1
  83. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestUsartConfigurator.c → examples/temp_sensor/test/test_UsartConfigurator.c} +0 -0
  84. data/examples/temp_sensor/test/test_UsartGetChar.c +17 -0
  85. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestUsartHardware.c → examples/temp_sensor/test/test_UsartHardware.c} +19 -0
  86. data/{new_project_template/vendor/ceedling/examples/temp_sensor/test/TestUsartModel.c → examples/temp_sensor/test/test_UsartModel.c} +0 -0
  87. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestUsartPutChar.c → examples/temp_sensor/test/test_UsartPutChar.c} +0 -0
  88. data/{new_project_template/vendor/ceedling/vendor/cmock/examples/test/TestUsartTransmitBufferStatus.c → examples/temp_sensor/test/test_UsartTransmitBufferStatus.c} +0 -0
  89. data/lib/ceedling/version.rb +1 -1
  90. data/new_project_template/project.yml +1 -1
  91. metadata +121 -849
  92. data/new_project_template/vendor/ceedling/config/test_environment.rb +0 -12
  93. data/new_project_template/vendor/ceedling/examples/temp_sensor/gcc.yml +0 -42
  94. data/new_project_template/vendor/ceedling/examples/temp_sensor/iar_v4.yml +0 -91
  95. data/new_project_template/vendor/ceedling/examples/temp_sensor/iar_v5.yml +0 -80
  96. data/new_project_template/vendor/ceedling/examples/temp_sensor/project.yml +0 -65
  97. data/new_project_template/vendor/ceedling/examples/temp_sensor/rakefile.rb +0 -5
  98. data/new_project_template/vendor/ceedling/examples/temp_sensor/src/AdcConductor.h +0 -13
  99. data/new_project_template/vendor/ceedling/examples/temp_sensor/src/TemperatureCalculator.h +0 -8
  100. data/new_project_template/vendor/ceedling/examples/temp_sensor/src/Types.h +0 -90
  101. data/new_project_template/vendor/ceedling/examples/temp_sensor/src/UsartBaudRateRegisterCalculator.h +0 -8
  102. data/new_project_template/vendor/ceedling/examples/temp_sensor/test/TestUsartHardware.c +0 -36
  103. data/new_project_template/vendor/ceedling/examples/temp_sensor/test/support/UnityHelper.c +0 -12
  104. data/new_project_template/vendor/ceedling/examples/temp_sensor/test/support/UnityHelper.h +0 -8
  105. data/new_project_template/vendor/ceedling/test/integration/paths.yml +0 -17
  106. data/new_project_template/vendor/ceedling/test/integration/paths_test.rb +0 -80
  107. data/new_project_template/vendor/ceedling/test/integration/rake_rules_aux_dependencies_test.rb +0 -75
  108. data/new_project_template/vendor/ceedling/test/integration/rake_rules_cmock_test.rb +0 -74
  109. data/new_project_template/vendor/ceedling/test/integration/rake_rules_preprocess_test.rb +0 -178
  110. data/new_project_template/vendor/ceedling/test/integration/rake_rules_test.rb +0 -268
  111. data/new_project_template/vendor/ceedling/test/integration/rake_tasks_test.rb +0 -103
  112. data/new_project_template/vendor/ceedling/test/integration_test_helper.rb +0 -34
  113. data/new_project_template/vendor/ceedling/test/rakefile_rules.rb +0 -10
  114. data/new_project_template/vendor/ceedling/test/rakefile_rules_aux_dependencies.rb +0 -10
  115. data/new_project_template/vendor/ceedling/test/rakefile_rules_cmock.rb +0 -10
  116. data/new_project_template/vendor/ceedling/test/rakefile_rules_preprocess.rb +0 -10
  117. data/new_project_template/vendor/ceedling/test/rakefile_tasks.rb +0 -10
  118. data/new_project_template/vendor/ceedling/test/system/file_system_dependencies.yml +0 -20
  119. data/new_project_template/vendor/ceedling/test/system/file_system_kitchen_sink.yml +0 -20
  120. data/new_project_template/vendor/ceedling/test/system/file_system_mocks.yml +0 -20
  121. data/new_project_template/vendor/ceedling/test/system/file_system_preprocess.yml +0 -20
  122. data/new_project_template/vendor/ceedling/test/system/file_system_simple.yml +0 -20
  123. data/new_project_template/vendor/ceedling/test/system/file_system_test.rb +0 -78
  124. data/new_project_template/vendor/ceedling/test/system/mocks/include/a_file.h +0 -2
  125. data/new_project_template/vendor/ceedling/test/system/mocks/include/other_stuff.h +0 -2
  126. data/new_project_template/vendor/ceedling/test/system/mocks/include/stuff.h +0 -3
  127. data/new_project_template/vendor/ceedling/test/system/mocks/source/a_file.c +0 -9
  128. data/new_project_template/vendor/ceedling/test/system/mocks/test/test_a_file.c +0 -41
  129. data/new_project_template/vendor/ceedling/test/system/mocks/test/test_no_file.c +0 -14
  130. data/new_project_template/vendor/ceedling/test/system/project_mocks.yml +0 -43
  131. data/new_project_template/vendor/ceedling/test/system/project_mocks_test.rb +0 -38
  132. data/new_project_template/vendor/ceedling/test/system/project_simple.yml +0 -36
  133. data/new_project_template/vendor/ceedling/test/system/project_simple_test.rb +0 -39
  134. data/new_project_template/vendor/ceedling/test/system/rule_mocks_test.rb +0 -44
  135. data/new_project_template/vendor/ceedling/test/system/rule_runners_test.rb +0 -44
  136. data/new_project_template/vendor/ceedling/test/system/simple/include/other_stuff.h +0 -2
  137. data/new_project_template/vendor/ceedling/test/system/simple/include/stuff.h +0 -3
  138. data/new_project_template/vendor/ceedling/test/system/simple/source/other_stuff.c +0 -6
  139. data/new_project_template/vendor/ceedling/test/system/simple/source/stuff.c +0 -7
  140. data/new_project_template/vendor/ceedling/test/system/simple/test/test_other_stuff.c +0 -30
  141. data/new_project_template/vendor/ceedling/test/system/simple/test/test_stuff.c +0 -51
  142. data/new_project_template/vendor/ceedling/test/system_test_helper.rb +0 -73
  143. data/new_project_template/vendor/ceedling/test/test_helper.rb +0 -93
  144. data/new_project_template/vendor/ceedling/test/unit/busted/configurator_builder_test.rb +0 -571
  145. data/new_project_template/vendor/ceedling/test/unit/busted/configurator_helper_test.rb +0 -234
  146. data/new_project_template/vendor/ceedling/test/unit/busted/configurator_test.rb +0 -232
  147. data/new_project_template/vendor/ceedling/test/unit/busted/configurator_validator_test.rb +0 -169
  148. data/new_project_template/vendor/ceedling/test/unit/busted/deep_merge_fix_test.rb +0 -55
  149. data/new_project_template/vendor/ceedling/test/unit/busted/dependinator_test.rb +0 -129
  150. data/new_project_template/vendor/ceedling/test/unit/busted/file_finder_helper_test.rb +0 -45
  151. data/new_project_template/vendor/ceedling/test/unit/busted/file_finder_test.rb +0 -114
  152. data/new_project_template/vendor/ceedling/test/unit/busted/file_path_utils_test.rb +0 -97
  153. data/new_project_template/vendor/ceedling/test/unit/busted/file_system_utils_test.rb +0 -21
  154. data/new_project_template/vendor/ceedling/test/unit/busted/generator_test.rb +0 -187
  155. data/new_project_template/vendor/ceedling/test/unit/busted/generator_test_results_test.rb +0 -129
  156. data/new_project_template/vendor/ceedling/test/unit/busted/generator_test_runner_test.rb +0 -478
  157. data/new_project_template/vendor/ceedling/test/unit/busted/preprocessinator_extractor_test.rb +0 -729
  158. data/new_project_template/vendor/ceedling/test/unit/busted/preprocessinator_file_handler_test.rb +0 -38
  159. data/new_project_template/vendor/ceedling/test/unit/busted/preprocessinator_helper_test.rb +0 -156
  160. data/new_project_template/vendor/ceedling/test/unit/busted/preprocessinator_includes_handler_test.rb +0 -93
  161. data/new_project_template/vendor/ceedling/test/unit/busted/preprocessinator_test.rb +0 -57
  162. data/new_project_template/vendor/ceedling/test/unit/busted/project_file_loader_test.rb +0 -142
  163. data/new_project_template/vendor/ceedling/test/unit/busted/setupinator_test.rb +0 -45
  164. data/new_project_template/vendor/ceedling/test/unit/busted/streaminator_test.rb +0 -49
  165. data/new_project_template/vendor/ceedling/test/unit/busted/task_invoker_test.rb +0 -69
  166. data/new_project_template/vendor/ceedling/test/unit/busted/test_includes_extractor_test.rb +0 -111
  167. data/new_project_template/vendor/ceedling/test/unit/busted/test_invoker_helper_test.rb +0 -62
  168. data/new_project_template/vendor/ceedling/test/unit/busted/test_invoker_test.rb +0 -47
  169. data/new_project_template/vendor/ceedling/test/unit/busted/tool_executor_helper_test.rb +0 -100
  170. data/new_project_template/vendor/ceedling/test/unit/busted/tool_executor_test.rb +0 -351
  171. data/new_project_template/vendor/ceedling/test/unit/busted/verbosinator_test.rb +0 -65
  172. data/new_project_template/vendor/ceedling/test/unit_test_helper.rb +0 -16
  173. data/new_project_template/vendor/ceedling/vendor/behaviors/Manifest.txt +0 -9
  174. data/new_project_template/vendor/ceedling/vendor/behaviors/Rakefile +0 -19
  175. data/new_project_template/vendor/ceedling/vendor/behaviors/lib/behaviors.rb +0 -76
  176. data/new_project_template/vendor/ceedling/vendor/behaviors/lib/behaviors/reporttask.rb +0 -158
  177. data/new_project_template/vendor/ceedling/vendor/behaviors/test/behaviors_tasks_test.rb +0 -73
  178. data/new_project_template/vendor/ceedling/vendor/behaviors/test/behaviors_test.rb +0 -50
  179. data/new_project_template/vendor/ceedling/vendor/behaviors/test/tasks_test/Rakefile +0 -19
  180. data/new_project_template/vendor/ceedling/vendor/behaviors/test/tasks_test/lib/user.rb +0 -2
  181. data/new_project_template/vendor/ceedling/vendor/behaviors/test/tasks_test/test/user_test.rb +0 -17
  182. data/new_project_template/vendor/ceedling/vendor/c_exception/makefile +0 -24
  183. data/new_project_template/vendor/ceedling/vendor/c_exception/rakefile.rb +0 -41
  184. data/new_project_template/vendor/ceedling/vendor/c_exception/test/CExceptionConfig.h +0 -27
  185. data/new_project_template/vendor/ceedling/vendor/c_exception/test/TestException.c +0 -291
  186. data/new_project_template/vendor/ceedling/vendor/c_exception/test/TestException_Runner.c +0 -62
  187. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/colour_prompt.rb +0 -94
  188. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/colour_reporter.rb +0 -39
  189. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/generate_config.yml +0 -36
  190. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/generate_module.rb +0 -202
  191. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/generate_test_runner.rb +0 -303
  192. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/test_file_filter.rb +0 -23
  193. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/auto/unity_test_summary.rb +0 -126
  194. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/docs/Unity Summary.odt +0 -0
  195. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/docs/license.txt +0 -31
  196. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/makefile +0 -40
  197. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/rakefile.rb +0 -32
  198. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/rakefile_helper.rb +0 -260
  199. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/readme.txt +0 -18
  200. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/src/ProductionCode.c +0 -24
  201. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/src/ProductionCode.h +0 -3
  202. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/src/ProductionCode2.c +0 -9
  203. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/src/ProductionCode2.h +0 -2
  204. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/test/TestProductionCode.c +0 -62
  205. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/test/TestProductionCode2.c +0 -26
  206. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/test/no_ruby/TestProductionCode2_Runner.c +0 -46
  207. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/examples/test/no_ruby/TestProductionCode_Runner.c +0 -50
  208. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/extras/fixture/build/MakefileWorker.mk +0 -331
  209. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/extras/fixture/build/filterGcov.sh +0 -61
  210. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/extras/fixture/rakefile.rb +0 -37
  211. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/extras/fixture/rakefile_helper.rb +0 -178
  212. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/extras/fixture/readme.txt +0 -9
  213. data/new_project_template/vendor/ceedling/vendor/c_exception/vendor/unity/extras/fixture/src/unity_fixture.c +0 -381
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  809. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/build/filterGcov.sh +0 -61
  810. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/rakefile.rb +0 -37
  811. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/rakefile_helper.rb +0 -178
  812. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/readme.txt +0 -9
  813. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/src/unity_fixture.c +0 -381
  814. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/src/unity_fixture.h +0 -81
  815. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/src/unity_fixture_internals.h +0 -44
  816. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/src/unity_fixture_malloc_overrides.h +0 -16
  817. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/test/main/AllTests.c +0 -21
  818. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/test/testunity_fixture.c +0 -39
  819. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/test/unity_fixture_Test.c +0 -321
  820. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/test/unity_fixture_TestRunner.c +0 -40
  821. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/test/unity_output_Spy.c +0 -56
  822. data/new_project_template/vendor/ceedling/vendor/unity/extras/fixture/test/unity_output_Spy.h +0 -17
  823. data/new_project_template/vendor/ceedling/vendor/unity/makefile +0 -35
  824. data/new_project_template/vendor/ceedling/vendor/unity/rakefile.rb +0 -48
  825. data/new_project_template/vendor/ceedling/vendor/unity/rakefile_helper.rb +0 -243
  826. data/new_project_template/vendor/ceedling/vendor/unity/targets/gcc.yml +0 -42
  827. data/new_project_template/vendor/ceedling/vendor/unity/targets/gcc_64.yml +0 -43
  828. data/new_project_template/vendor/ceedling/vendor/unity/targets/hitech_picc18.yml +0 -101
  829. data/new_project_template/vendor/ceedling/vendor/unity/targets/iar_arm_v4.yml +0 -89
  830. data/new_project_template/vendor/ceedling/vendor/unity/targets/iar_arm_v5.yml +0 -79
  831. data/new_project_template/vendor/ceedling/vendor/unity/targets/iar_arm_v5_3.yml +0 -79
  832. data/new_project_template/vendor/ceedling/vendor/unity/targets/iar_armcortex_LM3S9B92_v5_4.yml +0 -93
  833. data/new_project_template/vendor/ceedling/vendor/unity/targets/iar_cortexm3_v5.yml +0 -83
  834. data/new_project_template/vendor/ceedling/vendor/unity/targets/iar_msp430.yml +0 -94
  835. data/new_project_template/vendor/ceedling/vendor/unity/targets/iar_sh2a_v6.yml +0 -85
  836. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_cmd.c +0 -54
  837. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_def.c +0 -50
  838. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_mock_cmd.c +0 -76
  839. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_mock_def.c +0 -72
  840. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_mock_new1.c +0 -85
  841. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_mock_new2.c +0 -85
  842. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_mock_param.c +0 -73
  843. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_mock_run1.c +0 -85
  844. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_mock_run2.c +0 -85
  845. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_mock_yaml.c +0 -86
  846. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_new1.c +0 -60
  847. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_new2.c +0 -63
  848. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_param.c +0 -51
  849. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_run1.c +0 -60
  850. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_run2.c +0 -63
  851. data/new_project_template/vendor/ceedling/vendor/unity/test/expectdata/testsample_yaml.c +0 -64
  852. data/new_project_template/vendor/ceedling/vendor/unity/test/test_generate_test_runner.rb +0 -94
  853. data/new_project_template/vendor/ceedling/vendor/unity/test/testdata/mocksample.c +0 -51
  854. data/new_project_template/vendor/ceedling/vendor/unity/test/testdata/sample.yml +0 -9
  855. data/new_project_template/vendor/ceedling/vendor/unity/test/testdata/testsample.c +0 -51
  856. data/new_project_template/vendor/ceedling/vendor/unity/test/testparameterized.c +0 -101
  857. data/new_project_template/vendor/ceedling/vendor/unity/test/testunity.c +0 -1510
@@ -1,67 +0,0 @@
1
- //=========================================================
2
- // Simulation setup file for esc07_demo project
3
- //=========================================================
4
-
5
- __var _timer0_interrupt_ID;
6
-
7
- irqBreak()
8
- {
9
- __var __AIC_SMR;
10
- __var __AIC_IECR;
11
- __var __AIC_IVR;
12
-
13
- // read AIC_IECR instead, since not fully supported by simulator
14
- __AIC_IECR = __readMemory32(0xFFFFF120, "Memory");
15
- if(__AIC_IECR & 0x1000)
16
- {
17
- __AIC_SMR = __readMemory32(0xFFFFF060, "Memory");
18
- __AIC_IVR = __readMemory32(0xFFFFF0B0, "Memory"); //AIC_IVR = AIC_SVR[x]
19
- __writeMemory32(__AIC_IVR, 0xFFFFF100, "Memory"); //AIC_IVR
20
- __writeMemory32(0x1000, 0xFFFFF10C, "Memory"); //AIC_IPR
21
- __writeMemory32(0x2, 0xFFFFF114, "Memory"); //AIC_CISR
22
- }
23
-
24
- return 0;
25
- }
26
-
27
- setupProcessorRegisters()
28
- {
29
- // Write TC0_SR.CPCS with correct status for ISR (Clock enabled; RC Compare Flag = TRUE)
30
- __writeMemory32(0x00010010, 0xfffa0020, "Memory");
31
-
32
- // Set TX ready flag in USART0 status register
33
- // USART0_BASE->US_CSR = AT91C_US_TXRDY
34
- __writeMemory32(0x00000002, 0xfffc0014, "Memory");
35
- }
36
-
37
- configureTimer0Interrupt()
38
- {
39
- __var _master_clock_frequency;
40
- __var _timer0_period_cycles;
41
-
42
- // Calculate timer0 frequency in master clock cycles
43
- _master_clock_frequency = 48054857;
44
- _timer0_period_cycles = _master_clock_frequency / 100;
45
- if((_master_clock_frequency % 100) >= 50)
46
- {
47
- _timer0_period_cycles++;
48
- }
49
-
50
- __cancelAllInterrupts();
51
- __enableInterrupts();
52
-
53
- _timer0_interrupt_ID = __orderInterrupt("IRQ", _timer0_period_cycles, _timer0_period_cycles, 0, 0, 0, 100);
54
-
55
- if(-1 == _timer0_interrupt_ID)
56
- {
57
- __message "ERROR: failed to order timer 0 interrupt";
58
- }
59
-
60
- __setCodeBreak("0x18", 0, "irqBreak()", "TRUE", "");
61
- }
62
-
63
- execUserReset()
64
- {
65
- setupProcessorRegisters();
66
- configureTimer0Interrupt();
67
- }
@@ -1,185 +0,0 @@
1
- // ----------------------------------------------------------------------------
2
- // ATMEL Microcontroller Software Support - ROUSSET -
3
- // ----------------------------------------------------------------------------
4
- // DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
5
- // IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
6
- // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
7
- // DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
8
- // INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
9
- // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
10
- // OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
11
- // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
12
- // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
13
- // EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
14
- // ----------------------------------------------------------------------------
15
- // File Name : at91SAM7X256_FLASH.xcl
16
- // Object : Generic Linker Command File for IAR
17
- // 1.0 30/Aug/05 FBr : Creation for 4.30A
18
- // ----------------------------------------------------------------------------
19
-
20
- //*************************************************************************
21
- // XLINK command file template for EWARM/ICCARM
22
- //
23
- // Usage: xlink -f lnkarm <your_object_file(s)>
24
- // -s <program start label> <C/C++ runtime library>
25
- //*************************************************************************
26
- //
27
- // -------------
28
- // Code segments - may be placed anywhere in memory.
29
- // -------------
30
- //
31
- // INTVEC -- Exception vector table.
32
- // SWITAB -- Software interrupt vector table.
33
- // ICODE -- Startup (cstartup) and exception code.
34
- // DIFUNCT -- Dynamic initialization vectors used by C++.
35
- // CODE -- Compiler generated code.
36
- // CODE_I -- Compiler generated code declared __ramfunc (executes in RAM)
37
- // CODE_ID -- Initializer for CODE_I (ROM).
38
- //
39
- // -------------
40
- // Data segments - may be placed anywhere in memory.
41
- // -------------
42
- //
43
- // CSTACK -- The stack used by C/C++ programs (system and user mode).
44
- // IRQ_STACK -- The stack used by IRQ service routines.
45
- // SVC_STACK -- The stack used in supervisor mode
46
- // (Define other exception stacks as needed for
47
- // FIQ, ABT, UND).
48
- // HEAP -- The heap used by malloc and free in C and new and
49
- // delete in C++.
50
- // INITTAB -- Table containing addresses and sizes of segments that
51
- // need to be initialized at startup (by cstartup).
52
- // CHECKSUM -- The linker places checksum byte(s) in this segment,
53
- // when the -J linker command line option is used.
54
- // DATA_y -- Data objects.
55
- //
56
- // Where _y can be one of:
57
- //
58
- // _AN -- Holds uninitialized located objects, i.e. objects with
59
- // an absolute location given by the @ operator or the
60
- // #pragma location directive. Since these segments
61
- // contain objects which already have a fixed address,
62
- // they should not be mentioned in this linker command
63
- // file.
64
- // _C -- Constants (ROM).
65
- // _I -- Initialized data (RAM).
66
- // _ID -- The original content of _I (copied to _I by cstartup) (ROM).
67
- // _N -- Uninitialized data (RAM).
68
- // _Z -- Zero initialized data (RAM).
69
- //
70
- // Note: Be sure to use end values for the defined address ranges.
71
- // Otherwise, the linker may allocate space outside the
72
- // intended memory range.
73
- //*************************************************************************
74
-
75
- //*************************************************************************
76
- // Inform the linker about the CPU family used.
77
- // AT91SAM7X256 Memory mapping
78
- // No remap
79
- // ROMSTART
80
- // Start address 0x0000 0000
81
- // Size 256 Kbo 0x0004 0000
82
- // RAMSTART
83
- // Start address 0x0020 0000
84
- // Size 64 Kbo 0x0001 0000
85
- // Remap done
86
- // RAMSTART
87
- // Start address 0x0000 0000
88
- // Size 64 Kbo 0x0001 0000
89
- // ROMSTART
90
- // Start address 0x0010 0000
91
- // Size 256 Kbo 0x0004 0000
92
-
93
- //*************************************************************************
94
- -carm
95
-
96
- //*************************************************************************
97
- // Internal Ram segments mapped AFTER REMAP 64 K.
98
- //*************************************************************************
99
- -Z(CONST)INTRAMSTART_REMAP=00200000
100
- -Z(CONST)INTRAMEND_REMAP=0020FFFF
101
-
102
- //*************************************************************************
103
- // Read-only segments mapped to Flash 256 K.
104
- //*************************************************************************
105
- -DROMSTART=00000000
106
- -DROMEND=0003FFFF
107
- //*************************************************************************
108
- // Read/write segments mapped to 64 K RAM.
109
- //*************************************************************************
110
- -DRAMSTART=00200000
111
- -DRAMEND=0020FFFF
112
-
113
- //*************************************************************************
114
- // Address range for reset and exception
115
- // vectors (INTVEC).
116
- // The vector area is 32 bytes,
117
- // an additional 32 bytes is allocated for the
118
- // constant table used by ldr PC in cstartup.s79.
119
- //*************************************************************************
120
- -Z(CODE)INTVEC=00-3F
121
-
122
- //*************************************************************************
123
- // Startup code and exception routines (ICODE).
124
- //*************************************************************************
125
- -Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
126
- -Z(CODE)SWITAB=ROMSTART-ROMEND
127
-
128
- //*************************************************************************
129
- // Code segments may be placed anywhere.
130
- //*************************************************************************
131
- -Z(CODE)CODE=ROMSTART-ROMEND
132
-
133
- //*************************************************************************
134
- // Various constants and initializers.
135
- //*************************************************************************
136
- -Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
137
- -Z(CONST)CHECKSUM=ROMSTART-ROMEND
138
-
139
- //*************************************************************************
140
- // Data segments.
141
- //*************************************************************************
142
- -Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
143
-
144
- //*************************************************************************
145
- // __ramfunc code copied to and executed from RAM.
146
- //*************************************************************************
147
- -Z(DATA)CODE_I=RAMSTART-RAMEND
148
- -Z(CONST)CODE_ID=ROMSTART-ROMEND // Initializer for
149
- -QCODE_I=CODE_ID
150
-
151
- //*************************************************************************
152
- // ICCARM produces code for __ramfunc functions in
153
- // CODE_I segments. The -Q XLINK command line
154
- // option redirects XLINK to emit the code in the
155
- // debug information associated with the CODE_I
156
- // segment, where the code will execute.
157
- //*************************************************************************
158
-
159
- //*************************************************************************
160
- // Stack and heap segments.
161
- //*************************************************************************
162
- -D_CSTACK_SIZE=(100*4)
163
- -D_IRQ_STACK_SIZE=(3*8*4)
164
- -D_HEAP_SIZE=(1024*1)
165
-
166
- -Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
167
- -Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE=RAMSTART-RAMEND
168
- -Z(DATA)HEAP+_HEAP_SIZE=RAMSTART-RAMEND
169
-
170
- //*************************************************************************
171
- // ELF/DWARF support.
172
- //
173
- // Uncomment the line "-Felf" below to generate ELF/DWARF output.
174
- // Available format specifiers are:
175
- //
176
- // "-yn": Suppress DWARF debug output
177
- // "-yp": Multiple ELF program sections
178
- // "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
179
- //
180
- // "-Felf" and the format specifiers can also be supplied directly as
181
- // command line options, or selected from the Xlink Output tab in the
182
- // IAR Embedded Workbench.
183
- //*************************************************************************
184
-
185
- // -Felf
@@ -1,185 +0,0 @@
1
- // ----------------------------------------------------------------------------
2
- // ATMEL Microcontroller Software Support - ROUSSET -
3
- // ----------------------------------------------------------------------------
4
- // DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
5
- // IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
6
- // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
7
- // DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
8
- // INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
9
- // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
10
- // OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
11
- // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
12
- // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
13
- // EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
14
- // ----------------------------------------------------------------------------
15
- // File Name : at91SAM7X256_RAM.xcl
16
- // Object : Generic Linker Command File for IAR
17
- // 1.0 30/Aug/05 FBr : Creation for 4.30A
18
- // ----------------------------------------------------------------------------
19
-
20
- //*************************************************************************
21
- // XLINK command file template for EWARM/ICCARM
22
- //
23
- // Usage: xlink -f lnkarm <your_object_file(s)>
24
- // -s <program start label> <C/C++ runtime library>
25
- //*************************************************************************
26
- //
27
- // -------------
28
- // Code segments - may be placed anywhere in memory.
29
- // -------------
30
- //
31
- // INTVEC -- Exception vector table.
32
- // SWITAB -- Software interrupt vector table.
33
- // ICODE -- Startup (cstartup) and exception code.
34
- // DIFUNCT -- Dynamic initialization vectors used by C++.
35
- // CODE -- Compiler generated code.
36
- // CODE_I -- Compiler generated code declared __ramfunc (executes in RAM)
37
- // CODE_ID -- Initializer for CODE_I (ROM).
38
- //
39
- // -------------
40
- // Data segments - may be placed anywhere in memory.
41
- // -------------
42
- //
43
- // CSTACK -- The stack used by C/C++ programs (system and user mode).
44
- // IRQ_STACK -- The stack used by IRQ service routines.
45
- // SVC_STACK -- The stack used in supervisor mode
46
- // (Define other exception stacks as needed for
47
- // FIQ, ABT, UND).
48
- // HEAP -- The heap used by malloc and free in C and new and
49
- // delete in C++.
50
- // INITTAB -- Table containing addresses and sizes of segments that
51
- // need to be initialized at startup (by cstartup).
52
- // CHECKSUM -- The linker places checksum byte(s) in this segment,
53
- // when the -J linker command line option is used.
54
- // DATA_y -- Data objects.
55
- //
56
- // Where _y can be one of:
57
- //
58
- // _AN -- Holds uninitialized located objects, i.e. objects with
59
- // an absolute location given by the @ operator or the
60
- // #pragma location directive. Since these segments
61
- // contain objects which already have a fixed address,
62
- // they should not be mentioned in this linker command
63
- // file.
64
- // _C -- Constants (ROM).
65
- // _I -- Initialized data (RAM).
66
- // _ID -- The original content of _I (copied to _I by cstartup) (ROM).
67
- // _N -- Uninitialized data (RAM).
68
- // _Z -- Zero initialized data (RAM).
69
- //
70
- // Note: Be sure to use end values for the defined address ranges.
71
- // Otherwise, the linker may allocate space outside the
72
- // intended memory range.
73
- //*************************************************************************
74
-
75
- //*************************************************************************
76
- // Inform the linker about the CPU family used.
77
- // AT91SAM7X256 Memory mapping
78
- // No remap
79
- // ROMSTART
80
- // Start address 0x0000 0000
81
- // Size 256 Kbo 0x0004 0000
82
- // RAMSTART
83
- // Start address 0x0020 0000
84
- // Size 64 Kbo 0x0001 0000
85
- // Remap done
86
- // RAMSTART
87
- // Start address 0x0000 0000
88
- // Size 64 Kbo 0x0001 0000
89
- // ROMSTART
90
- // Start address 0x0010 0000
91
- // Size 256 Kbo 0x0004 0000
92
-
93
- //*************************************************************************
94
- -carm
95
-
96
- //*************************************************************************
97
- // Internal Ram segments mapped AFTER REMAP 64 K.
98
- //*************************************************************************
99
- -Z(CONST)INTRAMSTART_REMAP=00000000
100
- -Z(CONST)INTRAMEND_REMAP=0000FFFF
101
-
102
- //*************************************************************************
103
- // Read-only segments mapped to Flash 256 K.
104
- //*************************************************************************
105
- -DROMSTART=00000000
106
- -DROMEND=0003FFFF
107
- //*************************************************************************
108
- // Read/write segments mapped to 64 K RAM.
109
- //*************************************************************************
110
- -DRAMSTART=00000000
111
- -DRAMEND=0000FFFF
112
-
113
- //*************************************************************************
114
- // Address range for reset and exception
115
- // vectors (INTVEC).
116
- // The vector area is 32 bytes,
117
- // an additional 32 bytes is allocated for the
118
- // constant table used by ldr PC in cstartup.s79.
119
- //*************************************************************************
120
- -Z(CODE)INTVEC=00-3F
121
-
122
- //*************************************************************************
123
- // Startup code and exception routines (ICODE).
124
- //*************************************************************************
125
- -Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
126
- -Z(CODE)SWITAB=ROMSTART-ROMEND
127
-
128
- //*************************************************************************
129
- // Code segments may be placed anywhere.
130
- //*************************************************************************
131
- -Z(CODE)CODE=ROMSTART-ROMEND
132
-
133
- //*************************************************************************
134
- // Various constants and initializers.
135
- //*************************************************************************
136
- -Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
137
- -Z(CONST)CHECKSUM=ROMSTART-ROMEND
138
-
139
- //*************************************************************************
140
- // Data segments.
141
- //*************************************************************************
142
- -Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
143
-
144
- //*************************************************************************
145
- // __ramfunc code copied to and executed from RAM.
146
- //*************************************************************************
147
- -Z(DATA)CODE_I=RAMSTART-RAMEND
148
- -Z(CONST)CODE_ID=ROMSTART-ROMEND // Initializer for
149
- -QCODE_I=CODE_ID
150
-
151
- //*************************************************************************
152
- // ICCARM produces code for __ramfunc functions in
153
- // CODE_I segments. The -Q XLINK command line
154
- // option redirects XLINK to emit the code in the
155
- // debug information associated with the CODE_I
156
- // segment, where the code will execute.
157
- //*************************************************************************
158
-
159
- //*************************************************************************
160
- // Stack and heap segments.
161
- //*************************************************************************
162
- -D_CSTACK_SIZE=(100*4)
163
- -D_IRQ_STACK_SIZE=(3*8*4)
164
- -D_HEAP_SIZE=(1024*2)
165
-
166
- -Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
167
- -Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE=RAMSTART-RAMEND
168
- -Z(DATA)HEAP+_HEAP_SIZE=RAMSTART-RAMEND
169
-
170
- //*************************************************************************
171
- // ELF/DWARF support.
172
- //
173
- // Uncomment the line "-Felf" below to generate ELF/DWARF output.
174
- // Available format specifiers are:
175
- //
176
- // "-yn": Suppress DWARF debug output
177
- // "-yp": Multiple ELF program sections
178
- // "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
179
- //
180
- // "-Felf" and the format specifiers can also be supplied directly as
181
- // command line options, or selected from the Xlink Output tab in the
182
- // IAR Embedded Workbench.
183
- //*************************************************************************
184
-
185
- // -Felf
@@ -1,2259 +0,0 @@
1
- ; ----------------------------------------------------------------------------
2
- ; ATMEL Microcontroller Software Support - ROUSSET -
3
- ; ----------------------------------------------------------------------------
4
- ; DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
5
- ; IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
6
- ; MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
7
- ; DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
8
- ; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
9
- ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
10
- ; OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
11
- ; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
12
- ; NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
13
- ; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
14
- ; ----------------------------------------------------------------------------
15
- ; File Name : AT91SAM7X256.ddf
16
- ; Object : AT91SAM7X256 definitions
17
- ; Generated : AT91 SW Application Group 11/02/2005 (15:17:30)
18
- ;
19
- ; CVS Reference : /AT91SAM7X256.pl/1.14/Tue Sep 13 15:06:52 2005//
20
- ; CVS Reference : /SYS_SAM7X.pl/1.3/Tue Feb 1 17:01:43 2005//
21
- ; CVS Reference : /MC_SAM7X.pl/1.2/Fri May 20 14:13:04 2005//
22
- ; CVS Reference : /PMC_SAM7X.pl/1.4/Tue Feb 8 13:58:10 2005//
23
- ; CVS Reference : /RSTC_SAM7X.pl/1.2/Wed Jul 13 14:57:50 2005//
24
- ; CVS Reference : /UDP_SAM7X.pl/1.1/Tue May 10 11:35:35 2005//
25
- ; CVS Reference : /PWM_SAM7X.pl/1.1/Tue May 10 11:53:07 2005//
26
- ; CVS Reference : /AIC_6075B.pl/1.3/Fri May 20 14:01:30 2005//
27
- ; CVS Reference : /PIO_6057A.pl/1.2/Thu Feb 3 10:18:28 2005//
28
- ; CVS Reference : /RTTC_6081A.pl/1.2/Tue Nov 9 14:43:58 2004//
29
- ; CVS Reference : /PITC_6079A.pl/1.2/Tue Nov 9 14:43:56 2004//
30
- ; CVS Reference : /WDTC_6080A.pl/1.3/Tue Nov 9 14:44:00 2004//
31
- ; CVS Reference : /VREG_6085B.pl/1.1/Tue Feb 1 16:05:48 2005//
32
- ; CVS Reference : /PDC_6074C.pl/1.2/Thu Feb 3 08:48:54 2005//
33
- ; CVS Reference : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005//
34
- ; CVS Reference : /SPI_6088D.pl/1.3/Fri May 20 14:08:59 2005//
35
- ; CVS Reference : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004//
36
- ; CVS Reference : /SSC_6078B.pl/1.1/Wed Jul 13 15:19:19 2005//
37
- ; CVS Reference : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004//
38
- ; CVS Reference : /TC_6082A.pl/1.7/Fri Mar 11 12:52:17 2005//
39
- ; CVS Reference : /CAN_6019B.pl/1.1/Tue Mar 8 12:42:22 2005//
40
- ; CVS Reference : /EMACB_6119A.pl/1.6/Wed Jul 13 15:05:35 2005//
41
- ; CVS Reference : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003//
42
- ; ----------------------------------------------------------------------------
43
-
44
- [Sfr]
45
-
46
- ; ========== Register definition for SYS peripheral ==========
47
- ; ========== Register definition for AIC peripheral ==========
48
- sfr = "AIC_SMR", "Memory", 0xfffff000, 4, base=16
49
- sfr = "AIC_SMR.PRIOR", "Memory", 0xfffff000, 4, base=16, bitRange=0-2
50
- sfr = "AIC_SMR.SRCTYPE", "Memory", 0xfffff000, 4, base=16, bitRange=5-6
51
- sfr = "AIC_SVR", "Memory", 0xfffff080, 4, base=16
52
- sfr = "AIC_IVR", "Memory", 0xfffff100, 4, base=16
53
- sfr = "AIC_FVR", "Memory", 0xfffff104, 4, base=16
54
- sfr = "AIC_ISR", "Memory", 0xfffff108, 4, base=16
55
- sfr = "AIC_IPR", "Memory", 0xfffff10c, 4, base=16
56
- sfr = "AIC_IMR", "Memory", 0xfffff110, 4, base=16
57
- sfr = "AIC_CISR", "Memory", 0xfffff114, 4, base=16
58
- sfr = "AIC_CISR.NFIQ", "Memory", 0xfffff114, 4, base=16, bitRange=0
59
- sfr = "AIC_CISR.NIRQ", "Memory", 0xfffff114, 4, base=16, bitRange=1
60
- sfr = "AIC_IECR", "Memory", 0xfffff120, 4, base=16
61
- sfr = "AIC_IDCR", "Memory", 0xfffff124, 4, base=16
62
- sfr = "AIC_ICCR", "Memory", 0xfffff128, 4, base=16
63
- sfr = "AIC_ISCR", "Memory", 0xfffff12c, 4, base=16
64
- sfr = "AIC_EOICR", "Memory", 0xfffff130, 4, base=16
65
- sfr = "AIC_SPU", "Memory", 0xfffff134, 4, base=16
66
- sfr = "AIC_DCR", "Memory", 0xfffff138, 4, base=16
67
- sfr = "AIC_DCR.PROT", "Memory", 0xfffff138, 4, base=16, bitRange=0
68
- sfr = "AIC_DCR.GMSK", "Memory", 0xfffff138, 4, base=16, bitRange=1
69
- sfr = "AIC_FFER", "Memory", 0xfffff140, 4, base=16
70
- sfr = "AIC_FFDR", "Memory", 0xfffff144, 4, base=16
71
- sfr = "AIC_FFSR", "Memory", 0xfffff148, 4, base=16
72
- ; ========== Register definition for PDC_DBGU peripheral ==========
73
- sfr = "DBGU_RPR", "Memory", 0xfffff300, 4, base=16
74
- sfr = "DBGU_RCR", "Memory", 0xfffff304, 4, base=16
75
- sfr = "DBGU_TPR", "Memory", 0xfffff308, 4, base=16
76
- sfr = "DBGU_TCR", "Memory", 0xfffff30c, 4, base=16
77
- sfr = "DBGU_RNPR", "Memory", 0xfffff310, 4, base=16
78
- sfr = "DBGU_RNCR", "Memory", 0xfffff314, 4, base=16
79
- sfr = "DBGU_TNPR", "Memory", 0xfffff318, 4, base=16
80
- sfr = "DBGU_TNCR", "Memory", 0xfffff31c, 4, base=16
81
- sfr = "DBGU_PTCR", "Memory", 0xfffff320, 4, base=16
82
- sfr = "DBGU_PTCR.RXTEN", "Memory", 0xfffff320, 4, base=16, bitRange=0
83
- sfr = "DBGU_PTCR.RXTDIS", "Memory", 0xfffff320, 4, base=16, bitRange=1
84
- sfr = "DBGU_PTCR.TXTEN", "Memory", 0xfffff320, 4, base=16, bitRange=8
85
- sfr = "DBGU_PTCR.TXTDIS", "Memory", 0xfffff320, 4, base=16, bitRange=9
86
- sfr = "DBGU_PTSR", "Memory", 0xfffff324, 4, base=16
87
- sfr = "DBGU_PTSR.RXTEN", "Memory", 0xfffff324, 4, base=16, bitRange=0
88
- sfr = "DBGU_PTSR.TXTEN", "Memory", 0xfffff324, 4, base=16, bitRange=8
89
- ; ========== Register definition for DBGU peripheral ==========
90
- sfr = "DBGU_CR", "Memory", 0xfffff200, 4, base=16
91
- sfr = "DBGU_CR.RSTRX", "Memory", 0xfffff200, 4, base=16, bitRange=2
92
- sfr = "DBGU_CR.RSTTX", "Memory", 0xfffff200, 4, base=16, bitRange=3
93
- sfr = "DBGU_CR.RXEN", "Memory", 0xfffff200, 4, base=16, bitRange=4
94
- sfr = "DBGU_CR.RXDIS", "Memory", 0xfffff200, 4, base=16, bitRange=5
95
- sfr = "DBGU_CR.TXEN", "Memory", 0xfffff200, 4, base=16, bitRange=6
96
- sfr = "DBGU_CR.TXDIS", "Memory", 0xfffff200, 4, base=16, bitRange=7
97
- sfr = "DBGU_CR.RSTSTA", "Memory", 0xfffff200, 4, base=16, bitRange=8
98
- sfr = "DBGU_MR", "Memory", 0xfffff204, 4, base=16
99
- sfr = "DBGU_MR.PAR", "Memory", 0xfffff204, 4, base=16, bitRange=9-11
100
- sfr = "DBGU_MR.CHMODE", "Memory", 0xfffff204, 4, base=16, bitRange=14-15
101
- sfr = "DBGU_IER", "Memory", 0xfffff208, 4, base=16
102
- sfr = "DBGU_IER.RXRDY", "Memory", 0xfffff208, 4, base=16, bitRange=0
103
- sfr = "DBGU_IER.TXRDY", "Memory", 0xfffff208, 4, base=16, bitRange=1
104
- sfr = "DBGU_IER.ENDRX", "Memory", 0xfffff208, 4, base=16, bitRange=3
105
- sfr = "DBGU_IER.ENDTX", "Memory", 0xfffff208, 4, base=16, bitRange=4
106
- sfr = "DBGU_IER.OVRE", "Memory", 0xfffff208, 4, base=16, bitRange=5
107
- sfr = "DBGU_IER.FRAME", "Memory", 0xfffff208, 4, base=16, bitRange=6
108
- sfr = "DBGU_IER.PARE", "Memory", 0xfffff208, 4, base=16, bitRange=7
109
- sfr = "DBGU_IER.TXEMPTY", "Memory", 0xfffff208, 4, base=16, bitRange=9
110
- sfr = "DBGU_IER.TXBUFE", "Memory", 0xfffff208, 4, base=16, bitRange=11
111
- sfr = "DBGU_IER.RXBUFF", "Memory", 0xfffff208, 4, base=16, bitRange=12
112
- sfr = "DBGU_IER.TX", "Memory", 0xfffff208, 4, base=16, bitRange=30
113
- sfr = "DBGU_IER.RX", "Memory", 0xfffff208, 4, base=16, bitRange=31
114
- sfr = "DBGU_IDR", "Memory", 0xfffff20c, 4, base=16
115
- sfr = "DBGU_IDR.RXRDY", "Memory", 0xfffff20c, 4, base=16, bitRange=0
116
- sfr = "DBGU_IDR.TXRDY", "Memory", 0xfffff20c, 4, base=16, bitRange=1
117
- sfr = "DBGU_IDR.ENDRX", "Memory", 0xfffff20c, 4, base=16, bitRange=3
118
- sfr = "DBGU_IDR.ENDTX", "Memory", 0xfffff20c, 4, base=16, bitRange=4
119
- sfr = "DBGU_IDR.OVRE", "Memory", 0xfffff20c, 4, base=16, bitRange=5
120
- sfr = "DBGU_IDR.FRAME", "Memory", 0xfffff20c, 4, base=16, bitRange=6
121
- sfr = "DBGU_IDR.PARE", "Memory", 0xfffff20c, 4, base=16, bitRange=7
122
- sfr = "DBGU_IDR.TXEMPTY", "Memory", 0xfffff20c, 4, base=16, bitRange=9
123
- sfr = "DBGU_IDR.TXBUFE", "Memory", 0xfffff20c, 4, base=16, bitRange=11
124
- sfr = "DBGU_IDR.RXBUFF", "Memory", 0xfffff20c, 4, base=16, bitRange=12
125
- sfr = "DBGU_IDR.TX", "Memory", 0xfffff20c, 4, base=16, bitRange=30
126
- sfr = "DBGU_IDR.RX", "Memory", 0xfffff20c, 4, base=16, bitRange=31
127
- sfr = "DBGU_IMR", "Memory", 0xfffff210, 4, base=16
128
- sfr = "DBGU_IMR.RXRDY", "Memory", 0xfffff210, 4, base=16, bitRange=0
129
- sfr = "DBGU_IMR.TXRDY", "Memory", 0xfffff210, 4, base=16, bitRange=1
130
- sfr = "DBGU_IMR.ENDRX", "Memory", 0xfffff210, 4, base=16, bitRange=3
131
- sfr = "DBGU_IMR.ENDTX", "Memory", 0xfffff210, 4, base=16, bitRange=4
132
- sfr = "DBGU_IMR.OVRE", "Memory", 0xfffff210, 4, base=16, bitRange=5
133
- sfr = "DBGU_IMR.FRAME", "Memory", 0xfffff210, 4, base=16, bitRange=6
134
- sfr = "DBGU_IMR.PARE", "Memory", 0xfffff210, 4, base=16, bitRange=7
135
- sfr = "DBGU_IMR.TXEMPTY", "Memory", 0xfffff210, 4, base=16, bitRange=9
136
- sfr = "DBGU_IMR.TXBUFE", "Memory", 0xfffff210, 4, base=16, bitRange=11
137
- sfr = "DBGU_IMR.RXBUFF", "Memory", 0xfffff210, 4, base=16, bitRange=12
138
- sfr = "DBGU_IMR.TX", "Memory", 0xfffff210, 4, base=16, bitRange=30
139
- sfr = "DBGU_IMR.RX", "Memory", 0xfffff210, 4, base=16, bitRange=31
140
- sfr = "DBGU_CSR", "Memory", 0xfffff214, 4, base=16
141
- sfr = "DBGU_CSR.RXRDY", "Memory", 0xfffff214, 4, base=16, bitRange=0
142
- sfr = "DBGU_CSR.TXRDY", "Memory", 0xfffff214, 4, base=16, bitRange=1
143
- sfr = "DBGU_CSR.ENDRX", "Memory", 0xfffff214, 4, base=16, bitRange=3
144
- sfr = "DBGU_CSR.ENDTX", "Memory", 0xfffff214, 4, base=16, bitRange=4
145
- sfr = "DBGU_CSR.OVRE", "Memory", 0xfffff214, 4, base=16, bitRange=5
146
- sfr = "DBGU_CSR.FRAME", "Memory", 0xfffff214, 4, base=16, bitRange=6
147
- sfr = "DBGU_CSR.PARE", "Memory", 0xfffff214, 4, base=16, bitRange=7
148
- sfr = "DBGU_CSR.TXEMPTY", "Memory", 0xfffff214, 4, base=16, bitRange=9
149
- sfr = "DBGU_CSR.TXBUFE", "Memory", 0xfffff214, 4, base=16, bitRange=11
150
- sfr = "DBGU_CSR.RXBUFF", "Memory", 0xfffff214, 4, base=16, bitRange=12
151
- sfr = "DBGU_CSR.TX", "Memory", 0xfffff214, 4, base=16, bitRange=30
152
- sfr = "DBGU_CSR.RX", "Memory", 0xfffff214, 4, base=16, bitRange=31
153
- sfr = "DBGU_RHR", "Memory", 0xfffff218, 4, base=16
154
- sfr = "DBGU_THR", "Memory", 0xfffff21c, 4, base=16
155
- sfr = "DBGU_BRGR", "Memory", 0xfffff220, 4, base=16
156
- sfr = "DBGU_CIDR", "Memory", 0xfffff240, 4, base=16
157
- sfr = "DBGU_EXID", "Memory", 0xfffff244, 4, base=16
158
- sfr = "DBGU_FNTR", "Memory", 0xfffff248, 4, base=16
159
- sfr = "DBGU_FNTR.NTRST", "Memory", 0xfffff248, 4, base=16, bitRange=0
160
- ; ========== Register definition for PIOA peripheral ==========
161
- sfr = "PIOA_PER", "Memory", 0xfffff400, 4, base=16
162
- sfr = "PIOA_PDR", "Memory", 0xfffff404, 4, base=16
163
- sfr = "PIOA_PSR", "Memory", 0xfffff408, 4, base=16
164
- sfr = "PIOA_OER", "Memory", 0xfffff410, 4, base=16
165
- sfr = "PIOA_ODR", "Memory", 0xfffff414, 4, base=16
166
- sfr = "PIOA_OSR", "Memory", 0xfffff418, 4, base=16
167
- sfr = "PIOA_IFER", "Memory", 0xfffff420, 4, base=16
168
- sfr = "PIOA_IFDR", "Memory", 0xfffff424, 4, base=16
169
- sfr = "PIOA_IFSR", "Memory", 0xfffff428, 4, base=16
170
- sfr = "PIOA_SODR", "Memory", 0xfffff430, 4, base=16
171
- sfr = "PIOA_CODR", "Memory", 0xfffff434, 4, base=16
172
- sfr = "PIOA_ODSR", "Memory", 0xfffff438, 4, base=16
173
- sfr = "PIOA_PDSR", "Memory", 0xfffff43c, 4, base=16
174
- sfr = "PIOA_IER", "Memory", 0xfffff440, 4, base=16
175
- sfr = "PIOA_IDR", "Memory", 0xfffff444, 4, base=16
176
- sfr = "PIOA_IMR", "Memory", 0xfffff448, 4, base=16
177
- sfr = "PIOA_ISR", "Memory", 0xfffff44c, 4, base=16
178
- sfr = "PIOA_MDER", "Memory", 0xfffff450, 4, base=16
179
- sfr = "PIOA_MDDR", "Memory", 0xfffff454, 4, base=16
180
- sfr = "PIOA_MDSR", "Memory", 0xfffff458, 4, base=16
181
- sfr = "PIOA_PPUDR", "Memory", 0xfffff460, 4, base=16
182
- sfr = "PIOA_PPUER", "Memory", 0xfffff464, 4, base=16
183
- sfr = "PIOA_PPUSR", "Memory", 0xfffff468, 4, base=16
184
- sfr = "PIOA_ASR", "Memory", 0xfffff470, 4, base=16
185
- sfr = "PIOA_BSR", "Memory", 0xfffff474, 4, base=16
186
- sfr = "PIOA_ABSR", "Memory", 0xfffff478, 4, base=16
187
- sfr = "PIOA_OWER", "Memory", 0xfffff4a0, 4, base=16
188
- sfr = "PIOA_OWDR", "Memory", 0xfffff4a4, 4, base=16
189
- sfr = "PIOA_OWSR", "Memory", 0xfffff4a8, 4, base=16
190
- ; ========== Register definition for PIOB peripheral ==========
191
- sfr = "PIOB_PER", "Memory", 0xfffff600, 4, base=16
192
- sfr = "PIOB_PDR", "Memory", 0xfffff604, 4, base=16
193
- sfr = "PIOB_PSR", "Memory", 0xfffff608, 4, base=16
194
- sfr = "PIOB_OER", "Memory", 0xfffff610, 4, base=16
195
- sfr = "PIOB_ODR", "Memory", 0xfffff614, 4, base=16
196
- sfr = "PIOB_OSR", "Memory", 0xfffff618, 4, base=16
197
- sfr = "PIOB_IFER", "Memory", 0xfffff620, 4, base=16
198
- sfr = "PIOB_IFDR", "Memory", 0xfffff624, 4, base=16
199
- sfr = "PIOB_IFSR", "Memory", 0xfffff628, 4, base=16
200
- sfr = "PIOB_SODR", "Memory", 0xfffff630, 4, base=16
201
- sfr = "PIOB_CODR", "Memory", 0xfffff634, 4, base=16
202
- sfr = "PIOB_ODSR", "Memory", 0xfffff638, 4, base=16
203
- sfr = "PIOB_PDSR", "Memory", 0xfffff63c, 4, base=16
204
- sfr = "PIOB_IER", "Memory", 0xfffff640, 4, base=16
205
- sfr = "PIOB_IDR", "Memory", 0xfffff644, 4, base=16
206
- sfr = "PIOB_IMR", "Memory", 0xfffff648, 4, base=16
207
- sfr = "PIOB_ISR", "Memory", 0xfffff64c, 4, base=16
208
- sfr = "PIOB_MDER", "Memory", 0xfffff650, 4, base=16
209
- sfr = "PIOB_MDDR", "Memory", 0xfffff654, 4, base=16
210
- sfr = "PIOB_MDSR", "Memory", 0xfffff658, 4, base=16
211
- sfr = "PIOB_PPUDR", "Memory", 0xfffff660, 4, base=16
212
- sfr = "PIOB_PPUER", "Memory", 0xfffff664, 4, base=16
213
- sfr = "PIOB_PPUSR", "Memory", 0xfffff668, 4, base=16
214
- sfr = "PIOB_ASR", "Memory", 0xfffff670, 4, base=16
215
- sfr = "PIOB_BSR", "Memory", 0xfffff674, 4, base=16
216
- sfr = "PIOB_ABSR", "Memory", 0xfffff678, 4, base=16
217
- sfr = "PIOB_OWER", "Memory", 0xfffff6a0, 4, base=16
218
- sfr = "PIOB_OWDR", "Memory", 0xfffff6a4, 4, base=16
219
- sfr = "PIOB_OWSR", "Memory", 0xfffff6a8, 4, base=16
220
- ; ========== Register definition for CKGR peripheral ==========
221
- sfr = "CKGR_MOR", "Memory", 0xfffffc20, 4, base=16
222
- sfr = "CKGR_MOR.MOSCEN", "Memory", 0xfffffc20, 4, base=16, bitRange=0
223
- sfr = "CKGR_MOR.OSCBYPASS", "Memory", 0xfffffc20, 4, base=16, bitRange=1
224
- sfr = "CKGR_MOR.OSCOUNT", "Memory", 0xfffffc20, 4, base=16, bitRange=8-15
225
- sfr = "CKGR_MCFR", "Memory", 0xfffffc24, 4, base=16
226
- sfr = "CKGR_MCFR.MAINF", "Memory", 0xfffffc24, 4, base=16, bitRange=0-15
227
- sfr = "CKGR_MCFR.MAINRDY", "Memory", 0xfffffc24, 4, base=16, bitRange=16
228
- sfr = "CKGR_PLLR", "Memory", 0xfffffc2c, 4, base=16
229
- sfr = "CKGR_PLLR.DIV", "Memory", 0xfffffc2c, 4, base=16, bitRange=0-7
230
- sfr = "CKGR_PLLR.PLLCOUNT", "Memory", 0xfffffc2c, 4, base=16, bitRange=8-13
231
- sfr = "CKGR_PLLR.OUT", "Memory", 0xfffffc2c, 4, base=16, bitRange=14-15
232
- sfr = "CKGR_PLLR.MUL", "Memory", 0xfffffc2c, 4, base=16, bitRange=16-26
233
- sfr = "CKGR_PLLR.USBDIV", "Memory", 0xfffffc2c, 4, base=16, bitRange=28-29
234
- ; ========== Register definition for PMC peripheral ==========
235
- sfr = "PMC_SCER", "Memory", 0xfffffc00, 4, base=16
236
- sfr = "PMC_SCER.PCK", "Memory", 0xfffffc00, 4, base=16, bitRange=0
237
- sfr = "PMC_SCER.UDP", "Memory", 0xfffffc00, 4, base=16, bitRange=7
238
- sfr = "PMC_SCER.PCK0", "Memory", 0xfffffc00, 4, base=16, bitRange=8
239
- sfr = "PMC_SCER.PCK1", "Memory", 0xfffffc00, 4, base=16, bitRange=9
240
- sfr = "PMC_SCER.PCK2", "Memory", 0xfffffc00, 4, base=16, bitRange=10
241
- sfr = "PMC_SCER.PCK3", "Memory", 0xfffffc00, 4, base=16, bitRange=11
242
- sfr = "PMC_SCDR", "Memory", 0xfffffc04, 4, base=16
243
- sfr = "PMC_SCDR.PCK", "Memory", 0xfffffc04, 4, base=16, bitRange=0
244
- sfr = "PMC_SCDR.UDP", "Memory", 0xfffffc04, 4, base=16, bitRange=7
245
- sfr = "PMC_SCDR.PCK0", "Memory", 0xfffffc04, 4, base=16, bitRange=8
246
- sfr = "PMC_SCDR.PCK1", "Memory", 0xfffffc04, 4, base=16, bitRange=9
247
- sfr = "PMC_SCDR.PCK2", "Memory", 0xfffffc04, 4, base=16, bitRange=10
248
- sfr = "PMC_SCDR.PCK3", "Memory", 0xfffffc04, 4, base=16, bitRange=11
249
- sfr = "PMC_SCSR", "Memory", 0xfffffc08, 4, base=16
250
- sfr = "PMC_SCSR.PCK", "Memory", 0xfffffc08, 4, base=16, bitRange=0
251
- sfr = "PMC_SCSR.UDP", "Memory", 0xfffffc08, 4, base=16, bitRange=7
252
- sfr = "PMC_SCSR.PCK0", "Memory", 0xfffffc08, 4, base=16, bitRange=8
253
- sfr = "PMC_SCSR.PCK1", "Memory", 0xfffffc08, 4, base=16, bitRange=9
254
- sfr = "PMC_SCSR.PCK2", "Memory", 0xfffffc08, 4, base=16, bitRange=10
255
- sfr = "PMC_SCSR.PCK3", "Memory", 0xfffffc08, 4, base=16, bitRange=11
256
- sfr = "PMC_PCER", "Memory", 0xfffffc10, 4, base=16
257
- sfr = "PMC_PCDR", "Memory", 0xfffffc14, 4, base=16
258
- sfr = "PMC_PCSR", "Memory", 0xfffffc18, 4, base=16
259
- sfr = "PMC_MOR", "Memory", 0xfffffc20, 4, base=16
260
- sfr = "PMC_MOR.MOSCEN", "Memory", 0xfffffc20, 4, base=16, bitRange=0
261
- sfr = "PMC_MOR.OSCBYPASS", "Memory", 0xfffffc20, 4, base=16, bitRange=1
262
- sfr = "PMC_MOR.OSCOUNT", "Memory", 0xfffffc20, 4, base=16, bitRange=8-15
263
- sfr = "PMC_MCFR", "Memory", 0xfffffc24, 4, base=16
264
- sfr = "PMC_MCFR.MAINF", "Memory", 0xfffffc24, 4, base=16, bitRange=0-15
265
- sfr = "PMC_MCFR.MAINRDY", "Memory", 0xfffffc24, 4, base=16, bitRange=16
266
- sfr = "PMC_PLLR", "Memory", 0xfffffc2c, 4, base=16
267
- sfr = "PMC_PLLR.DIV", "Memory", 0xfffffc2c, 4, base=16, bitRange=0-7
268
- sfr = "PMC_PLLR.PLLCOUNT", "Memory", 0xfffffc2c, 4, base=16, bitRange=8-13
269
- sfr = "PMC_PLLR.OUT", "Memory", 0xfffffc2c, 4, base=16, bitRange=14-15
270
- sfr = "PMC_PLLR.MUL", "Memory", 0xfffffc2c, 4, base=16, bitRange=16-26
271
- sfr = "PMC_PLLR.USBDIV", "Memory", 0xfffffc2c, 4, base=16, bitRange=28-29
272
- sfr = "PMC_MCKR", "Memory", 0xfffffc30, 4, base=16
273
- sfr = "PMC_MCKR.CSS", "Memory", 0xfffffc30, 4, base=16, bitRange=0-1
274
- sfr = "PMC_MCKR.PRES", "Memory", 0xfffffc30, 4, base=16, bitRange=2-4
275
- sfr = "PMC_PCKR", "Memory", 0xfffffc40, 4, base=16
276
- sfr = "PMC_PCKR.CSS", "Memory", 0xfffffc40, 4, base=16, bitRange=0-1
277
- sfr = "PMC_PCKR.PRES", "Memory", 0xfffffc40, 4, base=16, bitRange=2-4
278
- sfr = "PMC_IER", "Memory", 0xfffffc60, 4, base=16
279
- sfr = "PMC_IER.MOSCS", "Memory", 0xfffffc60, 4, base=16, bitRange=0
280
- sfr = "PMC_IER.LOCK", "Memory", 0xfffffc60, 4, base=16, bitRange=2
281
- sfr = "PMC_IER.MCKRDY", "Memory", 0xfffffc60, 4, base=16, bitRange=3
282
- sfr = "PMC_IER.PCK0RDY", "Memory", 0xfffffc60, 4, base=16, bitRange=8
283
- sfr = "PMC_IER.PCK1RDY", "Memory", 0xfffffc60, 4, base=16, bitRange=9
284
- sfr = "PMC_IER.PCK2RDY", "Memory", 0xfffffc60, 4, base=16, bitRange=10
285
- sfr = "PMC_IER.PCK3RDY", "Memory", 0xfffffc60, 4, base=16, bitRange=11
286
- sfr = "PMC_IDR", "Memory", 0xfffffc64, 4, base=16
287
- sfr = "PMC_IDR.MOSCS", "Memory", 0xfffffc64, 4, base=16, bitRange=0
288
- sfr = "PMC_IDR.LOCK", "Memory", 0xfffffc64, 4, base=16, bitRange=2
289
- sfr = "PMC_IDR.MCKRDY", "Memory", 0xfffffc64, 4, base=16, bitRange=3
290
- sfr = "PMC_IDR.PCK0RDY", "Memory", 0xfffffc64, 4, base=16, bitRange=8
291
- sfr = "PMC_IDR.PCK1RDY", "Memory", 0xfffffc64, 4, base=16, bitRange=9
292
- sfr = "PMC_IDR.PCK2RDY", "Memory", 0xfffffc64, 4, base=16, bitRange=10
293
- sfr = "PMC_IDR.PCK3RDY", "Memory", 0xfffffc64, 4, base=16, bitRange=11
294
- sfr = "PMC_SR", "Memory", 0xfffffc68, 4, base=16
295
- sfr = "PMC_SR.MOSCS", "Memory", 0xfffffc68, 4, base=16, bitRange=0
296
- sfr = "PMC_SR.LOCK", "Memory", 0xfffffc68, 4, base=16, bitRange=2
297
- sfr = "PMC_SR.MCKRDY", "Memory", 0xfffffc68, 4, base=16, bitRange=3
298
- sfr = "PMC_SR.PCK0RDY", "Memory", 0xfffffc68, 4, base=16, bitRange=8
299
- sfr = "PMC_SR.PCK1RDY", "Memory", 0xfffffc68, 4, base=16, bitRange=9
300
- sfr = "PMC_SR.PCK2RDY", "Memory", 0xfffffc68, 4, base=16, bitRange=10
301
- sfr = "PMC_SR.PCK3RDY", "Memory", 0xfffffc68, 4, base=16, bitRange=11
302
- sfr = "PMC_IMR", "Memory", 0xfffffc6c, 4, base=16
303
- sfr = "PMC_IMR.MOSCS", "Memory", 0xfffffc6c, 4, base=16, bitRange=0
304
- sfr = "PMC_IMR.LOCK", "Memory", 0xfffffc6c, 4, base=16, bitRange=2
305
- sfr = "PMC_IMR.MCKRDY", "Memory", 0xfffffc6c, 4, base=16, bitRange=3
306
- sfr = "PMC_IMR.PCK0RDY", "Memory", 0xfffffc6c, 4, base=16, bitRange=8
307
- sfr = "PMC_IMR.PCK1RDY", "Memory", 0xfffffc6c, 4, base=16, bitRange=9
308
- sfr = "PMC_IMR.PCK2RDY", "Memory", 0xfffffc6c, 4, base=16, bitRange=10
309
- sfr = "PMC_IMR.PCK3RDY", "Memory", 0xfffffc6c, 4, base=16, bitRange=11
310
- ; ========== Register definition for RSTC peripheral ==========
311
- sfr = "RSTC_RCR", "Memory", 0xfffffd00, 4, base=16
312
- sfr = "RSTC_RCR.PROCRST", "Memory", 0xfffffd00, 4, base=16, bitRange=0
313
- sfr = "RSTC_RCR.PERRST", "Memory", 0xfffffd00, 4, base=16, bitRange=2
314
- sfr = "RSTC_RCR.EXTRST", "Memory", 0xfffffd00, 4, base=16, bitRange=3
315
- sfr = "RSTC_RCR.KEY", "Memory", 0xfffffd00, 4, base=16, bitRange=24-31
316
- sfr = "RSTC_RSR", "Memory", 0xfffffd04, 4, base=16
317
- sfr = "RSTC_RSR.URSTS", "Memory", 0xfffffd04, 4, base=16, bitRange=0
318
- sfr = "RSTC_RSR.BODSTS", "Memory", 0xfffffd04, 4, base=16, bitRange=1
319
- sfr = "RSTC_RSR.RSTTYP", "Memory", 0xfffffd04, 4, base=16, bitRange=8-10
320
- sfr = "RSTC_RSR.NRSTL", "Memory", 0xfffffd04, 4, base=16, bitRange=16
321
- sfr = "RSTC_RSR.SRCMP", "Memory", 0xfffffd04, 4, base=16, bitRange=17
322
- sfr = "RSTC_RMR", "Memory", 0xfffffd08, 4, base=16
323
- sfr = "RSTC_RMR.URSTEN", "Memory", 0xfffffd08, 4, base=16, bitRange=0
324
- sfr = "RSTC_RMR.URSTIEN", "Memory", 0xfffffd08, 4, base=16, bitRange=4
325
- sfr = "RSTC_RMR.ERSTL", "Memory", 0xfffffd08, 4, base=16, bitRange=8-11
326
- sfr = "RSTC_RMR.BODIEN", "Memory", 0xfffffd08, 4, base=16, bitRange=16
327
- sfr = "RSTC_RMR.KEY", "Memory", 0xfffffd08, 4, base=16, bitRange=24-31
328
- ; ========== Register definition for RTTC peripheral ==========
329
- sfr = "RTTC_RTMR", "Memory", 0xfffffd20, 4, base=16
330
- sfr = "RTTC_RTMR.RTPRES", "Memory", 0xfffffd20, 4, base=16, bitRange=0-15
331
- sfr = "RTTC_RTMR.ALMIEN", "Memory", 0xfffffd20, 4, base=16, bitRange=16
332
- sfr = "RTTC_RTMR.RTTINCIEN", "Memory", 0xfffffd20, 4, base=16, bitRange=17
333
- sfr = "RTTC_RTMR.RTTRST", "Memory", 0xfffffd20, 4, base=16, bitRange=18
334
- sfr = "RTTC_RTAR", "Memory", 0xfffffd24, 4, base=16
335
- sfr = "RTTC_RTAR.ALMV", "Memory", 0xfffffd24, 4, base=16, bitRange=0-31
336
- sfr = "RTTC_RTVR", "Memory", 0xfffffd28, 4, base=16
337
- sfr = "RTTC_RTVR.CRTV", "Memory", 0xfffffd28, 4, base=16, bitRange=0-31
338
- sfr = "RTTC_RTSR", "Memory", 0xfffffd2c, 4, base=16
339
- sfr = "RTTC_RTSR.ALMS", "Memory", 0xfffffd2c, 4, base=16, bitRange=0
340
- sfr = "RTTC_RTSR.RTTINC", "Memory", 0xfffffd2c, 4, base=16, bitRange=1
341
- ; ========== Register definition for PITC peripheral ==========
342
- sfr = "PITC_PIMR", "Memory", 0xfffffd30, 4, base=16
343
- sfr = "PITC_PIMR.PIV", "Memory", 0xfffffd30, 4, base=16, bitRange=0-19
344
- sfr = "PITC_PIMR.PITEN", "Memory", 0xfffffd30, 4, base=16, bitRange=24
345
- sfr = "PITC_PIMR.PITIEN", "Memory", 0xfffffd30, 4, base=16, bitRange=25
346
- sfr = "PITC_PISR", "Memory", 0xfffffd34, 4, base=16
347
- sfr = "PITC_PISR.PITS", "Memory", 0xfffffd34, 4, base=16, bitRange=0
348
- sfr = "PITC_PIVR", "Memory", 0xfffffd38, 4, base=16
349
- sfr = "PITC_PIVR.CPIV", "Memory", 0xfffffd38, 4, base=16, bitRange=0-19
350
- sfr = "PITC_PIVR.PICNT", "Memory", 0xfffffd38, 4, base=16, bitRange=20-31
351
- sfr = "PITC_PIIR", "Memory", 0xfffffd3c, 4, base=16
352
- sfr = "PITC_PIIR.CPIV", "Memory", 0xfffffd3c, 4, base=16, bitRange=0-19
353
- sfr = "PITC_PIIR.PICNT", "Memory", 0xfffffd3c, 4, base=16, bitRange=20-31
354
- ; ========== Register definition for WDTC peripheral ==========
355
- sfr = "WDTC_WDCR", "Memory", 0xfffffd40, 4, base=16
356
- sfr = "WDTC_WDCR.WDRSTT", "Memory", 0xfffffd40, 4, base=16, bitRange=0
357
- sfr = "WDTC_WDCR.KEY", "Memory", 0xfffffd40, 4, base=16, bitRange=24-31
358
- sfr = "WDTC_WDMR", "Memory", 0xfffffd44, 4, base=16
359
- sfr = "WDTC_WDMR.WDV", "Memory", 0xfffffd44, 4, base=16, bitRange=0-11
360
- sfr = "WDTC_WDMR.WDFIEN", "Memory", 0xfffffd44, 4, base=16, bitRange=12
361
- sfr = "WDTC_WDMR.WDRSTEN", "Memory", 0xfffffd44, 4, base=16, bitRange=13
362
- sfr = "WDTC_WDMR.WDRPROC", "Memory", 0xfffffd44, 4, base=16, bitRange=14
363
- sfr = "WDTC_WDMR.WDDIS", "Memory", 0xfffffd44, 4, base=16, bitRange=15
364
- sfr = "WDTC_WDMR.WDD", "Memory", 0xfffffd44, 4, base=16, bitRange=16-27
365
- sfr = "WDTC_WDMR.WDDBGHLT", "Memory", 0xfffffd44, 4, base=16, bitRange=28
366
- sfr = "WDTC_WDMR.WDIDLEHLT", "Memory", 0xfffffd44, 4, base=16, bitRange=29
367
- sfr = "WDTC_WDSR", "Memory", 0xfffffd48, 4, base=16
368
- sfr = "WDTC_WDSR.WDUNF", "Memory", 0xfffffd48, 4, base=16, bitRange=0
369
- sfr = "WDTC_WDSR.WDERR", "Memory", 0xfffffd48, 4, base=16, bitRange=1
370
- ; ========== Register definition for VREG peripheral ==========
371
- sfr = "VREG_MR", "Memory", 0xfffffd60, 4, base=16
372
- sfr = "VREG_MR.PSTDBY", "Memory", 0xfffffd60, 4, base=16, bitRange=0
373
- ; ========== Register definition for MC peripheral ==========
374
- sfr = "MC_RCR", "Memory", 0xffffff00, 4, base=16
375
- sfr = "MC_RCR.RCB", "Memory", 0xffffff00, 4, base=16, bitRange=0
376
- sfr = "MC_ASR", "Memory", 0xffffff04, 4, base=16
377
- sfr = "MC_ASR.UNDADD", "Memory", 0xffffff04, 4, base=16, bitRange=0
378
- sfr = "MC_ASR.MISADD", "Memory", 0xffffff04, 4, base=16, bitRange=1
379
- sfr = "MC_ASR.ABTSZ", "Memory", 0xffffff04, 4, base=16, bitRange=8-9
380
- sfr = "MC_ASR.ABTTYP", "Memory", 0xffffff04, 4, base=16, bitRange=10-11
381
- sfr = "MC_ASR.MST0", "Memory", 0xffffff04, 4, base=16, bitRange=16
382
- sfr = "MC_ASR.MST1", "Memory", 0xffffff04, 4, base=16, bitRange=17
383
- sfr = "MC_ASR.SVMST0", "Memory", 0xffffff04, 4, base=16, bitRange=24
384
- sfr = "MC_ASR.SVMST1", "Memory", 0xffffff04, 4, base=16, bitRange=25
385
- sfr = "MC_AASR", "Memory", 0xffffff08, 4, base=16
386
- sfr = "MC_FMR", "Memory", 0xffffff60, 4, base=16
387
- sfr = "MC_FMR.FRDY", "Memory", 0xffffff60, 4, base=16, bitRange=0
388
- sfr = "MC_FMR.LOCKE", "Memory", 0xffffff60, 4, base=16, bitRange=2
389
- sfr = "MC_FMR.PROGE", "Memory", 0xffffff60, 4, base=16, bitRange=3
390
- sfr = "MC_FMR.NEBP", "Memory", 0xffffff60, 4, base=16, bitRange=7
391
- sfr = "MC_FMR.FWS", "Memory", 0xffffff60, 4, base=16, bitRange=8-9
392
- sfr = "MC_FMR.FMCN", "Memory", 0xffffff60, 4, base=16, bitRange=16-23
393
- sfr = "MC_FCR", "Memory", 0xffffff64, 4, base=16
394
- sfr = "MC_FCR.FCMD", "Memory", 0xffffff64, 4, base=16, bitRange=0-3
395
- sfr = "MC_FCR.PAGEN", "Memory", 0xffffff64, 4, base=16, bitRange=8-17
396
- sfr = "MC_FCR.KEY", "Memory", 0xffffff64, 4, base=16, bitRange=24-31
397
- sfr = "MC_FSR", "Memory", 0xffffff68, 4, base=16
398
- sfr = "MC_FSR.FRDY", "Memory", 0xffffff68, 4, base=16, bitRange=0
399
- sfr = "MC_FSR.LOCKE", "Memory", 0xffffff68, 4, base=16, bitRange=2
400
- sfr = "MC_FSR.PROGE", "Memory", 0xffffff68, 4, base=16, bitRange=3
401
- sfr = "MC_FSR.SECURITY", "Memory", 0xffffff68, 4, base=16, bitRange=4
402
- sfr = "MC_FSR.GPNVM0", "Memory", 0xffffff68, 4, base=16, bitRange=8
403
- sfr = "MC_FSR.GPNVM1", "Memory", 0xffffff68, 4, base=16, bitRange=9
404
- sfr = "MC_FSR.GPNVM2", "Memory", 0xffffff68, 4, base=16, bitRange=10
405
- sfr = "MC_FSR.GPNVM3", "Memory", 0xffffff68, 4, base=16, bitRange=11
406
- sfr = "MC_FSR.GPNVM4", "Memory", 0xffffff68, 4, base=16, bitRange=12
407
- sfr = "MC_FSR.GPNVM5", "Memory", 0xffffff68, 4, base=16, bitRange=13
408
- sfr = "MC_FSR.GPNVM6", "Memory", 0xffffff68, 4, base=16, bitRange=14
409
- sfr = "MC_FSR.GPNVM7", "Memory", 0xffffff68, 4, base=16, bitRange=15
410
- sfr = "MC_FSR.LOCKS0", "Memory", 0xffffff68, 4, base=16, bitRange=16
411
- sfr = "MC_FSR.LOCKS1", "Memory", 0xffffff68, 4, base=16, bitRange=17
412
- sfr = "MC_FSR.LOCKS2", "Memory", 0xffffff68, 4, base=16, bitRange=18
413
- sfr = "MC_FSR.LOCKS3", "Memory", 0xffffff68, 4, base=16, bitRange=19
414
- sfr = "MC_FSR.LOCKS4", "Memory", 0xffffff68, 4, base=16, bitRange=20
415
- sfr = "MC_FSR.LOCKS5", "Memory", 0xffffff68, 4, base=16, bitRange=21
416
- sfr = "MC_FSR.LOCKS6", "Memory", 0xffffff68, 4, base=16, bitRange=22
417
- sfr = "MC_FSR.LOCKS7", "Memory", 0xffffff68, 4, base=16, bitRange=23
418
- sfr = "MC_FSR.LOCKS8", "Memory", 0xffffff68, 4, base=16, bitRange=24
419
- sfr = "MC_FSR.LOCKS9", "Memory", 0xffffff68, 4, base=16, bitRange=25
420
- sfr = "MC_FSR.LOCKS10", "Memory", 0xffffff68, 4, base=16, bitRange=26
421
- sfr = "MC_FSR.LOCKS11", "Memory", 0xffffff68, 4, base=16, bitRange=27
422
- sfr = "MC_FSR.LOCKS12", "Memory", 0xffffff68, 4, base=16, bitRange=28
423
- sfr = "MC_FSR.LOCKS13", "Memory", 0xffffff68, 4, base=16, bitRange=29
424
- sfr = "MC_FSR.LOCKS14", "Memory", 0xffffff68, 4, base=16, bitRange=30
425
- sfr = "MC_FSR.LOCKS15", "Memory", 0xffffff68, 4, base=16, bitRange=31
426
- ; ========== Register definition for PDC_SPI1 peripheral ==========
427
- sfr = "SPI1_RPR", "Memory", 0xfffe4100, 4, base=16
428
- sfr = "SPI1_RCR", "Memory", 0xfffe4104, 4, base=16
429
- sfr = "SPI1_TPR", "Memory", 0xfffe4108, 4, base=16
430
- sfr = "SPI1_TCR", "Memory", 0xfffe410c, 4, base=16
431
- sfr = "SPI1_RNPR", "Memory", 0xfffe4110, 4, base=16
432
- sfr = "SPI1_RNCR", "Memory", 0xfffe4114, 4, base=16
433
- sfr = "SPI1_TNPR", "Memory", 0xfffe4118, 4, base=16
434
- sfr = "SPI1_TNCR", "Memory", 0xfffe411c, 4, base=16
435
- sfr = "SPI1_PTCR", "Memory", 0xfffe4120, 4, base=16
436
- sfr = "SPI1_PTCR.RXTEN", "Memory", 0xfffe4120, 4, base=16, bitRange=0
437
- sfr = "SPI1_PTCR.RXTDIS", "Memory", 0xfffe4120, 4, base=16, bitRange=1
438
- sfr = "SPI1_PTCR.TXTEN", "Memory", 0xfffe4120, 4, base=16, bitRange=8
439
- sfr = "SPI1_PTCR.TXTDIS", "Memory", 0xfffe4120, 4, base=16, bitRange=9
440
- sfr = "SPI1_PTSR", "Memory", 0xfffe4124, 4, base=16
441
- sfr = "SPI1_PTSR.RXTEN", "Memory", 0xfffe4124, 4, base=16, bitRange=0
442
- sfr = "SPI1_PTSR.TXTEN", "Memory", 0xfffe4124, 4, base=16, bitRange=8
443
- ; ========== Register definition for SPI1 peripheral ==========
444
- sfr = "SPI1_CR", "Memory", 0xfffe4000, 4, base=16
445
- sfr = "SPI1_CR.SPIEN", "Memory", 0xfffe4000, 4, base=16, bitRange=0
446
- sfr = "SPI1_CR.SPIDIS", "Memory", 0xfffe4000, 4, base=16, bitRange=1
447
- sfr = "SPI1_CR.SWRST", "Memory", 0xfffe4000, 4, base=16, bitRange=7
448
- sfr = "SPI1_CR.LASTXFER", "Memory", 0xfffe4000, 4, base=16, bitRange=24
449
- sfr = "SPI1_MR", "Memory", 0xfffe4004, 4, base=16
450
- sfr = "SPI1_MR.MSTR", "Memory", 0xfffe4004, 4, base=16, bitRange=0
451
- sfr = "SPI1_MR.PS", "Memory", 0xfffe4004, 4, base=16, bitRange=1
452
- sfr = "SPI1_MR.PCSDEC", "Memory", 0xfffe4004, 4, base=16, bitRange=2
453
- sfr = "SPI1_MR.FDIV", "Memory", 0xfffe4004, 4, base=16, bitRange=3
454
- sfr = "SPI1_MR.MODFDIS", "Memory", 0xfffe4004, 4, base=16, bitRange=4
455
- sfr = "SPI1_MR.LLB", "Memory", 0xfffe4004, 4, base=16, bitRange=7
456
- sfr = "SPI1_MR.PCS", "Memory", 0xfffe4004, 4, base=16, bitRange=16-19
457
- sfr = "SPI1_MR.DLYBCS", "Memory", 0xfffe4004, 4, base=16, bitRange=24-31
458
- sfr = "SPI1_RDR", "Memory", 0xfffe4008, 4, base=16
459
- sfr = "SPI1_RDR.RD", "Memory", 0xfffe4008, 4, base=16, bitRange=0-15
460
- sfr = "SPI1_RDR.RPCS", "Memory", 0xfffe4008, 4, base=16, bitRange=16-19
461
- sfr = "SPI1_TDR", "Memory", 0xfffe400c, 4, base=16
462
- sfr = "SPI1_TDR.TD", "Memory", 0xfffe400c, 4, base=16, bitRange=0-15
463
- sfr = "SPI1_TDR.TPCS", "Memory", 0xfffe400c, 4, base=16, bitRange=16-19
464
- sfr = "SPI1_TDR.LASTXFER", "Memory", 0xfffe400c, 4, base=16, bitRange=24
465
- sfr = "SPI1_SR", "Memory", 0xfffe4010, 4, base=16
466
- sfr = "SPI1_SR.RDRF", "Memory", 0xfffe4010, 4, base=16, bitRange=0
467
- sfr = "SPI1_SR.TDRE", "Memory", 0xfffe4010, 4, base=16, bitRange=1
468
- sfr = "SPI1_SR.MODF", "Memory", 0xfffe4010, 4, base=16, bitRange=2
469
- sfr = "SPI1_SR.OVRES", "Memory", 0xfffe4010, 4, base=16, bitRange=3
470
- sfr = "SPI1_SR.ENDRX", "Memory", 0xfffe4010, 4, base=16, bitRange=4
471
- sfr = "SPI1_SR.ENDTX", "Memory", 0xfffe4010, 4, base=16, bitRange=5
472
- sfr = "SPI1_SR.RXBUFF", "Memory", 0xfffe4010, 4, base=16, bitRange=6
473
- sfr = "SPI1_SR.TXBUFE", "Memory", 0xfffe4010, 4, base=16, bitRange=7
474
- sfr = "SPI1_SR.NSSR", "Memory", 0xfffe4010, 4, base=16, bitRange=8
475
- sfr = "SPI1_SR.TXEMPTY", "Memory", 0xfffe4010, 4, base=16, bitRange=9
476
- sfr = "SPI1_SR.SPIENS", "Memory", 0xfffe4010, 4, base=16, bitRange=16
477
- sfr = "SPI1_IER", "Memory", 0xfffe4014, 4, base=16
478
- sfr = "SPI1_IER.RDRF", "Memory", 0xfffe4014, 4, base=16, bitRange=0
479
- sfr = "SPI1_IER.TDRE", "Memory", 0xfffe4014, 4, base=16, bitRange=1
480
- sfr = "SPI1_IER.MODF", "Memory", 0xfffe4014, 4, base=16, bitRange=2
481
- sfr = "SPI1_IER.OVRES", "Memory", 0xfffe4014, 4, base=16, bitRange=3
482
- sfr = "SPI1_IER.ENDRX", "Memory", 0xfffe4014, 4, base=16, bitRange=4
483
- sfr = "SPI1_IER.ENDTX", "Memory", 0xfffe4014, 4, base=16, bitRange=5
484
- sfr = "SPI1_IER.RXBUFF", "Memory", 0xfffe4014, 4, base=16, bitRange=6
485
- sfr = "SPI1_IER.TXBUFE", "Memory", 0xfffe4014, 4, base=16, bitRange=7
486
- sfr = "SPI1_IER.NSSR", "Memory", 0xfffe4014, 4, base=16, bitRange=8
487
- sfr = "SPI1_IER.TXEMPTY", "Memory", 0xfffe4014, 4, base=16, bitRange=9
488
- sfr = "SPI1_IDR", "Memory", 0xfffe4018, 4, base=16
489
- sfr = "SPI1_IDR.RDRF", "Memory", 0xfffe4018, 4, base=16, bitRange=0
490
- sfr = "SPI1_IDR.TDRE", "Memory", 0xfffe4018, 4, base=16, bitRange=1
491
- sfr = "SPI1_IDR.MODF", "Memory", 0xfffe4018, 4, base=16, bitRange=2
492
- sfr = "SPI1_IDR.OVRES", "Memory", 0xfffe4018, 4, base=16, bitRange=3
493
- sfr = "SPI1_IDR.ENDRX", "Memory", 0xfffe4018, 4, base=16, bitRange=4
494
- sfr = "SPI1_IDR.ENDTX", "Memory", 0xfffe4018, 4, base=16, bitRange=5
495
- sfr = "SPI1_IDR.RXBUFF", "Memory", 0xfffe4018, 4, base=16, bitRange=6
496
- sfr = "SPI1_IDR.TXBUFE", "Memory", 0xfffe4018, 4, base=16, bitRange=7
497
- sfr = "SPI1_IDR.NSSR", "Memory", 0xfffe4018, 4, base=16, bitRange=8
498
- sfr = "SPI1_IDR.TXEMPTY", "Memory", 0xfffe4018, 4, base=16, bitRange=9
499
- sfr = "SPI1_IMR", "Memory", 0xfffe401c, 4, base=16
500
- sfr = "SPI1_IMR.RDRF", "Memory", 0xfffe401c, 4, base=16, bitRange=0
501
- sfr = "SPI1_IMR.TDRE", "Memory", 0xfffe401c, 4, base=16, bitRange=1
502
- sfr = "SPI1_IMR.MODF", "Memory", 0xfffe401c, 4, base=16, bitRange=2
503
- sfr = "SPI1_IMR.OVRES", "Memory", 0xfffe401c, 4, base=16, bitRange=3
504
- sfr = "SPI1_IMR.ENDRX", "Memory", 0xfffe401c, 4, base=16, bitRange=4
505
- sfr = "SPI1_IMR.ENDTX", "Memory", 0xfffe401c, 4, base=16, bitRange=5
506
- sfr = "SPI1_IMR.RXBUFF", "Memory", 0xfffe401c, 4, base=16, bitRange=6
507
- sfr = "SPI1_IMR.TXBUFE", "Memory", 0xfffe401c, 4, base=16, bitRange=7
508
- sfr = "SPI1_IMR.NSSR", "Memory", 0xfffe401c, 4, base=16, bitRange=8
509
- sfr = "SPI1_IMR.TXEMPTY", "Memory", 0xfffe401c, 4, base=16, bitRange=9
510
- sfr = "SPI1_CSR", "Memory", 0xfffe4030, 4, base=16
511
- sfr = "SPI1_CSR.CPOL", "Memory", 0xfffe4030, 4, base=16, bitRange=0
512
- sfr = "SPI1_CSR.NCPHA", "Memory", 0xfffe4030, 4, base=16, bitRange=1
513
- sfr = "SPI1_CSR.CSAAT", "Memory", 0xfffe4030, 4, base=16, bitRange=3
514
- sfr = "SPI1_CSR.BITS", "Memory", 0xfffe4030, 4, base=16, bitRange=4-7
515
- sfr = "SPI1_CSR.SCBR", "Memory", 0xfffe4030, 4, base=16, bitRange=8-15
516
- sfr = "SPI1_CSR.DLYBS", "Memory", 0xfffe4030, 4, base=16, bitRange=16-23
517
- sfr = "SPI1_CSR.DLYBCT", "Memory", 0xfffe4030, 4, base=16, bitRange=24-31
518
- ; ========== Register definition for PDC_SPI0 peripheral ==========
519
- sfr = "SPI0_RPR", "Memory", 0xfffe0100, 4, base=16
520
- sfr = "SPI0_RCR", "Memory", 0xfffe0104, 4, base=16
521
- sfr = "SPI0_TPR", "Memory", 0xfffe0108, 4, base=16
522
- sfr = "SPI0_TCR", "Memory", 0xfffe010c, 4, base=16
523
- sfr = "SPI0_RNPR", "Memory", 0xfffe0110, 4, base=16
524
- sfr = "SPI0_RNCR", "Memory", 0xfffe0114, 4, base=16
525
- sfr = "SPI0_TNPR", "Memory", 0xfffe0118, 4, base=16
526
- sfr = "SPI0_TNCR", "Memory", 0xfffe011c, 4, base=16
527
- sfr = "SPI0_PTCR", "Memory", 0xfffe0120, 4, base=16
528
- sfr = "SPI0_PTCR.RXTEN", "Memory", 0xfffe0120, 4, base=16, bitRange=0
529
- sfr = "SPI0_PTCR.RXTDIS", "Memory", 0xfffe0120, 4, base=16, bitRange=1
530
- sfr = "SPI0_PTCR.TXTEN", "Memory", 0xfffe0120, 4, base=16, bitRange=8
531
- sfr = "SPI0_PTCR.TXTDIS", "Memory", 0xfffe0120, 4, base=16, bitRange=9
532
- sfr = "SPI0_PTSR", "Memory", 0xfffe0124, 4, base=16
533
- sfr = "SPI0_PTSR.RXTEN", "Memory", 0xfffe0124, 4, base=16, bitRange=0
534
- sfr = "SPI0_PTSR.TXTEN", "Memory", 0xfffe0124, 4, base=16, bitRange=8
535
- ; ========== Register definition for SPI0 peripheral ==========
536
- sfr = "SPI0_CR", "Memory", 0xfffe0000, 4, base=16
537
- sfr = "SPI0_CR.SPIEN", "Memory", 0xfffe0000, 4, base=16, bitRange=0
538
- sfr = "SPI0_CR.SPIDIS", "Memory", 0xfffe0000, 4, base=16, bitRange=1
539
- sfr = "SPI0_CR.SWRST", "Memory", 0xfffe0000, 4, base=16, bitRange=7
540
- sfr = "SPI0_CR.LASTXFER", "Memory", 0xfffe0000, 4, base=16, bitRange=24
541
- sfr = "SPI0_MR", "Memory", 0xfffe0004, 4, base=16
542
- sfr = "SPI0_MR.MSTR", "Memory", 0xfffe0004, 4, base=16, bitRange=0
543
- sfr = "SPI0_MR.PS", "Memory", 0xfffe0004, 4, base=16, bitRange=1
544
- sfr = "SPI0_MR.PCSDEC", "Memory", 0xfffe0004, 4, base=16, bitRange=2
545
- sfr = "SPI0_MR.FDIV", "Memory", 0xfffe0004, 4, base=16, bitRange=3
546
- sfr = "SPI0_MR.MODFDIS", "Memory", 0xfffe0004, 4, base=16, bitRange=4
547
- sfr = "SPI0_MR.LLB", "Memory", 0xfffe0004, 4, base=16, bitRange=7
548
- sfr = "SPI0_MR.PCS", "Memory", 0xfffe0004, 4, base=16, bitRange=16-19
549
- sfr = "SPI0_MR.DLYBCS", "Memory", 0xfffe0004, 4, base=16, bitRange=24-31
550
- sfr = "SPI0_RDR", "Memory", 0xfffe0008, 4, base=16
551
- sfr = "SPI0_RDR.RD", "Memory", 0xfffe0008, 4, base=16, bitRange=0-15
552
- sfr = "SPI0_RDR.RPCS", "Memory", 0xfffe0008, 4, base=16, bitRange=16-19
553
- sfr = "SPI0_TDR", "Memory", 0xfffe000c, 4, base=16
554
- sfr = "SPI0_TDR.TD", "Memory", 0xfffe000c, 4, base=16, bitRange=0-15
555
- sfr = "SPI0_TDR.TPCS", "Memory", 0xfffe000c, 4, base=16, bitRange=16-19
556
- sfr = "SPI0_TDR.LASTXFER", "Memory", 0xfffe000c, 4, base=16, bitRange=24
557
- sfr = "SPI0_SR", "Memory", 0xfffe0010, 4, base=16
558
- sfr = "SPI0_SR.RDRF", "Memory", 0xfffe0010, 4, base=16, bitRange=0
559
- sfr = "SPI0_SR.TDRE", "Memory", 0xfffe0010, 4, base=16, bitRange=1
560
- sfr = "SPI0_SR.MODF", "Memory", 0xfffe0010, 4, base=16, bitRange=2
561
- sfr = "SPI0_SR.OVRES", "Memory", 0xfffe0010, 4, base=16, bitRange=3
562
- sfr = "SPI0_SR.ENDRX", "Memory", 0xfffe0010, 4, base=16, bitRange=4
563
- sfr = "SPI0_SR.ENDTX", "Memory", 0xfffe0010, 4, base=16, bitRange=5
564
- sfr = "SPI0_SR.RXBUFF", "Memory", 0xfffe0010, 4, base=16, bitRange=6
565
- sfr = "SPI0_SR.TXBUFE", "Memory", 0xfffe0010, 4, base=16, bitRange=7
566
- sfr = "SPI0_SR.NSSR", "Memory", 0xfffe0010, 4, base=16, bitRange=8
567
- sfr = "SPI0_SR.TXEMPTY", "Memory", 0xfffe0010, 4, base=16, bitRange=9
568
- sfr = "SPI0_SR.SPIENS", "Memory", 0xfffe0010, 4, base=16, bitRange=16
569
- sfr = "SPI0_IER", "Memory", 0xfffe0014, 4, base=16
570
- sfr = "SPI0_IER.RDRF", "Memory", 0xfffe0014, 4, base=16, bitRange=0
571
- sfr = "SPI0_IER.TDRE", "Memory", 0xfffe0014, 4, base=16, bitRange=1
572
- sfr = "SPI0_IER.MODF", "Memory", 0xfffe0014, 4, base=16, bitRange=2
573
- sfr = "SPI0_IER.OVRES", "Memory", 0xfffe0014, 4, base=16, bitRange=3
574
- sfr = "SPI0_IER.ENDRX", "Memory", 0xfffe0014, 4, base=16, bitRange=4
575
- sfr = "SPI0_IER.ENDTX", "Memory", 0xfffe0014, 4, base=16, bitRange=5
576
- sfr = "SPI0_IER.RXBUFF", "Memory", 0xfffe0014, 4, base=16, bitRange=6
577
- sfr = "SPI0_IER.TXBUFE", "Memory", 0xfffe0014, 4, base=16, bitRange=7
578
- sfr = "SPI0_IER.NSSR", "Memory", 0xfffe0014, 4, base=16, bitRange=8
579
- sfr = "SPI0_IER.TXEMPTY", "Memory", 0xfffe0014, 4, base=16, bitRange=9
580
- sfr = "SPI0_IDR", "Memory", 0xfffe0018, 4, base=16
581
- sfr = "SPI0_IDR.RDRF", "Memory", 0xfffe0018, 4, base=16, bitRange=0
582
- sfr = "SPI0_IDR.TDRE", "Memory", 0xfffe0018, 4, base=16, bitRange=1
583
- sfr = "SPI0_IDR.MODF", "Memory", 0xfffe0018, 4, base=16, bitRange=2
584
- sfr = "SPI0_IDR.OVRES", "Memory", 0xfffe0018, 4, base=16, bitRange=3
585
- sfr = "SPI0_IDR.ENDRX", "Memory", 0xfffe0018, 4, base=16, bitRange=4
586
- sfr = "SPI0_IDR.ENDTX", "Memory", 0xfffe0018, 4, base=16, bitRange=5
587
- sfr = "SPI0_IDR.RXBUFF", "Memory", 0xfffe0018, 4, base=16, bitRange=6
588
- sfr = "SPI0_IDR.TXBUFE", "Memory", 0xfffe0018, 4, base=16, bitRange=7
589
- sfr = "SPI0_IDR.NSSR", "Memory", 0xfffe0018, 4, base=16, bitRange=8
590
- sfr = "SPI0_IDR.TXEMPTY", "Memory", 0xfffe0018, 4, base=16, bitRange=9
591
- sfr = "SPI0_IMR", "Memory", 0xfffe001c, 4, base=16
592
- sfr = "SPI0_IMR.RDRF", "Memory", 0xfffe001c, 4, base=16, bitRange=0
593
- sfr = "SPI0_IMR.TDRE", "Memory", 0xfffe001c, 4, base=16, bitRange=1
594
- sfr = "SPI0_IMR.MODF", "Memory", 0xfffe001c, 4, base=16, bitRange=2
595
- sfr = "SPI0_IMR.OVRES", "Memory", 0xfffe001c, 4, base=16, bitRange=3
596
- sfr = "SPI0_IMR.ENDRX", "Memory", 0xfffe001c, 4, base=16, bitRange=4
597
- sfr = "SPI0_IMR.ENDTX", "Memory", 0xfffe001c, 4, base=16, bitRange=5
598
- sfr = "SPI0_IMR.RXBUFF", "Memory", 0xfffe001c, 4, base=16, bitRange=6
599
- sfr = "SPI0_IMR.TXBUFE", "Memory", 0xfffe001c, 4, base=16, bitRange=7
600
- sfr = "SPI0_IMR.NSSR", "Memory", 0xfffe001c, 4, base=16, bitRange=8
601
- sfr = "SPI0_IMR.TXEMPTY", "Memory", 0xfffe001c, 4, base=16, bitRange=9
602
- sfr = "SPI0_CSR", "Memory", 0xfffe0030, 4, base=16
603
- sfr = "SPI0_CSR.CPOL", "Memory", 0xfffe0030, 4, base=16, bitRange=0
604
- sfr = "SPI0_CSR.NCPHA", "Memory", 0xfffe0030, 4, base=16, bitRange=1
605
- sfr = "SPI0_CSR.CSAAT", "Memory", 0xfffe0030, 4, base=16, bitRange=3
606
- sfr = "SPI0_CSR.BITS", "Memory", 0xfffe0030, 4, base=16, bitRange=4-7
607
- sfr = "SPI0_CSR.SCBR", "Memory", 0xfffe0030, 4, base=16, bitRange=8-15
608
- sfr = "SPI0_CSR.DLYBS", "Memory", 0xfffe0030, 4, base=16, bitRange=16-23
609
- sfr = "SPI0_CSR.DLYBCT", "Memory", 0xfffe0030, 4, base=16, bitRange=24-31
610
- ; ========== Register definition for PDC_US1 peripheral ==========
611
- sfr = "US1_RPR", "Memory", 0xfffc4100, 4, base=16
612
- sfr = "US1_RCR", "Memory", 0xfffc4104, 4, base=16
613
- sfr = "US1_TPR", "Memory", 0xfffc4108, 4, base=16
614
- sfr = "US1_TCR", "Memory", 0xfffc410c, 4, base=16
615
- sfr = "US1_RNPR", "Memory", 0xfffc4110, 4, base=16
616
- sfr = "US1_RNCR", "Memory", 0xfffc4114, 4, base=16
617
- sfr = "US1_TNPR", "Memory", 0xfffc4118, 4, base=16
618
- sfr = "US1_TNCR", "Memory", 0xfffc411c, 4, base=16
619
- sfr = "US1_PTCR", "Memory", 0xfffc4120, 4, base=16
620
- sfr = "US1_PTCR.RXTEN", "Memory", 0xfffc4120, 4, base=16, bitRange=0
621
- sfr = "US1_PTCR.RXTDIS", "Memory", 0xfffc4120, 4, base=16, bitRange=1
622
- sfr = "US1_PTCR.TXTEN", "Memory", 0xfffc4120, 4, base=16, bitRange=8
623
- sfr = "US1_PTCR.TXTDIS", "Memory", 0xfffc4120, 4, base=16, bitRange=9
624
- sfr = "US1_PTSR", "Memory", 0xfffc4124, 4, base=16
625
- sfr = "US1_PTSR.RXTEN", "Memory", 0xfffc4124, 4, base=16, bitRange=0
626
- sfr = "US1_PTSR.TXTEN", "Memory", 0xfffc4124, 4, base=16, bitRange=8
627
- ; ========== Register definition for US1 peripheral ==========
628
- sfr = "US1_CR", "Memory", 0xfffc4000, 4, base=16
629
- sfr = "US1_CR.RSTRX", "Memory", 0xfffc4000, 4, base=16, bitRange=2
630
- sfr = "US1_CR.RSTTX", "Memory", 0xfffc4000, 4, base=16, bitRange=3
631
- sfr = "US1_CR.RXEN", "Memory", 0xfffc4000, 4, base=16, bitRange=4
632
- sfr = "US1_CR.RXDIS", "Memory", 0xfffc4000, 4, base=16, bitRange=5
633
- sfr = "US1_CR.TXEN", "Memory", 0xfffc4000, 4, base=16, bitRange=6
634
- sfr = "US1_CR.TXDIS", "Memory", 0xfffc4000, 4, base=16, bitRange=7
635
- sfr = "US1_CR.RSTSTA", "Memory", 0xfffc4000, 4, base=16, bitRange=8
636
- sfr = "US1_CR.STTBRK", "Memory", 0xfffc4000, 4, base=16, bitRange=9
637
- sfr = "US1_CR.STPBRK", "Memory", 0xfffc4000, 4, base=16, bitRange=10
638
- sfr = "US1_CR.STTTO", "Memory", 0xfffc4000, 4, base=16, bitRange=11
639
- sfr = "US1_CR.SENDA", "Memory", 0xfffc4000, 4, base=16, bitRange=12
640
- sfr = "US1_CR.RSTIT", "Memory", 0xfffc4000, 4, base=16, bitRange=13
641
- sfr = "US1_CR.RSTNACK", "Memory", 0xfffc4000, 4, base=16, bitRange=14
642
- sfr = "US1_CR.RETTO", "Memory", 0xfffc4000, 4, base=16, bitRange=15
643
- sfr = "US1_CR.DTREN", "Memory", 0xfffc4000, 4, base=16, bitRange=16
644
- sfr = "US1_CR.DTRDIS", "Memory", 0xfffc4000, 4, base=16, bitRange=17
645
- sfr = "US1_CR.RTSEN", "Memory", 0xfffc4000, 4, base=16, bitRange=18
646
- sfr = "US1_CR.RTSDIS", "Memory", 0xfffc4000, 4, base=16, bitRange=19
647
- sfr = "US1_MR", "Memory", 0xfffc4004, 4, base=16
648
- sfr = "US1_MR.USMODE", "Memory", 0xfffc4004, 4, base=16, bitRange=0-3
649
- sfr = "US1_MR.CLKS", "Memory", 0xfffc4004, 4, base=16, bitRange=4-5
650
- sfr = "US1_MR.CHRL", "Memory", 0xfffc4004, 4, base=16, bitRange=6-7
651
- sfr = "US1_MR.SYNC", "Memory", 0xfffc4004, 4, base=16, bitRange=8
652
- sfr = "US1_MR.PAR", "Memory", 0xfffc4004, 4, base=16, bitRange=9-11
653
- sfr = "US1_MR.NBSTOP", "Memory", 0xfffc4004, 4, base=16, bitRange=12-13
654
- sfr = "US1_MR.CHMODE", "Memory", 0xfffc4004, 4, base=16, bitRange=14-15
655
- sfr = "US1_MR.MSBF", "Memory", 0xfffc4004, 4, base=16, bitRange=16
656
- sfr = "US1_MR.MODE9", "Memory", 0xfffc4004, 4, base=16, bitRange=17
657
- sfr = "US1_MR.CKLO", "Memory", 0xfffc4004, 4, base=16, bitRange=18
658
- sfr = "US1_MR.OVER", "Memory", 0xfffc4004, 4, base=16, bitRange=19
659
- sfr = "US1_MR.INACK", "Memory", 0xfffc4004, 4, base=16, bitRange=20
660
- sfr = "US1_MR.DSNACK", "Memory", 0xfffc4004, 4, base=16, bitRange=21
661
- sfr = "US1_MR.ITER", "Memory", 0xfffc4004, 4, base=16, bitRange=24
662
- sfr = "US1_MR.FILTER", "Memory", 0xfffc4004, 4, base=16, bitRange=28
663
- sfr = "US1_IER", "Memory", 0xfffc4008, 4, base=16
664
- sfr = "US1_IER.RXRDY", "Memory", 0xfffc4008, 4, base=16, bitRange=0
665
- sfr = "US1_IER.TXRDY", "Memory", 0xfffc4008, 4, base=16, bitRange=1
666
- sfr = "US1_IER.RXBRK", "Memory", 0xfffc4008, 4, base=16, bitRange=2
667
- sfr = "US1_IER.ENDRX", "Memory", 0xfffc4008, 4, base=16, bitRange=3
668
- sfr = "US1_IER.ENDTX", "Memory", 0xfffc4008, 4, base=16, bitRange=4
669
- sfr = "US1_IER.OVRE", "Memory", 0xfffc4008, 4, base=16, bitRange=5
670
- sfr = "US1_IER.FRAME", "Memory", 0xfffc4008, 4, base=16, bitRange=6
671
- sfr = "US1_IER.PARE", "Memory", 0xfffc4008, 4, base=16, bitRange=7
672
- sfr = "US1_IER.TIMEOUT", "Memory", 0xfffc4008, 4, base=16, bitRange=8
673
- sfr = "US1_IER.TXEMPTY", "Memory", 0xfffc4008, 4, base=16, bitRange=9
674
- sfr = "US1_IER.ITERATION", "Memory", 0xfffc4008, 4, base=16, bitRange=10
675
- sfr = "US1_IER.TXBUFE", "Memory", 0xfffc4008, 4, base=16, bitRange=11
676
- sfr = "US1_IER.RXBUFF", "Memory", 0xfffc4008, 4, base=16, bitRange=12
677
- sfr = "US1_IER.NACK", "Memory", 0xfffc4008, 4, base=16, bitRange=13
678
- sfr = "US1_IER.RIIC", "Memory", 0xfffc4008, 4, base=16, bitRange=16
679
- sfr = "US1_IER.DSRIC", "Memory", 0xfffc4008, 4, base=16, bitRange=17
680
- sfr = "US1_IER.DCDIC", "Memory", 0xfffc4008, 4, base=16, bitRange=18
681
- sfr = "US1_IER.CTSIC", "Memory", 0xfffc4008, 4, base=16, bitRange=19
682
- sfr = "US1_IDR", "Memory", 0xfffc400c, 4, base=16
683
- sfr = "US1_IDR.RXRDY", "Memory", 0xfffc400c, 4, base=16, bitRange=0
684
- sfr = "US1_IDR.TXRDY", "Memory", 0xfffc400c, 4, base=16, bitRange=1
685
- sfr = "US1_IDR.RXBRK", "Memory", 0xfffc400c, 4, base=16, bitRange=2
686
- sfr = "US1_IDR.ENDRX", "Memory", 0xfffc400c, 4, base=16, bitRange=3
687
- sfr = "US1_IDR.ENDTX", "Memory", 0xfffc400c, 4, base=16, bitRange=4
688
- sfr = "US1_IDR.OVRE", "Memory", 0xfffc400c, 4, base=16, bitRange=5
689
- sfr = "US1_IDR.FRAME", "Memory", 0xfffc400c, 4, base=16, bitRange=6
690
- sfr = "US1_IDR.PARE", "Memory", 0xfffc400c, 4, base=16, bitRange=7
691
- sfr = "US1_IDR.TIMEOUT", "Memory", 0xfffc400c, 4, base=16, bitRange=8
692
- sfr = "US1_IDR.TXEMPTY", "Memory", 0xfffc400c, 4, base=16, bitRange=9
693
- sfr = "US1_IDR.ITERATION", "Memory", 0xfffc400c, 4, base=16, bitRange=10
694
- sfr = "US1_IDR.TXBUFE", "Memory", 0xfffc400c, 4, base=16, bitRange=11
695
- sfr = "US1_IDR.RXBUFF", "Memory", 0xfffc400c, 4, base=16, bitRange=12
696
- sfr = "US1_IDR.NACK", "Memory", 0xfffc400c, 4, base=16, bitRange=13
697
- sfr = "US1_IDR.RIIC", "Memory", 0xfffc400c, 4, base=16, bitRange=16
698
- sfr = "US1_IDR.DSRIC", "Memory", 0xfffc400c, 4, base=16, bitRange=17
699
- sfr = "US1_IDR.DCDIC", "Memory", 0xfffc400c, 4, base=16, bitRange=18
700
- sfr = "US1_IDR.CTSIC", "Memory", 0xfffc400c, 4, base=16, bitRange=19
701
- sfr = "US1_IMR", "Memory", 0xfffc4010, 4, base=16
702
- sfr = "US1_IMR.RXRDY", "Memory", 0xfffc4010, 4, base=16, bitRange=0
703
- sfr = "US1_IMR.TXRDY", "Memory", 0xfffc4010, 4, base=16, bitRange=1
704
- sfr = "US1_IMR.RXBRK", "Memory", 0xfffc4010, 4, base=16, bitRange=2
705
- sfr = "US1_IMR.ENDRX", "Memory", 0xfffc4010, 4, base=16, bitRange=3
706
- sfr = "US1_IMR.ENDTX", "Memory", 0xfffc4010, 4, base=16, bitRange=4
707
- sfr = "US1_IMR.OVRE", "Memory", 0xfffc4010, 4, base=16, bitRange=5
708
- sfr = "US1_IMR.FRAME", "Memory", 0xfffc4010, 4, base=16, bitRange=6
709
- sfr = "US1_IMR.PARE", "Memory", 0xfffc4010, 4, base=16, bitRange=7
710
- sfr = "US1_IMR.TIMEOUT", "Memory", 0xfffc4010, 4, base=16, bitRange=8
711
- sfr = "US1_IMR.TXEMPTY", "Memory", 0xfffc4010, 4, base=16, bitRange=9
712
- sfr = "US1_IMR.ITERATION", "Memory", 0xfffc4010, 4, base=16, bitRange=10
713
- sfr = "US1_IMR.TXBUFE", "Memory", 0xfffc4010, 4, base=16, bitRange=11
714
- sfr = "US1_IMR.RXBUFF", "Memory", 0xfffc4010, 4, base=16, bitRange=12
715
- sfr = "US1_IMR.NACK", "Memory", 0xfffc4010, 4, base=16, bitRange=13
716
- sfr = "US1_IMR.RIIC", "Memory", 0xfffc4010, 4, base=16, bitRange=16
717
- sfr = "US1_IMR.DSRIC", "Memory", 0xfffc4010, 4, base=16, bitRange=17
718
- sfr = "US1_IMR.DCDIC", "Memory", 0xfffc4010, 4, base=16, bitRange=18
719
- sfr = "US1_IMR.CTSIC", "Memory", 0xfffc4010, 4, base=16, bitRange=19
720
- sfr = "US1_CSR", "Memory", 0xfffc4014, 4, base=16
721
- sfr = "US1_CSR.RXRDY", "Memory", 0xfffc4014, 4, base=16, bitRange=0
722
- sfr = "US1_CSR.TXRDY", "Memory", 0xfffc4014, 4, base=16, bitRange=1
723
- sfr = "US1_CSR.RXBRK", "Memory", 0xfffc4014, 4, base=16, bitRange=2
724
- sfr = "US1_CSR.ENDRX", "Memory", 0xfffc4014, 4, base=16, bitRange=3
725
- sfr = "US1_CSR.ENDTX", "Memory", 0xfffc4014, 4, base=16, bitRange=4
726
- sfr = "US1_CSR.OVRE", "Memory", 0xfffc4014, 4, base=16, bitRange=5
727
- sfr = "US1_CSR.FRAME", "Memory", 0xfffc4014, 4, base=16, bitRange=6
728
- sfr = "US1_CSR.PARE", "Memory", 0xfffc4014, 4, base=16, bitRange=7
729
- sfr = "US1_CSR.TIMEOUT", "Memory", 0xfffc4014, 4, base=16, bitRange=8
730
- sfr = "US1_CSR.TXEMPTY", "Memory", 0xfffc4014, 4, base=16, bitRange=9
731
- sfr = "US1_CSR.ITERATION", "Memory", 0xfffc4014, 4, base=16, bitRange=10
732
- sfr = "US1_CSR.TXBUFE", "Memory", 0xfffc4014, 4, base=16, bitRange=11
733
- sfr = "US1_CSR.RXBUFF", "Memory", 0xfffc4014, 4, base=16, bitRange=12
734
- sfr = "US1_CSR.NACK", "Memory", 0xfffc4014, 4, base=16, bitRange=13
735
- sfr = "US1_CSR.RIIC", "Memory", 0xfffc4014, 4, base=16, bitRange=16
736
- sfr = "US1_CSR.DSRIC", "Memory", 0xfffc4014, 4, base=16, bitRange=17
737
- sfr = "US1_CSR.DCDIC", "Memory", 0xfffc4014, 4, base=16, bitRange=18
738
- sfr = "US1_CSR.CTSIC", "Memory", 0xfffc4014, 4, base=16, bitRange=19
739
- sfr = "US1_CSR.RI", "Memory", 0xfffc4014, 4, base=16, bitRange=20
740
- sfr = "US1_CSR.DSR", "Memory", 0xfffc4014, 4, base=16, bitRange=21
741
- sfr = "US1_CSR.DCD", "Memory", 0xfffc4014, 4, base=16, bitRange=22
742
- sfr = "US1_CSR.CTS", "Memory", 0xfffc4014, 4, base=16, bitRange=23
743
- sfr = "US1_RHR", "Memory", 0xfffc4018, 4, base=16
744
- sfr = "US1_THR", "Memory", 0xfffc401c, 4, base=16
745
- sfr = "US1_BRGR", "Memory", 0xfffc4020, 4, base=16
746
- sfr = "US1_RTOR", "Memory", 0xfffc4024, 4, base=16
747
- sfr = "US1_TTGR", "Memory", 0xfffc4028, 4, base=16
748
- sfr = "US1_FIDI", "Memory", 0xfffc4040, 4, base=16
749
- sfr = "US1_NER", "Memory", 0xfffc4044, 4, base=16
750
- sfr = "US1_IF", "Memory", 0xfffc404c, 4, base=16
751
- ; ========== Register definition for PDC_US0 peripheral ==========
752
- sfr = "US0_RPR", "Memory", 0xfffc0100, 4, base=16
753
- sfr = "US0_RCR", "Memory", 0xfffc0104, 4, base=16
754
- sfr = "US0_TPR", "Memory", 0xfffc0108, 4, base=16
755
- sfr = "US0_TCR", "Memory", 0xfffc010c, 4, base=16
756
- sfr = "US0_RNPR", "Memory", 0xfffc0110, 4, base=16
757
- sfr = "US0_RNCR", "Memory", 0xfffc0114, 4, base=16
758
- sfr = "US0_TNPR", "Memory", 0xfffc0118, 4, base=16
759
- sfr = "US0_TNCR", "Memory", 0xfffc011c, 4, base=16
760
- sfr = "US0_PTCR", "Memory", 0xfffc0120, 4, base=16
761
- sfr = "US0_PTCR.RXTEN", "Memory", 0xfffc0120, 4, base=16, bitRange=0
762
- sfr = "US0_PTCR.RXTDIS", "Memory", 0xfffc0120, 4, base=16, bitRange=1
763
- sfr = "US0_PTCR.TXTEN", "Memory", 0xfffc0120, 4, base=16, bitRange=8
764
- sfr = "US0_PTCR.TXTDIS", "Memory", 0xfffc0120, 4, base=16, bitRange=9
765
- sfr = "US0_PTSR", "Memory", 0xfffc0124, 4, base=16
766
- sfr = "US0_PTSR.RXTEN", "Memory", 0xfffc0124, 4, base=16, bitRange=0
767
- sfr = "US0_PTSR.TXTEN", "Memory", 0xfffc0124, 4, base=16, bitRange=8
768
- ; ========== Register definition for US0 peripheral ==========
769
- sfr = "US0_CR", "Memory", 0xfffc0000, 4, base=16
770
- sfr = "US0_CR.RSTRX", "Memory", 0xfffc0000, 4, base=16, bitRange=2
771
- sfr = "US0_CR.RSTTX", "Memory", 0xfffc0000, 4, base=16, bitRange=3
772
- sfr = "US0_CR.RXEN", "Memory", 0xfffc0000, 4, base=16, bitRange=4
773
- sfr = "US0_CR.RXDIS", "Memory", 0xfffc0000, 4, base=16, bitRange=5
774
- sfr = "US0_CR.TXEN", "Memory", 0xfffc0000, 4, base=16, bitRange=6
775
- sfr = "US0_CR.TXDIS", "Memory", 0xfffc0000, 4, base=16, bitRange=7
776
- sfr = "US0_CR.RSTSTA", "Memory", 0xfffc0000, 4, base=16, bitRange=8
777
- sfr = "US0_CR.STTBRK", "Memory", 0xfffc0000, 4, base=16, bitRange=9
778
- sfr = "US0_CR.STPBRK", "Memory", 0xfffc0000, 4, base=16, bitRange=10
779
- sfr = "US0_CR.STTTO", "Memory", 0xfffc0000, 4, base=16, bitRange=11
780
- sfr = "US0_CR.SENDA", "Memory", 0xfffc0000, 4, base=16, bitRange=12
781
- sfr = "US0_CR.RSTIT", "Memory", 0xfffc0000, 4, base=16, bitRange=13
782
- sfr = "US0_CR.RSTNACK", "Memory", 0xfffc0000, 4, base=16, bitRange=14
783
- sfr = "US0_CR.RETTO", "Memory", 0xfffc0000, 4, base=16, bitRange=15
784
- sfr = "US0_CR.DTREN", "Memory", 0xfffc0000, 4, base=16, bitRange=16
785
- sfr = "US0_CR.DTRDIS", "Memory", 0xfffc0000, 4, base=16, bitRange=17
786
- sfr = "US0_CR.RTSEN", "Memory", 0xfffc0000, 4, base=16, bitRange=18
787
- sfr = "US0_CR.RTSDIS", "Memory", 0xfffc0000, 4, base=16, bitRange=19
788
- sfr = "US0_MR", "Memory", 0xfffc0004, 4, base=16
789
- sfr = "US0_MR.USMODE", "Memory", 0xfffc0004, 4, base=16, bitRange=0-3
790
- sfr = "US0_MR.CLKS", "Memory", 0xfffc0004, 4, base=16, bitRange=4-5
791
- sfr = "US0_MR.CHRL", "Memory", 0xfffc0004, 4, base=16, bitRange=6-7
792
- sfr = "US0_MR.SYNC", "Memory", 0xfffc0004, 4, base=16, bitRange=8
793
- sfr = "US0_MR.PAR", "Memory", 0xfffc0004, 4, base=16, bitRange=9-11
794
- sfr = "US0_MR.NBSTOP", "Memory", 0xfffc0004, 4, base=16, bitRange=12-13
795
- sfr = "US0_MR.CHMODE", "Memory", 0xfffc0004, 4, base=16, bitRange=14-15
796
- sfr = "US0_MR.MSBF", "Memory", 0xfffc0004, 4, base=16, bitRange=16
797
- sfr = "US0_MR.MODE9", "Memory", 0xfffc0004, 4, base=16, bitRange=17
798
- sfr = "US0_MR.CKLO", "Memory", 0xfffc0004, 4, base=16, bitRange=18
799
- sfr = "US0_MR.OVER", "Memory", 0xfffc0004, 4, base=16, bitRange=19
800
- sfr = "US0_MR.INACK", "Memory", 0xfffc0004, 4, base=16, bitRange=20
801
- sfr = "US0_MR.DSNACK", "Memory", 0xfffc0004, 4, base=16, bitRange=21
802
- sfr = "US0_MR.ITER", "Memory", 0xfffc0004, 4, base=16, bitRange=24
803
- sfr = "US0_MR.FILTER", "Memory", 0xfffc0004, 4, base=16, bitRange=28
804
- sfr = "US0_IER", "Memory", 0xfffc0008, 4, base=16
805
- sfr = "US0_IER.RXRDY", "Memory", 0xfffc0008, 4, base=16, bitRange=0
806
- sfr = "US0_IER.TXRDY", "Memory", 0xfffc0008, 4, base=16, bitRange=1
807
- sfr = "US0_IER.RXBRK", "Memory", 0xfffc0008, 4, base=16, bitRange=2
808
- sfr = "US0_IER.ENDRX", "Memory", 0xfffc0008, 4, base=16, bitRange=3
809
- sfr = "US0_IER.ENDTX", "Memory", 0xfffc0008, 4, base=16, bitRange=4
810
- sfr = "US0_IER.OVRE", "Memory", 0xfffc0008, 4, base=16, bitRange=5
811
- sfr = "US0_IER.FRAME", "Memory", 0xfffc0008, 4, base=16, bitRange=6
812
- sfr = "US0_IER.PARE", "Memory", 0xfffc0008, 4, base=16, bitRange=7
813
- sfr = "US0_IER.TIMEOUT", "Memory", 0xfffc0008, 4, base=16, bitRange=8
814
- sfr = "US0_IER.TXEMPTY", "Memory", 0xfffc0008, 4, base=16, bitRange=9
815
- sfr = "US0_IER.ITERATION", "Memory", 0xfffc0008, 4, base=16, bitRange=10
816
- sfr = "US0_IER.TXBUFE", "Memory", 0xfffc0008, 4, base=16, bitRange=11
817
- sfr = "US0_IER.RXBUFF", "Memory", 0xfffc0008, 4, base=16, bitRange=12
818
- sfr = "US0_IER.NACK", "Memory", 0xfffc0008, 4, base=16, bitRange=13
819
- sfr = "US0_IER.RIIC", "Memory", 0xfffc0008, 4, base=16, bitRange=16
820
- sfr = "US0_IER.DSRIC", "Memory", 0xfffc0008, 4, base=16, bitRange=17
821
- sfr = "US0_IER.DCDIC", "Memory", 0xfffc0008, 4, base=16, bitRange=18
822
- sfr = "US0_IER.CTSIC", "Memory", 0xfffc0008, 4, base=16, bitRange=19
823
- sfr = "US0_IDR", "Memory", 0xfffc000c, 4, base=16
824
- sfr = "US0_IDR.RXRDY", "Memory", 0xfffc000c, 4, base=16, bitRange=0
825
- sfr = "US0_IDR.TXRDY", "Memory", 0xfffc000c, 4, base=16, bitRange=1
826
- sfr = "US0_IDR.RXBRK", "Memory", 0xfffc000c, 4, base=16, bitRange=2
827
- sfr = "US0_IDR.ENDRX", "Memory", 0xfffc000c, 4, base=16, bitRange=3
828
- sfr = "US0_IDR.ENDTX", "Memory", 0xfffc000c, 4, base=16, bitRange=4
829
- sfr = "US0_IDR.OVRE", "Memory", 0xfffc000c, 4, base=16, bitRange=5
830
- sfr = "US0_IDR.FRAME", "Memory", 0xfffc000c, 4, base=16, bitRange=6
831
- sfr = "US0_IDR.PARE", "Memory", 0xfffc000c, 4, base=16, bitRange=7
832
- sfr = "US0_IDR.TIMEOUT", "Memory", 0xfffc000c, 4, base=16, bitRange=8
833
- sfr = "US0_IDR.TXEMPTY", "Memory", 0xfffc000c, 4, base=16, bitRange=9
834
- sfr = "US0_IDR.ITERATION", "Memory", 0xfffc000c, 4, base=16, bitRange=10
835
- sfr = "US0_IDR.TXBUFE", "Memory", 0xfffc000c, 4, base=16, bitRange=11
836
- sfr = "US0_IDR.RXBUFF", "Memory", 0xfffc000c, 4, base=16, bitRange=12
837
- sfr = "US0_IDR.NACK", "Memory", 0xfffc000c, 4, base=16, bitRange=13
838
- sfr = "US0_IDR.RIIC", "Memory", 0xfffc000c, 4, base=16, bitRange=16
839
- sfr = "US0_IDR.DSRIC", "Memory", 0xfffc000c, 4, base=16, bitRange=17
840
- sfr = "US0_IDR.DCDIC", "Memory", 0xfffc000c, 4, base=16, bitRange=18
841
- sfr = "US0_IDR.CTSIC", "Memory", 0xfffc000c, 4, base=16, bitRange=19
842
- sfr = "US0_IMR", "Memory", 0xfffc0010, 4, base=16
843
- sfr = "US0_IMR.RXRDY", "Memory", 0xfffc0010, 4, base=16, bitRange=0
844
- sfr = "US0_IMR.TXRDY", "Memory", 0xfffc0010, 4, base=16, bitRange=1
845
- sfr = "US0_IMR.RXBRK", "Memory", 0xfffc0010, 4, base=16, bitRange=2
846
- sfr = "US0_IMR.ENDRX", "Memory", 0xfffc0010, 4, base=16, bitRange=3
847
- sfr = "US0_IMR.ENDTX", "Memory", 0xfffc0010, 4, base=16, bitRange=4
848
- sfr = "US0_IMR.OVRE", "Memory", 0xfffc0010, 4, base=16, bitRange=5
849
- sfr = "US0_IMR.FRAME", "Memory", 0xfffc0010, 4, base=16, bitRange=6
850
- sfr = "US0_IMR.PARE", "Memory", 0xfffc0010, 4, base=16, bitRange=7
851
- sfr = "US0_IMR.TIMEOUT", "Memory", 0xfffc0010, 4, base=16, bitRange=8
852
- sfr = "US0_IMR.TXEMPTY", "Memory", 0xfffc0010, 4, base=16, bitRange=9
853
- sfr = "US0_IMR.ITERATION", "Memory", 0xfffc0010, 4, base=16, bitRange=10
854
- sfr = "US0_IMR.TXBUFE", "Memory", 0xfffc0010, 4, base=16, bitRange=11
855
- sfr = "US0_IMR.RXBUFF", "Memory", 0xfffc0010, 4, base=16, bitRange=12
856
- sfr = "US0_IMR.NACK", "Memory", 0xfffc0010, 4, base=16, bitRange=13
857
- sfr = "US0_IMR.RIIC", "Memory", 0xfffc0010, 4, base=16, bitRange=16
858
- sfr = "US0_IMR.DSRIC", "Memory", 0xfffc0010, 4, base=16, bitRange=17
859
- sfr = "US0_IMR.DCDIC", "Memory", 0xfffc0010, 4, base=16, bitRange=18
860
- sfr = "US0_IMR.CTSIC", "Memory", 0xfffc0010, 4, base=16, bitRange=19
861
- sfr = "US0_CSR", "Memory", 0xfffc0014, 4, base=16
862
- sfr = "US0_CSR.RXRDY", "Memory", 0xfffc0014, 4, base=16, bitRange=0
863
- sfr = "US0_CSR.TXRDY", "Memory", 0xfffc0014, 4, base=16, bitRange=1
864
- sfr = "US0_CSR.RXBRK", "Memory", 0xfffc0014, 4, base=16, bitRange=2
865
- sfr = "US0_CSR.ENDRX", "Memory", 0xfffc0014, 4, base=16, bitRange=3
866
- sfr = "US0_CSR.ENDTX", "Memory", 0xfffc0014, 4, base=16, bitRange=4
867
- sfr = "US0_CSR.OVRE", "Memory", 0xfffc0014, 4, base=16, bitRange=5
868
- sfr = "US0_CSR.FRAME", "Memory", 0xfffc0014, 4, base=16, bitRange=6
869
- sfr = "US0_CSR.PARE", "Memory", 0xfffc0014, 4, base=16, bitRange=7
870
- sfr = "US0_CSR.TIMEOUT", "Memory", 0xfffc0014, 4, base=16, bitRange=8
871
- sfr = "US0_CSR.TXEMPTY", "Memory", 0xfffc0014, 4, base=16, bitRange=9
872
- sfr = "US0_CSR.ITERATION", "Memory", 0xfffc0014, 4, base=16, bitRange=10
873
- sfr = "US0_CSR.TXBUFE", "Memory", 0xfffc0014, 4, base=16, bitRange=11
874
- sfr = "US0_CSR.RXBUFF", "Memory", 0xfffc0014, 4, base=16, bitRange=12
875
- sfr = "US0_CSR.NACK", "Memory", 0xfffc0014, 4, base=16, bitRange=13
876
- sfr = "US0_CSR.RIIC", "Memory", 0xfffc0014, 4, base=16, bitRange=16
877
- sfr = "US0_CSR.DSRIC", "Memory", 0xfffc0014, 4, base=16, bitRange=17
878
- sfr = "US0_CSR.DCDIC", "Memory", 0xfffc0014, 4, base=16, bitRange=18
879
- sfr = "US0_CSR.CTSIC", "Memory", 0xfffc0014, 4, base=16, bitRange=19
880
- sfr = "US0_CSR.RI", "Memory", 0xfffc0014, 4, base=16, bitRange=20
881
- sfr = "US0_CSR.DSR", "Memory", 0xfffc0014, 4, base=16, bitRange=21
882
- sfr = "US0_CSR.DCD", "Memory", 0xfffc0014, 4, base=16, bitRange=22
883
- sfr = "US0_CSR.CTS", "Memory", 0xfffc0014, 4, base=16, bitRange=23
884
- sfr = "US0_RHR", "Memory", 0xfffc0018, 4, base=16
885
- sfr = "US0_THR", "Memory", 0xfffc001c, 4, base=16
886
- sfr = "US0_BRGR", "Memory", 0xfffc0020, 4, base=16
887
- sfr = "US0_RTOR", "Memory", 0xfffc0024, 4, base=16
888
- sfr = "US0_TTGR", "Memory", 0xfffc0028, 4, base=16
889
- sfr = "US0_FIDI", "Memory", 0xfffc0040, 4, base=16
890
- sfr = "US0_NER", "Memory", 0xfffc0044, 4, base=16
891
- sfr = "US0_IF", "Memory", 0xfffc004c, 4, base=16
892
- ; ========== Register definition for PDC_SSC peripheral ==========
893
- sfr = "SSC_RPR", "Memory", 0xfffd4100, 4, base=16
894
- sfr = "SSC_RCR", "Memory", 0xfffd4104, 4, base=16
895
- sfr = "SSC_TPR", "Memory", 0xfffd4108, 4, base=16
896
- sfr = "SSC_TCR", "Memory", 0xfffd410c, 4, base=16
897
- sfr = "SSC_RNPR", "Memory", 0xfffd4110, 4, base=16
898
- sfr = "SSC_RNCR", "Memory", 0xfffd4114, 4, base=16
899
- sfr = "SSC_TNPR", "Memory", 0xfffd4118, 4, base=16
900
- sfr = "SSC_TNCR", "Memory", 0xfffd411c, 4, base=16
901
- sfr = "SSC_PTCR", "Memory", 0xfffd4120, 4, base=16
902
- sfr = "SSC_PTCR.RXTEN", "Memory", 0xfffd4120, 4, base=16, bitRange=0
903
- sfr = "SSC_PTCR.RXTDIS", "Memory", 0xfffd4120, 4, base=16, bitRange=1
904
- sfr = "SSC_PTCR.TXTEN", "Memory", 0xfffd4120, 4, base=16, bitRange=8
905
- sfr = "SSC_PTCR.TXTDIS", "Memory", 0xfffd4120, 4, base=16, bitRange=9
906
- sfr = "SSC_PTSR", "Memory", 0xfffd4124, 4, base=16
907
- sfr = "SSC_PTSR.RXTEN", "Memory", 0xfffd4124, 4, base=16, bitRange=0
908
- sfr = "SSC_PTSR.TXTEN", "Memory", 0xfffd4124, 4, base=16, bitRange=8
909
- ; ========== Register definition for SSC peripheral ==========
910
- sfr = "SSC_CR", "Memory", 0xfffd4000, 4, base=16
911
- sfr = "SSC_CR.RXEN", "Memory", 0xfffd4000, 4, base=16, bitRange=0
912
- sfr = "SSC_CR.RXDIS", "Memory", 0xfffd4000, 4, base=16, bitRange=1
913
- sfr = "SSC_CR.TXEN", "Memory", 0xfffd4000, 4, base=16, bitRange=8
914
- sfr = "SSC_CR.TXDIS", "Memory", 0xfffd4000, 4, base=16, bitRange=9
915
- sfr = "SSC_CR.SWRST", "Memory", 0xfffd4000, 4, base=16, bitRange=15
916
- sfr = "SSC_CMR", "Memory", 0xfffd4004, 4, base=16
917
- sfr = "SSC_RCMR", "Memory", 0xfffd4010, 4, base=16
918
- sfr = "SSC_RCMR.CKS", "Memory", 0xfffd4010, 4, base=16, bitRange=0-1
919
- sfr = "SSC_RCMR.CKO", "Memory", 0xfffd4010, 4, base=16, bitRange=2-4
920
- sfr = "SSC_RCMR.CKI", "Memory", 0xfffd4010, 4, base=16, bitRange=5
921
- sfr = "SSC_RCMR.CKG", "Memory", 0xfffd4010, 4, base=16, bitRange=6-7
922
- sfr = "SSC_RCMR.START", "Memory", 0xfffd4010, 4, base=16, bitRange=8-11
923
- sfr = "SSC_RCMR.STOP", "Memory", 0xfffd4010, 4, base=16, bitRange=12
924
- sfr = "SSC_RCMR.STTDLY", "Memory", 0xfffd4010, 4, base=16, bitRange=16-23
925
- sfr = "SSC_RCMR.PERIOD", "Memory", 0xfffd4010, 4, base=16, bitRange=24-31
926
- sfr = "SSC_RFMR", "Memory", 0xfffd4014, 4, base=16
927
- sfr = "SSC_RFMR.DATLEN", "Memory", 0xfffd4014, 4, base=16, bitRange=0-4
928
- sfr = "SSC_RFMR.LOOP", "Memory", 0xfffd4014, 4, base=16, bitRange=5
929
- sfr = "SSC_RFMR.MSBF", "Memory", 0xfffd4014, 4, base=16, bitRange=7
930
- sfr = "SSC_RFMR.DATNB", "Memory", 0xfffd4014, 4, base=16, bitRange=8-11
931
- sfr = "SSC_RFMR.FSLEN", "Memory", 0xfffd4014, 4, base=16, bitRange=16-19
932
- sfr = "SSC_RFMR.FSOS", "Memory", 0xfffd4014, 4, base=16, bitRange=20-22
933
- sfr = "SSC_RFMR.FSEDGE", "Memory", 0xfffd4014, 4, base=16, bitRange=24
934
- sfr = "SSC_TCMR", "Memory", 0xfffd4018, 4, base=16
935
- sfr = "SSC_TCMR.CKS", "Memory", 0xfffd4018, 4, base=16, bitRange=0-1
936
- sfr = "SSC_TCMR.CKO", "Memory", 0xfffd4018, 4, base=16, bitRange=2-4
937
- sfr = "SSC_TCMR.CKI", "Memory", 0xfffd4018, 4, base=16, bitRange=5
938
- sfr = "SSC_TCMR.CKG", "Memory", 0xfffd4018, 4, base=16, bitRange=6-7
939
- sfr = "SSC_TCMR.START", "Memory", 0xfffd4018, 4, base=16, bitRange=8-11
940
- sfr = "SSC_TCMR.STTDLY", "Memory", 0xfffd4018, 4, base=16, bitRange=16-23
941
- sfr = "SSC_TCMR.PERIOD", "Memory", 0xfffd4018, 4, base=16, bitRange=24-31
942
- sfr = "SSC_TFMR", "Memory", 0xfffd401c, 4, base=16
943
- sfr = "SSC_TFMR.DATLEN", "Memory", 0xfffd401c, 4, base=16, bitRange=0-4
944
- sfr = "SSC_TFMR.DATDEF", "Memory", 0xfffd401c, 4, base=16, bitRange=5
945
- sfr = "SSC_TFMR.MSBF", "Memory", 0xfffd401c, 4, base=16, bitRange=7
946
- sfr = "SSC_TFMR.DATNB", "Memory", 0xfffd401c, 4, base=16, bitRange=8-11
947
- sfr = "SSC_TFMR.FSLEN", "Memory", 0xfffd401c, 4, base=16, bitRange=16-19
948
- sfr = "SSC_TFMR.FSOS", "Memory", 0xfffd401c, 4, base=16, bitRange=20-22
949
- sfr = "SSC_TFMR.FSDEN", "Memory", 0xfffd401c, 4, base=16, bitRange=23
950
- sfr = "SSC_TFMR.FSEDGE", "Memory", 0xfffd401c, 4, base=16, bitRange=24
951
- sfr = "SSC_RHR", "Memory", 0xfffd4020, 4, base=16
952
- sfr = "SSC_THR", "Memory", 0xfffd4024, 4, base=16
953
- sfr = "SSC_RSHR", "Memory", 0xfffd4030, 4, base=16
954
- sfr = "SSC_TSHR", "Memory", 0xfffd4034, 4, base=16
955
- sfr = "SSC_SR", "Memory", 0xfffd4040, 4, base=16
956
- sfr = "SSC_SR.TXRDY", "Memory", 0xfffd4040, 4, base=16, bitRange=0
957
- sfr = "SSC_SR.TXEMPTY", "Memory", 0xfffd4040, 4, base=16, bitRange=1
958
- sfr = "SSC_SR.ENDTX", "Memory", 0xfffd4040, 4, base=16, bitRange=2
959
- sfr = "SSC_SR.TXBUFE", "Memory", 0xfffd4040, 4, base=16, bitRange=3
960
- sfr = "SSC_SR.RXRDY", "Memory", 0xfffd4040, 4, base=16, bitRange=4
961
- sfr = "SSC_SR.OVRUN", "Memory", 0xfffd4040, 4, base=16, bitRange=5
962
- sfr = "SSC_SR.ENDRX", "Memory", 0xfffd4040, 4, base=16, bitRange=6
963
- sfr = "SSC_SR.RXBUFF", "Memory", 0xfffd4040, 4, base=16, bitRange=7
964
- sfr = "SSC_SR.CP0", "Memory", 0xfffd4040, 4, base=16, bitRange=8
965
- sfr = "SSC_SR.CP1", "Memory", 0xfffd4040, 4, base=16, bitRange=9
966
- sfr = "SSC_SR.TXSYN", "Memory", 0xfffd4040, 4, base=16, bitRange=10
967
- sfr = "SSC_SR.RXSYN", "Memory", 0xfffd4040, 4, base=16, bitRange=11
968
- sfr = "SSC_SR.TXENA", "Memory", 0xfffd4040, 4, base=16, bitRange=16
969
- sfr = "SSC_SR.RXENA", "Memory", 0xfffd4040, 4, base=16, bitRange=17
970
- sfr = "SSC_IER", "Memory", 0xfffd4044, 4, base=16
971
- sfr = "SSC_IER.TXRDY", "Memory", 0xfffd4044, 4, base=16, bitRange=0
972
- sfr = "SSC_IER.TXEMPTY", "Memory", 0xfffd4044, 4, base=16, bitRange=1
973
- sfr = "SSC_IER.ENDTX", "Memory", 0xfffd4044, 4, base=16, bitRange=2
974
- sfr = "SSC_IER.TXBUFE", "Memory", 0xfffd4044, 4, base=16, bitRange=3
975
- sfr = "SSC_IER.RXRDY", "Memory", 0xfffd4044, 4, base=16, bitRange=4
976
- sfr = "SSC_IER.OVRUN", "Memory", 0xfffd4044, 4, base=16, bitRange=5
977
- sfr = "SSC_IER.ENDRX", "Memory", 0xfffd4044, 4, base=16, bitRange=6
978
- sfr = "SSC_IER.RXBUFF", "Memory", 0xfffd4044, 4, base=16, bitRange=7
979
- sfr = "SSC_IER.CP0", "Memory", 0xfffd4044, 4, base=16, bitRange=8
980
- sfr = "SSC_IER.CP1", "Memory", 0xfffd4044, 4, base=16, bitRange=9
981
- sfr = "SSC_IER.TXSYN", "Memory", 0xfffd4044, 4, base=16, bitRange=10
982
- sfr = "SSC_IER.RXSYN", "Memory", 0xfffd4044, 4, base=16, bitRange=11
983
- sfr = "SSC_IDR", "Memory", 0xfffd4048, 4, base=16
984
- sfr = "SSC_IDR.TXRDY", "Memory", 0xfffd4048, 4, base=16, bitRange=0
985
- sfr = "SSC_IDR.TXEMPTY", "Memory", 0xfffd4048, 4, base=16, bitRange=1
986
- sfr = "SSC_IDR.ENDTX", "Memory", 0xfffd4048, 4, base=16, bitRange=2
987
- sfr = "SSC_IDR.TXBUFE", "Memory", 0xfffd4048, 4, base=16, bitRange=3
988
- sfr = "SSC_IDR.RXRDY", "Memory", 0xfffd4048, 4, base=16, bitRange=4
989
- sfr = "SSC_IDR.OVRUN", "Memory", 0xfffd4048, 4, base=16, bitRange=5
990
- sfr = "SSC_IDR.ENDRX", "Memory", 0xfffd4048, 4, base=16, bitRange=6
991
- sfr = "SSC_IDR.RXBUFF", "Memory", 0xfffd4048, 4, base=16, bitRange=7
992
- sfr = "SSC_IDR.CP0", "Memory", 0xfffd4048, 4, base=16, bitRange=8
993
- sfr = "SSC_IDR.CP1", "Memory", 0xfffd4048, 4, base=16, bitRange=9
994
- sfr = "SSC_IDR.TXSYN", "Memory", 0xfffd4048, 4, base=16, bitRange=10
995
- sfr = "SSC_IDR.RXSYN", "Memory", 0xfffd4048, 4, base=16, bitRange=11
996
- sfr = "SSC_IMR", "Memory", 0xfffd404c, 4, base=16
997
- sfr = "SSC_IMR.TXRDY", "Memory", 0xfffd404c, 4, base=16, bitRange=0
998
- sfr = "SSC_IMR.TXEMPTY", "Memory", 0xfffd404c, 4, base=16, bitRange=1
999
- sfr = "SSC_IMR.ENDTX", "Memory", 0xfffd404c, 4, base=16, bitRange=2
1000
- sfr = "SSC_IMR.TXBUFE", "Memory", 0xfffd404c, 4, base=16, bitRange=3
1001
- sfr = "SSC_IMR.RXRDY", "Memory", 0xfffd404c, 4, base=16, bitRange=4
1002
- sfr = "SSC_IMR.OVRUN", "Memory", 0xfffd404c, 4, base=16, bitRange=5
1003
- sfr = "SSC_IMR.ENDRX", "Memory", 0xfffd404c, 4, base=16, bitRange=6
1004
- sfr = "SSC_IMR.RXBUFF", "Memory", 0xfffd404c, 4, base=16, bitRange=7
1005
- sfr = "SSC_IMR.CP0", "Memory", 0xfffd404c, 4, base=16, bitRange=8
1006
- sfr = "SSC_IMR.CP1", "Memory", 0xfffd404c, 4, base=16, bitRange=9
1007
- sfr = "SSC_IMR.TXSYN", "Memory", 0xfffd404c, 4, base=16, bitRange=10
1008
- sfr = "SSC_IMR.RXSYN", "Memory", 0xfffd404c, 4, base=16, bitRange=11
1009
- ; ========== Register definition for TWI peripheral ==========
1010
- sfr = "TWI_CR", "Memory", 0xfffb8000, 4, base=16
1011
- sfr = "TWI_CR.START", "Memory", 0xfffb8000, 4, base=16, bitRange=0
1012
- sfr = "TWI_CR.STOP", "Memory", 0xfffb8000, 4, base=16, bitRange=1
1013
- sfr = "TWI_CR.MSEN", "Memory", 0xfffb8000, 4, base=16, bitRange=2
1014
- sfr = "TWI_CR.MSDIS", "Memory", 0xfffb8000, 4, base=16, bitRange=3
1015
- sfr = "TWI_CR.SWRST", "Memory", 0xfffb8000, 4, base=16, bitRange=7
1016
- sfr = "TWI_MMR", "Memory", 0xfffb8004, 4, base=16
1017
- sfr = "TWI_MMR.IADRSZ", "Memory", 0xfffb8004, 4, base=16, bitRange=8-9
1018
- sfr = "TWI_MMR.MREAD", "Memory", 0xfffb8004, 4, base=16, bitRange=12
1019
- sfr = "TWI_MMR.DADR", "Memory", 0xfffb8004, 4, base=16, bitRange=16-22
1020
- sfr = "TWI_IADR", "Memory", 0xfffb800c, 4, base=16
1021
- sfr = "TWI_CWGR", "Memory", 0xfffb8010, 4, base=16
1022
- sfr = "TWI_CWGR.CLDIV", "Memory", 0xfffb8010, 4, base=16, bitRange=0-7
1023
- sfr = "TWI_CWGR.CHDIV", "Memory", 0xfffb8010, 4, base=16, bitRange=8-15
1024
- sfr = "TWI_CWGR.CKDIV", "Memory", 0xfffb8010, 4, base=16, bitRange=16-18
1025
- sfr = "TWI_SR", "Memory", 0xfffb8020, 4, base=16
1026
- sfr = "TWI_SR.TXCOMP", "Memory", 0xfffb8020, 4, base=16, bitRange=0
1027
- sfr = "TWI_SR.RXRDY", "Memory", 0xfffb8020, 4, base=16, bitRange=1
1028
- sfr = "TWI_SR.TXRDY", "Memory", 0xfffb8020, 4, base=16, bitRange=2
1029
- sfr = "TWI_SR.OVRE", "Memory", 0xfffb8020, 4, base=16, bitRange=6
1030
- sfr = "TWI_SR.UNRE", "Memory", 0xfffb8020, 4, base=16, bitRange=7
1031
- sfr = "TWI_SR.NACK", "Memory", 0xfffb8020, 4, base=16, bitRange=8
1032
- sfr = "TWI_IER", "Memory", 0xfffb8024, 4, base=16
1033
- sfr = "TWI_IER.TXCOMP", "Memory", 0xfffb8024, 4, base=16, bitRange=0
1034
- sfr = "TWI_IER.RXRDY", "Memory", 0xfffb8024, 4, base=16, bitRange=1
1035
- sfr = "TWI_IER.TXRDY", "Memory", 0xfffb8024, 4, base=16, bitRange=2
1036
- sfr = "TWI_IER.OVRE", "Memory", 0xfffb8024, 4, base=16, bitRange=6
1037
- sfr = "TWI_IER.UNRE", "Memory", 0xfffb8024, 4, base=16, bitRange=7
1038
- sfr = "TWI_IER.NACK", "Memory", 0xfffb8024, 4, base=16, bitRange=8
1039
- sfr = "TWI_IDR", "Memory", 0xfffb8028, 4, base=16
1040
- sfr = "TWI_IDR.TXCOMP", "Memory", 0xfffb8028, 4, base=16, bitRange=0
1041
- sfr = "TWI_IDR.RXRDY", "Memory", 0xfffb8028, 4, base=16, bitRange=1
1042
- sfr = "TWI_IDR.TXRDY", "Memory", 0xfffb8028, 4, base=16, bitRange=2
1043
- sfr = "TWI_IDR.OVRE", "Memory", 0xfffb8028, 4, base=16, bitRange=6
1044
- sfr = "TWI_IDR.UNRE", "Memory", 0xfffb8028, 4, base=16, bitRange=7
1045
- sfr = "TWI_IDR.NACK", "Memory", 0xfffb8028, 4, base=16, bitRange=8
1046
- sfr = "TWI_IMR", "Memory", 0xfffb802c, 4, base=16
1047
- sfr = "TWI_IMR.TXCOMP", "Memory", 0xfffb802c, 4, base=16, bitRange=0
1048
- sfr = "TWI_IMR.RXRDY", "Memory", 0xfffb802c, 4, base=16, bitRange=1
1049
- sfr = "TWI_IMR.TXRDY", "Memory", 0xfffb802c, 4, base=16, bitRange=2
1050
- sfr = "TWI_IMR.OVRE", "Memory", 0xfffb802c, 4, base=16, bitRange=6
1051
- sfr = "TWI_IMR.UNRE", "Memory", 0xfffb802c, 4, base=16, bitRange=7
1052
- sfr = "TWI_IMR.NACK", "Memory", 0xfffb802c, 4, base=16, bitRange=8
1053
- sfr = "TWI_RHR", "Memory", 0xfffb8030, 4, base=16
1054
- sfr = "TWI_THR", "Memory", 0xfffb8034, 4, base=16
1055
- ; ========== Register definition for PWMC_CH3 peripheral ==========
1056
- sfr = "PWMC_CH3_CMR", "Memory", 0xfffcc260, 4, base=16
1057
- sfr = "PWMC_CH3_CMR.CPRE", "Memory", 0xfffcc260, 4, base=16, bitRange=0-3
1058
- sfr = "PWMC_CH3_CMR.CALG", "Memory", 0xfffcc260, 4, base=16, bitRange=8
1059
- sfr = "PWMC_CH3_CMR.CPOL", "Memory", 0xfffcc260, 4, base=16, bitRange=9
1060
- sfr = "PWMC_CH3_CMR.CPD", "Memory", 0xfffcc260, 4, base=16, bitRange=10
1061
- sfr = "PWMC_CH3_CDTYR", "Memory", 0xfffcc264, 4, base=16
1062
- sfr = "PWMC_CH3_CDTYR.CDTY", "Memory", 0xfffcc264, 4, base=16, bitRange=0-31
1063
- sfr = "PWMC_CH3_CPRDR", "Memory", 0xfffcc268, 4, base=16
1064
- sfr = "PWMC_CH3_CPRDR.CPRD", "Memory", 0xfffcc268, 4, base=16, bitRange=0-31
1065
- sfr = "PWMC_CH3_CCNTR", "Memory", 0xfffcc26c, 4, base=16
1066
- sfr = "PWMC_CH3_CCNTR.CCNT", "Memory", 0xfffcc26c, 4, base=16, bitRange=0-31
1067
- sfr = "PWMC_CH3_CUPDR", "Memory", 0xfffcc270, 4, base=16
1068
- sfr = "PWMC_CH3_CUPDR.CUPD", "Memory", 0xfffcc270, 4, base=16, bitRange=0-31
1069
- sfr = "PWMC_CH3_Reserved", "Memory", 0xfffcc274, 4, base=16
1070
- ; ========== Register definition for PWMC_CH2 peripheral ==========
1071
- sfr = "PWMC_CH2_CMR", "Memory", 0xfffcc240, 4, base=16
1072
- sfr = "PWMC_CH2_CMR.CPRE", "Memory", 0xfffcc240, 4, base=16, bitRange=0-3
1073
- sfr = "PWMC_CH2_CMR.CALG", "Memory", 0xfffcc240, 4, base=16, bitRange=8
1074
- sfr = "PWMC_CH2_CMR.CPOL", "Memory", 0xfffcc240, 4, base=16, bitRange=9
1075
- sfr = "PWMC_CH2_CMR.CPD", "Memory", 0xfffcc240, 4, base=16, bitRange=10
1076
- sfr = "PWMC_CH2_CDTYR", "Memory", 0xfffcc244, 4, base=16
1077
- sfr = "PWMC_CH2_CDTYR.CDTY", "Memory", 0xfffcc244, 4, base=16, bitRange=0-31
1078
- sfr = "PWMC_CH2_CPRDR", "Memory", 0xfffcc248, 4, base=16
1079
- sfr = "PWMC_CH2_CPRDR.CPRD", "Memory", 0xfffcc248, 4, base=16, bitRange=0-31
1080
- sfr = "PWMC_CH2_CCNTR", "Memory", 0xfffcc24c, 4, base=16
1081
- sfr = "PWMC_CH2_CCNTR.CCNT", "Memory", 0xfffcc24c, 4, base=16, bitRange=0-31
1082
- sfr = "PWMC_CH2_CUPDR", "Memory", 0xfffcc250, 4, base=16
1083
- sfr = "PWMC_CH2_CUPDR.CUPD", "Memory", 0xfffcc250, 4, base=16, bitRange=0-31
1084
- sfr = "PWMC_CH2_Reserved", "Memory", 0xfffcc254, 4, base=16
1085
- ; ========== Register definition for PWMC_CH1 peripheral ==========
1086
- sfr = "PWMC_CH1_CMR", "Memory", 0xfffcc220, 4, base=16
1087
- sfr = "PWMC_CH1_CMR.CPRE", "Memory", 0xfffcc220, 4, base=16, bitRange=0-3
1088
- sfr = "PWMC_CH1_CMR.CALG", "Memory", 0xfffcc220, 4, base=16, bitRange=8
1089
- sfr = "PWMC_CH1_CMR.CPOL", "Memory", 0xfffcc220, 4, base=16, bitRange=9
1090
- sfr = "PWMC_CH1_CMR.CPD", "Memory", 0xfffcc220, 4, base=16, bitRange=10
1091
- sfr = "PWMC_CH1_CDTYR", "Memory", 0xfffcc224, 4, base=16
1092
- sfr = "PWMC_CH1_CDTYR.CDTY", "Memory", 0xfffcc224, 4, base=16, bitRange=0-31
1093
- sfr = "PWMC_CH1_CPRDR", "Memory", 0xfffcc228, 4, base=16
1094
- sfr = "PWMC_CH1_CPRDR.CPRD", "Memory", 0xfffcc228, 4, base=16, bitRange=0-31
1095
- sfr = "PWMC_CH1_CCNTR", "Memory", 0xfffcc22c, 4, base=16
1096
- sfr = "PWMC_CH1_CCNTR.CCNT", "Memory", 0xfffcc22c, 4, base=16, bitRange=0-31
1097
- sfr = "PWMC_CH1_CUPDR", "Memory", 0xfffcc230, 4, base=16
1098
- sfr = "PWMC_CH1_CUPDR.CUPD", "Memory", 0xfffcc230, 4, base=16, bitRange=0-31
1099
- sfr = "PWMC_CH1_Reserved", "Memory", 0xfffcc234, 4, base=16
1100
- ; ========== Register definition for PWMC_CH0 peripheral ==========
1101
- sfr = "PWMC_CH0_CMR", "Memory", 0xfffcc200, 4, base=16
1102
- sfr = "PWMC_CH0_CMR.CPRE", "Memory", 0xfffcc200, 4, base=16, bitRange=0-3
1103
- sfr = "PWMC_CH0_CMR.CALG", "Memory", 0xfffcc200, 4, base=16, bitRange=8
1104
- sfr = "PWMC_CH0_CMR.CPOL", "Memory", 0xfffcc200, 4, base=16, bitRange=9
1105
- sfr = "PWMC_CH0_CMR.CPD", "Memory", 0xfffcc200, 4, base=16, bitRange=10
1106
- sfr = "PWMC_CH0_CDTYR", "Memory", 0xfffcc204, 4, base=16
1107
- sfr = "PWMC_CH0_CDTYR.CDTY", "Memory", 0xfffcc204, 4, base=16, bitRange=0-31
1108
- sfr = "PWMC_CH0_CPRDR", "Memory", 0xfffcc208, 4, base=16
1109
- sfr = "PWMC_CH0_CPRDR.CPRD", "Memory", 0xfffcc208, 4, base=16, bitRange=0-31
1110
- sfr = "PWMC_CH0_CCNTR", "Memory", 0xfffcc20c, 4, base=16
1111
- sfr = "PWMC_CH0_CCNTR.CCNT", "Memory", 0xfffcc20c, 4, base=16, bitRange=0-31
1112
- sfr = "PWMC_CH0_CUPDR", "Memory", 0xfffcc210, 4, base=16
1113
- sfr = "PWMC_CH0_CUPDR.CUPD", "Memory", 0xfffcc210, 4, base=16, bitRange=0-31
1114
- sfr = "PWMC_CH0_Reserved", "Memory", 0xfffcc214, 4, base=16
1115
- ; ========== Register definition for PWMC peripheral ==========
1116
- sfr = "PWMC_MR", "Memory", 0xfffcc000, 4, base=16
1117
- sfr = "PWMC_MR.DIVA", "Memory", 0xfffcc000, 4, base=16, bitRange=0-7
1118
- sfr = "PWMC_MR.PREA", "Memory", 0xfffcc000, 4, base=16, bitRange=8-11
1119
- sfr = "PWMC_MR.DIVB", "Memory", 0xfffcc000, 4, base=16, bitRange=16-23
1120
- sfr = "PWMC_MR.PREB", "Memory", 0xfffcc000, 4, base=16, bitRange=24-27
1121
- sfr = "PWMC_ENA", "Memory", 0xfffcc004, 4, base=16
1122
- sfr = "PWMC_ENA.CHID0", "Memory", 0xfffcc004, 4, base=16, bitRange=0
1123
- sfr = "PWMC_ENA.CHID1", "Memory", 0xfffcc004, 4, base=16, bitRange=1
1124
- sfr = "PWMC_ENA.CHID2", "Memory", 0xfffcc004, 4, base=16, bitRange=2
1125
- sfr = "PWMC_ENA.CHID3", "Memory", 0xfffcc004, 4, base=16, bitRange=3
1126
- sfr = "PWMC_DIS", "Memory", 0xfffcc008, 4, base=16
1127
- sfr = "PWMC_DIS.CHID0", "Memory", 0xfffcc008, 4, base=16, bitRange=0
1128
- sfr = "PWMC_DIS.CHID1", "Memory", 0xfffcc008, 4, base=16, bitRange=1
1129
- sfr = "PWMC_DIS.CHID2", "Memory", 0xfffcc008, 4, base=16, bitRange=2
1130
- sfr = "PWMC_DIS.CHID3", "Memory", 0xfffcc008, 4, base=16, bitRange=3
1131
- sfr = "PWMC_SR", "Memory", 0xfffcc00c, 4, base=16
1132
- sfr = "PWMC_SR.CHID0", "Memory", 0xfffcc00c, 4, base=16, bitRange=0
1133
- sfr = "PWMC_SR.CHID1", "Memory", 0xfffcc00c, 4, base=16, bitRange=1
1134
- sfr = "PWMC_SR.CHID2", "Memory", 0xfffcc00c, 4, base=16, bitRange=2
1135
- sfr = "PWMC_SR.CHID3", "Memory", 0xfffcc00c, 4, base=16, bitRange=3
1136
- sfr = "PWMC_IER", "Memory", 0xfffcc010, 4, base=16
1137
- sfr = "PWMC_IER.CHID0", "Memory", 0xfffcc010, 4, base=16, bitRange=0
1138
- sfr = "PWMC_IER.CHID1", "Memory", 0xfffcc010, 4, base=16, bitRange=1
1139
- sfr = "PWMC_IER.CHID2", "Memory", 0xfffcc010, 4, base=16, bitRange=2
1140
- sfr = "PWMC_IER.CHID3", "Memory", 0xfffcc010, 4, base=16, bitRange=3
1141
- sfr = "PWMC_IDR", "Memory", 0xfffcc014, 4, base=16
1142
- sfr = "PWMC_IDR.CHID0", "Memory", 0xfffcc014, 4, base=16, bitRange=0
1143
- sfr = "PWMC_IDR.CHID1", "Memory", 0xfffcc014, 4, base=16, bitRange=1
1144
- sfr = "PWMC_IDR.CHID2", "Memory", 0xfffcc014, 4, base=16, bitRange=2
1145
- sfr = "PWMC_IDR.CHID3", "Memory", 0xfffcc014, 4, base=16, bitRange=3
1146
- sfr = "PWMC_IMR", "Memory", 0xfffcc018, 4, base=16
1147
- sfr = "PWMC_IMR.CHID0", "Memory", 0xfffcc018, 4, base=16, bitRange=0
1148
- sfr = "PWMC_IMR.CHID1", "Memory", 0xfffcc018, 4, base=16, bitRange=1
1149
- sfr = "PWMC_IMR.CHID2", "Memory", 0xfffcc018, 4, base=16, bitRange=2
1150
- sfr = "PWMC_IMR.CHID3", "Memory", 0xfffcc018, 4, base=16, bitRange=3
1151
- sfr = "PWMC_ISR", "Memory", 0xfffcc01c, 4, base=16
1152
- sfr = "PWMC_ISR.CHID0", "Memory", 0xfffcc01c, 4, base=16, bitRange=0
1153
- sfr = "PWMC_ISR.CHID1", "Memory", 0xfffcc01c, 4, base=16, bitRange=1
1154
- sfr = "PWMC_ISR.CHID2", "Memory", 0xfffcc01c, 4, base=16, bitRange=2
1155
- sfr = "PWMC_ISR.CHID3", "Memory", 0xfffcc01c, 4, base=16, bitRange=3
1156
- sfr = "PWMC_VR", "Memory", 0xfffcc0fc, 4, base=16
1157
- ; ========== Register definition for UDP peripheral ==========
1158
- sfr = "UDP_NUM", "Memory", 0xfffb0000, 4, base=16
1159
- sfr = "UDP_NUM.NUM", "Memory", 0xfffb0000, 4, base=16, bitRange=0-10
1160
- sfr = "UDP_NUM.ERR", "Memory", 0xfffb0000, 4, base=16, bitRange=16
1161
- sfr = "UDP_NUM.OK", "Memory", 0xfffb0000, 4, base=16, bitRange=17
1162
- sfr = "UDP_GLBSTATE", "Memory", 0xfffb0004, 4, base=16
1163
- sfr = "UDP_GLBSTATE.FADDEN", "Memory", 0xfffb0004, 4, base=16, bitRange=0
1164
- sfr = "UDP_GLBSTATE.CONFG", "Memory", 0xfffb0004, 4, base=16, bitRange=1
1165
- sfr = "UDP_GLBSTATE.ESR", "Memory", 0xfffb0004, 4, base=16, bitRange=2
1166
- sfr = "UDP_GLBSTATE.RSMINPR", "Memory", 0xfffb0004, 4, base=16, bitRange=3
1167
- sfr = "UDP_GLBSTATE.RMWUPE", "Memory", 0xfffb0004, 4, base=16, bitRange=4
1168
- sfr = "UDP_FADDR", "Memory", 0xfffb0008, 4, base=16
1169
- sfr = "UDP_FADDR.FADD", "Memory", 0xfffb0008, 4, base=16, bitRange=0-7
1170
- sfr = "UDP_FADDR.FEN", "Memory", 0xfffb0008, 4, base=16, bitRange=8
1171
- sfr = "UDP_IER", "Memory", 0xfffb0010, 4, base=16
1172
- sfr = "UDP_IER.EPINT0", "Memory", 0xfffb0010, 4, base=16, bitRange=0
1173
- sfr = "UDP_IER.EPINT1", "Memory", 0xfffb0010, 4, base=16, bitRange=1
1174
- sfr = "UDP_IER.EPINT2", "Memory", 0xfffb0010, 4, base=16, bitRange=2
1175
- sfr = "UDP_IER.EPINT3", "Memory", 0xfffb0010, 4, base=16, bitRange=3
1176
- sfr = "UDP_IER.EPINT4", "Memory", 0xfffb0010, 4, base=16, bitRange=4
1177
- sfr = "UDP_IER.EPINT5", "Memory", 0xfffb0010, 4, base=16, bitRange=5
1178
- sfr = "UDP_IER.RXSUSP", "Memory", 0xfffb0010, 4, base=16, bitRange=8
1179
- sfr = "UDP_IER.RXRSM", "Memory", 0xfffb0010, 4, base=16, bitRange=9
1180
- sfr = "UDP_IER.EXTRSM", "Memory", 0xfffb0010, 4, base=16, bitRange=10
1181
- sfr = "UDP_IER.SOFINT", "Memory", 0xfffb0010, 4, base=16, bitRange=11
1182
- sfr = "UDP_IER.WAKEUP", "Memory", 0xfffb0010, 4, base=16, bitRange=13
1183
- sfr = "UDP_IDR", "Memory", 0xfffb0014, 4, base=16
1184
- sfr = "UDP_IDR.EPINT0", "Memory", 0xfffb0014, 4, base=16, bitRange=0
1185
- sfr = "UDP_IDR.EPINT1", "Memory", 0xfffb0014, 4, base=16, bitRange=1
1186
- sfr = "UDP_IDR.EPINT2", "Memory", 0xfffb0014, 4, base=16, bitRange=2
1187
- sfr = "UDP_IDR.EPINT3", "Memory", 0xfffb0014, 4, base=16, bitRange=3
1188
- sfr = "UDP_IDR.EPINT4", "Memory", 0xfffb0014, 4, base=16, bitRange=4
1189
- sfr = "UDP_IDR.EPINT5", "Memory", 0xfffb0014, 4, base=16, bitRange=5
1190
- sfr = "UDP_IDR.RXSUSP", "Memory", 0xfffb0014, 4, base=16, bitRange=8
1191
- sfr = "UDP_IDR.RXRSM", "Memory", 0xfffb0014, 4, base=16, bitRange=9
1192
- sfr = "UDP_IDR.EXTRSM", "Memory", 0xfffb0014, 4, base=16, bitRange=10
1193
- sfr = "UDP_IDR.SOFINT", "Memory", 0xfffb0014, 4, base=16, bitRange=11
1194
- sfr = "UDP_IDR.WAKEUP", "Memory", 0xfffb0014, 4, base=16, bitRange=13
1195
- sfr = "UDP_IMR", "Memory", 0xfffb0018, 4, base=16
1196
- sfr = "UDP_IMR.EPINT0", "Memory", 0xfffb0018, 4, base=16, bitRange=0
1197
- sfr = "UDP_IMR.EPINT1", "Memory", 0xfffb0018, 4, base=16, bitRange=1
1198
- sfr = "UDP_IMR.EPINT2", "Memory", 0xfffb0018, 4, base=16, bitRange=2
1199
- sfr = "UDP_IMR.EPINT3", "Memory", 0xfffb0018, 4, base=16, bitRange=3
1200
- sfr = "UDP_IMR.EPINT4", "Memory", 0xfffb0018, 4, base=16, bitRange=4
1201
- sfr = "UDP_IMR.EPINT5", "Memory", 0xfffb0018, 4, base=16, bitRange=5
1202
- sfr = "UDP_IMR.RXSUSP", "Memory", 0xfffb0018, 4, base=16, bitRange=8
1203
- sfr = "UDP_IMR.RXRSM", "Memory", 0xfffb0018, 4, base=16, bitRange=9
1204
- sfr = "UDP_IMR.EXTRSM", "Memory", 0xfffb0018, 4, base=16, bitRange=10
1205
- sfr = "UDP_IMR.SOFINT", "Memory", 0xfffb0018, 4, base=16, bitRange=11
1206
- sfr = "UDP_IMR.WAKEUP", "Memory", 0xfffb0018, 4, base=16, bitRange=13
1207
- sfr = "UDP_ISR", "Memory", 0xfffb001c, 4, base=16
1208
- sfr = "UDP_ISR.EPINT0", "Memory", 0xfffb001c, 4, base=16, bitRange=0
1209
- sfr = "UDP_ISR.EPINT1", "Memory", 0xfffb001c, 4, base=16, bitRange=1
1210
- sfr = "UDP_ISR.EPINT2", "Memory", 0xfffb001c, 4, base=16, bitRange=2
1211
- sfr = "UDP_ISR.EPINT3", "Memory", 0xfffb001c, 4, base=16, bitRange=3
1212
- sfr = "UDP_ISR.EPINT4", "Memory", 0xfffb001c, 4, base=16, bitRange=4
1213
- sfr = "UDP_ISR.EPINT5", "Memory", 0xfffb001c, 4, base=16, bitRange=5
1214
- sfr = "UDP_ISR.RXSUSP", "Memory", 0xfffb001c, 4, base=16, bitRange=8
1215
- sfr = "UDP_ISR.RXRSM", "Memory", 0xfffb001c, 4, base=16, bitRange=9
1216
- sfr = "UDP_ISR.EXTRSM", "Memory", 0xfffb001c, 4, base=16, bitRange=10
1217
- sfr = "UDP_ISR.SOFINT", "Memory", 0xfffb001c, 4, base=16, bitRange=11
1218
- sfr = "UDP_ISR.ENDBUSRES", "Memory", 0xfffb001c, 4, base=16, bitRange=12
1219
- sfr = "UDP_ISR.WAKEUP", "Memory", 0xfffb001c, 4, base=16, bitRange=13
1220
- sfr = "UDP_ICR", "Memory", 0xfffb0020, 4, base=16
1221
- sfr = "UDP_ICR.EPINT0", "Memory", 0xfffb0020, 4, base=16, bitRange=0
1222
- sfr = "UDP_ICR.EPINT1", "Memory", 0xfffb0020, 4, base=16, bitRange=1
1223
- sfr = "UDP_ICR.EPINT2", "Memory", 0xfffb0020, 4, base=16, bitRange=2
1224
- sfr = "UDP_ICR.EPINT3", "Memory", 0xfffb0020, 4, base=16, bitRange=3
1225
- sfr = "UDP_ICR.EPINT4", "Memory", 0xfffb0020, 4, base=16, bitRange=4
1226
- sfr = "UDP_ICR.EPINT5", "Memory", 0xfffb0020, 4, base=16, bitRange=5
1227
- sfr = "UDP_ICR.RXSUSP", "Memory", 0xfffb0020, 4, base=16, bitRange=8
1228
- sfr = "UDP_ICR.RXRSM", "Memory", 0xfffb0020, 4, base=16, bitRange=9
1229
- sfr = "UDP_ICR.EXTRSM", "Memory", 0xfffb0020, 4, base=16, bitRange=10
1230
- sfr = "UDP_ICR.SOFINT", "Memory", 0xfffb0020, 4, base=16, bitRange=11
1231
- sfr = "UDP_ICR.WAKEUP", "Memory", 0xfffb0020, 4, base=16, bitRange=13
1232
- sfr = "UDP_RSTEP", "Memory", 0xfffb0028, 4, base=16
1233
- sfr = "UDP_RSTEP.EP0", "Memory", 0xfffb0028, 4, base=16, bitRange=0
1234
- sfr = "UDP_RSTEP.EP1", "Memory", 0xfffb0028, 4, base=16, bitRange=1
1235
- sfr = "UDP_RSTEP.EP2", "Memory", 0xfffb0028, 4, base=16, bitRange=2
1236
- sfr = "UDP_RSTEP.EP3", "Memory", 0xfffb0028, 4, base=16, bitRange=3
1237
- sfr = "UDP_RSTEP.EP4", "Memory", 0xfffb0028, 4, base=16, bitRange=4
1238
- sfr = "UDP_RSTEP.EP5", "Memory", 0xfffb0028, 4, base=16, bitRange=5
1239
- sfr = "UDP_CSR", "Memory", 0xfffb0030, 4, base=16
1240
- sfr = "UDP_CSR.TXCOMP", "Memory", 0xfffb0030, 4, base=16, bitRange=0
1241
- sfr = "UDP_CSR.BK0", "Memory", 0xfffb0030, 4, base=16, bitRange=1
1242
- sfr = "UDP_CSR.RXSETUP", "Memory", 0xfffb0030, 4, base=16, bitRange=2
1243
- sfr = "UDP_CSR.ISOERROR", "Memory", 0xfffb0030, 4, base=16, bitRange=3
1244
- sfr = "UDP_CSR.TXPKTRDY", "Memory", 0xfffb0030, 4, base=16, bitRange=4
1245
- sfr = "UDP_CSR.FORCESTALL", "Memory", 0xfffb0030, 4, base=16, bitRange=5
1246
- sfr = "UDP_CSR.BK1", "Memory", 0xfffb0030, 4, base=16, bitRange=6
1247
- sfr = "UDP_CSR.DIR", "Memory", 0xfffb0030, 4, base=16, bitRange=7
1248
- sfr = "UDP_CSR.EPTYPE", "Memory", 0xfffb0030, 4, base=16, bitRange=8-10
1249
- sfr = "UDP_CSR.DTGLE", "Memory", 0xfffb0030, 4, base=16, bitRange=11
1250
- sfr = "UDP_CSR.EPEDS", "Memory", 0xfffb0030, 4, base=16, bitRange=15
1251
- sfr = "UDP_CSR.RXBYTECNT", "Memory", 0xfffb0030, 4, base=16, bitRange=16-26
1252
- sfr = "UDP_FDR", "Memory", 0xfffb0050, 4, base=16
1253
- sfr = "UDP_TXVC", "Memory", 0xfffb0074, 4, base=16
1254
- sfr = "UDP_TXVC.TXVDIS", "Memory", 0xfffb0074, 4, base=16, bitRange=8
1255
- sfr = "UDP_TXVC.PUON", "Memory", 0xfffb0074, 4, base=16, bitRange=9
1256
- ; ========== Register definition for TC0 peripheral ==========
1257
- sfr = "TC0_CCR", "Memory", 0xfffa0000, 4, base=16
1258
- sfr = "TC0_CCR.CLKEN", "Memory", 0xfffa0000, 4, base=16, bitRange=0
1259
- sfr = "TC0_CCR.CLKDIS", "Memory", 0xfffa0000, 4, base=16, bitRange=1
1260
- sfr = "TC0_CCR.SWTRG", "Memory", 0xfffa0000, 4, base=16, bitRange=2
1261
- sfr = "TC0_CMR", "Memory", 0xfffa0004, 4, base=16
1262
- sfr = "TC0_CMR.CLKS", "Memory", 0xfffa0004, 4, base=16, bitRange=0-2
1263
- sfr = "TC0_CMR.CLKI", "Memory", 0xfffa0004, 4, base=16, bitRange=3
1264
- sfr = "TC0_CMR.BURST", "Memory", 0xfffa0004, 4, base=16, bitRange=4-5
1265
- sfr = "TC0_CMR.CPCSTOP", "Memory", 0xfffa0004, 4, base=16, bitRange=6
1266
- sfr = "TC0_CMR.LDBSTOP", "Memory", 0xfffa0004, 4, base=16, bitRange=6
1267
- sfr = "TC0_CMR.CPCDIS", "Memory", 0xfffa0004, 4, base=16, bitRange=7
1268
- sfr = "TC0_CMR.LDBDIS", "Memory", 0xfffa0004, 4, base=16, bitRange=7
1269
- sfr = "TC0_CMR.ETRGEDG", "Memory", 0xfffa0004, 4, base=16, bitRange=8-9
1270
- sfr = "TC0_CMR.EEVTEDG", "Memory", 0xfffa0004, 4, base=16, bitRange=8-9
1271
- sfr = "TC0_CMR.EEVT", "Memory", 0xfffa0004, 4, base=16, bitRange=10-11
1272
- sfr = "TC0_CMR.ABETRG", "Memory", 0xfffa0004, 4, base=16, bitRange=10
1273
- sfr = "TC0_CMR.ENETRG", "Memory", 0xfffa0004, 4, base=16, bitRange=12
1274
- sfr = "TC0_CMR.WAVESEL", "Memory", 0xfffa0004, 4, base=16, bitRange=13-14
1275
- sfr = "TC0_CMR.CPCTRG", "Memory", 0xfffa0004, 4, base=16, bitRange=14
1276
- sfr = "TC0_CMR.WAVE", "Memory", 0xfffa0004, 4, base=16, bitRange=15
1277
- sfr = "TC0_CMR.ACPA", "Memory", 0xfffa0004, 4, base=16, bitRange=16-17
1278
- sfr = "TC0_CMR.LDRA", "Memory", 0xfffa0004, 4, base=16, bitRange=16-17
1279
- sfr = "TC0_CMR.ACPC", "Memory", 0xfffa0004, 4, base=16, bitRange=18-19
1280
- sfr = "TC0_CMR.LDRB", "Memory", 0xfffa0004, 4, base=16, bitRange=18-19
1281
- sfr = "TC0_CMR.AEEVT", "Memory", 0xfffa0004, 4, base=16, bitRange=20-21
1282
- sfr = "TC0_CMR.ASWTRG", "Memory", 0xfffa0004, 4, base=16, bitRange=22-23
1283
- sfr = "TC0_CMR.BCPB", "Memory", 0xfffa0004, 4, base=16, bitRange=24-25
1284
- sfr = "TC0_CMR.BCPC", "Memory", 0xfffa0004, 4, base=16, bitRange=26-27
1285
- sfr = "TC0_CMR.BEEVT", "Memory", 0xfffa0004, 4, base=16, bitRange=28-29
1286
- sfr = "TC0_CMR.BSWTRG", "Memory", 0xfffa0004, 4, base=16, bitRange=30-31
1287
- sfr = "TC0_CV", "Memory", 0xfffa0010, 4, base=16
1288
- sfr = "TC0_RA", "Memory", 0xfffa0014, 4, base=16
1289
- sfr = "TC0_RB", "Memory", 0xfffa0018, 4, base=16
1290
- sfr = "TC0_RC", "Memory", 0xfffa001c, 4, base=16
1291
- sfr = "TC0_SR", "Memory", 0xfffa0020, 4, base=16
1292
- sfr = "TC0_SR.COVFS", "Memory", 0xfffa0020, 4, base=16, bitRange=0
1293
- sfr = "TC0_SR.LOVRS", "Memory", 0xfffa0020, 4, base=16, bitRange=1
1294
- sfr = "TC0_SR.CPAS", "Memory", 0xfffa0020, 4, base=16, bitRange=2
1295
- sfr = "TC0_SR.CPBS", "Memory", 0xfffa0020, 4, base=16, bitRange=3
1296
- sfr = "TC0_SR.CPCS", "Memory", 0xfffa0020, 4, base=16, bitRange=4
1297
- sfr = "TC0_SR.LDRAS", "Memory", 0xfffa0020, 4, base=16, bitRange=5
1298
- sfr = "TC0_SR.LDRBS", "Memory", 0xfffa0020, 4, base=16, bitRange=6
1299
- sfr = "TC0_SR.ETRGS", "Memory", 0xfffa0020, 4, base=16, bitRange=7
1300
- sfr = "TC0_SR.CLKSTA", "Memory", 0xfffa0020, 4, base=16, bitRange=16
1301
- sfr = "TC0_SR.MTIOA", "Memory", 0xfffa0020, 4, base=16, bitRange=17
1302
- sfr = "TC0_SR.MTIOB", "Memory", 0xfffa0020, 4, base=16, bitRange=18
1303
- sfr = "TC0_IER", "Memory", 0xfffa0024, 4, base=16
1304
- sfr = "TC0_IER.COVFS", "Memory", 0xfffa0024, 4, base=16, bitRange=0
1305
- sfr = "TC0_IER.LOVRS", "Memory", 0xfffa0024, 4, base=16, bitRange=1
1306
- sfr = "TC0_IER.CPAS", "Memory", 0xfffa0024, 4, base=16, bitRange=2
1307
- sfr = "TC0_IER.CPBS", "Memory", 0xfffa0024, 4, base=16, bitRange=3
1308
- sfr = "TC0_IER.CPCS", "Memory", 0xfffa0024, 4, base=16, bitRange=4
1309
- sfr = "TC0_IER.LDRAS", "Memory", 0xfffa0024, 4, base=16, bitRange=5
1310
- sfr = "TC0_IER.LDRBS", "Memory", 0xfffa0024, 4, base=16, bitRange=6
1311
- sfr = "TC0_IER.ETRGS", "Memory", 0xfffa0024, 4, base=16, bitRange=7
1312
- sfr = "TC0_IDR", "Memory", 0xfffa0028, 4, base=16
1313
- sfr = "TC0_IDR.COVFS", "Memory", 0xfffa0028, 4, base=16, bitRange=0
1314
- sfr = "TC0_IDR.LOVRS", "Memory", 0xfffa0028, 4, base=16, bitRange=1
1315
- sfr = "TC0_IDR.CPAS", "Memory", 0xfffa0028, 4, base=16, bitRange=2
1316
- sfr = "TC0_IDR.CPBS", "Memory", 0xfffa0028, 4, base=16, bitRange=3
1317
- sfr = "TC0_IDR.CPCS", "Memory", 0xfffa0028, 4, base=16, bitRange=4
1318
- sfr = "TC0_IDR.LDRAS", "Memory", 0xfffa0028, 4, base=16, bitRange=5
1319
- sfr = "TC0_IDR.LDRBS", "Memory", 0xfffa0028, 4, base=16, bitRange=6
1320
- sfr = "TC0_IDR.ETRGS", "Memory", 0xfffa0028, 4, base=16, bitRange=7
1321
- sfr = "TC0_IMR", "Memory", 0xfffa002c, 4, base=16
1322
- sfr = "TC0_IMR.COVFS", "Memory", 0xfffa002c, 4, base=16, bitRange=0
1323
- sfr = "TC0_IMR.LOVRS", "Memory", 0xfffa002c, 4, base=16, bitRange=1
1324
- sfr = "TC0_IMR.CPAS", "Memory", 0xfffa002c, 4, base=16, bitRange=2
1325
- sfr = "TC0_IMR.CPBS", "Memory", 0xfffa002c, 4, base=16, bitRange=3
1326
- sfr = "TC0_IMR.CPCS", "Memory", 0xfffa002c, 4, base=16, bitRange=4
1327
- sfr = "TC0_IMR.LDRAS", "Memory", 0xfffa002c, 4, base=16, bitRange=5
1328
- sfr = "TC0_IMR.LDRBS", "Memory", 0xfffa002c, 4, base=16, bitRange=6
1329
- sfr = "TC0_IMR.ETRGS", "Memory", 0xfffa002c, 4, base=16, bitRange=7
1330
- ; ========== Register definition for TC1 peripheral ==========
1331
- sfr = "TC1_CCR", "Memory", 0xfffa0040, 4, base=16
1332
- sfr = "TC1_CCR.CLKEN", "Memory", 0xfffa0040, 4, base=16, bitRange=0
1333
- sfr = "TC1_CCR.CLKDIS", "Memory", 0xfffa0040, 4, base=16, bitRange=1
1334
- sfr = "TC1_CCR.SWTRG", "Memory", 0xfffa0040, 4, base=16, bitRange=2
1335
- sfr = "TC1_CMR", "Memory", 0xfffa0044, 4, base=16
1336
- sfr = "TC1_CMR.CLKS", "Memory", 0xfffa0044, 4, base=16, bitRange=0-2
1337
- sfr = "TC1_CMR.CLKI", "Memory", 0xfffa0044, 4, base=16, bitRange=3
1338
- sfr = "TC1_CMR.BURST", "Memory", 0xfffa0044, 4, base=16, bitRange=4-5
1339
- sfr = "TC1_CMR.CPCSTOP", "Memory", 0xfffa0044, 4, base=16, bitRange=6
1340
- sfr = "TC1_CMR.LDBSTOP", "Memory", 0xfffa0044, 4, base=16, bitRange=6
1341
- sfr = "TC1_CMR.CPCDIS", "Memory", 0xfffa0044, 4, base=16, bitRange=7
1342
- sfr = "TC1_CMR.LDBDIS", "Memory", 0xfffa0044, 4, base=16, bitRange=7
1343
- sfr = "TC1_CMR.ETRGEDG", "Memory", 0xfffa0044, 4, base=16, bitRange=8-9
1344
- sfr = "TC1_CMR.EEVTEDG", "Memory", 0xfffa0044, 4, base=16, bitRange=8-9
1345
- sfr = "TC1_CMR.EEVT", "Memory", 0xfffa0044, 4, base=16, bitRange=10-11
1346
- sfr = "TC1_CMR.ABETRG", "Memory", 0xfffa0044, 4, base=16, bitRange=10
1347
- sfr = "TC1_CMR.ENETRG", "Memory", 0xfffa0044, 4, base=16, bitRange=12
1348
- sfr = "TC1_CMR.WAVESEL", "Memory", 0xfffa0044, 4, base=16, bitRange=13-14
1349
- sfr = "TC1_CMR.CPCTRG", "Memory", 0xfffa0044, 4, base=16, bitRange=14
1350
- sfr = "TC1_CMR.WAVE", "Memory", 0xfffa0044, 4, base=16, bitRange=15
1351
- sfr = "TC1_CMR.ACPA", "Memory", 0xfffa0044, 4, base=16, bitRange=16-17
1352
- sfr = "TC1_CMR.LDRA", "Memory", 0xfffa0044, 4, base=16, bitRange=16-17
1353
- sfr = "TC1_CMR.ACPC", "Memory", 0xfffa0044, 4, base=16, bitRange=18-19
1354
- sfr = "TC1_CMR.LDRB", "Memory", 0xfffa0044, 4, base=16, bitRange=18-19
1355
- sfr = "TC1_CMR.AEEVT", "Memory", 0xfffa0044, 4, base=16, bitRange=20-21
1356
- sfr = "TC1_CMR.ASWTRG", "Memory", 0xfffa0044, 4, base=16, bitRange=22-23
1357
- sfr = "TC1_CMR.BCPB", "Memory", 0xfffa0044, 4, base=16, bitRange=24-25
1358
- sfr = "TC1_CMR.BCPC", "Memory", 0xfffa0044, 4, base=16, bitRange=26-27
1359
- sfr = "TC1_CMR.BEEVT", "Memory", 0xfffa0044, 4, base=16, bitRange=28-29
1360
- sfr = "TC1_CMR.BSWTRG", "Memory", 0xfffa0044, 4, base=16, bitRange=30-31
1361
- sfr = "TC1_CV", "Memory", 0xfffa0050, 4, base=16
1362
- sfr = "TC1_RA", "Memory", 0xfffa0054, 4, base=16
1363
- sfr = "TC1_RB", "Memory", 0xfffa0058, 4, base=16
1364
- sfr = "TC1_RC", "Memory", 0xfffa005c, 4, base=16
1365
- sfr = "TC1_SR", "Memory", 0xfffa0060, 4, base=16
1366
- sfr = "TC1_SR.COVFS", "Memory", 0xfffa0060, 4, base=16, bitRange=0
1367
- sfr = "TC1_SR.LOVRS", "Memory", 0xfffa0060, 4, base=16, bitRange=1
1368
- sfr = "TC1_SR.CPAS", "Memory", 0xfffa0060, 4, base=16, bitRange=2
1369
- sfr = "TC1_SR.CPBS", "Memory", 0xfffa0060, 4, base=16, bitRange=3
1370
- sfr = "TC1_SR.CPCS", "Memory", 0xfffa0060, 4, base=16, bitRange=4
1371
- sfr = "TC1_SR.LDRAS", "Memory", 0xfffa0060, 4, base=16, bitRange=5
1372
- sfr = "TC1_SR.LDRBS", "Memory", 0xfffa0060, 4, base=16, bitRange=6
1373
- sfr = "TC1_SR.ETRGS", "Memory", 0xfffa0060, 4, base=16, bitRange=7
1374
- sfr = "TC1_SR.CLKSTA", "Memory", 0xfffa0060, 4, base=16, bitRange=16
1375
- sfr = "TC1_SR.MTIOA", "Memory", 0xfffa0060, 4, base=16, bitRange=17
1376
- sfr = "TC1_SR.MTIOB", "Memory", 0xfffa0060, 4, base=16, bitRange=18
1377
- sfr = "TC1_IER", "Memory", 0xfffa0064, 4, base=16
1378
- sfr = "TC1_IER.COVFS", "Memory", 0xfffa0064, 4, base=16, bitRange=0
1379
- sfr = "TC1_IER.LOVRS", "Memory", 0xfffa0064, 4, base=16, bitRange=1
1380
- sfr = "TC1_IER.CPAS", "Memory", 0xfffa0064, 4, base=16, bitRange=2
1381
- sfr = "TC1_IER.CPBS", "Memory", 0xfffa0064, 4, base=16, bitRange=3
1382
- sfr = "TC1_IER.CPCS", "Memory", 0xfffa0064, 4, base=16, bitRange=4
1383
- sfr = "TC1_IER.LDRAS", "Memory", 0xfffa0064, 4, base=16, bitRange=5
1384
- sfr = "TC1_IER.LDRBS", "Memory", 0xfffa0064, 4, base=16, bitRange=6
1385
- sfr = "TC1_IER.ETRGS", "Memory", 0xfffa0064, 4, base=16, bitRange=7
1386
- sfr = "TC1_IDR", "Memory", 0xfffa0068, 4, base=16
1387
- sfr = "TC1_IDR.COVFS", "Memory", 0xfffa0068, 4, base=16, bitRange=0
1388
- sfr = "TC1_IDR.LOVRS", "Memory", 0xfffa0068, 4, base=16, bitRange=1
1389
- sfr = "TC1_IDR.CPAS", "Memory", 0xfffa0068, 4, base=16, bitRange=2
1390
- sfr = "TC1_IDR.CPBS", "Memory", 0xfffa0068, 4, base=16, bitRange=3
1391
- sfr = "TC1_IDR.CPCS", "Memory", 0xfffa0068, 4, base=16, bitRange=4
1392
- sfr = "TC1_IDR.LDRAS", "Memory", 0xfffa0068, 4, base=16, bitRange=5
1393
- sfr = "TC1_IDR.LDRBS", "Memory", 0xfffa0068, 4, base=16, bitRange=6
1394
- sfr = "TC1_IDR.ETRGS", "Memory", 0xfffa0068, 4, base=16, bitRange=7
1395
- sfr = "TC1_IMR", "Memory", 0xfffa006c, 4, base=16
1396
- sfr = "TC1_IMR.COVFS", "Memory", 0xfffa006c, 4, base=16, bitRange=0
1397
- sfr = "TC1_IMR.LOVRS", "Memory", 0xfffa006c, 4, base=16, bitRange=1
1398
- sfr = "TC1_IMR.CPAS", "Memory", 0xfffa006c, 4, base=16, bitRange=2
1399
- sfr = "TC1_IMR.CPBS", "Memory", 0xfffa006c, 4, base=16, bitRange=3
1400
- sfr = "TC1_IMR.CPCS", "Memory", 0xfffa006c, 4, base=16, bitRange=4
1401
- sfr = "TC1_IMR.LDRAS", "Memory", 0xfffa006c, 4, base=16, bitRange=5
1402
- sfr = "TC1_IMR.LDRBS", "Memory", 0xfffa006c, 4, base=16, bitRange=6
1403
- sfr = "TC1_IMR.ETRGS", "Memory", 0xfffa006c, 4, base=16, bitRange=7
1404
- ; ========== Register definition for TC2 peripheral ==========
1405
- sfr = "TC2_CCR", "Memory", 0xfffa0080, 4, base=16
1406
- sfr = "TC2_CCR.CLKEN", "Memory", 0xfffa0080, 4, base=16, bitRange=0
1407
- sfr = "TC2_CCR.CLKDIS", "Memory", 0xfffa0080, 4, base=16, bitRange=1
1408
- sfr = "TC2_CCR.SWTRG", "Memory", 0xfffa0080, 4, base=16, bitRange=2
1409
- sfr = "TC2_CMR", "Memory", 0xfffa0084, 4, base=16
1410
- sfr = "TC2_CMR.CLKS", "Memory", 0xfffa0084, 4, base=16, bitRange=0-2
1411
- sfr = "TC2_CMR.CLKI", "Memory", 0xfffa0084, 4, base=16, bitRange=3
1412
- sfr = "TC2_CMR.BURST", "Memory", 0xfffa0084, 4, base=16, bitRange=4-5
1413
- sfr = "TC2_CMR.CPCSTOP", "Memory", 0xfffa0084, 4, base=16, bitRange=6
1414
- sfr = "TC2_CMR.LDBSTOP", "Memory", 0xfffa0084, 4, base=16, bitRange=6
1415
- sfr = "TC2_CMR.CPCDIS", "Memory", 0xfffa0084, 4, base=16, bitRange=7
1416
- sfr = "TC2_CMR.LDBDIS", "Memory", 0xfffa0084, 4, base=16, bitRange=7
1417
- sfr = "TC2_CMR.ETRGEDG", "Memory", 0xfffa0084, 4, base=16, bitRange=8-9
1418
- sfr = "TC2_CMR.EEVTEDG", "Memory", 0xfffa0084, 4, base=16, bitRange=8-9
1419
- sfr = "TC2_CMR.EEVT", "Memory", 0xfffa0084, 4, base=16, bitRange=10-11
1420
- sfr = "TC2_CMR.ABETRG", "Memory", 0xfffa0084, 4, base=16, bitRange=10
1421
- sfr = "TC2_CMR.ENETRG", "Memory", 0xfffa0084, 4, base=16, bitRange=12
1422
- sfr = "TC2_CMR.WAVESEL", "Memory", 0xfffa0084, 4, base=16, bitRange=13-14
1423
- sfr = "TC2_CMR.CPCTRG", "Memory", 0xfffa0084, 4, base=16, bitRange=14
1424
- sfr = "TC2_CMR.WAVE", "Memory", 0xfffa0084, 4, base=16, bitRange=15
1425
- sfr = "TC2_CMR.ACPA", "Memory", 0xfffa0084, 4, base=16, bitRange=16-17
1426
- sfr = "TC2_CMR.LDRA", "Memory", 0xfffa0084, 4, base=16, bitRange=16-17
1427
- sfr = "TC2_CMR.ACPC", "Memory", 0xfffa0084, 4, base=16, bitRange=18-19
1428
- sfr = "TC2_CMR.LDRB", "Memory", 0xfffa0084, 4, base=16, bitRange=18-19
1429
- sfr = "TC2_CMR.AEEVT", "Memory", 0xfffa0084, 4, base=16, bitRange=20-21
1430
- sfr = "TC2_CMR.ASWTRG", "Memory", 0xfffa0084, 4, base=16, bitRange=22-23
1431
- sfr = "TC2_CMR.BCPB", "Memory", 0xfffa0084, 4, base=16, bitRange=24-25
1432
- sfr = "TC2_CMR.BCPC", "Memory", 0xfffa0084, 4, base=16, bitRange=26-27
1433
- sfr = "TC2_CMR.BEEVT", "Memory", 0xfffa0084, 4, base=16, bitRange=28-29
1434
- sfr = "TC2_CMR.BSWTRG", "Memory", 0xfffa0084, 4, base=16, bitRange=30-31
1435
- sfr = "TC2_CV", "Memory", 0xfffa0090, 4, base=16
1436
- sfr = "TC2_RA", "Memory", 0xfffa0094, 4, base=16
1437
- sfr = "TC2_RB", "Memory", 0xfffa0098, 4, base=16
1438
- sfr = "TC2_RC", "Memory", 0xfffa009c, 4, base=16
1439
- sfr = "TC2_SR", "Memory", 0xfffa00a0, 4, base=16
1440
- sfr = "TC2_SR.COVFS", "Memory", 0xfffa00a0, 4, base=16, bitRange=0
1441
- sfr = "TC2_SR.LOVRS", "Memory", 0xfffa00a0, 4, base=16, bitRange=1
1442
- sfr = "TC2_SR.CPAS", "Memory", 0xfffa00a0, 4, base=16, bitRange=2
1443
- sfr = "TC2_SR.CPBS", "Memory", 0xfffa00a0, 4, base=16, bitRange=3
1444
- sfr = "TC2_SR.CPCS", "Memory", 0xfffa00a0, 4, base=16, bitRange=4
1445
- sfr = "TC2_SR.LDRAS", "Memory", 0xfffa00a0, 4, base=16, bitRange=5
1446
- sfr = "TC2_SR.LDRBS", "Memory", 0xfffa00a0, 4, base=16, bitRange=6
1447
- sfr = "TC2_SR.ETRGS", "Memory", 0xfffa00a0, 4, base=16, bitRange=7
1448
- sfr = "TC2_SR.CLKSTA", "Memory", 0xfffa00a0, 4, base=16, bitRange=16
1449
- sfr = "TC2_SR.MTIOA", "Memory", 0xfffa00a0, 4, base=16, bitRange=17
1450
- sfr = "TC2_SR.MTIOB", "Memory", 0xfffa00a0, 4, base=16, bitRange=18
1451
- sfr = "TC2_IER", "Memory", 0xfffa00a4, 4, base=16
1452
- sfr = "TC2_IER.COVFS", "Memory", 0xfffa00a4, 4, base=16, bitRange=0
1453
- sfr = "TC2_IER.LOVRS", "Memory", 0xfffa00a4, 4, base=16, bitRange=1
1454
- sfr = "TC2_IER.CPAS", "Memory", 0xfffa00a4, 4, base=16, bitRange=2
1455
- sfr = "TC2_IER.CPBS", "Memory", 0xfffa00a4, 4, base=16, bitRange=3
1456
- sfr = "TC2_IER.CPCS", "Memory", 0xfffa00a4, 4, base=16, bitRange=4
1457
- sfr = "TC2_IER.LDRAS", "Memory", 0xfffa00a4, 4, base=16, bitRange=5
1458
- sfr = "TC2_IER.LDRBS", "Memory", 0xfffa00a4, 4, base=16, bitRange=6
1459
- sfr = "TC2_IER.ETRGS", "Memory", 0xfffa00a4, 4, base=16, bitRange=7
1460
- sfr = "TC2_IDR", "Memory", 0xfffa00a8, 4, base=16
1461
- sfr = "TC2_IDR.COVFS", "Memory", 0xfffa00a8, 4, base=16, bitRange=0
1462
- sfr = "TC2_IDR.LOVRS", "Memory", 0xfffa00a8, 4, base=16, bitRange=1
1463
- sfr = "TC2_IDR.CPAS", "Memory", 0xfffa00a8, 4, base=16, bitRange=2
1464
- sfr = "TC2_IDR.CPBS", "Memory", 0xfffa00a8, 4, base=16, bitRange=3
1465
- sfr = "TC2_IDR.CPCS", "Memory", 0xfffa00a8, 4, base=16, bitRange=4
1466
- sfr = "TC2_IDR.LDRAS", "Memory", 0xfffa00a8, 4, base=16, bitRange=5
1467
- sfr = "TC2_IDR.LDRBS", "Memory", 0xfffa00a8, 4, base=16, bitRange=6
1468
- sfr = "TC2_IDR.ETRGS", "Memory", 0xfffa00a8, 4, base=16, bitRange=7
1469
- sfr = "TC2_IMR", "Memory", 0xfffa00ac, 4, base=16
1470
- sfr = "TC2_IMR.COVFS", "Memory", 0xfffa00ac, 4, base=16, bitRange=0
1471
- sfr = "TC2_IMR.LOVRS", "Memory", 0xfffa00ac, 4, base=16, bitRange=1
1472
- sfr = "TC2_IMR.CPAS", "Memory", 0xfffa00ac, 4, base=16, bitRange=2
1473
- sfr = "TC2_IMR.CPBS", "Memory", 0xfffa00ac, 4, base=16, bitRange=3
1474
- sfr = "TC2_IMR.CPCS", "Memory", 0xfffa00ac, 4, base=16, bitRange=4
1475
- sfr = "TC2_IMR.LDRAS", "Memory", 0xfffa00ac, 4, base=16, bitRange=5
1476
- sfr = "TC2_IMR.LDRBS", "Memory", 0xfffa00ac, 4, base=16, bitRange=6
1477
- sfr = "TC2_IMR.ETRGS", "Memory", 0xfffa00ac, 4, base=16, bitRange=7
1478
- ; ========== Register definition for TCB peripheral ==========
1479
- sfr = "TCB_BCR", "Memory", 0xfffa00c0, 4, base=16
1480
- sfr = "TCB_BCR.SYNC", "Memory", 0xfffa00c0, 4, base=16, bitRange=0
1481
- sfr = "TCB_BMR", "Memory", 0xfffa00c4, 4, base=16
1482
- sfr = "TCB_BMR.TC0XC0S", "Memory", 0xfffa00c4, 4, base=16, bitRange=0-1
1483
- sfr = "TCB_BMR.TC1XC1S", "Memory", 0xfffa00c4, 4, base=16, bitRange=2-3
1484
- sfr = "TCB_BMR.TC2XC2S", "Memory", 0xfffa00c4, 4, base=16, bitRange=4-5
1485
- ; ========== Register definition for CAN_MB0 peripheral ==========
1486
- sfr = "CAN_MB0_MMR", "Memory", 0xfffd0200, 4, base=16
1487
- sfr = "CAN_MB0_MMR.MTIMEMARK", "Memory", 0xfffd0200, 4, base=16, bitRange=0-15
1488
- sfr = "CAN_MB0_MMR.PRIOR", "Memory", 0xfffd0200, 4, base=16, bitRange=16-19
1489
- sfr = "CAN_MB0_MMR.MOT", "Memory", 0xfffd0200, 4, base=16, bitRange=24-26
1490
- sfr = "CAN_MB0_MAM", "Memory", 0xfffd0204, 4, base=16
1491
- sfr = "CAN_MB0_MAM.MIDvB", "Memory", 0xfffd0204, 4, base=16, bitRange=0-17
1492
- sfr = "CAN_MB0_MAM.MIDvA", "Memory", 0xfffd0204, 4, base=16, bitRange=18-28
1493
- sfr = "CAN_MB0_MAM.MIDE", "Memory", 0xfffd0204, 4, base=16, bitRange=29
1494
- sfr = "CAN_MB0_MID", "Memory", 0xfffd0208, 4, base=16
1495
- sfr = "CAN_MB0_MID.MIDvB", "Memory", 0xfffd0208, 4, base=16, bitRange=0-17
1496
- sfr = "CAN_MB0_MID.MIDvA", "Memory", 0xfffd0208, 4, base=16, bitRange=18-28
1497
- sfr = "CAN_MB0_MID.MIDE", "Memory", 0xfffd0208, 4, base=16, bitRange=29
1498
- sfr = "CAN_MB0_MFID", "Memory", 0xfffd020c, 4, base=16
1499
- sfr = "CAN_MB0_MSR", "Memory", 0xfffd0210, 4, base=16
1500
- sfr = "CAN_MB0_MSR.MTIMESTAMP", "Memory", 0xfffd0210, 4, base=16, bitRange=0-15
1501
- sfr = "CAN_MB0_MSR.MDLC", "Memory", 0xfffd0210, 4, base=16, bitRange=16-19
1502
- sfr = "CAN_MB0_MSR.MRTR", "Memory", 0xfffd0210, 4, base=16, bitRange=20
1503
- sfr = "CAN_MB0_MSR.MABT", "Memory", 0xfffd0210, 4, base=16, bitRange=22
1504
- sfr = "CAN_MB0_MSR.MRDY", "Memory", 0xfffd0210, 4, base=16, bitRange=23
1505
- sfr = "CAN_MB0_MSR.MMI", "Memory", 0xfffd0210, 4, base=16, bitRange=24
1506
- sfr = "CAN_MB0_MDL", "Memory", 0xfffd0214, 4, base=16
1507
- sfr = "CAN_MB0_MDH", "Memory", 0xfffd0218, 4, base=16
1508
- sfr = "CAN_MB0_MCR", "Memory", 0xfffd021c, 4, base=16
1509
- sfr = "CAN_MB0_MCR.MDLC", "Memory", 0xfffd021c, 4, base=16, bitRange=16-19
1510
- sfr = "CAN_MB0_MCR.MRTR", "Memory", 0xfffd021c, 4, base=16, bitRange=20
1511
- sfr = "CAN_MB0_MCR.MACR", "Memory", 0xfffd021c, 4, base=16, bitRange=22
1512
- sfr = "CAN_MB0_MCR.MTCR", "Memory", 0xfffd021c, 4, base=16, bitRange=23
1513
- ; ========== Register definition for CAN_MB1 peripheral ==========
1514
- sfr = "CAN_MB1_MMR", "Memory", 0xfffd0220, 4, base=16
1515
- sfr = "CAN_MB1_MMR.MTIMEMARK", "Memory", 0xfffd0220, 4, base=16, bitRange=0-15
1516
- sfr = "CAN_MB1_MMR.PRIOR", "Memory", 0xfffd0220, 4, base=16, bitRange=16-19
1517
- sfr = "CAN_MB1_MMR.MOT", "Memory", 0xfffd0220, 4, base=16, bitRange=24-26
1518
- sfr = "CAN_MB1_MAM", "Memory", 0xfffd0224, 4, base=16
1519
- sfr = "CAN_MB1_MAM.MIDvB", "Memory", 0xfffd0224, 4, base=16, bitRange=0-17
1520
- sfr = "CAN_MB1_MAM.MIDvA", "Memory", 0xfffd0224, 4, base=16, bitRange=18-28
1521
- sfr = "CAN_MB1_MAM.MIDE", "Memory", 0xfffd0224, 4, base=16, bitRange=29
1522
- sfr = "CAN_MB1_MID", "Memory", 0xfffd0228, 4, base=16
1523
- sfr = "CAN_MB1_MID.MIDvB", "Memory", 0xfffd0228, 4, base=16, bitRange=0-17
1524
- sfr = "CAN_MB1_MID.MIDvA", "Memory", 0xfffd0228, 4, base=16, bitRange=18-28
1525
- sfr = "CAN_MB1_MID.MIDE", "Memory", 0xfffd0228, 4, base=16, bitRange=29
1526
- sfr = "CAN_MB1_MFID", "Memory", 0xfffd022c, 4, base=16
1527
- sfr = "CAN_MB1_MSR", "Memory", 0xfffd0230, 4, base=16
1528
- sfr = "CAN_MB1_MSR.MTIMESTAMP", "Memory", 0xfffd0230, 4, base=16, bitRange=0-15
1529
- sfr = "CAN_MB1_MSR.MDLC", "Memory", 0xfffd0230, 4, base=16, bitRange=16-19
1530
- sfr = "CAN_MB1_MSR.MRTR", "Memory", 0xfffd0230, 4, base=16, bitRange=20
1531
- sfr = "CAN_MB1_MSR.MABT", "Memory", 0xfffd0230, 4, base=16, bitRange=22
1532
- sfr = "CAN_MB1_MSR.MRDY", "Memory", 0xfffd0230, 4, base=16, bitRange=23
1533
- sfr = "CAN_MB1_MSR.MMI", "Memory", 0xfffd0230, 4, base=16, bitRange=24
1534
- sfr = "CAN_MB1_MDL", "Memory", 0xfffd0234, 4, base=16
1535
- sfr = "CAN_MB1_MDH", "Memory", 0xfffd0238, 4, base=16
1536
- sfr = "CAN_MB1_MCR", "Memory", 0xfffd023c, 4, base=16
1537
- sfr = "CAN_MB1_MCR.MDLC", "Memory", 0xfffd023c, 4, base=16, bitRange=16-19
1538
- sfr = "CAN_MB1_MCR.MRTR", "Memory", 0xfffd023c, 4, base=16, bitRange=20
1539
- sfr = "CAN_MB1_MCR.MACR", "Memory", 0xfffd023c, 4, base=16, bitRange=22
1540
- sfr = "CAN_MB1_MCR.MTCR", "Memory", 0xfffd023c, 4, base=16, bitRange=23
1541
- ; ========== Register definition for CAN_MB2 peripheral ==========
1542
- sfr = "CAN_MB2_MMR", "Memory", 0xfffd0240, 4, base=16
1543
- sfr = "CAN_MB2_MMR.MTIMEMARK", "Memory", 0xfffd0240, 4, base=16, bitRange=0-15
1544
- sfr = "CAN_MB2_MMR.PRIOR", "Memory", 0xfffd0240, 4, base=16, bitRange=16-19
1545
- sfr = "CAN_MB2_MMR.MOT", "Memory", 0xfffd0240, 4, base=16, bitRange=24-26
1546
- sfr = "CAN_MB2_MAM", "Memory", 0xfffd0244, 4, base=16
1547
- sfr = "CAN_MB2_MAM.MIDvB", "Memory", 0xfffd0244, 4, base=16, bitRange=0-17
1548
- sfr = "CAN_MB2_MAM.MIDvA", "Memory", 0xfffd0244, 4, base=16, bitRange=18-28
1549
- sfr = "CAN_MB2_MAM.MIDE", "Memory", 0xfffd0244, 4, base=16, bitRange=29
1550
- sfr = "CAN_MB2_MID", "Memory", 0xfffd0248, 4, base=16
1551
- sfr = "CAN_MB2_MID.MIDvB", "Memory", 0xfffd0248, 4, base=16, bitRange=0-17
1552
- sfr = "CAN_MB2_MID.MIDvA", "Memory", 0xfffd0248, 4, base=16, bitRange=18-28
1553
- sfr = "CAN_MB2_MID.MIDE", "Memory", 0xfffd0248, 4, base=16, bitRange=29
1554
- sfr = "CAN_MB2_MFID", "Memory", 0xfffd024c, 4, base=16
1555
- sfr = "CAN_MB2_MSR", "Memory", 0xfffd0250, 4, base=16
1556
- sfr = "CAN_MB2_MSR.MTIMESTAMP", "Memory", 0xfffd0250, 4, base=16, bitRange=0-15
1557
- sfr = "CAN_MB2_MSR.MDLC", "Memory", 0xfffd0250, 4, base=16, bitRange=16-19
1558
- sfr = "CAN_MB2_MSR.MRTR", "Memory", 0xfffd0250, 4, base=16, bitRange=20
1559
- sfr = "CAN_MB2_MSR.MABT", "Memory", 0xfffd0250, 4, base=16, bitRange=22
1560
- sfr = "CAN_MB2_MSR.MRDY", "Memory", 0xfffd0250, 4, base=16, bitRange=23
1561
- sfr = "CAN_MB2_MSR.MMI", "Memory", 0xfffd0250, 4, base=16, bitRange=24
1562
- sfr = "CAN_MB2_MDL", "Memory", 0xfffd0254, 4, base=16
1563
- sfr = "CAN_MB2_MDH", "Memory", 0xfffd0258, 4, base=16
1564
- sfr = "CAN_MB2_MCR", "Memory", 0xfffd025c, 4, base=16
1565
- sfr = "CAN_MB2_MCR.MDLC", "Memory", 0xfffd025c, 4, base=16, bitRange=16-19
1566
- sfr = "CAN_MB2_MCR.MRTR", "Memory", 0xfffd025c, 4, base=16, bitRange=20
1567
- sfr = "CAN_MB2_MCR.MACR", "Memory", 0xfffd025c, 4, base=16, bitRange=22
1568
- sfr = "CAN_MB2_MCR.MTCR", "Memory", 0xfffd025c, 4, base=16, bitRange=23
1569
- ; ========== Register definition for CAN_MB3 peripheral ==========
1570
- sfr = "CAN_MB3_MMR", "Memory", 0xfffd0260, 4, base=16
1571
- sfr = "CAN_MB3_MMR.MTIMEMARK", "Memory", 0xfffd0260, 4, base=16, bitRange=0-15
1572
- sfr = "CAN_MB3_MMR.PRIOR", "Memory", 0xfffd0260, 4, base=16, bitRange=16-19
1573
- sfr = "CAN_MB3_MMR.MOT", "Memory", 0xfffd0260, 4, base=16, bitRange=24-26
1574
- sfr = "CAN_MB3_MAM", "Memory", 0xfffd0264, 4, base=16
1575
- sfr = "CAN_MB3_MAM.MIDvB", "Memory", 0xfffd0264, 4, base=16, bitRange=0-17
1576
- sfr = "CAN_MB3_MAM.MIDvA", "Memory", 0xfffd0264, 4, base=16, bitRange=18-28
1577
- sfr = "CAN_MB3_MAM.MIDE", "Memory", 0xfffd0264, 4, base=16, bitRange=29
1578
- sfr = "CAN_MB3_MID", "Memory", 0xfffd0268, 4, base=16
1579
- sfr = "CAN_MB3_MID.MIDvB", "Memory", 0xfffd0268, 4, base=16, bitRange=0-17
1580
- sfr = "CAN_MB3_MID.MIDvA", "Memory", 0xfffd0268, 4, base=16, bitRange=18-28
1581
- sfr = "CAN_MB3_MID.MIDE", "Memory", 0xfffd0268, 4, base=16, bitRange=29
1582
- sfr = "CAN_MB3_MFID", "Memory", 0xfffd026c, 4, base=16
1583
- sfr = "CAN_MB3_MSR", "Memory", 0xfffd0270, 4, base=16
1584
- sfr = "CAN_MB3_MSR.MTIMESTAMP", "Memory", 0xfffd0270, 4, base=16, bitRange=0-15
1585
- sfr = "CAN_MB3_MSR.MDLC", "Memory", 0xfffd0270, 4, base=16, bitRange=16-19
1586
- sfr = "CAN_MB3_MSR.MRTR", "Memory", 0xfffd0270, 4, base=16, bitRange=20
1587
- sfr = "CAN_MB3_MSR.MABT", "Memory", 0xfffd0270, 4, base=16, bitRange=22
1588
- sfr = "CAN_MB3_MSR.MRDY", "Memory", 0xfffd0270, 4, base=16, bitRange=23
1589
- sfr = "CAN_MB3_MSR.MMI", "Memory", 0xfffd0270, 4, base=16, bitRange=24
1590
- sfr = "CAN_MB3_MDL", "Memory", 0xfffd0274, 4, base=16
1591
- sfr = "CAN_MB3_MDH", "Memory", 0xfffd0278, 4, base=16
1592
- sfr = "CAN_MB3_MCR", "Memory", 0xfffd027c, 4, base=16
1593
- sfr = "CAN_MB3_MCR.MDLC", "Memory", 0xfffd027c, 4, base=16, bitRange=16-19
1594
- sfr = "CAN_MB3_MCR.MRTR", "Memory", 0xfffd027c, 4, base=16, bitRange=20
1595
- sfr = "CAN_MB3_MCR.MACR", "Memory", 0xfffd027c, 4, base=16, bitRange=22
1596
- sfr = "CAN_MB3_MCR.MTCR", "Memory", 0xfffd027c, 4, base=16, bitRange=23
1597
- ; ========== Register definition for CAN_MB4 peripheral ==========
1598
- sfr = "CAN_MB4_MMR", "Memory", 0xfffd0280, 4, base=16
1599
- sfr = "CAN_MB4_MMR.MTIMEMARK", "Memory", 0xfffd0280, 4, base=16, bitRange=0-15
1600
- sfr = "CAN_MB4_MMR.PRIOR", "Memory", 0xfffd0280, 4, base=16, bitRange=16-19
1601
- sfr = "CAN_MB4_MMR.MOT", "Memory", 0xfffd0280, 4, base=16, bitRange=24-26
1602
- sfr = "CAN_MB4_MAM", "Memory", 0xfffd0284, 4, base=16
1603
- sfr = "CAN_MB4_MAM.MIDvB", "Memory", 0xfffd0284, 4, base=16, bitRange=0-17
1604
- sfr = "CAN_MB4_MAM.MIDvA", "Memory", 0xfffd0284, 4, base=16, bitRange=18-28
1605
- sfr = "CAN_MB4_MAM.MIDE", "Memory", 0xfffd0284, 4, base=16, bitRange=29
1606
- sfr = "CAN_MB4_MID", "Memory", 0xfffd0288, 4, base=16
1607
- sfr = "CAN_MB4_MID.MIDvB", "Memory", 0xfffd0288, 4, base=16, bitRange=0-17
1608
- sfr = "CAN_MB4_MID.MIDvA", "Memory", 0xfffd0288, 4, base=16, bitRange=18-28
1609
- sfr = "CAN_MB4_MID.MIDE", "Memory", 0xfffd0288, 4, base=16, bitRange=29
1610
- sfr = "CAN_MB4_MFID", "Memory", 0xfffd028c, 4, base=16
1611
- sfr = "CAN_MB4_MSR", "Memory", 0xfffd0290, 4, base=16
1612
- sfr = "CAN_MB4_MSR.MTIMESTAMP", "Memory", 0xfffd0290, 4, base=16, bitRange=0-15
1613
- sfr = "CAN_MB4_MSR.MDLC", "Memory", 0xfffd0290, 4, base=16, bitRange=16-19
1614
- sfr = "CAN_MB4_MSR.MRTR", "Memory", 0xfffd0290, 4, base=16, bitRange=20
1615
- sfr = "CAN_MB4_MSR.MABT", "Memory", 0xfffd0290, 4, base=16, bitRange=22
1616
- sfr = "CAN_MB4_MSR.MRDY", "Memory", 0xfffd0290, 4, base=16, bitRange=23
1617
- sfr = "CAN_MB4_MSR.MMI", "Memory", 0xfffd0290, 4, base=16, bitRange=24
1618
- sfr = "CAN_MB4_MDL", "Memory", 0xfffd0294, 4, base=16
1619
- sfr = "CAN_MB4_MDH", "Memory", 0xfffd0298, 4, base=16
1620
- sfr = "CAN_MB4_MCR", "Memory", 0xfffd029c, 4, base=16
1621
- sfr = "CAN_MB4_MCR.MDLC", "Memory", 0xfffd029c, 4, base=16, bitRange=16-19
1622
- sfr = "CAN_MB4_MCR.MRTR", "Memory", 0xfffd029c, 4, base=16, bitRange=20
1623
- sfr = "CAN_MB4_MCR.MACR", "Memory", 0xfffd029c, 4, base=16, bitRange=22
1624
- sfr = "CAN_MB4_MCR.MTCR", "Memory", 0xfffd029c, 4, base=16, bitRange=23
1625
- ; ========== Register definition for CAN_MB5 peripheral ==========
1626
- sfr = "CAN_MB5_MMR", "Memory", 0xfffd02a0, 4, base=16
1627
- sfr = "CAN_MB5_MMR.MTIMEMARK", "Memory", 0xfffd02a0, 4, base=16, bitRange=0-15
1628
- sfr = "CAN_MB5_MMR.PRIOR", "Memory", 0xfffd02a0, 4, base=16, bitRange=16-19
1629
- sfr = "CAN_MB5_MMR.MOT", "Memory", 0xfffd02a0, 4, base=16, bitRange=24-26
1630
- sfr = "CAN_MB5_MAM", "Memory", 0xfffd02a4, 4, base=16
1631
- sfr = "CAN_MB5_MAM.MIDvB", "Memory", 0xfffd02a4, 4, base=16, bitRange=0-17
1632
- sfr = "CAN_MB5_MAM.MIDvA", "Memory", 0xfffd02a4, 4, base=16, bitRange=18-28
1633
- sfr = "CAN_MB5_MAM.MIDE", "Memory", 0xfffd02a4, 4, base=16, bitRange=29
1634
- sfr = "CAN_MB5_MID", "Memory", 0xfffd02a8, 4, base=16
1635
- sfr = "CAN_MB5_MID.MIDvB", "Memory", 0xfffd02a8, 4, base=16, bitRange=0-17
1636
- sfr = "CAN_MB5_MID.MIDvA", "Memory", 0xfffd02a8, 4, base=16, bitRange=18-28
1637
- sfr = "CAN_MB5_MID.MIDE", "Memory", 0xfffd02a8, 4, base=16, bitRange=29
1638
- sfr = "CAN_MB5_MFID", "Memory", 0xfffd02ac, 4, base=16
1639
- sfr = "CAN_MB5_MSR", "Memory", 0xfffd02b0, 4, base=16
1640
- sfr = "CAN_MB5_MSR.MTIMESTAMP", "Memory", 0xfffd02b0, 4, base=16, bitRange=0-15
1641
- sfr = "CAN_MB5_MSR.MDLC", "Memory", 0xfffd02b0, 4, base=16, bitRange=16-19
1642
- sfr = "CAN_MB5_MSR.MRTR", "Memory", 0xfffd02b0, 4, base=16, bitRange=20
1643
- sfr = "CAN_MB5_MSR.MABT", "Memory", 0xfffd02b0, 4, base=16, bitRange=22
1644
- sfr = "CAN_MB5_MSR.MRDY", "Memory", 0xfffd02b0, 4, base=16, bitRange=23
1645
- sfr = "CAN_MB5_MSR.MMI", "Memory", 0xfffd02b0, 4, base=16, bitRange=24
1646
- sfr = "CAN_MB5_MDL", "Memory", 0xfffd02b4, 4, base=16
1647
- sfr = "CAN_MB5_MDH", "Memory", 0xfffd02b8, 4, base=16
1648
- sfr = "CAN_MB5_MCR", "Memory", 0xfffd02bc, 4, base=16
1649
- sfr = "CAN_MB5_MCR.MDLC", "Memory", 0xfffd02bc, 4, base=16, bitRange=16-19
1650
- sfr = "CAN_MB5_MCR.MRTR", "Memory", 0xfffd02bc, 4, base=16, bitRange=20
1651
- sfr = "CAN_MB5_MCR.MACR", "Memory", 0xfffd02bc, 4, base=16, bitRange=22
1652
- sfr = "CAN_MB5_MCR.MTCR", "Memory", 0xfffd02bc, 4, base=16, bitRange=23
1653
- ; ========== Register definition for CAN_MB6 peripheral ==========
1654
- sfr = "CAN_MB6_MMR", "Memory", 0xfffd02c0, 4, base=16
1655
- sfr = "CAN_MB6_MMR.MTIMEMARK", "Memory", 0xfffd02c0, 4, base=16, bitRange=0-15
1656
- sfr = "CAN_MB6_MMR.PRIOR", "Memory", 0xfffd02c0, 4, base=16, bitRange=16-19
1657
- sfr = "CAN_MB6_MMR.MOT", "Memory", 0xfffd02c0, 4, base=16, bitRange=24-26
1658
- sfr = "CAN_MB6_MAM", "Memory", 0xfffd02c4, 4, base=16
1659
- sfr = "CAN_MB6_MAM.MIDvB", "Memory", 0xfffd02c4, 4, base=16, bitRange=0-17
1660
- sfr = "CAN_MB6_MAM.MIDvA", "Memory", 0xfffd02c4, 4, base=16, bitRange=18-28
1661
- sfr = "CAN_MB6_MAM.MIDE", "Memory", 0xfffd02c4, 4, base=16, bitRange=29
1662
- sfr = "CAN_MB6_MID", "Memory", 0xfffd02c8, 4, base=16
1663
- sfr = "CAN_MB6_MID.MIDvB", "Memory", 0xfffd02c8, 4, base=16, bitRange=0-17
1664
- sfr = "CAN_MB6_MID.MIDvA", "Memory", 0xfffd02c8, 4, base=16, bitRange=18-28
1665
- sfr = "CAN_MB6_MID.MIDE", "Memory", 0xfffd02c8, 4, base=16, bitRange=29
1666
- sfr = "CAN_MB6_MFID", "Memory", 0xfffd02cc, 4, base=16
1667
- sfr = "CAN_MB6_MSR", "Memory", 0xfffd02d0, 4, base=16
1668
- sfr = "CAN_MB6_MSR.MTIMESTAMP", "Memory", 0xfffd02d0, 4, base=16, bitRange=0-15
1669
- sfr = "CAN_MB6_MSR.MDLC", "Memory", 0xfffd02d0, 4, base=16, bitRange=16-19
1670
- sfr = "CAN_MB6_MSR.MRTR", "Memory", 0xfffd02d0, 4, base=16, bitRange=20
1671
- sfr = "CAN_MB6_MSR.MABT", "Memory", 0xfffd02d0, 4, base=16, bitRange=22
1672
- sfr = "CAN_MB6_MSR.MRDY", "Memory", 0xfffd02d0, 4, base=16, bitRange=23
1673
- sfr = "CAN_MB6_MSR.MMI", "Memory", 0xfffd02d0, 4, base=16, bitRange=24
1674
- sfr = "CAN_MB6_MDL", "Memory", 0xfffd02d4, 4, base=16
1675
- sfr = "CAN_MB6_MDH", "Memory", 0xfffd02d8, 4, base=16
1676
- sfr = "CAN_MB6_MCR", "Memory", 0xfffd02dc, 4, base=16
1677
- sfr = "CAN_MB6_MCR.MDLC", "Memory", 0xfffd02dc, 4, base=16, bitRange=16-19
1678
- sfr = "CAN_MB6_MCR.MRTR", "Memory", 0xfffd02dc, 4, base=16, bitRange=20
1679
- sfr = "CAN_MB6_MCR.MACR", "Memory", 0xfffd02dc, 4, base=16, bitRange=22
1680
- sfr = "CAN_MB6_MCR.MTCR", "Memory", 0xfffd02dc, 4, base=16, bitRange=23
1681
- ; ========== Register definition for CAN_MB7 peripheral ==========
1682
- sfr = "CAN_MB7_MMR", "Memory", 0xfffd02e0, 4, base=16
1683
- sfr = "CAN_MB7_MMR.MTIMEMARK", "Memory", 0xfffd02e0, 4, base=16, bitRange=0-15
1684
- sfr = "CAN_MB7_MMR.PRIOR", "Memory", 0xfffd02e0, 4, base=16, bitRange=16-19
1685
- sfr = "CAN_MB7_MMR.MOT", "Memory", 0xfffd02e0, 4, base=16, bitRange=24-26
1686
- sfr = "CAN_MB7_MAM", "Memory", 0xfffd02e4, 4, base=16
1687
- sfr = "CAN_MB7_MAM.MIDvB", "Memory", 0xfffd02e4, 4, base=16, bitRange=0-17
1688
- sfr = "CAN_MB7_MAM.MIDvA", "Memory", 0xfffd02e4, 4, base=16, bitRange=18-28
1689
- sfr = "CAN_MB7_MAM.MIDE", "Memory", 0xfffd02e4, 4, base=16, bitRange=29
1690
- sfr = "CAN_MB7_MID", "Memory", 0xfffd02e8, 4, base=16
1691
- sfr = "CAN_MB7_MID.MIDvB", "Memory", 0xfffd02e8, 4, base=16, bitRange=0-17
1692
- sfr = "CAN_MB7_MID.MIDvA", "Memory", 0xfffd02e8, 4, base=16, bitRange=18-28
1693
- sfr = "CAN_MB7_MID.MIDE", "Memory", 0xfffd02e8, 4, base=16, bitRange=29
1694
- sfr = "CAN_MB7_MFID", "Memory", 0xfffd02ec, 4, base=16
1695
- sfr = "CAN_MB7_MSR", "Memory", 0xfffd02f0, 4, base=16
1696
- sfr = "CAN_MB7_MSR.MTIMESTAMP", "Memory", 0xfffd02f0, 4, base=16, bitRange=0-15
1697
- sfr = "CAN_MB7_MSR.MDLC", "Memory", 0xfffd02f0, 4, base=16, bitRange=16-19
1698
- sfr = "CAN_MB7_MSR.MRTR", "Memory", 0xfffd02f0, 4, base=16, bitRange=20
1699
- sfr = "CAN_MB7_MSR.MABT", "Memory", 0xfffd02f0, 4, base=16, bitRange=22
1700
- sfr = "CAN_MB7_MSR.MRDY", "Memory", 0xfffd02f0, 4, base=16, bitRange=23
1701
- sfr = "CAN_MB7_MSR.MMI", "Memory", 0xfffd02f0, 4, base=16, bitRange=24
1702
- sfr = "CAN_MB7_MDL", "Memory", 0xfffd02f4, 4, base=16
1703
- sfr = "CAN_MB7_MDH", "Memory", 0xfffd02f8, 4, base=16
1704
- sfr = "CAN_MB7_MCR", "Memory", 0xfffd02fc, 4, base=16
1705
- sfr = "CAN_MB7_MCR.MDLC", "Memory", 0xfffd02fc, 4, base=16, bitRange=16-19
1706
- sfr = "CAN_MB7_MCR.MRTR", "Memory", 0xfffd02fc, 4, base=16, bitRange=20
1707
- sfr = "CAN_MB7_MCR.MACR", "Memory", 0xfffd02fc, 4, base=16, bitRange=22
1708
- sfr = "CAN_MB7_MCR.MTCR", "Memory", 0xfffd02fc, 4, base=16, bitRange=23
1709
- ; ========== Register definition for CAN peripheral ==========
1710
- sfr = "CAN_MR", "Memory", 0xfffd0000, 4, base=16
1711
- sfr = "CAN_MR.CANEN", "Memory", 0xfffd0000, 4, base=16, bitRange=0
1712
- sfr = "CAN_MR.LPM", "Memory", 0xfffd0000, 4, base=16, bitRange=1
1713
- sfr = "CAN_MR.ABM", "Memory", 0xfffd0000, 4, base=16, bitRange=2
1714
- sfr = "CAN_MR.OVL", "Memory", 0xfffd0000, 4, base=16, bitRange=3
1715
- sfr = "CAN_MR.TEOF", "Memory", 0xfffd0000, 4, base=16, bitRange=4
1716
- sfr = "CAN_MR.TTM", "Memory", 0xfffd0000, 4, base=16, bitRange=5
1717
- sfr = "CAN_MR.TIMFRZ", "Memory", 0xfffd0000, 4, base=16, bitRange=6
1718
- sfr = "CAN_MR.DRPT", "Memory", 0xfffd0000, 4, base=16, bitRange=7
1719
- sfr = "CAN_IER", "Memory", 0xfffd0004, 4, base=16
1720
- sfr = "CAN_IER.MB0", "Memory", 0xfffd0004, 4, base=16, bitRange=0
1721
- sfr = "CAN_IER.MB1", "Memory", 0xfffd0004, 4, base=16, bitRange=1
1722
- sfr = "CAN_IER.MB2", "Memory", 0xfffd0004, 4, base=16, bitRange=2
1723
- sfr = "CAN_IER.MB3", "Memory", 0xfffd0004, 4, base=16, bitRange=3
1724
- sfr = "CAN_IER.MB4", "Memory", 0xfffd0004, 4, base=16, bitRange=4
1725
- sfr = "CAN_IER.MB5", "Memory", 0xfffd0004, 4, base=16, bitRange=5
1726
- sfr = "CAN_IER.MB6", "Memory", 0xfffd0004, 4, base=16, bitRange=6
1727
- sfr = "CAN_IER.MB7", "Memory", 0xfffd0004, 4, base=16, bitRange=7
1728
- sfr = "CAN_IER.MB8", "Memory", 0xfffd0004, 4, base=16, bitRange=8
1729
- sfr = "CAN_IER.MB9", "Memory", 0xfffd0004, 4, base=16, bitRange=9
1730
- sfr = "CAN_IER.MB10", "Memory", 0xfffd0004, 4, base=16, bitRange=10
1731
- sfr = "CAN_IER.MB11", "Memory", 0xfffd0004, 4, base=16, bitRange=11
1732
- sfr = "CAN_IER.MB12", "Memory", 0xfffd0004, 4, base=16, bitRange=12
1733
- sfr = "CAN_IER.MB13", "Memory", 0xfffd0004, 4, base=16, bitRange=13
1734
- sfr = "CAN_IER.MB14", "Memory", 0xfffd0004, 4, base=16, bitRange=14
1735
- sfr = "CAN_IER.MB15", "Memory", 0xfffd0004, 4, base=16, bitRange=15
1736
- sfr = "CAN_IER.ERRA", "Memory", 0xfffd0004, 4, base=16, bitRange=16
1737
- sfr = "CAN_IER.WARN", "Memory", 0xfffd0004, 4, base=16, bitRange=17
1738
- sfr = "CAN_IER.ERRP", "Memory", 0xfffd0004, 4, base=16, bitRange=18
1739
- sfr = "CAN_IER.BOFF", "Memory", 0xfffd0004, 4, base=16, bitRange=19
1740
- sfr = "CAN_IER.SLEEP", "Memory", 0xfffd0004, 4, base=16, bitRange=20
1741
- sfr = "CAN_IER.WAKEUP", "Memory", 0xfffd0004, 4, base=16, bitRange=21
1742
- sfr = "CAN_IER.TOVF", "Memory", 0xfffd0004, 4, base=16, bitRange=22
1743
- sfr = "CAN_IER.TSTP", "Memory", 0xfffd0004, 4, base=16, bitRange=23
1744
- sfr = "CAN_IER.CERR", "Memory", 0xfffd0004, 4, base=16, bitRange=24
1745
- sfr = "CAN_IER.SERR", "Memory", 0xfffd0004, 4, base=16, bitRange=25
1746
- sfr = "CAN_IER.AERR", "Memory", 0xfffd0004, 4, base=16, bitRange=26
1747
- sfr = "CAN_IER.FERR", "Memory", 0xfffd0004, 4, base=16, bitRange=27
1748
- sfr = "CAN_IER.BERR", "Memory", 0xfffd0004, 4, base=16, bitRange=28
1749
- sfr = "CAN_IDR", "Memory", 0xfffd0008, 4, base=16
1750
- sfr = "CAN_IDR.MB0", "Memory", 0xfffd0008, 4, base=16, bitRange=0
1751
- sfr = "CAN_IDR.MB1", "Memory", 0xfffd0008, 4, base=16, bitRange=1
1752
- sfr = "CAN_IDR.MB2", "Memory", 0xfffd0008, 4, base=16, bitRange=2
1753
- sfr = "CAN_IDR.MB3", "Memory", 0xfffd0008, 4, base=16, bitRange=3
1754
- sfr = "CAN_IDR.MB4", "Memory", 0xfffd0008, 4, base=16, bitRange=4
1755
- sfr = "CAN_IDR.MB5", "Memory", 0xfffd0008, 4, base=16, bitRange=5
1756
- sfr = "CAN_IDR.MB6", "Memory", 0xfffd0008, 4, base=16, bitRange=6
1757
- sfr = "CAN_IDR.MB7", "Memory", 0xfffd0008, 4, base=16, bitRange=7
1758
- sfr = "CAN_IDR.MB8", "Memory", 0xfffd0008, 4, base=16, bitRange=8
1759
- sfr = "CAN_IDR.MB9", "Memory", 0xfffd0008, 4, base=16, bitRange=9
1760
- sfr = "CAN_IDR.MB10", "Memory", 0xfffd0008, 4, base=16, bitRange=10
1761
- sfr = "CAN_IDR.MB11", "Memory", 0xfffd0008, 4, base=16, bitRange=11
1762
- sfr = "CAN_IDR.MB12", "Memory", 0xfffd0008, 4, base=16, bitRange=12
1763
- sfr = "CAN_IDR.MB13", "Memory", 0xfffd0008, 4, base=16, bitRange=13
1764
- sfr = "CAN_IDR.MB14", "Memory", 0xfffd0008, 4, base=16, bitRange=14
1765
- sfr = "CAN_IDR.MB15", "Memory", 0xfffd0008, 4, base=16, bitRange=15
1766
- sfr = "CAN_IDR.ERRA", "Memory", 0xfffd0008, 4, base=16, bitRange=16
1767
- sfr = "CAN_IDR.WARN", "Memory", 0xfffd0008, 4, base=16, bitRange=17
1768
- sfr = "CAN_IDR.ERRP", "Memory", 0xfffd0008, 4, base=16, bitRange=18
1769
- sfr = "CAN_IDR.BOFF", "Memory", 0xfffd0008, 4, base=16, bitRange=19
1770
- sfr = "CAN_IDR.SLEEP", "Memory", 0xfffd0008, 4, base=16, bitRange=20
1771
- sfr = "CAN_IDR.WAKEUP", "Memory", 0xfffd0008, 4, base=16, bitRange=21
1772
- sfr = "CAN_IDR.TOVF", "Memory", 0xfffd0008, 4, base=16, bitRange=22
1773
- sfr = "CAN_IDR.TSTP", "Memory", 0xfffd0008, 4, base=16, bitRange=23
1774
- sfr = "CAN_IDR.CERR", "Memory", 0xfffd0008, 4, base=16, bitRange=24
1775
- sfr = "CAN_IDR.SERR", "Memory", 0xfffd0008, 4, base=16, bitRange=25
1776
- sfr = "CAN_IDR.AERR", "Memory", 0xfffd0008, 4, base=16, bitRange=26
1777
- sfr = "CAN_IDR.FERR", "Memory", 0xfffd0008, 4, base=16, bitRange=27
1778
- sfr = "CAN_IDR.BERR", "Memory", 0xfffd0008, 4, base=16, bitRange=28
1779
- sfr = "CAN_IMR", "Memory", 0xfffd000c, 4, base=16
1780
- sfr = "CAN_IMR.MB0", "Memory", 0xfffd000c, 4, base=16, bitRange=0
1781
- sfr = "CAN_IMR.MB1", "Memory", 0xfffd000c, 4, base=16, bitRange=1
1782
- sfr = "CAN_IMR.MB2", "Memory", 0xfffd000c, 4, base=16, bitRange=2
1783
- sfr = "CAN_IMR.MB3", "Memory", 0xfffd000c, 4, base=16, bitRange=3
1784
- sfr = "CAN_IMR.MB4", "Memory", 0xfffd000c, 4, base=16, bitRange=4
1785
- sfr = "CAN_IMR.MB5", "Memory", 0xfffd000c, 4, base=16, bitRange=5
1786
- sfr = "CAN_IMR.MB6", "Memory", 0xfffd000c, 4, base=16, bitRange=6
1787
- sfr = "CAN_IMR.MB7", "Memory", 0xfffd000c, 4, base=16, bitRange=7
1788
- sfr = "CAN_IMR.MB8", "Memory", 0xfffd000c, 4, base=16, bitRange=8
1789
- sfr = "CAN_IMR.MB9", "Memory", 0xfffd000c, 4, base=16, bitRange=9
1790
- sfr = "CAN_IMR.MB10", "Memory", 0xfffd000c, 4, base=16, bitRange=10
1791
- sfr = "CAN_IMR.MB11", "Memory", 0xfffd000c, 4, base=16, bitRange=11
1792
- sfr = "CAN_IMR.MB12", "Memory", 0xfffd000c, 4, base=16, bitRange=12
1793
- sfr = "CAN_IMR.MB13", "Memory", 0xfffd000c, 4, base=16, bitRange=13
1794
- sfr = "CAN_IMR.MB14", "Memory", 0xfffd000c, 4, base=16, bitRange=14
1795
- sfr = "CAN_IMR.MB15", "Memory", 0xfffd000c, 4, base=16, bitRange=15
1796
- sfr = "CAN_IMR.ERRA", "Memory", 0xfffd000c, 4, base=16, bitRange=16
1797
- sfr = "CAN_IMR.WARN", "Memory", 0xfffd000c, 4, base=16, bitRange=17
1798
- sfr = "CAN_IMR.ERRP", "Memory", 0xfffd000c, 4, base=16, bitRange=18
1799
- sfr = "CAN_IMR.BOFF", "Memory", 0xfffd000c, 4, base=16, bitRange=19
1800
- sfr = "CAN_IMR.SLEEP", "Memory", 0xfffd000c, 4, base=16, bitRange=20
1801
- sfr = "CAN_IMR.WAKEUP", "Memory", 0xfffd000c, 4, base=16, bitRange=21
1802
- sfr = "CAN_IMR.TOVF", "Memory", 0xfffd000c, 4, base=16, bitRange=22
1803
- sfr = "CAN_IMR.TSTP", "Memory", 0xfffd000c, 4, base=16, bitRange=23
1804
- sfr = "CAN_IMR.CERR", "Memory", 0xfffd000c, 4, base=16, bitRange=24
1805
- sfr = "CAN_IMR.SERR", "Memory", 0xfffd000c, 4, base=16, bitRange=25
1806
- sfr = "CAN_IMR.AERR", "Memory", 0xfffd000c, 4, base=16, bitRange=26
1807
- sfr = "CAN_IMR.FERR", "Memory", 0xfffd000c, 4, base=16, bitRange=27
1808
- sfr = "CAN_IMR.BERR", "Memory", 0xfffd000c, 4, base=16, bitRange=28
1809
- sfr = "CAN_SR", "Memory", 0xfffd0010, 4, base=16
1810
- sfr = "CAN_SR.MB0", "Memory", 0xfffd0010, 4, base=16, bitRange=0
1811
- sfr = "CAN_SR.MB1", "Memory", 0xfffd0010, 4, base=16, bitRange=1
1812
- sfr = "CAN_SR.MB2", "Memory", 0xfffd0010, 4, base=16, bitRange=2
1813
- sfr = "CAN_SR.MB3", "Memory", 0xfffd0010, 4, base=16, bitRange=3
1814
- sfr = "CAN_SR.MB4", "Memory", 0xfffd0010, 4, base=16, bitRange=4
1815
- sfr = "CAN_SR.MB5", "Memory", 0xfffd0010, 4, base=16, bitRange=5
1816
- sfr = "CAN_SR.MB6", "Memory", 0xfffd0010, 4, base=16, bitRange=6
1817
- sfr = "CAN_SR.MB7", "Memory", 0xfffd0010, 4, base=16, bitRange=7
1818
- sfr = "CAN_SR.MB8", "Memory", 0xfffd0010, 4, base=16, bitRange=8
1819
- sfr = "CAN_SR.MB9", "Memory", 0xfffd0010, 4, base=16, bitRange=9
1820
- sfr = "CAN_SR.MB10", "Memory", 0xfffd0010, 4, base=16, bitRange=10
1821
- sfr = "CAN_SR.MB11", "Memory", 0xfffd0010, 4, base=16, bitRange=11
1822
- sfr = "CAN_SR.MB12", "Memory", 0xfffd0010, 4, base=16, bitRange=12
1823
- sfr = "CAN_SR.MB13", "Memory", 0xfffd0010, 4, base=16, bitRange=13
1824
- sfr = "CAN_SR.MB14", "Memory", 0xfffd0010, 4, base=16, bitRange=14
1825
- sfr = "CAN_SR.MB15", "Memory", 0xfffd0010, 4, base=16, bitRange=15
1826
- sfr = "CAN_SR.ERRA", "Memory", 0xfffd0010, 4, base=16, bitRange=16
1827
- sfr = "CAN_SR.WARN", "Memory", 0xfffd0010, 4, base=16, bitRange=17
1828
- sfr = "CAN_SR.ERRP", "Memory", 0xfffd0010, 4, base=16, bitRange=18
1829
- sfr = "CAN_SR.BOFF", "Memory", 0xfffd0010, 4, base=16, bitRange=19
1830
- sfr = "CAN_SR.SLEEP", "Memory", 0xfffd0010, 4, base=16, bitRange=20
1831
- sfr = "CAN_SR.WAKEUP", "Memory", 0xfffd0010, 4, base=16, bitRange=21
1832
- sfr = "CAN_SR.TOVF", "Memory", 0xfffd0010, 4, base=16, bitRange=22
1833
- sfr = "CAN_SR.TSTP", "Memory", 0xfffd0010, 4, base=16, bitRange=23
1834
- sfr = "CAN_SR.CERR", "Memory", 0xfffd0010, 4, base=16, bitRange=24
1835
- sfr = "CAN_SR.SERR", "Memory", 0xfffd0010, 4, base=16, bitRange=25
1836
- sfr = "CAN_SR.AERR", "Memory", 0xfffd0010, 4, base=16, bitRange=26
1837
- sfr = "CAN_SR.FERR", "Memory", 0xfffd0010, 4, base=16, bitRange=27
1838
- sfr = "CAN_SR.BERR", "Memory", 0xfffd0010, 4, base=16, bitRange=28
1839
- sfr = "CAN_SR.RBSY", "Memory", 0xfffd0010, 4, base=16, bitRange=29
1840
- sfr = "CAN_SR.TBSY", "Memory", 0xfffd0010, 4, base=16, bitRange=30
1841
- sfr = "CAN_SR.OVLY", "Memory", 0xfffd0010, 4, base=16, bitRange=31
1842
- sfr = "CAN_BR", "Memory", 0xfffd0014, 4, base=16
1843
- sfr = "CAN_BR.PHASE2", "Memory", 0xfffd0014, 4, base=16, bitRange=0-2
1844
- sfr = "CAN_BR.PHASE1", "Memory", 0xfffd0014, 4, base=16, bitRange=4-6
1845
- sfr = "CAN_BR.PROPAG", "Memory", 0xfffd0014, 4, base=16, bitRange=8-10
1846
- sfr = "CAN_BR.SYNC", "Memory", 0xfffd0014, 4, base=16, bitRange=12-13
1847
- sfr = "CAN_BR.BRP", "Memory", 0xfffd0014, 4, base=16, bitRange=16-22
1848
- sfr = "CAN_BR.SMP", "Memory", 0xfffd0014, 4, base=16, bitRange=24
1849
- sfr = "CAN_TIM", "Memory", 0xfffd0018, 4, base=16
1850
- sfr = "CAN_TIM.TIMER", "Memory", 0xfffd0018, 4, base=16, bitRange=0-15
1851
- sfr = "CAN_TIMESTP", "Memory", 0xfffd001c, 4, base=16
1852
- sfr = "CAN_TIMESTP.MTIMESTAMP", "Memory", 0xfffd001c, 4, base=16, bitRange=0-15
1853
- sfr = "CAN_ECR", "Memory", 0xfffd0020, 4, base=16
1854
- sfr = "CAN_ECR.REC", "Memory", 0xfffd0020, 4, base=16, bitRange=0-7
1855
- sfr = "CAN_ECR.TEC", "Memory", 0xfffd0020, 4, base=16, bitRange=16-23
1856
- sfr = "CAN_TCR", "Memory", 0xfffd0024, 4, base=16
1857
- sfr = "CAN_TCR.MB0", "Memory", 0xfffd0024, 4, base=16, bitRange=0
1858
- sfr = "CAN_TCR.MB1", "Memory", 0xfffd0024, 4, base=16, bitRange=1
1859
- sfr = "CAN_TCR.MB2", "Memory", 0xfffd0024, 4, base=16, bitRange=2
1860
- sfr = "CAN_TCR.MB3", "Memory", 0xfffd0024, 4, base=16, bitRange=3
1861
- sfr = "CAN_TCR.MB4", "Memory", 0xfffd0024, 4, base=16, bitRange=4
1862
- sfr = "CAN_TCR.MB5", "Memory", 0xfffd0024, 4, base=16, bitRange=5
1863
- sfr = "CAN_TCR.MB6", "Memory", 0xfffd0024, 4, base=16, bitRange=6
1864
- sfr = "CAN_TCR.MB7", "Memory", 0xfffd0024, 4, base=16, bitRange=7
1865
- sfr = "CAN_TCR.MB8", "Memory", 0xfffd0024, 4, base=16, bitRange=8
1866
- sfr = "CAN_TCR.MB9", "Memory", 0xfffd0024, 4, base=16, bitRange=9
1867
- sfr = "CAN_TCR.MB10", "Memory", 0xfffd0024, 4, base=16, bitRange=10
1868
- sfr = "CAN_TCR.MB11", "Memory", 0xfffd0024, 4, base=16, bitRange=11
1869
- sfr = "CAN_TCR.MB12", "Memory", 0xfffd0024, 4, base=16, bitRange=12
1870
- sfr = "CAN_TCR.MB13", "Memory", 0xfffd0024, 4, base=16, bitRange=13
1871
- sfr = "CAN_TCR.MB14", "Memory", 0xfffd0024, 4, base=16, bitRange=14
1872
- sfr = "CAN_TCR.MB15", "Memory", 0xfffd0024, 4, base=16, bitRange=15
1873
- sfr = "CAN_TCR.TIMRST", "Memory", 0xfffd0024, 4, base=16, bitRange=31
1874
- sfr = "CAN_ACR", "Memory", 0xfffd0028, 4, base=16
1875
- sfr = "CAN_ACR.MB0", "Memory", 0xfffd0028, 4, base=16, bitRange=0
1876
- sfr = "CAN_ACR.MB1", "Memory", 0xfffd0028, 4, base=16, bitRange=1
1877
- sfr = "CAN_ACR.MB2", "Memory", 0xfffd0028, 4, base=16, bitRange=2
1878
- sfr = "CAN_ACR.MB3", "Memory", 0xfffd0028, 4, base=16, bitRange=3
1879
- sfr = "CAN_ACR.MB4", "Memory", 0xfffd0028, 4, base=16, bitRange=4
1880
- sfr = "CAN_ACR.MB5", "Memory", 0xfffd0028, 4, base=16, bitRange=5
1881
- sfr = "CAN_ACR.MB6", "Memory", 0xfffd0028, 4, base=16, bitRange=6
1882
- sfr = "CAN_ACR.MB7", "Memory", 0xfffd0028, 4, base=16, bitRange=7
1883
- sfr = "CAN_ACR.MB8", "Memory", 0xfffd0028, 4, base=16, bitRange=8
1884
- sfr = "CAN_ACR.MB9", "Memory", 0xfffd0028, 4, base=16, bitRange=9
1885
- sfr = "CAN_ACR.MB10", "Memory", 0xfffd0028, 4, base=16, bitRange=10
1886
- sfr = "CAN_ACR.MB11", "Memory", 0xfffd0028, 4, base=16, bitRange=11
1887
- sfr = "CAN_ACR.MB12", "Memory", 0xfffd0028, 4, base=16, bitRange=12
1888
- sfr = "CAN_ACR.MB13", "Memory", 0xfffd0028, 4, base=16, bitRange=13
1889
- sfr = "CAN_ACR.MB14", "Memory", 0xfffd0028, 4, base=16, bitRange=14
1890
- sfr = "CAN_ACR.MB15", "Memory", 0xfffd0028, 4, base=16, bitRange=15
1891
- sfr = "CAN_VR", "Memory", 0xfffd00fc, 4, base=16
1892
- ; ========== Register definition for EMAC peripheral ==========
1893
- sfr = "EMAC_NCR", "Memory", 0xfffdc000, 4, base=16
1894
- sfr = "EMAC_NCR.LB", "Memory", 0xfffdc000, 4, base=16, bitRange=0
1895
- sfr = "EMAC_NCR.LLB", "Memory", 0xfffdc000, 4, base=16, bitRange=1
1896
- sfr = "EMAC_NCR.RE", "Memory", 0xfffdc000, 4, base=16, bitRange=2
1897
- sfr = "EMAC_NCR.TE", "Memory", 0xfffdc000, 4, base=16, bitRange=3
1898
- sfr = "EMAC_NCR.MPE", "Memory", 0xfffdc000, 4, base=16, bitRange=4
1899
- sfr = "EMAC_NCR.CLRSTAT", "Memory", 0xfffdc000, 4, base=16, bitRange=5
1900
- sfr = "EMAC_NCR.INCSTAT", "Memory", 0xfffdc000, 4, base=16, bitRange=6
1901
- sfr = "EMAC_NCR.WESTAT", "Memory", 0xfffdc000, 4, base=16, bitRange=7
1902
- sfr = "EMAC_NCR.BP", "Memory", 0xfffdc000, 4, base=16, bitRange=8
1903
- sfr = "EMAC_NCR.TSTART", "Memory", 0xfffdc000, 4, base=16, bitRange=9
1904
- sfr = "EMAC_NCR.THALT", "Memory", 0xfffdc000, 4, base=16, bitRange=10
1905
- sfr = "EMAC_NCR.TPFR", "Memory", 0xfffdc000, 4, base=16, bitRange=11
1906
- sfr = "EMAC_NCR.TZQ", "Memory", 0xfffdc000, 4, base=16, bitRange=12
1907
- sfr = "EMAC_NCFGR", "Memory", 0xfffdc004, 4, base=16
1908
- sfr = "EMAC_NCFGR.SPD", "Memory", 0xfffdc004, 4, base=16, bitRange=0
1909
- sfr = "EMAC_NCFGR.FD", "Memory", 0xfffdc004, 4, base=16, bitRange=1
1910
- sfr = "EMAC_NCFGR.JFRAME", "Memory", 0xfffdc004, 4, base=16, bitRange=3
1911
- sfr = "EMAC_NCFGR.CAF", "Memory", 0xfffdc004, 4, base=16, bitRange=4
1912
- sfr = "EMAC_NCFGR.NBC", "Memory", 0xfffdc004, 4, base=16, bitRange=5
1913
- sfr = "EMAC_NCFGR.MTI", "Memory", 0xfffdc004, 4, base=16, bitRange=6
1914
- sfr = "EMAC_NCFGR.UNI", "Memory", 0xfffdc004, 4, base=16, bitRange=7
1915
- sfr = "EMAC_NCFGR.BIG", "Memory", 0xfffdc004, 4, base=16, bitRange=8
1916
- sfr = "EMAC_NCFGR.EAE", "Memory", 0xfffdc004, 4, base=16, bitRange=9
1917
- sfr = "EMAC_NCFGR.CLK", "Memory", 0xfffdc004, 4, base=16, bitRange=10-11
1918
- sfr = "EMAC_NCFGR.RTY", "Memory", 0xfffdc004, 4, base=16, bitRange=12
1919
- sfr = "EMAC_NCFGR.PAE", "Memory", 0xfffdc004, 4, base=16, bitRange=13
1920
- sfr = "EMAC_NCFGR.RBOF", "Memory", 0xfffdc004, 4, base=16, bitRange=14-15
1921
- sfr = "EMAC_NCFGR.RLCE", "Memory", 0xfffdc004, 4, base=16, bitRange=16
1922
- sfr = "EMAC_NCFGR.DRFCS", "Memory", 0xfffdc004, 4, base=16, bitRange=17
1923
- sfr = "EMAC_NCFGR.EFRHD", "Memory", 0xfffdc004, 4, base=16, bitRange=18
1924
- sfr = "EMAC_NCFGR.IRXFCS", "Memory", 0xfffdc004, 4, base=16, bitRange=19
1925
- sfr = "EMAC_NSR", "Memory", 0xfffdc008, 4, base=16
1926
- sfr = "EMAC_NSR.LINKR", "Memory", 0xfffdc008, 4, base=16, bitRange=0
1927
- sfr = "EMAC_NSR.MDIO", "Memory", 0xfffdc008, 4, base=16, bitRange=1
1928
- sfr = "EMAC_NSR.IDLE", "Memory", 0xfffdc008, 4, base=16, bitRange=2
1929
- sfr = "EMAC_TSR", "Memory", 0xfffdc014, 4, base=16
1930
- sfr = "EMAC_TSR.UBR", "Memory", 0xfffdc014, 4, base=16, bitRange=0
1931
- sfr = "EMAC_TSR.COL", "Memory", 0xfffdc014, 4, base=16, bitRange=1
1932
- sfr = "EMAC_TSR.RLES", "Memory", 0xfffdc014, 4, base=16, bitRange=2
1933
- sfr = "EMAC_TSR.TGO", "Memory", 0xfffdc014, 4, base=16, bitRange=3
1934
- sfr = "EMAC_TSR.BEX", "Memory", 0xfffdc014, 4, base=16, bitRange=4
1935
- sfr = "EMAC_TSR.COMP", "Memory", 0xfffdc014, 4, base=16, bitRange=5
1936
- sfr = "EMAC_TSR.UND", "Memory", 0xfffdc014, 4, base=16, bitRange=6
1937
- sfr = "EMAC_RBQP", "Memory", 0xfffdc018, 4, base=16
1938
- sfr = "EMAC_TBQP", "Memory", 0xfffdc01c, 4, base=16
1939
- sfr = "EMAC_RSR", "Memory", 0xfffdc020, 4, base=16
1940
- sfr = "EMAC_RSR.BNA", "Memory", 0xfffdc020, 4, base=16, bitRange=0
1941
- sfr = "EMAC_RSR.REC", "Memory", 0xfffdc020, 4, base=16, bitRange=1
1942
- sfr = "EMAC_RSR.OVR", "Memory", 0xfffdc020, 4, base=16, bitRange=2
1943
- sfr = "EMAC_ISR", "Memory", 0xfffdc024, 4, base=16
1944
- sfr = "EMAC_ISR.MFD", "Memory", 0xfffdc024, 4, base=16, bitRange=0
1945
- sfr = "EMAC_ISR.RCOMP", "Memory", 0xfffdc024, 4, base=16, bitRange=1
1946
- sfr = "EMAC_ISR.RXUBR", "Memory", 0xfffdc024, 4, base=16, bitRange=2
1947
- sfr = "EMAC_ISR.TXUBR", "Memory", 0xfffdc024, 4, base=16, bitRange=3
1948
- sfr = "EMAC_ISR.TUNDR", "Memory", 0xfffdc024, 4, base=16, bitRange=4
1949
- sfr = "EMAC_ISR.RLEX", "Memory", 0xfffdc024, 4, base=16, bitRange=5
1950
- sfr = "EMAC_ISR.TXERR", "Memory", 0xfffdc024, 4, base=16, bitRange=6
1951
- sfr = "EMAC_ISR.TCOMP", "Memory", 0xfffdc024, 4, base=16, bitRange=7
1952
- sfr = "EMAC_ISR.LINK", "Memory", 0xfffdc024, 4, base=16, bitRange=9
1953
- sfr = "EMAC_ISR.ROVR", "Memory", 0xfffdc024, 4, base=16, bitRange=10
1954
- sfr = "EMAC_ISR.HRESP", "Memory", 0xfffdc024, 4, base=16, bitRange=11
1955
- sfr = "EMAC_ISR.PFRE", "Memory", 0xfffdc024, 4, base=16, bitRange=12
1956
- sfr = "EMAC_ISR.PTZ", "Memory", 0xfffdc024, 4, base=16, bitRange=13
1957
- sfr = "EMAC_IER", "Memory", 0xfffdc028, 4, base=16
1958
- sfr = "EMAC_IER.MFD", "Memory", 0xfffdc028, 4, base=16, bitRange=0
1959
- sfr = "EMAC_IER.RCOMP", "Memory", 0xfffdc028, 4, base=16, bitRange=1
1960
- sfr = "EMAC_IER.RXUBR", "Memory", 0xfffdc028, 4, base=16, bitRange=2
1961
- sfr = "EMAC_IER.TXUBR", "Memory", 0xfffdc028, 4, base=16, bitRange=3
1962
- sfr = "EMAC_IER.TUNDR", "Memory", 0xfffdc028, 4, base=16, bitRange=4
1963
- sfr = "EMAC_IER.RLEX", "Memory", 0xfffdc028, 4, base=16, bitRange=5
1964
- sfr = "EMAC_IER.TXERR", "Memory", 0xfffdc028, 4, base=16, bitRange=6
1965
- sfr = "EMAC_IER.TCOMP", "Memory", 0xfffdc028, 4, base=16, bitRange=7
1966
- sfr = "EMAC_IER.LINK", "Memory", 0xfffdc028, 4, base=16, bitRange=9
1967
- sfr = "EMAC_IER.ROVR", "Memory", 0xfffdc028, 4, base=16, bitRange=10
1968
- sfr = "EMAC_IER.HRESP", "Memory", 0xfffdc028, 4, base=16, bitRange=11
1969
- sfr = "EMAC_IER.PFRE", "Memory", 0xfffdc028, 4, base=16, bitRange=12
1970
- sfr = "EMAC_IER.PTZ", "Memory", 0xfffdc028, 4, base=16, bitRange=13
1971
- sfr = "EMAC_IDR", "Memory", 0xfffdc02c, 4, base=16
1972
- sfr = "EMAC_IDR.MFD", "Memory", 0xfffdc02c, 4, base=16, bitRange=0
1973
- sfr = "EMAC_IDR.RCOMP", "Memory", 0xfffdc02c, 4, base=16, bitRange=1
1974
- sfr = "EMAC_IDR.RXUBR", "Memory", 0xfffdc02c, 4, base=16, bitRange=2
1975
- sfr = "EMAC_IDR.TXUBR", "Memory", 0xfffdc02c, 4, base=16, bitRange=3
1976
- sfr = "EMAC_IDR.TUNDR", "Memory", 0xfffdc02c, 4, base=16, bitRange=4
1977
- sfr = "EMAC_IDR.RLEX", "Memory", 0xfffdc02c, 4, base=16, bitRange=5
1978
- sfr = "EMAC_IDR.TXERR", "Memory", 0xfffdc02c, 4, base=16, bitRange=6
1979
- sfr = "EMAC_IDR.TCOMP", "Memory", 0xfffdc02c, 4, base=16, bitRange=7
1980
- sfr = "EMAC_IDR.LINK", "Memory", 0xfffdc02c, 4, base=16, bitRange=9
1981
- sfr = "EMAC_IDR.ROVR", "Memory", 0xfffdc02c, 4, base=16, bitRange=10
1982
- sfr = "EMAC_IDR.HRESP", "Memory", 0xfffdc02c, 4, base=16, bitRange=11
1983
- sfr = "EMAC_IDR.PFRE", "Memory", 0xfffdc02c, 4, base=16, bitRange=12
1984
- sfr = "EMAC_IDR.PTZ", "Memory", 0xfffdc02c, 4, base=16, bitRange=13
1985
- sfr = "EMAC_IMR", "Memory", 0xfffdc030, 4, base=16
1986
- sfr = "EMAC_IMR.MFD", "Memory", 0xfffdc030, 4, base=16, bitRange=0
1987
- sfr = "EMAC_IMR.RCOMP", "Memory", 0xfffdc030, 4, base=16, bitRange=1
1988
- sfr = "EMAC_IMR.RXUBR", "Memory", 0xfffdc030, 4, base=16, bitRange=2
1989
- sfr = "EMAC_IMR.TXUBR", "Memory", 0xfffdc030, 4, base=16, bitRange=3
1990
- sfr = "EMAC_IMR.TUNDR", "Memory", 0xfffdc030, 4, base=16, bitRange=4
1991
- sfr = "EMAC_IMR.RLEX", "Memory", 0xfffdc030, 4, base=16, bitRange=5
1992
- sfr = "EMAC_IMR.TXERR", "Memory", 0xfffdc030, 4, base=16, bitRange=6
1993
- sfr = "EMAC_IMR.TCOMP", "Memory", 0xfffdc030, 4, base=16, bitRange=7
1994
- sfr = "EMAC_IMR.LINK", "Memory", 0xfffdc030, 4, base=16, bitRange=9
1995
- sfr = "EMAC_IMR.ROVR", "Memory", 0xfffdc030, 4, base=16, bitRange=10
1996
- sfr = "EMAC_IMR.HRESP", "Memory", 0xfffdc030, 4, base=16, bitRange=11
1997
- sfr = "EMAC_IMR.PFRE", "Memory", 0xfffdc030, 4, base=16, bitRange=12
1998
- sfr = "EMAC_IMR.PTZ", "Memory", 0xfffdc030, 4, base=16, bitRange=13
1999
- sfr = "EMAC_MAN", "Memory", 0xfffdc034, 4, base=16
2000
- sfr = "EMAC_MAN.DATA", "Memory", 0xfffdc034, 4, base=16, bitRange=0-15
2001
- sfr = "EMAC_MAN.CODE", "Memory", 0xfffdc034, 4, base=16, bitRange=16-17
2002
- sfr = "EMAC_MAN.REGA", "Memory", 0xfffdc034, 4, base=16, bitRange=18-22
2003
- sfr = "EMAC_MAN.PHYA", "Memory", 0xfffdc034, 4, base=16, bitRange=23-27
2004
- sfr = "EMAC_MAN.RW", "Memory", 0xfffdc034, 4, base=16, bitRange=28-29
2005
- sfr = "EMAC_MAN.SOF", "Memory", 0xfffdc034, 4, base=16, bitRange=30-31
2006
- sfr = "EMAC_PTR", "Memory", 0xfffdc038, 4, base=16
2007
- sfr = "EMAC_PFR", "Memory", 0xfffdc03c, 4, base=16
2008
- sfr = "EMAC_FTO", "Memory", 0xfffdc040, 4, base=16
2009
- sfr = "EMAC_SCF", "Memory", 0xfffdc044, 4, base=16
2010
- sfr = "EMAC_MCF", "Memory", 0xfffdc048, 4, base=16
2011
- sfr = "EMAC_FRO", "Memory", 0xfffdc04c, 4, base=16
2012
- sfr = "EMAC_FCSE", "Memory", 0xfffdc050, 4, base=16
2013
- sfr = "EMAC_ALE", "Memory", 0xfffdc054, 4, base=16
2014
- sfr = "EMAC_DTF", "Memory", 0xfffdc058, 4, base=16
2015
- sfr = "EMAC_LCOL", "Memory", 0xfffdc05c, 4, base=16
2016
- sfr = "EMAC_ECOL", "Memory", 0xfffdc060, 4, base=16
2017
- sfr = "EMAC_TUND", "Memory", 0xfffdc064, 4, base=16
2018
- sfr = "EMAC_CSE", "Memory", 0xfffdc068, 4, base=16
2019
- sfr = "EMAC_RRE", "Memory", 0xfffdc06c, 4, base=16
2020
- sfr = "EMAC_ROV", "Memory", 0xfffdc070, 4, base=16
2021
- sfr = "EMAC_RSE", "Memory", 0xfffdc074, 4, base=16
2022
- sfr = "EMAC_ELE", "Memory", 0xfffdc078, 4, base=16
2023
- sfr = "EMAC_RJA", "Memory", 0xfffdc07c, 4, base=16
2024
- sfr = "EMAC_USF", "Memory", 0xfffdc080, 4, base=16
2025
- sfr = "EMAC_STE", "Memory", 0xfffdc084, 4, base=16
2026
- sfr = "EMAC_RLE", "Memory", 0xfffdc088, 4, base=16
2027
- sfr = "EMAC_TPF", "Memory", 0xfffdc08c, 4, base=16
2028
- sfr = "EMAC_HRB", "Memory", 0xfffdc090, 4, base=16
2029
- sfr = "EMAC_HRT", "Memory", 0xfffdc094, 4, base=16
2030
- sfr = "EMAC_SA1L", "Memory", 0xfffdc098, 4, base=16
2031
- sfr = "EMAC_SA1H", "Memory", 0xfffdc09c, 4, base=16
2032
- sfr = "EMAC_SA2L", "Memory", 0xfffdc0a0, 4, base=16
2033
- sfr = "EMAC_SA2H", "Memory", 0xfffdc0a4, 4, base=16
2034
- sfr = "EMAC_SA3L", "Memory", 0xfffdc0a8, 4, base=16
2035
- sfr = "EMAC_SA3H", "Memory", 0xfffdc0ac, 4, base=16
2036
- sfr = "EMAC_SA4L", "Memory", 0xfffdc0b0, 4, base=16
2037
- sfr = "EMAC_SA4H", "Memory", 0xfffdc0b4, 4, base=16
2038
- sfr = "EMAC_TID", "Memory", 0xfffdc0b8, 4, base=16
2039
- sfr = "EMAC_TPQ", "Memory", 0xfffdc0bc, 4, base=16
2040
- sfr = "EMAC_USRIO", "Memory", 0xfffdc0c0, 4, base=16
2041
- sfr = "EMAC_USRIO.RMII", "Memory", 0xfffdc0c0, 4, base=16, bitRange=0
2042
- sfr = "EMAC_USRIO.CLKEN", "Memory", 0xfffdc0c0, 4, base=16, bitRange=1
2043
- sfr = "EMAC_WOL", "Memory", 0xfffdc0c4, 4, base=16
2044
- sfr = "EMAC_WOL.IP", "Memory", 0xfffdc0c4, 4, base=16, bitRange=0-15
2045
- sfr = "EMAC_WOL.MAG", "Memory", 0xfffdc0c4, 4, base=16, bitRange=16
2046
- sfr = "EMAC_WOL.ARP", "Memory", 0xfffdc0c4, 4, base=16, bitRange=17
2047
- sfr = "EMAC_WOL.SA1", "Memory", 0xfffdc0c4, 4, base=16, bitRange=18
2048
- sfr = "EMAC_WOL.MTI", "Memory", 0xfffdc0c4, 4, base=16, bitRange=19
2049
- sfr = "EMAC_REV", "Memory", 0xfffdc0fc, 4, base=16
2050
- sfr = "EMAC_REV.REVREF", "Memory", 0xfffdc0fc, 4, base=16, bitRange=0-15
2051
- sfr = "EMAC_REV.PARTREF", "Memory", 0xfffdc0fc, 4, base=16, bitRange=16-31
2052
- ; ========== Register definition for PDC_ADC peripheral ==========
2053
- sfr = "ADC_RPR", "Memory", 0xfffd8100, 4, base=16
2054
- sfr = "ADC_RCR", "Memory", 0xfffd8104, 4, base=16
2055
- sfr = "ADC_TPR", "Memory", 0xfffd8108, 4, base=16
2056
- sfr = "ADC_TCR", "Memory", 0xfffd810c, 4, base=16
2057
- sfr = "ADC_RNPR", "Memory", 0xfffd8110, 4, base=16
2058
- sfr = "ADC_RNCR", "Memory", 0xfffd8114, 4, base=16
2059
- sfr = "ADC_TNPR", "Memory", 0xfffd8118, 4, base=16
2060
- sfr = "ADC_TNCR", "Memory", 0xfffd811c, 4, base=16
2061
- sfr = "ADC_PTCR", "Memory", 0xfffd8120, 4, base=16
2062
- sfr = "ADC_PTCR.RXTEN", "Memory", 0xfffd8120, 4, base=16, bitRange=0
2063
- sfr = "ADC_PTCR.RXTDIS", "Memory", 0xfffd8120, 4, base=16, bitRange=1
2064
- sfr = "ADC_PTCR.TXTEN", "Memory", 0xfffd8120, 4, base=16, bitRange=8
2065
- sfr = "ADC_PTCR.TXTDIS", "Memory", 0xfffd8120, 4, base=16, bitRange=9
2066
- sfr = "ADC_PTSR", "Memory", 0xfffd8124, 4, base=16
2067
- sfr = "ADC_PTSR.RXTEN", "Memory", 0xfffd8124, 4, base=16, bitRange=0
2068
- sfr = "ADC_PTSR.TXTEN", "Memory", 0xfffd8124, 4, base=16, bitRange=8
2069
- ; ========== Register definition for ADC peripheral ==========
2070
- sfr = "ADC_CR", "Memory", 0xfffd8000, 4, base=16
2071
- sfr = "ADC_CR.SWRST", "Memory", 0xfffd8000, 4, base=16, bitRange=0
2072
- sfr = "ADC_CR.START", "Memory", 0xfffd8000, 4, base=16, bitRange=1
2073
- sfr = "ADC_MR", "Memory", 0xfffd8004, 4, base=16
2074
- sfr = "ADC_MR.TRGEN", "Memory", 0xfffd8004, 4, base=16, bitRange=0
2075
- sfr = "ADC_MR.TRGSEL", "Memory", 0xfffd8004, 4, base=16, bitRange=1-3
2076
- sfr = "ADC_MR.LOWRES", "Memory", 0xfffd8004, 4, base=16, bitRange=4
2077
- sfr = "ADC_MR.SLEEP", "Memory", 0xfffd8004, 4, base=16, bitRange=5
2078
- sfr = "ADC_MR.PRESCAL", "Memory", 0xfffd8004, 4, base=16, bitRange=8-13
2079
- sfr = "ADC_MR.STARTUP", "Memory", 0xfffd8004, 4, base=16, bitRange=16-20
2080
- sfr = "ADC_MR.SHTIM", "Memory", 0xfffd8004, 4, base=16, bitRange=24-27
2081
- sfr = "ADC_CHER", "Memory", 0xfffd8010, 4, base=16
2082
- sfr = "ADC_CHER.CH0", "Memory", 0xfffd8010, 4, base=16, bitRange=0
2083
- sfr = "ADC_CHER.CH1", "Memory", 0xfffd8010, 4, base=16, bitRange=1
2084
- sfr = "ADC_CHER.CH2", "Memory", 0xfffd8010, 4, base=16, bitRange=2
2085
- sfr = "ADC_CHER.CH3", "Memory", 0xfffd8010, 4, base=16, bitRange=3
2086
- sfr = "ADC_CHER.CH4", "Memory", 0xfffd8010, 4, base=16, bitRange=4
2087
- sfr = "ADC_CHER.CH5", "Memory", 0xfffd8010, 4, base=16, bitRange=5
2088
- sfr = "ADC_CHER.CH6", "Memory", 0xfffd8010, 4, base=16, bitRange=6
2089
- sfr = "ADC_CHER.CH7", "Memory", 0xfffd8010, 4, base=16, bitRange=7
2090
- sfr = "ADC_CHDR", "Memory", 0xfffd8014, 4, base=16
2091
- sfr = "ADC_CHDR.CH0", "Memory", 0xfffd8014, 4, base=16, bitRange=0
2092
- sfr = "ADC_CHDR.CH1", "Memory", 0xfffd8014, 4, base=16, bitRange=1
2093
- sfr = "ADC_CHDR.CH2", "Memory", 0xfffd8014, 4, base=16, bitRange=2
2094
- sfr = "ADC_CHDR.CH3", "Memory", 0xfffd8014, 4, base=16, bitRange=3
2095
- sfr = "ADC_CHDR.CH4", "Memory", 0xfffd8014, 4, base=16, bitRange=4
2096
- sfr = "ADC_CHDR.CH5", "Memory", 0xfffd8014, 4, base=16, bitRange=5
2097
- sfr = "ADC_CHDR.CH6", "Memory", 0xfffd8014, 4, base=16, bitRange=6
2098
- sfr = "ADC_CHDR.CH7", "Memory", 0xfffd8014, 4, base=16, bitRange=7
2099
- sfr = "ADC_CHSR", "Memory", 0xfffd8018, 4, base=16
2100
- sfr = "ADC_CHSR.CH0", "Memory", 0xfffd8018, 4, base=16, bitRange=0
2101
- sfr = "ADC_CHSR.CH1", "Memory", 0xfffd8018, 4, base=16, bitRange=1
2102
- sfr = "ADC_CHSR.CH2", "Memory", 0xfffd8018, 4, base=16, bitRange=2
2103
- sfr = "ADC_CHSR.CH3", "Memory", 0xfffd8018, 4, base=16, bitRange=3
2104
- sfr = "ADC_CHSR.CH4", "Memory", 0xfffd8018, 4, base=16, bitRange=4
2105
- sfr = "ADC_CHSR.CH5", "Memory", 0xfffd8018, 4, base=16, bitRange=5
2106
- sfr = "ADC_CHSR.CH6", "Memory", 0xfffd8018, 4, base=16, bitRange=6
2107
- sfr = "ADC_CHSR.CH7", "Memory", 0xfffd8018, 4, base=16, bitRange=7
2108
- sfr = "ADC_SR", "Memory", 0xfffd801c, 4, base=16
2109
- sfr = "ADC_SR.EOC0", "Memory", 0xfffd801c, 4, base=16, bitRange=0
2110
- sfr = "ADC_SR.EOC1", "Memory", 0xfffd801c, 4, base=16, bitRange=1
2111
- sfr = "ADC_SR.EOC2", "Memory", 0xfffd801c, 4, base=16, bitRange=2
2112
- sfr = "ADC_SR.EOC3", "Memory", 0xfffd801c, 4, base=16, bitRange=3
2113
- sfr = "ADC_SR.EOC4", "Memory", 0xfffd801c, 4, base=16, bitRange=4
2114
- sfr = "ADC_SR.EOC5", "Memory", 0xfffd801c, 4, base=16, bitRange=5
2115
- sfr = "ADC_SR.EOC6", "Memory", 0xfffd801c, 4, base=16, bitRange=6
2116
- sfr = "ADC_SR.EOC7", "Memory", 0xfffd801c, 4, base=16, bitRange=7
2117
- sfr = "ADC_SR.OVRE0", "Memory", 0xfffd801c, 4, base=16, bitRange=8
2118
- sfr = "ADC_SR.OVRE1", "Memory", 0xfffd801c, 4, base=16, bitRange=9
2119
- sfr = "ADC_SR.OVRE2", "Memory", 0xfffd801c, 4, base=16, bitRange=10
2120
- sfr = "ADC_SR.OVRE3", "Memory", 0xfffd801c, 4, base=16, bitRange=11
2121
- sfr = "ADC_SR.OVRE4", "Memory", 0xfffd801c, 4, base=16, bitRange=12
2122
- sfr = "ADC_SR.OVRE5", "Memory", 0xfffd801c, 4, base=16, bitRange=13
2123
- sfr = "ADC_SR.OVRE6", "Memory", 0xfffd801c, 4, base=16, bitRange=14
2124
- sfr = "ADC_SR.OVRE7", "Memory", 0xfffd801c, 4, base=16, bitRange=15
2125
- sfr = "ADC_SR.DRDY", "Memory", 0xfffd801c, 4, base=16, bitRange=16
2126
- sfr = "ADC_SR.GOVRE", "Memory", 0xfffd801c, 4, base=16, bitRange=17
2127
- sfr = "ADC_SR.ENDRX", "Memory", 0xfffd801c, 4, base=16, bitRange=18
2128
- sfr = "ADC_SR.RXBUFF", "Memory", 0xfffd801c, 4, base=16, bitRange=19
2129
- sfr = "ADC_LCDR", "Memory", 0xfffd8020, 4, base=16
2130
- sfr = "ADC_LCDR.LDATA", "Memory", 0xfffd8020, 4, base=16, bitRange=0-9
2131
- sfr = "ADC_IER", "Memory", 0xfffd8024, 4, base=16
2132
- sfr = "ADC_IER.EOC0", "Memory", 0xfffd8024, 4, base=16, bitRange=0
2133
- sfr = "ADC_IER.EOC1", "Memory", 0xfffd8024, 4, base=16, bitRange=1
2134
- sfr = "ADC_IER.EOC2", "Memory", 0xfffd8024, 4, base=16, bitRange=2
2135
- sfr = "ADC_IER.EOC3", "Memory", 0xfffd8024, 4, base=16, bitRange=3
2136
- sfr = "ADC_IER.EOC4", "Memory", 0xfffd8024, 4, base=16, bitRange=4
2137
- sfr = "ADC_IER.EOC5", "Memory", 0xfffd8024, 4, base=16, bitRange=5
2138
- sfr = "ADC_IER.EOC6", "Memory", 0xfffd8024, 4, base=16, bitRange=6
2139
- sfr = "ADC_IER.EOC7", "Memory", 0xfffd8024, 4, base=16, bitRange=7
2140
- sfr = "ADC_IER.OVRE0", "Memory", 0xfffd8024, 4, base=16, bitRange=8
2141
- sfr = "ADC_IER.OVRE1", "Memory", 0xfffd8024, 4, base=16, bitRange=9
2142
- sfr = "ADC_IER.OVRE2", "Memory", 0xfffd8024, 4, base=16, bitRange=10
2143
- sfr = "ADC_IER.OVRE3", "Memory", 0xfffd8024, 4, base=16, bitRange=11
2144
- sfr = "ADC_IER.OVRE4", "Memory", 0xfffd8024, 4, base=16, bitRange=12
2145
- sfr = "ADC_IER.OVRE5", "Memory", 0xfffd8024, 4, base=16, bitRange=13
2146
- sfr = "ADC_IER.OVRE6", "Memory", 0xfffd8024, 4, base=16, bitRange=14
2147
- sfr = "ADC_IER.OVRE7", "Memory", 0xfffd8024, 4, base=16, bitRange=15
2148
- sfr = "ADC_IER.DRDY", "Memory", 0xfffd8024, 4, base=16, bitRange=16
2149
- sfr = "ADC_IER.GOVRE", "Memory", 0xfffd8024, 4, base=16, bitRange=17
2150
- sfr = "ADC_IER.ENDRX", "Memory", 0xfffd8024, 4, base=16, bitRange=18
2151
- sfr = "ADC_IER.RXBUFF", "Memory", 0xfffd8024, 4, base=16, bitRange=19
2152
- sfr = "ADC_IDR", "Memory", 0xfffd8028, 4, base=16
2153
- sfr = "ADC_IDR.EOC0", "Memory", 0xfffd8028, 4, base=16, bitRange=0
2154
- sfr = "ADC_IDR.EOC1", "Memory", 0xfffd8028, 4, base=16, bitRange=1
2155
- sfr = "ADC_IDR.EOC2", "Memory", 0xfffd8028, 4, base=16, bitRange=2
2156
- sfr = "ADC_IDR.EOC3", "Memory", 0xfffd8028, 4, base=16, bitRange=3
2157
- sfr = "ADC_IDR.EOC4", "Memory", 0xfffd8028, 4, base=16, bitRange=4
2158
- sfr = "ADC_IDR.EOC5", "Memory", 0xfffd8028, 4, base=16, bitRange=5
2159
- sfr = "ADC_IDR.EOC6", "Memory", 0xfffd8028, 4, base=16, bitRange=6
2160
- sfr = "ADC_IDR.EOC7", "Memory", 0xfffd8028, 4, base=16, bitRange=7
2161
- sfr = "ADC_IDR.OVRE0", "Memory", 0xfffd8028, 4, base=16, bitRange=8
2162
- sfr = "ADC_IDR.OVRE1", "Memory", 0xfffd8028, 4, base=16, bitRange=9
2163
- sfr = "ADC_IDR.OVRE2", "Memory", 0xfffd8028, 4, base=16, bitRange=10
2164
- sfr = "ADC_IDR.OVRE3", "Memory", 0xfffd8028, 4, base=16, bitRange=11
2165
- sfr = "ADC_IDR.OVRE4", "Memory", 0xfffd8028, 4, base=16, bitRange=12
2166
- sfr = "ADC_IDR.OVRE5", "Memory", 0xfffd8028, 4, base=16, bitRange=13
2167
- sfr = "ADC_IDR.OVRE6", "Memory", 0xfffd8028, 4, base=16, bitRange=14
2168
- sfr = "ADC_IDR.OVRE7", "Memory", 0xfffd8028, 4, base=16, bitRange=15
2169
- sfr = "ADC_IDR.DRDY", "Memory", 0xfffd8028, 4, base=16, bitRange=16
2170
- sfr = "ADC_IDR.GOVRE", "Memory", 0xfffd8028, 4, base=16, bitRange=17
2171
- sfr = "ADC_IDR.ENDRX", "Memory", 0xfffd8028, 4, base=16, bitRange=18
2172
- sfr = "ADC_IDR.RXBUFF", "Memory", 0xfffd8028, 4, base=16, bitRange=19
2173
- sfr = "ADC_IMR", "Memory", 0xfffd802c, 4, base=16
2174
- sfr = "ADC_IMR.EOC0", "Memory", 0xfffd802c, 4, base=16, bitRange=0
2175
- sfr = "ADC_IMR.EOC1", "Memory", 0xfffd802c, 4, base=16, bitRange=1
2176
- sfr = "ADC_IMR.EOC2", "Memory", 0xfffd802c, 4, base=16, bitRange=2
2177
- sfr = "ADC_IMR.EOC3", "Memory", 0xfffd802c, 4, base=16, bitRange=3
2178
- sfr = "ADC_IMR.EOC4", "Memory", 0xfffd802c, 4, base=16, bitRange=4
2179
- sfr = "ADC_IMR.EOC5", "Memory", 0xfffd802c, 4, base=16, bitRange=5
2180
- sfr = "ADC_IMR.EOC6", "Memory", 0xfffd802c, 4, base=16, bitRange=6
2181
- sfr = "ADC_IMR.EOC7", "Memory", 0xfffd802c, 4, base=16, bitRange=7
2182
- sfr = "ADC_IMR.OVRE0", "Memory", 0xfffd802c, 4, base=16, bitRange=8
2183
- sfr = "ADC_IMR.OVRE1", "Memory", 0xfffd802c, 4, base=16, bitRange=9
2184
- sfr = "ADC_IMR.OVRE2", "Memory", 0xfffd802c, 4, base=16, bitRange=10
2185
- sfr = "ADC_IMR.OVRE3", "Memory", 0xfffd802c, 4, base=16, bitRange=11
2186
- sfr = "ADC_IMR.OVRE4", "Memory", 0xfffd802c, 4, base=16, bitRange=12
2187
- sfr = "ADC_IMR.OVRE5", "Memory", 0xfffd802c, 4, base=16, bitRange=13
2188
- sfr = "ADC_IMR.OVRE6", "Memory", 0xfffd802c, 4, base=16, bitRange=14
2189
- sfr = "ADC_IMR.OVRE7", "Memory", 0xfffd802c, 4, base=16, bitRange=15
2190
- sfr = "ADC_IMR.DRDY", "Memory", 0xfffd802c, 4, base=16, bitRange=16
2191
- sfr = "ADC_IMR.GOVRE", "Memory", 0xfffd802c, 4, base=16, bitRange=17
2192
- sfr = "ADC_IMR.ENDRX", "Memory", 0xfffd802c, 4, base=16, bitRange=18
2193
- sfr = "ADC_IMR.RXBUFF", "Memory", 0xfffd802c, 4, base=16, bitRange=19
2194
- sfr = "ADC_CDR0", "Memory", 0xfffd8030, 4, base=16
2195
- sfr = "ADC_CDR0.DATA", "Memory", 0xfffd8030, 4, base=16, bitRange=0-9
2196
- sfr = "ADC_CDR1", "Memory", 0xfffd8034, 4, base=16
2197
- sfr = "ADC_CDR1.DATA", "Memory", 0xfffd8034, 4, base=16, bitRange=0-9
2198
- sfr = "ADC_CDR2", "Memory", 0xfffd8038, 4, base=16
2199
- sfr = "ADC_CDR2.DATA", "Memory", 0xfffd8038, 4, base=16, bitRange=0-9
2200
- sfr = "ADC_CDR3", "Memory", 0xfffd803c, 4, base=16
2201
- sfr = "ADC_CDR3.DATA", "Memory", 0xfffd803c, 4, base=16, bitRange=0-9
2202
- sfr = "ADC_CDR4", "Memory", 0xfffd8040, 4, base=16
2203
- sfr = "ADC_CDR4.DATA", "Memory", 0xfffd8040, 4, base=16, bitRange=0-9
2204
- sfr = "ADC_CDR5", "Memory", 0xfffd8044, 4, base=16
2205
- sfr = "ADC_CDR5.DATA", "Memory", 0xfffd8044, 4, base=16, bitRange=0-9
2206
- sfr = "ADC_CDR6", "Memory", 0xfffd8048, 4, base=16
2207
- sfr = "ADC_CDR6.DATA", "Memory", 0xfffd8048, 4, base=16, bitRange=0-9
2208
- sfr = "ADC_CDR7", "Memory", 0xfffd804c, 4, base=16
2209
- sfr = "ADC_CDR7.DATA", "Memory", 0xfffd804c, 4, base=16, bitRange=0-9
2210
-
2211
-
2212
- [SfrGroupInfo]
2213
- group = "TC0", "TC0_CCR", "TC0_CMR", "TC0_CV", "TC0_RA", "TC0_RB", "TC0_RC", "TC0_SR", "TC0_IER", "TC0_IDR", "TC0_IMR"
2214
- group = "TCB", "TCB_BCR", "TCB_BMR"
2215
- group = "TC1", "TC1_CCR", "TC1_CMR", "TC1_CV", "TC1_RA", "TC1_RB", "TC1_RC", "TC1_SR", "TC1_IER", "TC1_IDR", "TC1_IMR"
2216
- group = "TC2", "TC2_CCR", "TC2_CMR", "TC2_CV", "TC2_RA", "TC2_RB", "TC2_RC", "TC2_SR", "TC2_IER", "TC2_IDR", "TC2_IMR"
2217
- group = "UDP", "UDP_NUM", "UDP_GLBSTATE", "UDP_FADDR", "UDP_IER", "UDP_IDR", "UDP_IMR", "UDP_ISR", "UDP_ICR", "UDP_RSTEP", "UDP_CSR", "UDP_FDR", "UDP_TXVC"
2218
- group = "TWI", "TWI_CR", "TWI_MMR", "TWI_IADR", "TWI_CWGR", "TWI_SR", "TWI_IER", "TWI_IDR", "TWI_IMR", "TWI_RHR", "TWI_THR"
2219
- group = "US0", "US0_CR", "US0_MR", "US0_IER", "US0_IDR", "US0_IMR", "US0_CSR", "US0_RHR", "US0_THR", "US0_BRGR", "US0_RTOR", "US0_TTGR", "US0_FIDI", "US0_NER", "US0_IF"
2220
- group = "PDC_US0", "US0_RPR", "US0_RCR", "US0_TPR", "US0_TCR", "US0_RNPR", "US0_RNCR", "US0_TNPR", "US0_TNCR", "US0_PTCR", "US0_PTSR"
2221
- group = "US1", "US1_CR", "US1_MR", "US1_IER", "US1_IDR", "US1_IMR", "US1_CSR", "US1_RHR", "US1_THR", "US1_BRGR", "US1_RTOR", "US1_TTGR", "US1_FIDI", "US1_NER", "US1_IF"
2222
- group = "PDC_US1", "US1_RPR", "US1_RCR", "US1_TPR", "US1_TCR", "US1_RNPR", "US1_RNCR", "US1_TNPR", "US1_TNCR", "US1_PTCR", "US1_PTSR"
2223
- group = "PWMC", "PWMC_MR", "PWMC_ENA", "PWMC_DIS", "PWMC_SR", "PWMC_IER", "PWMC_IDR", "PWMC_IMR", "PWMC_ISR", "PWMC_VR"
2224
- group = "PWMC_CH0", "PWMC_CH0_CMR", "PWMC_CH0_CDTYR", "PWMC_CH0_CPRDR", "PWMC_CH0_CCNTR", "PWMC_CH0_CUPDR", "PWMC_CH0_Reserved"
2225
- group = "PWMC_CH1", "PWMC_CH1_CMR", "PWMC_CH1_CDTYR", "PWMC_CH1_CPRDR", "PWMC_CH1_CCNTR", "PWMC_CH1_CUPDR", "PWMC_CH1_Reserved"
2226
- group = "PWMC_CH2", "PWMC_CH2_CMR", "PWMC_CH2_CDTYR", "PWMC_CH2_CPRDR", "PWMC_CH2_CCNTR", "PWMC_CH2_CUPDR", "PWMC_CH2_Reserved"
2227
- group = "PWMC_CH3", "PWMC_CH3_CMR", "PWMC_CH3_CDTYR", "PWMC_CH3_CPRDR", "PWMC_CH3_CCNTR", "PWMC_CH3_CUPDR", "PWMC_CH3_Reserved"
2228
- group = "CAN", "CAN_MR", "CAN_IER", "CAN_IDR", "CAN_IMR", "CAN_SR", "CAN_BR", "CAN_TIM", "CAN_TIMESTP", "CAN_ECR", "CAN_TCR", "CAN_ACR", "CAN_VR"
2229
- group = "CAN_MB0", "CAN_MB0_MMR", "CAN_MB0_MAM", "CAN_MB0_MID", "CAN_MB0_MFID", "CAN_MB0_MSR", "CAN_MB0_MDL", "CAN_MB0_MDH", "CAN_MB0_MCR"
2230
- group = "CAN_MB1", "CAN_MB1_MMR", "CAN_MB1_MAM", "CAN_MB1_MID", "CAN_MB1_MFID", "CAN_MB1_MSR", "CAN_MB1_MDL", "CAN_MB1_MDH", "CAN_MB1_MCR"
2231
- group = "CAN_MB2", "CAN_MB2_MMR", "CAN_MB2_MAM", "CAN_MB2_MID", "CAN_MB2_MFID", "CAN_MB2_MSR", "CAN_MB2_MDL", "CAN_MB2_MDH", "CAN_MB2_MCR"
2232
- group = "CAN_MB3", "CAN_MB3_MMR", "CAN_MB3_MAM", "CAN_MB3_MID", "CAN_MB3_MFID", "CAN_MB3_MSR", "CAN_MB3_MDL", "CAN_MB3_MDH", "CAN_MB3_MCR"
2233
- group = "CAN_MB4", "CAN_MB4_MMR", "CAN_MB4_MAM", "CAN_MB4_MID", "CAN_MB4_MFID", "CAN_MB4_MSR", "CAN_MB4_MDL", "CAN_MB4_MDH", "CAN_MB4_MCR"
2234
- group = "CAN_MB5", "CAN_MB5_MMR", "CAN_MB5_MAM", "CAN_MB5_MID", "CAN_MB5_MFID", "CAN_MB5_MSR", "CAN_MB5_MDL", "CAN_MB5_MDH", "CAN_MB5_MCR"
2235
- group = "CAN_MB6", "CAN_MB6_MMR", "CAN_MB6_MAM", "CAN_MB6_MID", "CAN_MB6_MFID", "CAN_MB6_MSR", "CAN_MB6_MDL", "CAN_MB6_MDH", "CAN_MB6_MCR"
2236
- group = "CAN_MB7", "CAN_MB7_MMR", "CAN_MB7_MAM", "CAN_MB7_MID", "CAN_MB7_MFID", "CAN_MB7_MSR", "CAN_MB7_MDL", "CAN_MB7_MDH", "CAN_MB7_MCR"
2237
- group = "SSC", "SSC_CR", "SSC_CMR", "SSC_RCMR", "SSC_RFMR", "SSC_TCMR", "SSC_TFMR", "SSC_RHR", "SSC_THR", "SSC_RSHR", "SSC_TSHR", "SSC_SR", "SSC_IER", "SSC_IDR", "SSC_IMR"
2238
- group = "PDC_SSC", "SSC_RPR", "SSC_RCR", "SSC_TPR", "SSC_TCR", "SSC_RNPR", "SSC_RNCR", "SSC_TNPR", "SSC_TNCR", "SSC_PTCR", "SSC_PTSR"
2239
- group = "ADC", "ADC_CR", "ADC_MR", "ADC_CHER", "ADC_CHDR", "ADC_CHSR", "ADC_SR", "ADC_LCDR", "ADC_IER", "ADC_IDR", "ADC_IMR", "ADC_CDR0", "ADC_CDR1", "ADC_CDR2", "ADC_CDR3", "ADC_CDR4", "ADC_CDR5", "ADC_CDR6", "ADC_CDR7"
2240
- group = "PDC_ADC", "ADC_RPR", "ADC_RCR", "ADC_TPR", "ADC_TCR", "ADC_RNPR", "ADC_RNCR", "ADC_TNPR", "ADC_TNCR", "ADC_PTCR", "ADC_PTSR"
2241
- group = "EMAC", "EMAC_NCR", "EMAC_NCFGR", "EMAC_NSR", "EMAC_TSR", "EMAC_RBQP", "EMAC_TBQP", "EMAC_RSR", "EMAC_ISR", "EMAC_IER", "EMAC_IDR", "EMAC_IMR", "EMAC_MAN", "EMAC_PTR", "EMAC_PFR", "EMAC_FTO", "EMAC_SCF", "EMAC_MCF", "EMAC_FRO", "EMAC_FCSE", "EMAC_ALE", "EMAC_DTF", "EMAC_LCOL", "EMAC_ECOL", "EMAC_TUND", "EMAC_CSE", "EMAC_RRE", "EMAC_ROV", "EMAC_RSE", "EMAC_ELE", "EMAC_RJA", "EMAC_USF", "EMAC_STE", "EMAC_RLE", "EMAC_TPF", "EMAC_HRB", "EMAC_HRT", "EMAC_SA1L", "EMAC_SA1H", "EMAC_SA2L", "EMAC_SA2H", "EMAC_SA3L", "EMAC_SA3H", "EMAC_SA4L", "EMAC_SA4H", "EMAC_TID", "EMAC_TPQ", "EMAC_USRIO", "EMAC_WOL", "EMAC_REV"
2242
- group = "SPI0", "SPI0_CR", "SPI0_MR", "SPI0_RDR", "SPI0_TDR", "SPI0_SR", "SPI0_IER", "SPI0_IDR", "SPI0_IMR", "SPI0_CSR"
2243
- group = "PDC_SPI0", "SPI0_RPR", "SPI0_RCR", "SPI0_TPR", "SPI0_TCR", "SPI0_RNPR", "SPI0_RNCR", "SPI0_TNPR", "SPI0_TNCR", "SPI0_PTCR", "SPI0_PTSR"
2244
- group = "SPI1", "SPI1_CR", "SPI1_MR", "SPI1_RDR", "SPI1_TDR", "SPI1_SR", "SPI1_IER", "SPI1_IDR", "SPI1_IMR", "SPI1_CSR"
2245
- group = "PDC_SPI1", "SPI1_RPR", "SPI1_RCR", "SPI1_TPR", "SPI1_TCR", "SPI1_RNPR", "SPI1_RNCR", "SPI1_TNPR", "SPI1_TNCR", "SPI1_PTCR", "SPI1_PTSR"
2246
- group = "SYS"
2247
- group = "AIC", "AIC_SMR", "AIC_SVR", "AIC_IVR", "AIC_FVR", "AIC_ISR", "AIC_IPR", "AIC_IMR", "AIC_CISR", "AIC_IECR", "AIC_IDCR", "AIC_ICCR", "AIC_ISCR", "AIC_EOICR", "AIC_SPU", "AIC_DCR", "AIC_FFER", "AIC_FFDR", "AIC_FFSR"
2248
- group = "DBGU", "DBGU_CR", "DBGU_MR", "DBGU_IER", "DBGU_IDR", "DBGU_IMR", "DBGU_CSR", "DBGU_RHR", "DBGU_THR", "DBGU_BRGR", "DBGU_CIDR", "DBGU_EXID", "DBGU_FNTR"
2249
- group = "PDC_DBGU", "DBGU_RPR", "DBGU_RCR", "DBGU_TPR", "DBGU_TCR", "DBGU_RNPR", "DBGU_RNCR", "DBGU_TNPR", "DBGU_TNCR", "DBGU_PTCR", "DBGU_PTSR"
2250
- group = "PIOA", "PIOA_PER", "PIOA_PDR", "PIOA_PSR", "PIOA_OER", "PIOA_ODR", "PIOA_OSR", "PIOA_IFER", "PIOA_IFDR", "PIOA_IFSR", "PIOA_SODR", "PIOA_CODR", "PIOA_ODSR", "PIOA_PDSR", "PIOA_IER", "PIOA_IDR", "PIOA_IMR", "PIOA_ISR", "PIOA_MDER", "PIOA_MDDR", "PIOA_MDSR", "PIOA_PPUDR", "PIOA_PPUER", "PIOA_PPUSR", "PIOA_ASR", "PIOA_BSR", "PIOA_ABSR", "PIOA_OWER", "PIOA_OWDR", "PIOA_OWSR"
2251
- group = "PIOB", "PIOB_PER", "PIOB_PDR", "PIOB_PSR", "PIOB_OER", "PIOB_ODR", "PIOB_OSR", "PIOB_IFER", "PIOB_IFDR", "PIOB_IFSR", "PIOB_SODR", "PIOB_CODR", "PIOB_ODSR", "PIOB_PDSR", "PIOB_IER", "PIOB_IDR", "PIOB_IMR", "PIOB_ISR", "PIOB_MDER", "PIOB_MDDR", "PIOB_MDSR", "PIOB_PPUDR", "PIOB_PPUER", "PIOB_PPUSR", "PIOB_ASR", "PIOB_BSR", "PIOB_ABSR", "PIOB_OWER", "PIOB_OWDR", "PIOB_OWSR"
2252
- group = "PMC", "PMC_SCER", "PMC_SCDR", "PMC_SCSR", "PMC_PCER", "PMC_PCDR", "PMC_PCSR", "PMC_MOR", "PMC_MCFR", "PMC_PLLR", "PMC_MCKR", "PMC_PCKR", "PMC_IER", "PMC_IDR", "PMC_SR", "PMC_IMR"
2253
- group = "CKGR", "CKGR_MOR", "CKGR_MCFR", "CKGR_PLLR"
2254
- group = "RSTC", "RSTC_RCR", "RSTC_RSR", "RSTC_RMR"
2255
- group = "RTTC", "RTTC_RTMR", "RTTC_RTAR", "RTTC_RTVR", "RTTC_RTSR"
2256
- group = "PITC", "PITC_PIMR", "PITC_PISR", "PITC_PIVR", "PITC_PIIR"
2257
- group = "WDTC", "WDTC_WDCR", "WDTC_WDMR", "WDTC_WDSR"
2258
- group = "VREG", "VREG_MR"
2259
- group = "MC", "MC_RCR", "MC_ASR", "MC_AASR", "MC_FMR", "MC_FCR", "MC_FSR"