badline 0.17.0 → 0.18.0

data/lib/badline/chips/sid/filter.rb

@@ -195,7 +195,7 @@ module Badline
           @unfiltered = 0
           route_voice(voice1.output >> 7, 0x1)
           route_voice(voice2.output >> 7, 0x2)
-          if @routing & 0x4 != 0
+          if @routing.anybits?(0x4)
             @input += voice3.output >> 7
           elsif !@voice3_off
             @unfiltered += voice3.output >> 7
@@ -216,9 +216,9 @@ module Badline
 
         def filtered
           value = 0
-          value += @lowpass  if @mode & 0x1 != 0
-          value += @bandpass if @mode & 0x2 != 0
-          value += @highpass if @mode & 0x4 != 0
+          value += @lowpass  if @mode.anybits?(0x1)
+          value += @bandpass if @mode.anybits?(0x2)
+          value += @highpass if @mode.anybits?(0x4)
           value
         end
       end

data/lib/badline/chips/sid/waveform.rb

@@ -234,7 +234,7 @@ module Badline
         def compare_pulse(phase = @accumulator >> 12) = (@pulse = @test || phase >= @pulse_width ? 0xfff : 0x000)
 
         # More than one bit set in the selection.
-        def combined?(selected) = selected & (selected - 1) != 0
+        def combined?(selected) = selected.anybits?(selected - 1)
 
         # The one point in the cycle where the waveform selector drives the DAC:
         # either it latches a fresh value, or nothing drives the line and the
@@ -274,8 +274,8 @@ module Badline
         def advance
           previous = @accumulator
           @accumulator = (previous + @frequency) & 0xffffff
-          @msb_rising = @accumulator & ~previous & MSB != 0
-          if @accumulator & ~previous & 0x080000 != 0
+          @msb_rising = (@accumulator & ~previous).anybits?(MSB)
+          if (@accumulator & ~previous).anybits?(0x080000)
             @shift_pipeline = 2
           elsif @shift_pipeline != 0 && (@shift_pipeline -= 1).zero?
             write_back_shift
@@ -292,12 +292,12 @@ module Badline
         # TriXOR = !Saw & ((!V3 & Ring) ^ bit23), where V3 is the modulating
         # voice's MSB (SID/ringmod).
         def inverted?(selected)
-          return false if selected & 0x2 != 0
+          return false if selected.anybits?(0x2)
 
-          msb = @accumulator & MSB != 0
+          msb = @accumulator.anybits?(MSB)
           return msb unless @ring
 
-          msb == (@sync_source.accumulator & MSB != 0)
+          msb == @sync_source.accumulator.anybits?(MSB)
         end
       end
     end

data/lib/badline/chips/vic_i/keyed_parts.rb

@@ -86,13 +86,15 @@ module Badline
       LINE_LAYOUT = 1
 
       # The VIC-I's fields in a keyed snapshot module (Snapshot::Keyed): the
-      # registers, the beam, the text window's counters and the fetch in
-      # flight, the painter's lines under line.*, the picture, and the sound
+      # registers, the beam, the frame's length in lines and whether the
+      # next interlaced field is the long one, the text window's counters
+      # and the fetch in flight, the painter's lines under line.*, the picture, and the sound
       # under sound.* What the registers decode to, where the line's fetches
       # end and the next event are worked out on load.
       module KeyedState
         def save_fields(out)
           out.bytes("registers", @registers).int("raster", @rasterline).int("column", @column)
+          out.int("frame_lines", @frame_lines).bool("long_field", @long_field)
           out.bool("window_open", @window_open).bool("window_done", @window_done).int("row_start", @row_start)
           out.int("matrix", @matrix).int("char_line", @char_line).int("text_rows", @text_rows)
           out.int("fetch_from", @fetch_from).int("fetched", @fetched).int("code", @code)
@@ -106,6 +108,8 @@ module Badline
           input.bytes_into("registers", @registers)
           @rasterline = input.int("raster", @rasterline)
           @column = input.int("column", @column)
+          @frame_lines = input.int("frame_lines", @lines_per_frame)
+          @long_field = input.bool("long_field", true)
           @window_open = input.bool("window_open", @window_open)
           @window_done = input.bool("window_done", @window_done)
           @row_start = input.int("row_start", @row_start)
@@ -122,6 +126,7 @@ module Badline
         end
 
         def restored!
+          @frame_wrap = @frame_lines == @interlaced_lines ? @count_column : @wrap_column
           @origin_x = @registers[0] & 0x7f
           @columns = @registers[2] & 0x7f
           @origin_y = @registers[1]

data/lib/badline/chips/vic_i.rb

@@ -7,13 +7,15 @@ require "badline/chips/vic_i/keyed_parts"
 
 module Badline
   module Chips
-    # The VIC-I, the 6561 on PAL machines: its sixteen registers, the
+    # The VIC-I, the 6561 on PAL machines or the 6560 on NTSC ones: its
+    # sixteen registers, the
     # raster, the text window's fetches over the V-bus and the picture. The
     # writes to the sound's registers, $900A-$900E, go on to the Sound
     # attached as #sound.
     #
     # The registers repeat through $9000-$90FF. $9003 bit 7 and $9004 read
-    # the raster line, its bit 0 and bits 8-1. $9006 and $9007 read the
+    # the raster count, its bit 0 and bits 8-1, which on the 6561 is the
+    # raster line (see Profile for the 6560's). $9006 and $9007 read the
     # light pen, which nothing triggers yet, and $9008 and $9009 the two
     # pots, which read $FF with nothing plugged in. The other registers
     # read back what was written to them.
@@ -35,23 +37,48 @@ module Badline
     # of a text row where the row started, and the next row starts where
     # the last line of the row left it. It starts the frame at zero.
     #
-    # The picture is 4 pixels a cycle, so 284 a line. A character's 8
-    # pixels come out in the two cycles after its pattern fetch. The
-    # display's lines start 6 cycles after the raster count moves, as
-    # xvic's view of the frame does, so the character fetched 16 cycles
-    # into the line lands 48 pixels in. Lines 0-27 are blanked.
+    # The picture is 4 pixels a cycle, so 284 a line on the 6561 and 260 on
+    # the 6560. A character's 8 pixels come out in the two cycles after its
+    # pattern fetch. The display's lines start 6 cycles after the raster
+    # line moves, as xvic's view of the frame does, so the character
+    # fetched 16 cycles into the line lands 48 pixels in. Lines 0-27 are
+    # blanked.
     class VICI
       include TextWindow
 
       # What a VIC-I sets for the machine: the clock, the raster's cycles
-      # per line and lines per frame, and how many lines at the top of the
-      # frame it blanks. The 6560 of NTSC machines, with its half lines and
-      # the interlace of $9000 bit 7, would be another.
-      Profile = Data.define(:clock_hz, :cycles_per_line, :lines_per_frame, :blanked_lines)
+      # per line and lines per frame, how many lines at the top of the frame
+      # it blanks and how many it shows from there, and where in the line
+      # the raster count $9003 and $9004 read moves on, and how many lines
+      # the long field of an interlaced frame has, or 0 without interlace.
+      #
+      # The 6561's count is the raster line. The 6560's runs ahead of it: it
+      # reads the next line from +count_column+ on, and on the last line it
+      # reads one past the last line from there, then 0 from
+      # +wrap_column+ on, so the count's first and last values each last
+      # about half a line. The 6561's +count_column+ is past the end of the
+      # line, so it never moves early.
+      #
+      # With $9000 bit 7 set at the start of a frame, the 6560 interlaces:
+      # its frames alternate between the long field, +interlaced_lines+
+      # long, and the short one, a line shorter, the long one first. On the
+      # long field's last line the count wraps to 0 where it would move on,
+      # so its first and last values each last a whole line.
+      Profile = Data.define(:clock_hz, :cycles_per_line, :lines_per_frame, :blanked_lines, :shown_lines,
+                            :count_column, :wrap_column, :interlaced_lines)
 
       # The 6561: 71 cycles by 312 lines, lines 0-27 blanked (Marko
       # Mäkelä's VIC-I.txt).
-      PAL = Profile.new(clock_hz: 1_108_405, cycles_per_line: 71, lines_per_frame: 312, blanked_lines: 28)
+      PAL = Profile.new(clock_hz: 1_108_405, cycles_per_line: 71, lines_per_frame: 312, blanked_lines: 28,
+                        shown_lines: 284, count_column: 71, wrap_column: 71, interlaced_lines: 0)
+
+      # The 6560: 65 cycles by 261 lines on a 14.31818 MHz crystal divided
+      # by 14. The count's columns and the lines shown are xvic's, measured
+      # as a black box: the count moves on 28 cycles into the line, and
+      # wraps to 0 on the last line 61 cycles in. Interlaced, its fields are
+      # 263 and 262 lines.
+      NTSC = Profile.new(clock_hz: 1_022_727, cycles_per_line: 65, lines_per_frame: 261, blanked_lines: 28,
+                         shown_lines: 233, count_column: 28, wrap_column: 61, interlaced_lines: 263)
 
       PIXELS_PER_CYCLE = 4
 
@@ -71,6 +98,10 @@ module Badline
         0xb27240, 0xf2b27f, 0xc2655d, 0xbdffff, 0xf299ff, 0x8de57f, 0x806eda, 0xffffa5
       ].freeze
 
+      # The display's lines: the frame's, or the long interlaced field's
+      # where that is longer.
+      attr_reader :height
+
       attr_reader :rasterline, :column, :profile
       attr_accessor :sound
 
@@ -78,7 +109,11 @@ module Badline
         @profile = profile
         @cycles_per_line = profile.cycles_per_line
         @lines_per_frame = profile.lines_per_frame
-        @painter = Painter.new(@lines_per_frame, @cycles_per_line * PIXELS_PER_CYCLE, profile.blanked_lines)
+        @count_column = profile.count_column
+        @wrap_column = profile.wrap_column
+        @interlaced_lines = profile.interlaced_lines
+        @height = [@lines_per_frame, @interlaced_lines].max
+        @painter = Painter.new(@height, @cycles_per_line * PIXELS_PER_CYCLE, profile.blanked_lines)
         @patterns = @painter.patterns
         @colors = @painter.colors
         @counts = @painter.counts
@@ -106,11 +141,14 @@ module Badline
         @origin_x = @origin_y = @columns = @rows = 0
         @char_shift = 3
         @screen_base = @char_base = 0
+        @long_field = true
+        @frame_lines = @lines_per_frame
+        @frame_wrap = @wrap_column
         new_frame
         @fetch_from = @fetch_to = 0
         @fetched = @slot = 0
         @code = 0
-        @painter.power_on!(@lines_per_frame - 1)
+        @painter.power_on!(@frame_lines - 1)
         schedule
       end
 
@@ -131,14 +169,12 @@ module Badline
       # The sixteen registers as written.
       def register_file = @registers.dup
 
-      # The display, a palette index a pixel, 284 to a line and every line
-      # of the frame.
+      # The display, a palette index a pixel, 4 to a cycle of the line, and
+      # every line of the frame.
       def display = @painter.display
 
       def width = @painter.width
 
-      def height = @lines_per_frame
-
       # Whether each line of the display has changed since the front end
       # last cleared them.
       def dirty_lines = @painter.dirty_lines
@@ -157,8 +193,8 @@ module Badline
       def peek(addr)
         register = addr & 0x0f
         case register
-        when 0x03 then ((@rasterline & 0x01) << 7) | (@registers[3] & 0x7f)
-        when 0x04 then @rasterline >> 1
+        when 0x03 then ((raster_count & 0x01) << 7) | (@registers[3] & 0x7f)
+        when 0x04 then raster_count >> 1
         when 0x06, 0x07 then 0
         when 0x08, 0x09 then 0xff
         else @registers[register]
@@ -181,6 +217,16 @@ module Badline
         end
       end
 
+      # The raster count $9003 and $9004 read (see Profile).
+      def raster_count
+        line = @rasterline
+        column = @column
+        return line if column < @count_column
+        return 0 if line == @frame_lines - 1 && column >= @frame_wrap
+
+        line + 1
+      end
+
       private
 
       def event(column)
@@ -205,9 +251,10 @@ module Badline
 
       def start_line
         line = @rasterline + 1
-        if line == @lines_per_frame
+        if line == @frame_lines
           line = 0
           new_frame
+          next_field
         end
         @rasterline = line
         next_text_line if @window_open
@@ -215,6 +262,22 @@ module Badline
         place_fetches
       end
 
+      # How many lines the frame starting has, and where on its last line
+      # the count wraps: the field's, if $9000 bit 7 asks the 6560 to
+      # interlace, else the profile's.
+      def next_field
+        if @interlaced_lines.positive? && @registers[0] >= 0x80
+          long = @long_field
+          @frame_lines = long ? @interlaced_lines : @interlaced_lines - 1
+          @frame_wrap = long ? @count_column : @wrap_column
+          @long_field = !long
+        else
+          @frame_lines = @lines_per_frame
+          @frame_wrap = @wrap_column
+          @long_field = true
+        end
+      end
+
       def place_fetches
         line = @rasterline
         @slot = line * Painter::SLOTS

data/lib/badline/data_path.rb

@@ -24,10 +24,10 @@ module Badline
       File.join(xdg, "badline")
     end
 
-    # The quicksaves, autosaves or saves subfolder of data_path, created
-    # along with data_path if it doesn't exist yet.
+    # The quicksaves, autosaves, saves or tapes subfolder of data_path,
+    # created along with data_path if it doesn't exist yet.
     def data_folder(name)
-      raise ArgumentError, "unknown data folder: #{name}" unless %w[quicksaves autosaves saves].include?(name)
+      raise ArgumentError, "unknown data folder: #{name}" unless %w[quicksaves autosaves saves tapes].include?(name)
 
       path = File.join(data_path, name)
       FileUtils.mkdir_p(path)

data/lib/badline/drives/ieee_models.rb

@@ -0,0 +1,54 @@
+# frozen_string_literal: true
+
+module Badline
+  module Drives
+    # The true drives the PET's and the CBM-II's IEEE-488 bus takes, by the
+    # names --drive-type gives them, xpet's drive types, and the disk images
+    # each reads. Options reads it to check --drive-type, and
+    # Media::TrueDrive to pick the drive an image goes in, so it loads
+    # nothing else. Machine::IEEEDrives builds each.
+    module IEEEModels
+      # The images each model reads, by extension.
+      MEDIA = {
+        "2031" => %w[.d64 .g64], "8050" => %w[.d80], "8250" => %w[.d82], "1001" => %w[.d82], "4040" => %w[.d64 .d67],
+        "3040" => %w[.d64 .d67], "2040" => %w[.d67], "9060" => %w[.d90], "9090" => %w[.d90]
+      }.freeze
+
+      # The model --true-drive plugs in without --drive-type.
+      DEFAULT = "2031"
+
+      # The model an image goes in when neither the drive on device 8 nor
+      # the machine's own model reads it. A .d90 goes by its size
+      # (hard_disk_model).
+      FOR_IMAGES = { ".d64" => "2031", ".g64" => "2031", ".d80" => "8050", ".d82" => "8250", ".d67" => "2040" }.freeze
+
+      NAMES = MEDIA.keys.freeze
+
+      module_function
+
+      # Whether the image at path is a hard disk's, which only a true drive
+      # reads.
+      def hard_disk?(path) = File.extname(path).casecmp?(".d90")
+
+      # The hard disk a .d90 image belongs to, by its size: a D9090 for a
+      # D9090's, and otherwise a D9060.
+      def hard_disk_model(path) = Storage::D90Image.heads_for(File.size?(path).to_i) == 6 ? "9090" : "9060"
+
+      # Whether the model reads the image at path.
+      def reads?(model, path) = MEDIA.fetch(model, []).include?(File.extname(path).downcase)
+
+      # The model the image at path goes in: the drive's on device 8,
+      # `present`, if it reads it, or else the machine's own, `chosen`, or
+      # else the image's own, or nil for an image none reads. A .d90 goes
+      # in the machine's own model if that is a hard disk, and otherwise in
+      # the one its size names.
+      def taking(path, present, chosen)
+        return reads?(chosen, path) ? chosen : hard_disk_model(path) if hard_disk?(path)
+        return present if present && reads?(present, path)
+        return chosen if reads?(chosen, path)
+
+        FOR_IMAGES[File.extname(path).downcase]
+      end
+    end
+  end
+end

data/lib/badline/drives/model1001.rb

@@ -0,0 +1,37 @@
+# frozen_string_literal: true
+
+require "badline/drives/model8050"
+
+module Badline
+  module Drives
+    # The SFD-1001: the 8250LP's board redrawn as one PCB with one
+    # double-sided drive, a Matsushita JU-570-2 (schematic 251406). Both
+    # processors see an 8250. The interface processor runs DOS 2.7, which
+    # doesn't know there is one drive, and the controller runs 251257-02A
+    # from the EPROM on its 6530 adaptor (251252-01): the 8250LP's program
+    # with an interrupt every 3 ms for the JU-570's step rate, a longer head
+    # settle, and every job for drive 1 ended with an error. Drive 1's
+    # stepper, motor and LED aren't wired, so the unit takes no disk there,
+    # and its LED never lights.
+    class Model1001 < Model8250
+      # The LED bit of drive 1, which the board leaves unwired.
+      DRIVE1_LED = 0x01
+
+      def model_name = "1001"
+
+      # +fdc_rom+ defaults to 251257-02A, the rest as Model8050's.
+      def initialize(dos_rom: nil, fdc_rom: nil, host_clock_hz: CLOCK_HZ, device: 8)
+        super(dos_rom:, fdc_rom: fdc_rom || ROM.read("1001/fdc-251257-02a.rom"), host_clock_hz:, device:)
+      end
+
+      def leds = super & ~DRIVE1_LED
+
+      # Puts a Disk in drive 0, the only one. Drive 1 raises ArgumentError.
+      def insert(disk, drive: 0)
+        raise ArgumentError, "the 1001 has one drive, not drive #{drive}" unless drive.zero?
+
+        super
+      end
+    end
+  end
+end

data/lib/badline/drives/model2031.rb

@@ -34,6 +34,12 @@ module Badline
 
       def model_name = "2031"
 
+      def boot_cycles = BOOT_CYCLES
+
+      # Whether the drive is where VICE saves it: its CPU between
+      # instructions.
+      def settled_for_vice? = cpu.boundary?
+
       # +rom+ covers $C000-$FFFF, and defaults to the DOS image in the ROM
       # path. +device+ is the number the jumpers set, 8 to 11.
       def initialize(rom: nil, host_clock_hz: CLOCK_HZ, device: 8, debug: false)

data/lib/badline/drives/model4040/disk.rb

@@ -0,0 +1,62 @@
+# frozen_string_literal: true
+
+module Badline
+  module Drives
+    class Model4040
+      # A .d64 image as the 4040's controller finds it on the disk, each
+      # track a ring of byte cells as on the 8050 (Model8050::Disk), laid
+      # out as DOS 2.1's format writes it, sector after sector:
+      #
+      #   4 sync, $08, checksum, sector, track, ID 2, ID 1,
+      #   9 x $00, 4 sync, $07, 256 data bytes, checksum, then $00
+      #
+      # nine cells being the header gap the interface processor gives the
+      # controller ($049D, from DOS 2.1's SECTRK table), past which a write
+      # puts its syncs. A .d67, DOS 1's disk, is laid out as DOS 1 writes a
+      # sector: 2 sync, the header, one $08, 2 sync, $07, the data and its
+      # checksum. DOS 1's format writes headers only, so this is the track as
+      # if every sector had been written. The disk's ID is the BAM's, at
+      # 18/0 $A2. A turn passes 80,000 / (16 - zone) cells, the 16 MHz bit
+      # clock's.
+      class Disk < Model8050::Disk
+        # How many tracks a disk holds: 35.
+        def side_tracks = 35
+
+        def sides = 1
+
+        # The cells a track of the zone holds in one turn at 300 rpm: the
+        # 200,000 µs of a turn over 2.5 µs times 16 less the zone a byte.
+        def self.cells_in(zone) = 80_000 / (16 - zone)
+
+        # The zone a track is recorded in, 3 outermost to 0 innermost.
+        def self.zone_of(track) = Storage::D64Image.zone(track)
+
+        private
+
+        def build(number)
+          id1, id2 = disk_id
+          cells = []
+          sectors = @image.sectors_in(number)
+          dos1 = @image.is_a?(Storage::D67Image)
+          sectors.times do |sector|
+            data = @image.read_block(number, sector)
+            header = [0x08, number ^ sector ^ id1 ^ id2, sector, number, id2, id1]
+            if dos1
+              cells.push(SYNC, SYNC, *header, 0x08, SYNC, SYNC, 0x07)
+            else
+              cells.push(SYNC, SYNC, SYNC, SYNC, *header, *Array.new(9, 0x00), SYNC, SYNC, SYNC, SYNC, 0x07)
+            end
+            cells.concat(data)
+            cells << checksum(data)
+          end
+          pad(cells, sectors, self.class.cells_in(self.class.zone_of(number)))
+        end
+
+        def disk_id
+          bam = @image.read_block(18, 0)
+          [bam[0xa2], bam[0xa3]]
+        end
+      end
+    end
+  end
+end

data/lib/badline/drives/model4040/ip_bus.rb

@@ -0,0 +1,46 @@
+# frozen_string_literal: true
+
+module Badline
+  module Drives
+    class Model4040
+      # The interface processor's bus (schematic 320806, sheet 1). UB3
+      # decodes A12-A14 only, so the map repeats every 32 KB:
+      #
+      # $0000-$0FFF - the two 6532s, as on the 8050 (Model8050::IPBus)
+      # $1000-$4FFF - the common RAM, 1 KB in each block, mirrored through it
+      # $5000-$7FFF - the ROM sockets UJ1, UL1 and UH1, seen again at
+      #               $D000-$FFFF, where the processor finds its vectors
+      #
+      # A socket left empty, as UJ1 is under DOS 1, reads as open bus: the
+      # last byte on the data bus.
+      class IPBus < Model8050::IPBus
+        def peek(addr)
+          addr &= 0x7fff
+          return @data = rom_peek(addr | 0x8000) if addr >= 0x5000
+
+          @data = if addr < 0x1000
+                    peek_riots(addr)
+                  else
+                    @common.peek((((addr >> 12) - 1) << 10) | (addr & 0x03ff))
+                  end
+        end
+
+        def poke(addr, value)
+          @data = value
+          addr &= 0x7fff
+          return if addr >= 0x5000
+
+          if addr < 0x1000
+            poke_riots(addr, value)
+          else
+            poke_common((((addr >> 12) - 1) << 10) | (addr & 0x03ff), value)
+          end
+        end
+
+        private
+
+        def rom_peek(addr) = addr >= @rom.start ? @rom.peek(addr) : @data
+      end
+    end
+  end
+end

data/lib/badline/drives/model4040/keyed_state.rb

@@ -0,0 +1,57 @@
+# frozen_string_literal: true
+
+module Badline
+  module Drives
+    class Model4040
+      class Disk
+        def image_format = @image.is_a?(Storage::D67Image) ? "d67" : "d64"
+
+        # The disk a BL-D8-DISK module holds, as Model8050::Disk's, from a
+        # .d64 or a .d67.
+        def self.from_fields(input, detached: false)
+          path = input.text("path", "")
+          read_only = input.bool("read_only", false) || detached
+          kind = input.choice("image.format", %w[d64 d67], "d64")
+          bytes = input.bytes("image", "".b).bytes
+          path = "" if detached || !File.file?(path)
+          image = if kind == "d67"
+                    Storage::D67Image.new(path, read_only:, bytes:)
+                  else
+                    Storage::D64Image.new(path, read_only:, bytes:)
+                  end
+          new(image).load_track_fields(input)
+        end
+      end
+
+      class Mechanism
+        # The drives' fields in a keyed snapshot module (BL-D8-MECH), a value
+        # a drive in each list: the heads' half tracks, the stepper counts,
+        # each disk's place in its turn and its bit clock and the motors,
+        # then byte ready, the byte on VIA port A and SYNC. The disks load
+        # from their own modules.
+        module KeyedState
+          def save_fields(out)
+            out.ints("half_tracks", @half_tracks).ints("phases", @phases).ints("positions", @positions)
+            out.ints("bit_clocks", @clocks)
+            out.ints("motors", @motors.map { |on| on ? 1 : 0 }).ints("syncs", @syncs.map { |low| low ? 1 : 0 })
+            out.bool("ca1_low", @ca1_low).int("data_in", @data_in)
+          end
+
+          def load_fields(input, disks)
+            @disks = disks
+            input.ints_into("half_tracks", @half_tracks)
+            input.ints_into("phases", @phases)
+            input.ints_into("positions", @positions)
+            input.ints_into("bit_clocks", @clocks)
+            @motors = input.ints("motors", [0, 0]).map { |on| on == 1 }
+            @syncs = input.ints("syncs", [0, 0]).map { |low| low == 1 }
+            @ca1_low = input.bool("ca1_low", @ca1_low)
+            @data_in = input.byte("data_in", @data_in)
+          end
+        end
+
+        include KeyedState
+      end
+    end
+  end
+end