badline 0.13.0 → 0.14.0

data/lib/badline/c128/keyed_state.rb

@@ -0,0 +1,91 @@
+# frozen_string_literal: true
+
+module Badline
+  class C128
+    # The machine's own fields in a keyed snapshot module (Snapshot::Keyed,
+    # BL-MACHINE): the family, its model, SID and mode by name, the cycle
+    # count, $D030's clock bits on their way, the NMI glue, the two
+    # schedulers' offsets (z80_ahead, the Z80's T-states past when it was
+    # due, and chips_ahead), an 8502 reset waiting for the bus, and under
+    # host.* the host's typing (the codes still to type, whether it is
+    # typing, and where Input::MatrixTypist is in a code on the key
+    # matrix), C= held from power-on and the on_init handlers still to run.
+    # They load after the Z80's own fields, which z80_ahead counts from.
+    module KeyedState
+      # How many more on_init handlers the machine a snapshot was taken of had
+      # yet to run than this one has. Nil until the machine is restored.
+      attr_reader :init_handlers_lost
+
+      # Whether a snapshot saves now (Machine::Settling): the 8502 between
+      # instructions or jammed. While the Z80 runs, the 8502 waits at the
+      # boundary it handed the bus over at, and the Z80 runs whole
+      # instructions.
+      def settled_for_snapshot? = @cpu.boundary? || @cpu.jammed?
+
+      # The SID's deferred cycles and writes, run up to this cycle, and the
+      # VIC's sprite collisions latched up to the beam.
+      def settle_chips_for_snapshot
+        sid.catch_up!
+        @vic.fold_collisions!
+      end
+
+      def save_machine_fields(out)
+        out.text("family", "c128").text("written_by", VERSION)
+        snapshot_setup.write_fields(out)
+        out.int("cycles", @cycles).int("clock_bits", @clock_bits).bool("nmi_asserted", @nmi_asserted)
+        out.bool("cartridge_nmi", @cartridge_nmi).bool("restore_pulse", @restore_pulse)
+        out.int("z80_ahead", @z80.cycles - @z80_due).int("chips_ahead", @chips_ahead)
+        out.bool("cpu_reset_pending", @cpu_reset_pending)
+        pending = @pending_keys
+        out.ints("host.pending_keys", pending) if pending
+        out.bool("host.typing", !pending.nil?)
+        out.int("host.init_pending", @cycles <= init_threshold ? @init_handlers.length : 0)
+        out.bool("host.holding_commodore", @holding_commodore)
+        @typist.save_fields(out, "host.typist.")
+      end
+
+      def load_machine_fields(input)
+        @cycles = input.int("cycles", @cycles)
+        @clock_bits = input.int("clock_bits", @clock_bits)
+        @nmi_asserted = input.bool("nmi_asserted", @nmi_asserted)
+        @cartridge_nmi = input.bool("cartridge_nmi", @cartridge_nmi)
+        @restore_pulse = input.bool("restore_pulse", @restore_pulse)
+        @z80_due = @z80.cycles - input.int("z80_ahead", @z80.cycles - @z80_due)
+        @chips_ahead = input.int("chips_ahead", @chips_ahead)
+        @cpu_reset_pending = input.bool("cpu_reset_pending", @cpu_reset_pending)
+        pending = input.ints("host.pending_keys", [])
+        @pending_keys = input.bool("host.typing", !pending.empty?) ? pending.dup : nil
+        @init_handlers_lost = [input.int("host.init_pending", 0) - @init_handlers.length, 0].max
+        load_holding_fields(input)
+        @typist.load_fields(input, "host.typist.")
+      end
+
+      # Which CPU has the bus and whose turn it is, from the MMU and the
+      # schedulers' offsets, and the serial bus's lines.
+      def machine_restored!
+        @z80_running = @bus.z80?
+        @z80_turn = @z80_running || @chips_ahead.positive?
+        push_serial_lines
+        push_fast_serial
+      end
+
+      private
+
+      # C= held from power-on until the machine reaches C64 mode
+      # (Modes#hold_commodore_key).
+      def load_holding_fields(input)
+        holding = input.bool("host.holding_commodore", @holding_commodore)
+        keyboard.release(:cbm) if @holding_commodore && !holding
+        keyboard.press(:cbm) if holding && !@holding_commodore
+        @holding_commodore = holding
+      end
+
+      # How this machine was built.
+      def snapshot_setup
+        Snapshot::C128Setup.new(model: @model.name, sid_model: @sid.model, mode: @c64_built ? :c64 : :c128)
+      end
+    end
+
+    include KeyedState
+  end
+end

data/lib/badline/c128/keys.rb

@@ -21,6 +21,11 @@ module Badline
         @bus.caps_lock = false
       end
 
+      # Pushes CAPS LOCK, down if it was up and up if it was down.
+      def push_caps_lock
+        @bus.caps_lock = !@bus.caps_lock
+      end
+
       # The 40/80 DISPLAY key locks down and up. The KERNAL reads it at reset
       # and starts the screen editor on the VDC's 80 columns while it is down.
       def press_display_key
@@ -30,6 +35,10 @@ module Badline
       def release_display_key
         @bus.mmu.display_key = false
       end
+
+      def push_display_key
+        @bus.mmu.display_key = !@bus.mmu.display_key
+      end
     end
   end
 end

data/lib/badline/c128/mmu.rb

@@ -151,16 +151,17 @@ module Badline
         end
       end
 
-      # The registers and the P0H and P1H writes waiting for P0L and P1L.
-      # The bus maps the restored registers once its own state is back.
-      def save_state(out)
-        out.ints(@registers).int(@p0h_latch).int(@p1h_latch)
+      # The registers and the page pointers' high bytes waiting for their
+      # low bytes, in a keyed snapshot module (Snapshot::Keyed). The bus
+      # maps its banks from them afterwards.
+      def save_fields(out)
+        out.bytes("registers", @registers).int("p0h_latch", @p0h_latch).int("p1h_latch", @p1h_latch)
       end
 
-      def load_state(input)
-        input.ints_into(@registers)
-        @p0h_latch = input.int
-        @p1h_latch = input.int
+      def load_fields(input)
+        input.bytes_into("registers", @registers)
+        @p0h_latch = input.masked("p0h_latch", @p0h_latch, 0x0f)
+        @p1h_latch = input.masked("p1h_latch", @p1h_latch, 0x0f)
       end
 
       # CR and the LCRs at $FF00-$FF04: an LCR reads its PCR.

data/lib/badline/c128/mmu_pages.rb

@@ -46,6 +46,26 @@ module Badline
           end
         end
 
+        # The system ROM's byte at +addr+, $8000 or above, as CR value 0 maps it.
+        def system_rom_peek(addr)
+          if addr < 0xc000
+            @basic_high_rom.peek(addr)
+          elsif addr < 0xd000
+            @editor_rom.peek(addr)
+          elsif addr < 0xe000
+            @c128_character_rom.peek(addr)
+          else
+            @c128_kernal_rom.peek(addr)
+          end
+        end
+
+        # The chip's byte at +addr+, in $D000-$DFFF, as C128 mode's I/O maps it.
+        def bank_io_peek(addr)
+          lay_out_io(@bank_io_reads, @bank_io_writes)
+          @bank_io_reads[0xd5] = @mmu
+          @bank_io_reads[addr >> 8].peek(addr)
+        end
+
         # The bank CR picks, with common RAM in bank 0, then the pages page 0
         # and page 1 move to.
         def map_ram_pages

data/lib/badline/c128/modes.rb

@@ -46,15 +46,25 @@ module Badline
 
       # The keyboard buffer of the KERNAL the machine runs: the C64's, or in
       # C128 mode BASIC 7.0's.
-      def feed_keyboard
-        c64 = mode == :c64
-        count = c64 ? KeyboardBuffer::COUNT : C128_KEYBOARD_COUNT
-        return unless ram.peek(count).zero?
-
-        chunk = @pending_keys.shift(KeyboardBuffer::CAPACITY)
-        ram.write(c64 ? KeyboardBuffer::ADDRESS : C128_KEYBOARD_BUFFER, chunk)
-        ram.poke(count, chunk.length)
-        @pending_keys = nil if @pending_keys.empty?
+      def keyboard_buffer
+        mode == :c64 ? Machine::KeyboardBuffer::C64_LAYOUT : Machine::KeyboardBuffer::C128_LAYOUT
+      end
+
+      # Types the text type_text left: into the keyboard buffer, or while
+      # the Z80 runs, as under CP/M, where no KERNAL reads the buffer, on
+      # the key matrix, all of it once begun there.
+      def type_pending
+        if @z80_running || @typist.typing?
+          type_on_matrix
+        else
+          feed_keyboard
+        end
+      end
+
+      def type_on_matrix
+        pending = @pending_keys
+        @typist.cycle!(pending)
+        @pending_keys = nil if pending.empty? && !@typist.typing?
       end
     end
   end

data/lib/badline/c128/z80_turns.rb

@@ -58,7 +58,7 @@ module Badline
       # interrupt lines going to the Z80.
       def clock_chips
         handle_init if @cycles == @init_threshold
-        feed_keyboard if @pending_keys
+        type_pending if @pending_keys
 
         clock_bits = @clock_bits
         @clock_bits = @vic.clock_bits

data/lib/badline/c128.rb

@@ -8,12 +8,14 @@ require "badline/c128/io_pages"
 require "badline/c128/z80_pages"
 require "badline/c128/color_lines"
 require "badline/c128/banks"
-require "badline/c128/bus/saved_state"
+require "badline/c128/bus/keyed_state"
 require "badline/c128/bus"
 require "badline/c128/cpu"
 require "badline/c128/z80"
 require "badline/c128/z80_turns"
-require "badline/c128/saved_state"
+require "badline/snapshot/c128_setup"
+require "badline/c128/keyed_state"
+require "badline/c128/keyed_modules"
 require "badline/c128/keys"
 require "badline/c128/modes"
 require "badline/c128/drives"
@@ -43,8 +45,9 @@ module Badline
   # mirrors, and $D500-$D7FF holds the hidden MMU, the VDC and open bus.
   class C128
     include IntegerHelper
-    include KeyboardBuffer
+    include Machine::KeyboardBuffer
     include Machine::Clocking
+    include Machine::Settling
     include C64::Common
     include C64::Attachments
     include C64::KernalTraps
@@ -67,10 +70,6 @@ module Badline
     # BASIC 7.0's, which is READY by then.
     C128_INIT_THRESHOLD = 2_000_000
 
-    # The C128 KERNAL's keyboard buffer and its count.
-    C128_KEYBOARD_BUFFER = 0x034a
-    C128_KEYBOARD_COUNT = 0xd0
-
     attr_reader :cpu, :cycles, :drive1541, :model, :init_threshold
 
     def family = :c128
@@ -140,6 +139,7 @@ module Badline
       @restore_pulse = false
       @init_handlers = []
       @pending_keys = nil
+      @typist = Input::MatrixTypist.new(@bus.keyboard)
       @capture_output = nil
       init_drives
       enter_c64_mode if @c64_built
@@ -154,7 +154,7 @@ module Badline
       return z80_cycle! if @z80_turn
 
       handle_init if @cycles == @init_threshold
-      feed_keyboard if @pending_keys
+      type_pending if @pending_keys
 
       clock_bits = @clock_bits
       @clock_bits = @vic.clock_bits

data/lib/badline/c64/attachments.rb

@@ -37,50 +37,6 @@ module Badline
       def push_serial_lines
         @iec_bus.host_lines = @cia2.port_a_lines
       end
-
-      def save_cartridge(out)
-        cartridge = address_bus.cartridge
-        out.boolean(!cartridge.nil?)
-        cartridge&.save_setup(out)
-      end
-
-      # A cartridge comes back built afresh from the setup it was built
-      # with, before the address bus puts its state into it.
-      def load_cartridge(input)
-        if input.boolean?
-          connect_cartridge(Cartridge.from_setup(input))
-        elsif address_bus.cartridge
-          address_bus.detach_cartridge
-        end
-      end
-
-      # A true 1541 on the serial bus, then a 1581.
-      def save_serial_bus(out)
-        out.boolean(!@drive1541.nil?)
-        if @drive1541
-          out.int(@drive1541.device)
-          @drive1541.save_state(out)
-        end
-        save_drive1581(out)
-      end
-
-      def load_serial_bus(input)
-        load_drive1541(input)
-        load_drive1581(input)
-      end
-
-      # The REU, which the setup says the machine has, and whether it has
-      # asked for the bus. Its IRQ line reaches the CPU as it was.
-      def save_reu(out)
-        @reu&.save_state(out)
-        out.boolean(@dma)
-      end
-
-      def load_reu(input)
-        @reu&.load_state(input)
-        @reu_irq = @reu ? @reu.irq? : false
-        @dma = input.boolean?
-      end
     end
   end
 end

data/lib/badline/c64/banked_ram/plus256k.rb

@@ -33,18 +33,26 @@ module Badline
 
         def type = :plus256k
 
-        def save_state(out)
-          [@low_ram, @video_ram, @high_ram].each { |bank| out.int(@banks.index(bank)) }
-          out.boolean(@locked)
-          @banks.drop(1).each { |bank| bank.save_state(out) }
+        # $D100 as the banks it picks give it, whether it is locked, and
+        # banks 1 to 3, in a keyed snapshot module.
+        def save_fields(out)
+          low = @banks.index(@low_ram).to_i
+          video = @banks.index(@video_ram).to_i
+          out.int("d100", low | (video << 2) | (@banks.index(@high_ram).to_i << 6)).bool("locked", @locked)
+          @banks[1].save_fields(out, "bank1")
+          @banks[2].save_fields(out, "bank2")
+          @banks[3].save_fields(out, "bank3")
         end
 
-        def load_state(input)
-          @low_ram = @banks.fetch(input.int)
-          @video_ram = @banks.fetch(input.int)
-          @high_ram = @banks.fetch(input.int)
-          @locked = input.boolean?
-          @banks.drop(1).each { |bank| bank.load_state(input) }
+        def load_fields(input)
+          value = input.byte("d100", 0)
+          @low_ram = @banks[value & 0b11]
+          @video_ram = @banks[(value >> 2) & 0b11]
+          @high_ram = @banks[value >> 6]
+          @locked = input.bool("locked", @locked)
+          @banks[1].load_fields(input, "bank1")
+          @banks[2].load_fields(input, "bank2")
+          @banks[3].load_fields(input, "bank3")
         end
 
         def power_on!

data/lib/badline/c64/banked_ram/plus60k.rb

@@ -26,14 +26,16 @@ module Badline
 
         def type = :plus60k
 
-        def save_state(out)
-          out.int(@banks.index(@high_ram))
-          @banks[1].save_state(out)
+        # $D100 as bit 7 picks the bank above $1000, and bank 1, in a
+        # keyed snapshot module.
+        def save_fields(out)
+          out.int("d100", @banks.index(@high_ram).to_i << 7)
+          @banks[1].save_fields(out, "bank1")
         end
 
-        def load_state(input)
-          @high_ram = @banks.fetch(input.int)
-          @banks[1].load_state(input)
+        def load_fields(input)
+          @high_ram = @banks[(input.byte("d100", @banks.index(@high_ram).to_i << 7) >> 7) & 1]
+          @banks[1].load_fields(input, "bank1")
         end
 
         def power_on!

data/lib/badline/c64/banked_ram/unexpanded.rb

@@ -17,9 +17,9 @@ module Badline
 
         def map_io(_read_pages, _write_pages); end
 
-        def save_state(_out); end
+        def save_fields(_out); end
 
-        def load_state(_input); end
+        def load_fields(_input); end
 
         def reset!; end
 

data/lib/badline/c64/bus/debug_register.rb

@@ -0,0 +1,32 @@
+# frozen_string_literal: true
+
+module Badline
+  class C64
+    class Bus
+      # The VICE debug cartridge register, mapped at $D7FF on the C64. It is a
+      # VICE facility rather than real hardware, enabled there with -debugcart:
+      # writing a byte ends the run with that value as the exit code. The VICE
+      # test suites write $00 for success and $ff for failure.
+      #
+      # Wraps the SID's top mirror page, so every other access falls through.
+      class DebugRegister
+        ADDRESS = 0xd7ff
+
+        def initialize(sid, &handler)
+          @sid = sid
+          @handler = handler
+        end
+
+        def peek(addr)
+          @sid.peek(addr)
+        end
+
+        def poke(addr, value)
+          return @handler.call(value) if addr == ADDRESS
+
+          @sid.poke(addr, value)
+        end
+      end
+    end
+  end
+end

data/lib/badline/c64/bus/keyed_state.rb

@@ -0,0 +1,41 @@
+# frozen_string_literal: true
+
+module Badline
+  class C64
+    class Bus
+      # The 6510's port under port.* in a keyed snapshot module
+      # (Snapshot::Keyed, BL-CPU), and the bus once its memories, the port
+      # and the cartridge are loaded: the banks the CPU and the VIC see are
+      # worked out again.
+      module KeyedState
+        # The RAM expansion fitted, or an Unexpanded stand-in.
+        attr_reader :ram_expansion
+
+        # Takes the cartridge out of the expansion port, as a restore does for
+        # a snapshot without one.
+        def detach_cartridge
+          @cartridge = nil
+          update_overlays!
+        end
+
+        # The 6510 port's direction and output registers, and the charge left
+        # on its floating bits.
+        def port_state = [@cpu_port.ddr, @cpu_port.data, @cpu_port.floating]
+
+        # Sets the port as port_state reads it, as a snapshot restores it,
+        # leaving the RAM under $00 and $01 alone.
+        def restore_port(ddr, out, floating)
+          @cpu_port.restore(ddr, out, floating)
+        end
+
+        def save_port_fields(out) = @cpu_port.save_fields(out, "port.")
+
+        def load_port_fields(input) = @cpu_port.load_fields(input, "port.")
+
+        def restored! = update_overlays!
+      end
+
+      include KeyedState
+    end
+  end
+end

data/lib/badline/c64/bus.rb

@@ -1,11 +1,12 @@
 # frozen_string_literal: true
 
-require "badline/c64/bus/saved_state"
+require "badline/c64/bus/keyed_state"
 require "badline/c64/bus/sid_slots"
 require "badline/c64/bus/extra_sids"
 require "badline/c64/bus/pla"
 require "badline/c64/bus/roms"
 require "badline/c64/bus/fittings"
+require "badline/c64/bus/debug_register"
 
 module Badline
   # Memory layout:

data/lib/badline/c64/cartridge/action_replay.rb

@@ -65,19 +65,6 @@ module Badline
 
         private
 
-        def save_mapper(out)
-          super
-          out.int(window_index(@rom, windows)).boolean(@active).boolean(@io2_ram).blob(@ram_data)
-        end
-
-        def load_mapper(input)
-          super
-          @rom = window_at(input.int, windows)
-          @active = input.boolean?
-          @io2_ram = input.boolean?
-          input.blob_into(@ram_data)
-        end
-
         def windows = [@through, @isolated, @contended, *@rom_banks, EMPTY_BANK]
 
         def io2_peek(addr)

data/lib/badline/c64/cartridge/easy_flash.rb

@@ -88,21 +88,6 @@ module Badline
           @romh = @high_flash.window(@bank * BANK_SIZE)
         end
 
-        def save_mapper(out)
-          out.int(@bank).int(@control).blob(@io_ram)
-          @low_flash.save_state(out)
-          @high_flash.save_state(out)
-        end
-
-        def load_mapper(input)
-          @bank = input.int
-          @control = input.int
-          input.blob_into(@io_ram)
-          @low_flash.load_state(input)
-          @high_flash.load_state(input)
-          map_bank
-        end
-
         def apply_control
           game = @control.nobits?(0x04) || @control.anybits?(0x01)
           exrom = @control.anybits?(0x02)

data/lib/badline/c64/cartridge/epyx_fastload.rb

@@ -57,14 +57,6 @@ module Badline
 
         private
 
-        def save_mapper(out)
-          out.int(@discharged_at)
-        end
-
-        def load_mapper(input)
-          @discharged_at = input.int
-        end
-
         def discharge!
           @discharged_at = @clock ? @clock.call : 0
         end

data/lib/badline/c64/cartridge/final_cartridge3.rb

@@ -61,18 +61,6 @@ module Badline
 
         private
 
-        def save_mapper(out)
-          super
-          out.boolean(@register_visible).boolean(@phi1_ultimax)
-        end
-
-        def load_mapper(input)
-          super
-          @io_bank = @roml
-          @register_visible = input.boolean?
-          @phi1_ultimax = input.boolean?
-        end
-
         def windows = [*@roml_banks, *@romh_banks, EMPTY_BANK]
 
         def select(number)

data/lib/badline/c64/cartridge/flash.rb

@@ -1,7 +1,5 @@
 # frozen_string_literal: true
 
-require "badline/c64/cartridge/flash/saved_state"
-
 module Badline
   class C64
     class Cartridge
@@ -69,7 +67,9 @@ module Badline
           alias [] peek
         end
 
-        include SavedState
+        # The command states, which a snapshot names.
+        STATES = %i[read program_setup autoselect programming erase_window erasing suspended chip_erase
+                    program_error].freeze
 
         attr_reader :data, :state
         attr_writer :clock

data/lib/badline/c64/cartridge/g_mod2.rb

@@ -48,18 +48,6 @@ module Badline
           changed!
         end
 
-        def save_mapper(out)
-          out.int(@bank).boolean(@flash_writes)
-          @flash.save_state(out)
-        end
-
-        def load_mapper(input)
-          @bank = input.int
-          @flash_writes = input.boolean?
-          @flash.load_state(input)
-          @roml = @flash.window(@bank * BANK_SIZE)
-        end
-
         def install_chips(chips)
           data = Array.new(BANKS * BANK_SIZE, 0xff)
           chips.each do |chip|

data/lib/badline/c64/cartridge/geo_ram.rb

@@ -53,24 +53,8 @@ module Badline
           @block = @page = @window = 0
         end
 
-        # A GEO-RAM is built from its size alone.
-        def save_setup(out)
-          out.int(GEO_RAM_SETUP).int(@size)
-        end
-
         private
 
-        def save_mapper(out)
-          out.blob(@ram_data).int(@block).int(@page).int(@window)
-        end
-
-        def load_mapper(input)
-          input.blob_into(@ram_data)
-          @block = input.int
-          @page = input.int
-          @window = input.int
-        end
-
         def install_chips(_chips)
           @ram_data = Array.new(@size * 1024, 0)
           reset

data/lib/badline/c64/cartridge/kcs_power.rb

@@ -56,14 +56,6 @@ module Badline
 
         private
 
-        def save_mapper(out)
-          out.blob(@io_ram)
-        end
-
-        def load_mapper(input)
-          input.blob_into(@io_ram)
-        end
-
         def install_chips(chips)
           roml, romh = banks_from(chips)
           @roml = roml.first || EMPTY_BANK