axi_tdl 0.2.0 → 0.2.4

data/lib/axi/data_interface/data_streams_combin_A1.sv

@@ -1,7 +1,8 @@
 /**********************************************
 _______________________________________ 
 ___________    Cook Darwin   __________    
-_______________________________________descript:
+_______________________________________
+descript:
 author : Cook.Darwin
 Version: VERA.0.0
     build from data_streams_scaler VA.0.1

data/lib/axi/data_interface/data_streams_scaler.sv

@@ -1,7 +1,8 @@
 /**********************************************
 _______________________________________ 
 ___________    Cook Darwin   __________    
-_______________________________________descript:
+_______________________________________
+descript:
 author : Cook.Darwin
 Version: VERA.0.1
 Version: VERA.0.2 2018-4-12 15:42:15

data/lib/axi_tdl/version.rb

@@ -1,3 +1,3 @@
 module AxiTdl
-  VERSION = "0.2.0"
+  VERSION = "0.2.4"
 end

data/lib/tdl/axi4/axi4_interconnect_verb.rb

@@ -228,7 +228,7 @@ class Axi4
             curr_quanti_len = e.dsize.real_data * (2**e.lsize.real_data)
             if(curr_quanti_len > root_quanti_len )
             # if(true )
-                new_master = self.copy(mode:e.mode,idsize:e.idsize+4)
+                new_master = self.copy(mode:e.mode,idsize:e.idsize+4,name: "#{self.name}_long_slim_to_wide_#{globle_random_name_flag('axi_intc')}" )
                 new_master.mode =  e.mode
 
                 require_hdl 'axi4_long_to_axi4_wide_B1.sv'
@@ -236,6 +236,8 @@ class Axi4
                 TopModule.contain_hdl 'axi4_packet_fifo_verb.sv'
                 TopModule.contain_hdl 'axi4_data_convert_verb.sv'
                 TopModule.contain_hdl 'data_c_pipe_force_vld.sv'
+                TopModule.contain_hdl 'axi4_packet_fifo_B1.sv','axi4_rd_packet_fifo_A1.sv','axi4_wr_packet_fifo_A1.sv','axi_stream_packet_fifo_B1F.sv'
+
 
                 belong_to_module.Instance(:axi4_long_to_axi4_wide_B1,"axi4_long_to_axi4_wide_B1_#{index}_inst") do |h|
                     h[:PARTITION]   = "ON"
@@ -254,6 +256,8 @@ class Axi4
                     TopModule.contain_hdl 'axi4_packet_fifo_verb.sv'
                     TopModule.contain_hdl 'axi4_data_convert_verb.sv'
                     TopModule.contain_hdl 'data_c_pipe_force_vld.sv'
+                    TopModule.contain_hdl 'axi4_packet_fifo_B1.sv','axi4_rd_packet_fifo_A1.sv','axi4_wr_packet_fifo_A1.sv','axi_stream_packet_fifo_B1F.sv'
+
                     # puts "#{e.dsize} == #{self.dsize} #{e.dsize != self.dsize} #{e.dsize.class}"
                     new_master = self.copy(name: "#{e.name}_renew_dir",mode:e.mode,idsize:e.idsize)
                     # new_master.axi4_data_convert(up_stream: e)

data/lib/tdl/examples/2_hdl_class/tmp/test_vcs_string.sv

@@ -5,7 +5,7 @@ _______________________________________
 descript:
 author : Cook.Darwin
 Version: VERA.0.0
-created: 2022-07-10 11:21:57 +0800
+created: 2023-02-17 21:27:54 +0800
 madified:
 ***********************************************/
 `timescale 1ns/1ps

data/lib/tdl/examples/8_top_module/test_top.sv

@@ -5,7 +5,7 @@ _______________________________________
 descript:
 author : Cook.Darwin
 Version: VERA.0.0
-created: 2022-07-10 11:21:37 +0800
+created: 2023-02-17 21:27:53 +0800
 madified:
 ***********************************************/
 `timescale 1ns/1ps

data/lib/tdl/rebuild_ele/ele_base.rb

@@ -668,6 +668,20 @@ module TdlSpace
             end
         end
 
+        ## Monkey 布丁, 
+        def force_name_copy(nstr)
+            
+            if nstr.to_s.eql?(inst_name.to_s)
+                @copy_id ||= 0
+                str = "#{nstr.to_s}_copy_#{@copy_id}"
+                @copy_id += 1
+                str
+            else
+                nstr.to_s
+            end
+            
+        end
+
         def use_which_freq_when_copy(argv_clock,argv_origin)
             if argv_clock == @clock && @clock
                 if @clock.respond_to? :freqM

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: axi_tdl
 version: !ruby/object:Gem::Version
-  version: 0.2.0
+  version: 0.2.4
 platform: ruby
 authors:
 - Cook.Darwin
 autorequire: 
 bindir: exe
 cert_chain: []
-date: 2022-07-17 00:00:00.000000000 Z
+date: 2023-02-18 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: rake
@@ -131,10 +131,14 @@ files:
 - lib/axi/AXI4/odata_pool_axi4_A1.sv
 - lib/axi/AXI4/odata_pool_axi4_A2.sv
 - lib/axi/AXI4/odata_pool_axi4_A3.sv
+- lib/axi/AXI4/odata_pool_axi4_A4.sv
 - lib/axi/AXI4/packet_fifo/axi4_packet_fifo.sv
+- lib/axi/AXI4/packet_fifo/axi4_packet_fifo_B1.sv
 - lib/axi/AXI4/packet_fifo/axi4_packet_fifo_verb.sv
 - lib/axi/AXI4/packet_fifo/axi4_rd_packet_fifo.sv
+- lib/axi/AXI4/packet_fifo/axi4_rd_packet_fifo_A1.sv
 - lib/axi/AXI4/packet_fifo/axi4_wr_packet_fifo.sv
+- lib/axi/AXI4/packet_fifo/axi4_wr_packet_fifo_A1.sv
 - lib/axi/AXI4/packet_merge/axi4_merge.sv
 - lib/axi/AXI4/packet_merge/axi4_merge_rd.sv
 - lib/axi/AXI4/packet_merge/axi4_merge_wr.sv
@@ -312,6 +316,7 @@ files:
 - lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo.sv
 - lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_B1.sv
 - lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_B1E.sv
+- lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_B1F.sv
 - lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_verb.sv
 - lib/axi/AXI_stream/packet_fifo/axi_stream_packet_fifo_with_info.sv
 - lib/axi/AXI_stream/packet_fifo/axi_stream_packet_long_fifo.sv
@@ -321,6 +326,8 @@ files:
 - lib/axi/AXI_stream/parse_big_field_table.sv
 - lib/axi/AXI_stream/parse_big_field_table_A1.sv
 - lib/axi/AXI_stream/parse_big_field_table_A2.sv
+- lib/axi/AXI_stream/parse_big_field_table_main.sv
+- lib/axi/AXI_stream/parse_big_field_table_mirror.sv
 - lib/axi/AXI_stream/parse_big_field_table_verb.sv
 - lib/axi/AXI_stream/parse_common_frame_table.sv
 - lib/axi/AXI_stream/parse_common_frame_table_A1.sv
@@ -351,6 +358,7 @@ files:
 - lib/axi/SIM/tb_wide_axis_to_axi4_wr.sv
 - lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip.sv
 - lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip_C1.sv
+- lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip_C2.sv
 - lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip_verb.sv
 - lib/axi/axi4_to_xilinx_ddr_native/axi4_to_native_for_ddr_ip_verc.sv
 - lib/axi/axi4_to_xilinx_ddr_native/ddr3_ip_native_to_axi4.sv
@@ -358,6 +366,8 @@ files:
 - lib/axi/axi4_to_xilinx_ddr_native/ddr_axi4_to_axis.sv
 - lib/axi/axi4_to_xilinx_ddr_native/ddr_native_fifo.sv
 - lib/axi/axi4_to_xilinx_ddr_native/ddr_native_fifo_A1.sv
+- lib/axi/axi4_to_xilinx_ddr_native/ddr_native_fifo_A2.sv
+- lib/axi/axi4_to_xilinx_ddr_native/ddr_native_fifo_B1.sv
 - lib/axi/axi4_to_xilinx_ddr_native/ddr_native_fifo_verb.sv
 - lib/axi/axi4_to_xilinx_ddr_native/model_ddr_ip_app.sv
 - lib/axi/axi4_to_xilinx_ddr_native/tb_ddr3_ip_wrapper_sim.sv
@@ -1340,7 +1350,7 @@ required_ruby_version: !ruby/object:Gem::Requirement
   requirements:
   - - ">="
     - !ruby/object:Gem::Version
-      version: 2.5.0
+      version: 2.6.0
 required_rubygems_version: !ruby/object:Gem::Requirement
   requirements:
   - - ">="