HDLRuby 2.11.11 → 2.11.12

data/lib/HDLRuby/hruby_low_without_subsignals.rb

@@ -0,0 +1,279 @@
+require 'HDLRuby'
+require 'HDLRuby/hruby_tools'
+require 'HDLRuby/hruby_low_mutable'
+require 'HDLRuby/hruby_low_resolve'
+
+
+module HDLRuby::Low
+
+
+##
+# Replace hierachical signals by the list of their sub signals.
+# Makes handling by some synthesis tools easier.
+#
+########################################################################
+
+    ## Extends the SystemT class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class SystemT
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            self.scope.signal2subs!
+        end
+    end
+
+
+    ## Extends the Scope class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class Scope
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # Recruse on the sub scopes.
+            self.each_scope(&:signal2subs!)
+
+            # Recurse on the blocks.
+            self.each_behavior do |behavior|
+                # behavior.block.each_block_deep(&:signal2subs!)
+                behavior.signal2subs!
+            end
+
+            # Work on the connections.
+            self.each_connection.to_a.each do |connection|
+                # Recurse on the left and right.
+                connection.set_left!(connection.left.signal2subs!)
+                connection.set_right!(connection.right.signal2subs!)
+            end
+        end
+    end
+
+
+    ## Extends the Behavior class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class Behavior
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # Process the events.
+            self.each_event.to_a.each do |ev|
+                subrefs = ev.ref.flatten
+                if subrefs.any? then
+                    # The refence have been flattend, remove the event.
+                    self.delete_event!(ev)
+                    # And add instead new events for the sub references.
+                    subrefs.each do |subref|
+                        nev = Event.new(ev.type,subref)
+                        self.add_event(nev)
+                    end
+                end
+            end
+            # Recurse on the blocks.
+            self.block.each_block_deep(&:signal2subs!)
+        end
+    end
+
+
+    ## Extends the Block class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class Block
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # Recurse on the statments.
+            self.map_statements! do |stmnt|
+                stmnt.signal2subs!
+            end
+            return self
+        end
+    end
+
+
+    ## Extends the TimeWait class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class TimeWait
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # Nothing to do.
+            return self
+        end
+    end
+
+
+    ## Extends the TimeRepeat class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class TimeRepeat
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # Recurse on the statement.
+            self.set_statement!(self.statement.signal2subs!)
+            return self
+        end
+    end
+
+
+    ## Extends the Transmit class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class Transmit
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # Recurse on the left and right.
+            self.set_left!(self.left.signal2subs!)
+            self.set_right!(self.right.signal2subs!)
+            return self
+        end
+    end
+
+
+    ## Extends the Print class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class Print
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # Recurse on the arguments.
+            self.map_args! { |arg| arg.signal2subs! }
+            return self
+        end
+    end
+
+
+    ## Extends the Print class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class TimeTerminate
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # Nothing to do.
+            return self
+        end
+    end
+    
+
+    ## Extends the If class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class If
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # Recurse on the condition.
+            self.set_condition!(self.condition.signal2subs!)
+            # Recurse on the yes block.
+            self.yes.signal2subs!
+            # Recurse on the no block if any.
+            self.no.signal2subs! if self.no
+            # Recurse on the alternate ifs.
+            self.map_noifs! do |cond,stmnt|
+                [cond.signal2subs!,stmnt.signal2subs!]
+            end
+            return self
+        end
+    end
+
+
+    ## Extends the When class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class When
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # Recurse on the match.
+            self.set_match!(self.match.signal2subs!)
+            # Recurse on the statement.
+            self.set_statement!(self.statement.signal2subs!)
+            return self
+        end
+
+    end
+
+
+    ## Extends the Case class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class Case
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # Recurse on the case value.
+            self.set_value!(self.value.signal2subs!)
+            # Recurse on the whens.
+            self.each_when(&:signal2subs!)
+            # Recurse on the default.
+            self.set_default!(self.default.signal2subs!) if self.default
+            return self
+        end
+    end
+
+
+    ## Extends the Expression class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class Expression
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # puts "signal2subs! for expr=#{self}"
+            # Recurse on the subexpressions.
+            self.map_expressions!(&:signal2subs!)
+            return self
+        end
+    end
+
+
+    ## Extends the RefName class with functionality for decomposing the
+    #  hierachical signals in the statements.
+    class RefName
+
+        # Flatten a reference to a list of reference to leaf signals
+        # from signal +sig+ and add to result to +subrefs+
+        def flatten_to(sig,subrefs)
+            # puts "flatten_to with sig name=#{sig.name}"
+            # Work on the sub signals if any.
+            sig.each_signal do |sub|
+                # Create a reference for the sub.
+                subref = RefName.new(sub.type,self.clone,sub.name)
+                # Recruse on it.
+                subref.flatten_to(sub,subrefs)
+                # Was it a leaf?
+                unless sub.each_signal.any? then
+                    # Yes, add its new ref to the list of subs.
+                    subrefs << subref
+                end
+            end
+        end
+
+        # Flatten the current ref to a list of references.
+        # If the reference is not heirachical, returns an empty list.
+        def flatten
+            subrefs = []
+            self.flatten_to(self.resolve,subrefs)
+            return subrefs
+        end
+
+        # Decompose the hierarchical signals in the statements.
+        def signal2subs!
+            # puts "signal2subs! for RefName: #{self.name}"
+            # Decompose it to a list of reference to each leaf sub signal.
+            subrefs = []
+            self.flatten_to(self.resolve,subrefs)
+            # puts "subrefs=#{subrefs.map{|subref| subref.name}}"
+            # Has it sub signals?
+            if (subrefs.any?) then
+                # Yes, convert it to a Concat.
+                if self.leftvalue? then
+                    return RefConcat.new(self.type,subrefs)
+                else
+                    return Concat.new(self.type,subrefs)
+                end
+            else
+                # Nothing to do.
+                return self
+            end
+        end
+    end
+
+
+
+
+end

data/lib/HDLRuby/hruby_rcsim.rb

@@ -17,7 +17,6 @@ module HDLRuby::High
 
         ## Gives the width of an int in the current computer.
         def self.int_width
-            # puts "int_width=#{[1.to_i].pack("i").size*8}"
             return [1.to_i].pack("i").size*8
         end
 
@@ -105,30 +104,18 @@ module HDLRuby::High
                 RCSim.rcsim_set_owner(@rcsystemT,rcowner)
             end
             # Create and add the interface signals.
-            # self.each_input do |sig|
-            #     rcsig = sig.to_rcsim(@rcsystemT)
-            #     RCSim.rcsim_add_systemT_input(@rcsystemT,rcsig)
-            # end
             if self.each_input.any? then
                 RCSim.rcsim_add_systemT_inputs(@rcsystemT,
                                                self.each_input.map do |sig|
                     sig.to_rcsim(@rcsystemT)
                 end)
             end
-            # self.each_output do |sig|
-            #     rcsig = sig.to_rcsim(@rcsystemT)
-            #     RCSim.rcsim_add_systemT_output(@rcsystemT,rcsig)
-            # end
             if self.each_output.any? then
                 RCSim.rcsim_add_systemT_outputs(@rcsystemT,
                                                 self.each_output.map do |sig|
                     sig.to_rcsim(@rcsystemT)
                 end)
             end
-            # self.each_inout do |sig|
-            #     rcsig = sig.to_rcsim(@rcsystemT)
-            #     RCSim.rcsim_add_systemT_inout(@rcsystemT,rcsig)
-            # end
             if self.each_inout.any? then
                 RCSim.rcsim_add_systemT_inouts(@rcsystemT,
                                                self.each_inout.map do |sig|
@@ -174,10 +161,6 @@ module HDLRuby::High
             subowner = self.parent.is_a?(SystemT) ? rcowner : @rcscope
 
             # Create and add the inner signals.
-            # self.each_inner do |sig|
-            #     rcsig = sig.to_rcsim(@rcscope)
-            #     RCSim.rcsim_add_scope_inner(@rcscope,rcsig)
-            # end
             if self.each_inner.any? then
                 RCSim.rcsim_add_scope_inners(@rcscope,self.each_inner.map do|sig|
                     # sig.to_rcsim(@rcscope)
@@ -186,10 +169,6 @@ module HDLRuby::High
             end
             
             # Create and add the system instances.
-            # self.each_systemI do |sys|
-            #     rcsys = sys.to_rcsim(@rcscope)
-            #     RCSim.rcsim_add_scope_systemI(@rcscope,rcsys)
-            # end
             if self.each_systemI.any? then
                 RCSim.rcsim_add_scope_systemIs(@rcscope,
                                                self.each_systemI.map do |sys|
@@ -198,6 +177,14 @@ module HDLRuby::High
                 end)
             end
 
+            # Create and add the sub scopes.
+            if self.each_scope.any? then
+                RCSim.rcsim_add_scope_scopes(@rcscope,self.each_scope.map do|sub|
+                    # sub.to_rcsim(@rcscope)
+                    sub.to_rcsim(subowner)
+                end)
+            end
+
             # # Create and add the behaviors.
             # if self.each_behavior.any? then
             #     RCSim.rcsim_add_scope_behaviors(@rcscope,
@@ -224,18 +211,6 @@ module HDLRuby::High
             # Create and add the codes.
             # TODO!!
 
-            # Create and add the sub scopes.
-            # self.each_scope do |sub|
-            #     rcsub = sub.to_rcsim(@rcscope)
-            #     RCSim.rcsim_add_scope_scope(@rcscope,rcsub)
-            # end
-            if self.each_scope.any? then
-                RCSim.rcsim_add_scope_scopes(@rcscope,self.each_scope.map do|sub|
-                    # sub.to_rcsim(@rcscope)
-                    sub.to_rcsim(subowner)
-                end)
-            end
-
             return @rcscope
         end
     end
@@ -322,6 +297,20 @@ module HDLRuby::High
 
         attr_reader :rcbehavior
 
+        # Add sub leaf events from +sig+ of +type+.
+        def add_sub_events(type,sig)
+            if sig.each_signal.any? then
+                # The event is hierarchical, recurse.
+                sig.each_signal do |sub|
+                    self.add_sub_events(type,sub)
+                end
+            else
+                # Te event is not hierarchical, add it.
+                ref = RefObject.new(this,sig)
+                self.add_event(Event.new(type,ref))
+            end
+        end
+
         # Generate the C description of the behavior comming from object
         # whose C description is +rcowner+
         def to_rcsim(rcowner)
@@ -350,6 +339,16 @@ module HDLRuby::High
                 events = refs.map {|ref| Event.new(:anyedge,ref.clone) }
                 # Add them to the behavior for further processing.
                 events.each {|event| self.add_event(event) }
+            else
+                # Maybe there are event on hierachical signals.
+                events.each do |event|
+                    if event.ref.object.each_signal.any? then
+                        # This is a hierarchical event, remove it.
+                        self.delete_event!(event)
+                        # And replace it by event of the subs of the signal.
+                        self.add_sub_events(event.type,event.ref)
+                    end
+                end
             end
 
             # Create the behavior C object.
@@ -360,13 +359,9 @@ module HDLRuby::High
             RCSim.rcsim_set_owner(@rcbehavior,rcowner)
 
             # Create and add the events.
-            # self.each_event do |ev|
-            #     RCSim.rcsim_add_behavior_event(@rcbehavior,ev.to_rcsim)
-            # end
             if self.each_event.any? then
                 RCSim.rcsim_add_behavior_events(@rcbehavior,
                                                 self.each_event.map do |ev|
-                    # puts "adding event: #{ev.ref.object.name}(#{ev.type})"
                     ev.to_rcsim(@rcbehavior)
                 end)
             end
@@ -425,6 +420,12 @@ module HDLRuby::High
             # Set the owner.
             RCSim.rcsim_set_owner(@rcsignalI,rcowner)
 
+            # Create and add the sub signals if any.
+            RCSim.rcsim_add_signal_signals(@rcsignalI,
+                                           self.each_signal.each.map do |sig|
+                sig.to_rcsim(@rcsignalI)
+            end)
+
             # Set the initial value if any.
             if self.value then
                 RCSim.rcsim_set_signal_value(@rcsignalI,self.value.to_rcsim)
@@ -480,10 +481,6 @@ module HDLRuby::High
             RCSim.rcsim_set_owner(@rcsystemI,rcowner)
 
             # Add the alternate system types.
-            # self.each_systemT do |systemT|
-            #     rcsys = systemT.to_rcsim(@rcsystemI)
-            #     RCSim.rcsim_add_systemI_systemT(@rcsystemI,rcsys)
-            # end
             if self.each_systemI.any? then
                 RCSim.rcsim_add_systemI_systemTs(@rcsystemI,
                                                  self.each_systemT.select do|sys|
@@ -547,9 +544,6 @@ module HDLRuby::High
             @rcstatement = RCSim.rcsim_make_print()
 
             # Adds the arguments.
-            # self.each_arg do |arg|
-            #     RCSim.rcsim_add_print_arg(@rcstatement,arg.to_rcsim)
-            # end
             if self.each_arg.any? then
                 RCSim.rcsim_add_print_args(@rcstatement,
                                            self.each_arg.map(&:to_rcsim))
@@ -592,9 +586,6 @@ module HDLRuby::High
                                           self.no ? self.no.to_rcsim : nil)
 
             # Add the alternate ifs if any.
-            # self.each_noif do |cond,stmnt|
-            #     RCSim.rcsim_add_hif_noif(@rcstatement,cond.to_rcsim,stmnt.to_rcsim)
-            # end
             rcsim_conds = self.each_noif.map {|cond,stmnt| cond.to_rcsim }
             rcsim_stmnts = self.each_noif.map {|cond,stmnt| stmnt.to_rcsim }
             if rcsim_conds.any? then
@@ -622,10 +613,6 @@ module HDLRuby::High
                                     self.default ? self.default.to_rcsim : nil)
 
             # Add the hardware whens.
-            # self.each_when do |wh|
-            #     RCSim.rcsim_add_hcase_when(@rcstatement,
-            #                          wh.match.to_rcsim,wh.statement.to_rcsim)
-            # end
             rcsim_matches = self.each_when.map {|wh| wh.match.to_rcsim }
             rcsim_stmnts = self.each_when.map {|wh| wh.statement.to_rcsim }
             if rcsim_matches.any? then
@@ -695,9 +682,6 @@ module HDLRuby::High
             end
 
             # Add the inner signals.
-            # self.each_inner do |inner|
-            #     RCSim.rcsim_add_block_inner(@rcstatement,inner.to_rcsim(@rcstatement))
-            # end
             if self.each_inner.any? then
                 RCSim.rcsim_add_block_inners(@rcstatement,
                                              self.each_inner.map do |sig|
@@ -706,9 +690,6 @@ module HDLRuby::High
             end
 
             # Add the statements.
-            # self.each_statement do |stmnt|
-            #     RCSim.rcsim_add_block_statement(@rcstatement,stmnt.to_rcsim)
-            # end
             if self.each_statement.any? then
                 RCSim.rcsim_add_block_statements(@rcstatement,
                                             self.each_statement.map do |stmnt|
@@ -735,6 +716,20 @@ module HDLRuby::High
     class Connection
         attr_reader :rcbehavior
 
+        # Add recursively any event to +rcevs+ for activativing the 
+        # connection from signal +sig+ attached to +rcbehavior+
+        def self.add_rcevents(sig,rcevs,rcbehavior)
+            # Recurse on sub signals if any.
+            sig.each_signal do |sub|
+                Connection.add_rcevents(sub,rcevs,rcbehavior)
+            end
+            # Apply on the current node.
+            rcsig = sig.is_a?(SignalI) ? sig.rcsignalI : sig.rcsignalC
+            ev = RCSim.rcsim_make_event(:anyedge,rcsig)
+            RCSim.rcsim_set_owner(ev,rcbehavior)
+            rcevs << ev
+        end
+
         # Generate the C description of the connection.
         # +rcowner+ is a link to the C description of the owner scope.
         def to_rcsim(rcowner)
@@ -749,9 +744,10 @@ module HDLRuby::High
             rcevs = []
             self.right.each_node_deep do |node|
                 if node.is_a?(RefObject) && !node.parent.is_a?(RefObject) then
-                    ev = RCSim.rcsim_make_event(:anyedge,node.to_rcsim)
-                    RCSim.rcsim_set_owner(ev,@rcbehavior)
-                    rcevs << ev
+                    Connection.add_rcevents(node.object,rcevs,@rcbehavior)
+                    # ev = RCSim.rcsim_make_event(:anyedge,node.to_rcsim)
+                    # RCSim.rcsim_set_owner(ev,@rcbehavior)
+                    # rcevs << ev
                 end
             end
             if rcevs.any? then
@@ -892,9 +888,6 @@ module HDLRuby::High
                                               self.select.to_rcsim)
 
             # Add the choice expressions. */
-            # self.each_choice do |choice|
-            #     rcsim_add_select_choice(rcexpression,choice.to_rcsim)
-            # end
             if self.each_choice.any? then
                 RCSim.rcsim_add_select_choices(rcexpression,
                                                self.each_choice.map(&:to_rcsim))
@@ -916,9 +909,6 @@ module HDLRuby::High
                                              self.type.direction)
 
             # Add the concatenated expressions. */
-            # self.each_expression do |expr|
-            #     RCSim.rcsim_add_concat_expression(rcexpression,expr.to_rcsim)
-            # end
             if self.each_expression.any? then
                 RCSim.rcsim_add_concat_expressions(rcexpression,
                                          self.each_expression.map(&:to_rcsim))
@@ -954,9 +944,6 @@ module HDLRuby::High
                                          self.type.direction)
 
             # Add the concatenated expressions. */
-            # self.each_ref do |ref|
-            #     RCSim.rcsim_add_refConcat_ref(rcref,ref.to_rcsim)
-            # end
             if self.each_ref.any? then
                 RCSim.rcsim_add_refConcat_refs(rcref,self.each_ref.map(&:to_rcsim))
             end
@@ -1018,14 +1005,36 @@ module HDLRuby::High
     class RefObject
         # attr_reader :rcref
         # alias_method :rcexpression, :rcref
+        
+        # Generate the C description of the reference object with sub signals.
+        def to_rcsim_subs
+            # Create the reference concat C object.
+            # The reference is always big endian, it is the sequence
+            # of element which is reversed if necessary.
+            rcref = RCSim.rcsim_make_refConcat(self.type.to_rcsim,:big)
+                                         # self.type.direction)
+
+            # Add the concatenated expressions. */
+            if self.object.each_signal.any? then
+                iter = self.object.each_signal
+                iter = iter.reverse_each if self.type.direction == :big
+                RCSim.rcsim_add_refConcat_refs(rcref, iter.map do|sig|
+                    sig.is_a?(SignalI) ? sig.rcsignalI : sig.rcsignalC
+                end)
+            end
+            
+            return rcref
+        end
 
         # Generate the C description of the reference object.
         def to_rcsim
             # puts "object=#{self.object.name}(#{self.object})"
             if self.object.is_a?(SignalI)
-                return self.object.rcsignalI
+                return self.object.each_signal.any? ? self.to_rcsim_subs :
+                    self.object.rcsignalI
             elsif self.object.is_a?(SignalC)
-                return self.object.rcsignalC
+                return self.object.each_signal.any? ? self.to_rcsim_subs :
+                    self.object.rcsignalC
             else
                 raise "Invalid object: #{self.object}"
             end