HDLRuby 2.11.11 → 2.11.12

checksums.yaml

@@ -1,7 +1,7 @@
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data/README.md

@@ -437,7 +437,7 @@ system :sumprod do |typ,coefs|
    typ[coefs.size].input :ins
    typ.output :o
    
-   o <= coefs.each_with_index.reduce(_0) do |sum,(coef,i)|
+   o <= coefs.each_with_index.reduce(_b0) do |sum,(coef,i)|
       sum + ins[i]*coef
    end
 end
@@ -446,7 +446,7 @@ end
 In the code above, there are two generic parameters,
 `typ`, which indicates the data type of the circuit, and `coefs`, which is assumed to be an array of coefficients. Since the number of inputs depends on the number of provided coefficients, it is declared as an array of `width` bit signed whose size is equal to the number of coefficients.
 
-The description of the sum of products may be more difficult to understand for people not familiar with the Ruby language. The `each_with_index` method iterates over the coefficients adding their index as iteration variable, the resulting operation (i.e., the iteration loop) is then modified by the `reduce` method that accumulates the code passed as arguments. This code, starting by `|sum,coef,i|` simply performs the addition of the current accumulation result (`sum`) with the product of the current coefficient (`coef`) and input (`ins[i]`, where `i` is the index) in the iteration. The argument `_0` initializes the sum to `0`.
+The description of the sum of products may be more difficult to understand for people not familiar with the Ruby language. The `each_with_index` method iterates over the coefficients adding their index as iteration variable, the resulting operation (i.e., the iteration loop) is then modified by the `reduce` method that accumulates the code passed as arguments. This code, starting by `|sum,coef,i|` simply performs the addition of the current accumulation result (`sum`) with the product of the current coefficient (`coef`) and input (`ins[i]`, where `i` is the index) in the iteration. The argument `_b0` initializes the sum to `0`.
 
 While slightly longer than the previous description, this description allows declaring a circuit implementing a sum of products with any bit width and any number of coefficients. For instance, the following code describes a signed 32-bit sum of products with  16 coefficients (just random numbers here).
 
@@ -463,7 +463,7 @@ system :sumprod_func do |typ,coefs|
    typ[coefs.size].input ins
    typ.output :o
    
-   o <= coefs.each_with_index.reduce(_0) do 
+   o <= coefs.each_with_index.reduce(_b0) do 
    |sum,(coef,i)|
       add(sum, mult(ins[i]*coef))
    end
@@ -509,7 +509,7 @@ system :sumprod_proc do |add,mult,typ,coefs|
    typ[coefs.size].input ins
    typ.output :o
    
-   o <= coefs.each_with_index.reduce(_0) do 
+   o <= coefs.each_with_index.reduce(_b0) do 
    |sum,(coef,i)|
       add.(sum, mult.(ins[i]*coef))
    end
@@ -539,10 +539,8 @@ A second possible approach provided by HDLRuby is to declare a new data type wit
 signed[16].typedef(:sat16_1000)
 
 sat16_1000.define_operator(:+) do |x,y|
-   [16].inner :res
-   seq do
-      res <= x + y
-      ( res <= 1000 ).hif(res > 1000)
+      tmp = x + y
+      mux(tmp > 1000,tmp,1000)
    end
 end
 ```
@@ -565,10 +563,8 @@ end
 
 
 sat.define_operator(:+) do |width,max, x,y|
-   [width].inner :res
-   seq do
-      res <= x + y
-      ( res <= max ).hif(res > max)
+      tmp = x + y
+      mux(tmp > max, tmp, max)
    end
 end
 ```
@@ -1426,7 +1422,7 @@ They include [immediate values](#values), [reference to signals](#references) an
 ### Immediate values
 <a name="values"></a>
 
-The immediate values of HDLRuby can represent vectors of `bit`, `unsigned`, and `signed`, and integer or floating-point numbers. They are prefixed by a `_` character and include a header that indicates the vector type and the base used for representing the value, followed by a numeral representing the value.  The bit width of a value is obtained by default from the width of the numeral, but it is also possible to enforce it in the header.
+The immediate values of HDLRuby can represent vectors of `bit`, `unsigned`, and `signed`, and integer or floating-point numbers. They are prefixed by a `_` character and include a header that indicates the vector type and the base used for representing the value, followed by a numeral representing the value. The bit width of a value is obtained by default from the width of the numeral, but it is also possible to specify it in the header. In addition, the character `_` can be put anywhere in the number for increasing the readability, it will be ignored.
 
 The vector type specifiers are the followings:
  
@@ -1438,7 +1434,7 @@ The vector type specifiers are the followings:
 
 The base specifiers are the followings:
 
- - `b`: binary, can be omitted,
+ - `b`: binary,
 
  - `o`: octal,
  
@@ -1446,21 +1442,30 @@ The base specifiers are the followings:
 
  - `h`: hexadecimal.
 
-For example, all the following immediate values represent an 8-bit `100` (either in unsigned or signed representation):
+For example, all the following immediate values represent an 8-bit `hundred` (either in unsigned or signed representation):
 
 ```ruby
 _bb01100100
-_b8b1100100
+_b8b110_0100
 _b01100100
-_01100100
 _u8d100
 _s8d100
 _uh64
 _s8o144
 ```
 
+Finally, it is possible to omit either the type specifier, the default being unsigned bit, or the base specifier, the default being binary. For example, all the following immediate values represent an 8-bit unsigned `hundred`:
+
+```ruby
+_b01100100
+_h64
+_o144
+```
+
 __Notes__:
 
+ - `_01100100` used to be considered as equivalent to `_b01100100`, however due to compatibility troubles with recent version of Ruby it is considered deprecated.
+
  - Ruby immediate values can also be used, their bit width is automatically adjusted to match the data type of the expression they are used in. Please notice this adjusting may change the value of the immediate, for example, the following code will set `sig` to 4 instead of 100:
 
    ```ruby
@@ -2309,7 +2314,7 @@ Where:
  * `type` is the type from which the operation is overloaded.
  * `op` is the operator that is overloaded (e.g., `+`)
  * `args` are the arguments of the operation.
- * `operation description` is an HDLRuby description of the new operation.
+ * `operation description` is an HDLRuby expression of the new operation.
 
 For example, for `fix32` a 32-bit (decimal point at 16-bit) fixed-point type defined as follows:
 
@@ -2813,6 +2818,38 @@ fsm(clk.posedge,rst,:sync) do
 end
 ```
 
+__Note__: the goto statements acts globally, i.e., they are independant of the place where they are declared within the state. For example for both following statements, the next state will always be `st_a` whatever `cond` maybe:
+
+```ruby
+   state(:st_0) do
+      goto(:st_a)
+   end
+   state(:st_1) do
+      hif(cond) { goto(:st_a) }
+   end
+```
+
+That is to say, for a conditional `goto` for `st_1` the code should have been written as follows:
+
+```ruby
+   state(:st_1) do
+      goto(cond,:st_a)
+   end
+```
+
+The use of `goto` makes the design of FSM shorter for a majority of the cases, be sometimes, a finer control is required. For that purpose it is also possible to configure the FSM is `static` mode where the `next_state` statement that indicates implicitly the next state. Putting is static mode is done by passing `:static` as argument when declaring the FSM. For example the following FSM uses `next_state` to specify explicitly the next states depending on some condition signals `cond0` and `cond1`:
+
+```ruby
+fsm(clk.posedge,rst,:static)
+   state(:st_0) do
+      next_state(:st_1)
+   state(:st_1) do
+      hif(cond) { next_state(:st_1) }
+      helse { next_state(:st_0) }
+   end
+end
+```
+
 
 ## Fixed-point (fixpoint)
 <a name="fixpoint"></a>

data/ext/hruby_sim/hruby_rcsim_build.c

@@ -319,6 +319,9 @@ VALUE rcsim_make_signal(VALUE mod, VALUE name, VALUE type) {
     // printf("Creating signal named=%s\n",signal->name);
     value_to_rcsim(TypeS,type,signal->type);
     // printf("&type=%p type=%p width=%llu\n",&(signal->type),signal->type,type_width(signal->type));
+    signal->num_signals= 0;
+    signal->signals = NULL;
+
     signal->c_value = make_value(signal->type,0);
     // printf("signal->c_value=%p\n",signal->c_value);
     signal->c_value->signal = signal;
@@ -1075,6 +1078,29 @@ VALUE rcsim_add_systemI_systemTs(VALUE mod, VALUE systemIV, VALUE sysVs) {
     return systemIV;
 }
 
+/* Adds sub signals a C signal. */
+VALUE rcsim_add_signal_signals(VALUE mod, VALUE signalIV, VALUE sigVs) {
+    /* Get the C signal from the Ruby value. */
+    SignalI signalI;
+    value_to_rcsim(SignalIS,signalIV,signalI);
+    // printf("rcsim_add_signal_signals with signalI=%p\n",signalI);
+    /* Prepare the size for the alternate system types. */
+    long num = RARRAY_LEN(sigVs);
+    long old_num = signalI->num_signals;
+    signalI->num_signals += num;
+    signalI->signals=realloc(signalI->signals,
+            sizeof(SignalI[signalI->num_signals]));
+    // signalI->signals = (SignalI*)my_realloc(signalI->signals,
+    //         sizeof(SignalI[old_num]), sizeof(SignalI[signalI->num_signals]));
+    /* Get and add the alternate system types from the Ruby value. */
+    for(long i=0; i< num; ++i) {
+        SignalI sig;
+        value_to_rcsim(SignalIS,rb_ary_entry(sigVs,i),sig);
+        signalI->signals[old_num + i] = sig;
+    }
+    return signalIV;
+}
+
 /* Adds arguments to a C print. */
 VALUE rcsim_add_print_args(VALUE mod, VALUE printV, VALUE argVs) {
     /* Get the C print from the Ruby value. */
@@ -1459,6 +1485,7 @@ void Init_hruby_sim() {
     rb_define_singleton_method(mod,"rcsim_add_scope_scopes",rcsim_add_scope_scopes,2);
     rb_define_singleton_method(mod,"rcsim_add_behavior_events",rcsim_add_behavior_events,2);
     rb_define_singleton_method(mod,"rcsim_add_systemI_systemTs",rcsim_add_systemI_systemTs,2);
+    rb_define_singleton_method(mod,"rcsim_add_signal_signals",rcsim_add_signal_signals,2);
     rb_define_singleton_method(mod,"rcsim_add_print_args",rcsim_add_print_args,2);
     rb_define_singleton_method(mod,"rcsim_add_hif_noifs",rcsim_add_hif_noifs,3);
     rb_define_singleton_method(mod,"rcsim_add_hcase_whens",rcsim_add_hcase_whens,3);

data/ext/hruby_sim/hruby_sim.h

@@ -530,6 +530,9 @@ typedef struct SignalIS_ {
     Value c_value;      /* The current value of the signal. */
     Value f_value;      /* The future (next) value of the signal. */
 
+    int num_signals;    /* The number of sub signals. */
+    SignalI* signals;   /* The sub signals. */
+
     int fading;         /* Tell if the signal can be overwritten by Z. */
 
     int num_any;        /* The number of behavior activated on any edge. */

data/ext/hruby_sim/hruby_sim_core.c

@@ -729,14 +729,26 @@ void transmit_to_signal_range_seq(Value value, RefRangeS ref) {
     SignalI signal = ref.signal;
     unsigned long long first = ref.first;
     unsigned long long last = ref.last;
-    // printf("Tansmit to signal range: %s(%p) [%llu,%llu]\n",signal->name,signal,first,last);
+    // printf("Tansmit to signal range seq: %s(%p) [%llu,%llu]\n",signal->name,signal,first,last);
+    // /* Can transmit, copy the content. */
+    // if (signal->fading)
+    //     // write_range(value,first,last,signal->f_value->type,signal->f_value);
+    //     write_range(value,first,last,ref.type,signal->f_value);
+    // else
+    //     // write_range_no_z(value,first,last,signal->f_value->type,signal->f_value);
+    //     write_range_no_z(value,first,last,ref.type,signal->f_value);
+    /* The base type is stored here to avoid allocating a new type each time.
+     * It have an arbitrary base size a single element. */
+    static TypeS baseT = { 1, 1 };
+    baseT.base = signal->f_value->type->base;
+    // printf("Tansmit to signal range: %s(%p) [%lld:%lld]\n",signal->name,signal,first,last);
     /* Can transmit, copy the content. */
     if (signal->fading)
-        // write_range(value,first,last,signal->f_value->type,signal->f_value);
-        write_range(value,first,last,ref.type,signal->f_value);
+        signal->f_value = write_range(value,first,last,&baseT,
+                signal->f_value);
     else
-        // write_range_no_z(value,first,last,signal->f_value->type,signal->f_value);
-        write_range_no_z(value,first,last,ref.type,signal->f_value);
+        signal->f_value = write_range_no_z(value,first,last,&baseT,
+                signal->f_value);
     /* And touch the signal. */
     touch_signal_seq(signal);
 }

data/ext/hruby_sim/hruby_sim_stack_calc.c

@@ -14,7 +14,7 @@
  **/
 
 /* The stack variables. */
-#define STACK_SIZE 0x10000
+#define STACK_SIZE 0x100000
 static Value stack[STACK_SIZE];
 static int head = STACK_SIZE;
 

data/ext/hruby_sim/hruby_sim_tree_calc.c

@@ -181,7 +181,7 @@ Value calc_expression(Expression expr, Value res) {
  *  @param behavior the behavior in execution. */
 void execute_statement(Statement stmnt, int mode, Behavior behavior) {
     /* Depending on the kind of statement. */
-    // printf("Executing statement=%p with kind=%d\n",stmnt,stmnt->kind);fflush(stdout);
+    // printf("Executing statement=%p with kind=%d in mode=%d\n",stmnt,stmnt->kind,mode);fflush(stdout);
     switch(stmnt->kind) {
         case TRANSMIT: 
             {
@@ -236,6 +236,7 @@ void execute_statement(Statement stmnt, int mode, Behavior behavior) {
                             lastV = calc_expression(refr->last,lastV);
                             long long last = value2integer(lastV);
                             free_value();
+                            // printf("firstV=%lld lastV=%lld right=%lld mode=%d\n",firstV->data_int,lastV->data_int,right->data_int,mode);
                             /* Generate the reference inside the left value. */
                             RefRangeS ref = 
                                 make_ref_rangeS((SignalI)(refr->ref),refr->type,
@@ -399,9 +400,15 @@ void execute_statement(Statement stmnt, int mode, Behavior behavior) {
                 }
                 break;
             }
+        case TIME_TERMINATE:
+            {
+                terminate();
+                break;
+            }
         case BLOCK:
             {
                 Block block = (Block)stmnt;
+                // printf("Block mode=%d\n",block->mode);
                 /* Execute each statement of the block. */
                 for(int i=0; i<block->num_stmnts; ++i)
                     execute_statement(block->stmnts[i],block->mode,behavior);

data/ext/hruby_sim/hruby_sim_vcd.c

@@ -155,12 +155,28 @@ static void vcd_print_value(Value value) {
 /** Prints a signal declaration.
  *  @param signal the signal to declare */
 static void vcd_print_var(SignalI signal) {
-    vcd_print("$var wire %d ",type_width(signal->type));
-    // vcd_print_full_name((Object)signal);
-    vcd_print_signal_id(signal);
-    vcd_print(" ");
-    vcd_print_name((Object)signal);
-    vcd_print(" $end\n");
+    if (signal->num_signals > 0) {
+        int i;
+        /* The signal is hierarchical, declare its sub signals. */
+        /* Declares the hierachical name. */
+        vcd_print("$scope module ");
+        vcd_print_name((Object)signal);
+        vcd_print(" $end\n");
+        /* Declare the inners of the systems. */
+        for(i=0; i<signal->num_signals; ++i) {
+            vcd_print_var(signal->signals[i]);
+        }
+        /* Close the hierarchy. */
+        vcd_print("$upscope $end\n");
+    } else {
+        /* The signal is flat, can declarate it directly. */
+        vcd_print("$var wire %d ",type_width(signal->type));
+        // vcd_print_full_name((Object)signal);
+        vcd_print_signal_id(signal);
+        vcd_print(" ");
+        vcd_print_name((Object)signal);
+        vcd_print(" $end\n");
+    }
 }
 
 
@@ -180,7 +196,8 @@ static void vcd_print_signal_fvalue(SignalI signal) {
 /** Prints a signal with its current value if any
  *  @param signal the signal to show */
 static void vcd_print_signal_cvalue(SignalI signal) {
-    if (signal->c_value) {
+    if ((signal->num_signals == 0) && signal->c_value) {
+        /* The signal is not hierachical and has a current value. */
         vcd_print_value(signal->c_value);
         // vcd_print(" ");
         // vcd_print_full_name((Object)signal);

data/ext/hruby_sim/hruby_sim_vizualize.c

@@ -63,8 +63,15 @@ void default_print_name(Object object) {
     }
     /* Depending on the kind of object. */
     switch(object->kind) {
-        case SYSTEMT:
         case SIGNALI:
+            /* Print the name if name. */
+            /* Trick: SystemT, SignalI, Scope and SystemI have the
+             * field name at the same place. */
+            if (((SignalI)object)->name != NULL) {
+                printf("%s",((SignalI)object)->name);
+            }
+            break;
+        case SYSTEMT:
         case SCOPE:
         case SYSTEMI:
             /* Print the name if name. */
@@ -73,6 +80,7 @@ void default_print_name(Object object) {
             if (((SystemI)object)->name != NULL) {
                 printf("%s",((SystemI)object)->name);
             }
+            break;
         default: /* Nothing to do */
             break;
     }

data/lib/HDLRuby/hdr_samples/constant_in_function.rb

@@ -2,7 +2,7 @@
 
 
 function :func do |addr|
-    bit[4][-4].constant tbl: [ _1000, _1001, _1010, _1011 ]
+    bit[4][-4].constant tbl: [ _b1000, _b1001, _b1010, _b1011 ]
     
     tbl[addr]
 end
@@ -10,9 +10,11 @@ end
 
 system :with_func do
     [4].inner :addr, :val
+    # bit[4][-4].constant tbl: [ _b1000, _b1001, _b1010, _b1011 ]
 
     val <= func(addr)
     # val <= 1
+    # val <= tbl[addr]
 
     timed do
         addr <= 0

data/lib/HDLRuby/hdr_samples/counter_dff_bench.rb

@@ -1,7 +1,7 @@
 # A simple D-FF
 system :dff do
     input  :clk, :d
-    output q: 0
+    output :q
 
     (q <= d).at(clk.posedge)
 end
@@ -18,6 +18,8 @@ system :dff_bench do
     d1 <= ~q1
 
     timed do
+        d0 <= 0
+        d1 <= 0
         clk <= 0
         !10.ns
         clk <= 1

data/lib/HDLRuby/hdr_samples/huge_rom.rb

@@ -3,7 +3,7 @@ system :huge_rom do
     [15..0].input :addr
     [7..0].output :data
 
-    bit[7..0][-65536].constant content: 65536.times.to_a
+    bit[7..0][-65536].constant content: 65536.times.map {|i| i.to_value.as(bit[8]) }
 
     data <= content[addr]
 end

data/lib/HDLRuby/hdr_samples/mei8.rb

@@ -117,7 +117,7 @@ system :mei8 do |prog_file = "./prog.obj"|
                 # Format 1
                 entry("01oooyyy") { wf <= 1
                                     # Destination is also y in case of inc/dec
-                                    hif (ir[6..4] == _101) { dst <= y }
+                                    hif (ir[6..4] == _b101) { dst <= y }
                                     alu.(o,a,src1) }      # binary alu
                 # Format 1 extended.
                 entry("10000yyy") { wr <= 0; wf <= 1
@@ -128,17 +128,17 @@ system :mei8 do |prog_file = "./prog.obj"|
                 entry("10011yyy") { branch <= 1           # jr y, must inc y
                                     alu.(2,src1) }        # since pc-1 is used
                 # Format 2
-                entry("1010iiii") { alu.(7,[_0000,i]) }   # movl i
+                entry("1010iiii") { alu.(7,[_b0000,i]) }   # movl i
                 entry("1011iiii") { alu.(7,[i,a[3..0]]) } # movh i
                 # Format 4
                 entry("11110110") { branch <= 1           # trap
                                     alu.(7,0xFC)  }       
-                entry("11110ooo") { wf <= 1; alu.([_1,o],a) } # unary alu
+                entry("11110ooo") { wf <= 1; alu.([_b1,o],a) } # unary alu
                 entry("111110os") { st <= s; ld <= ~s     # ++--ld / ++--st
-                                    alu.([_001,o],g); dst <= 6 }
+                                    alu.([_b001,o],g); dst <= 6 }
                 entry("1111110i") { branch <= i
                                     st <= ~i; ld <= i
-                                    alu.([_001,~i],h)
+                                    alu.([_b001,~i],h)
                                     dst <= 7; io_out <= pc } # push / pop pc
                 # Format 3
                 entry("11cccsii") { branch <= cc; wr <= 0
@@ -180,7 +180,7 @@ system :mei8 do |prog_file = "./prog.obj"|
             [a,b,c,d,e,f,g,h,zf,cf,sf,vf,nbr,npc,s].each { |r| r <= 0 }
         end
         # Ensures a is 0 and enable interrupts when starting.
-        helsif(init) { a<= 0; s <= _00000011; } 
+        helsif(init) { a<= 0; s <= _b00000011; } 
         helsif(iq_calc) do
             s[7] <= 1
             hif(iq1) { s[1] <= 0 }
@@ -195,14 +195,14 @@ system :mei8 do |prog_file = "./prog.obj"|
                 zf <= alu.zf; cf <= alu.cf; sf <= alu.sf; vf <= alu.vf
             end
             # Specific cases
-            hif(ir == _11110111) { s <= a; a <= s } # xs
-            hif(ir == _11110110) { s[7] <= 1 }      # trap
+            hif(ir == _b11110111) { s <= a; a <= s } # xs
+            hif(ir == _b11110110) { s[7] <= 1 }      # trap
             hif(branch) { npc <= alu.z; nbr <= 1 }  # Branch
         end
         # Write memory read result to a register if any.
         helsif (io_r_done) do
             hif(branch) { npc <= data; nbr <= 1 }   # pop case  
-            helsif(ir[7..3] == _10001) do           # ld case
+            helsif(ir[7..3] == _b10001) do           # ld case
                 [a,b,c,d,e,f,g,h].hcase(dst) {|r| r <= data }
             end
             helse { a <= data }                     # ld++-- case
@@ -231,8 +231,8 @@ system :mei8 do |prog_file = "./prog.obj"|
                        goto(iq_chk,:iq_s)         # Interrupt / No interrupt
                        goto(branch,:br)           # Branch instruction
                        goto((ld|st) & ~io_done,:ld_st) # ld/st instruction
-                       goto(ir == _11111110,:ht)       # Halt instruction
-                       goto(ir == _11111111,:re) }     # Reset instruction
+                       goto(ir == _b11111110,:ht)       # Halt instruction
+                       goto(ir == _b11111111,:re) }     # Reset instruction
         # Branch state.
         state(:br)   { goto(iq_chk,:iq_s,:fe) }   # Interrupt / No interrupt
         sync(:br)    { hif(nbr) { pc <= npc-1 } } # Next pc is the branch target

data/lib/HDLRuby/hdr_samples/mei8_bench.rb

@@ -119,7 +119,7 @@ system :mei8 do |prog_file = "./prog.obj"|
                 # Format 1
                 entry("01oooyyy") { wf <= 1
                                     # Destination is also y in case of inc/dec
-                                    hif (ir[6..4] == _101) { dst <= y }
+                                    hif (ir[6..4] == _b101) { dst <= y }
                                     alu.(o,a,src1) }      # binary alu
                 # Format 1 extended.
                 entry("10000yyy") { wr <= 0; wf <= 1
@@ -130,17 +130,17 @@ system :mei8 do |prog_file = "./prog.obj"|
                 entry("10011yyy") { branch <= 1           # jr y, must inc y
                                     alu.(2,src1) }        # since pc-1 is used
                 # Format 2
-                entry("1010iiii") { alu.(7,[_0000,i]) }   # movl i
+                entry("1010iiii") { alu.(7,[_b0000,i]) }   # movl i
                 entry("1011iiii") { alu.(7,[i,a[3..0]]) } # movh i
                 # Format 4
                 entry("11110110") { branch <= 1           # trap
                                     alu.(7,0xFC)  }       
-                entry("11110ooo") { wf <= 1; alu.([_1,o],a) } # unary alu
+                entry("11110ooo") { wf <= 1; alu.([_b1,o],a) } # unary alu
                 entry("111110os") { st <= s; ld <= ~s     # ++--ld / ++--st
-                                    alu.([_001,o],g); dst <= 6 }
+                                    alu.([_b001,o],g); dst <= 6 }
                 entry("1111110i") { branch <= i
                                     st <= ~i; ld <= i
-                                    alu.([_001,~i],h)
+                                    alu.([_b001,~i],h)
                                     dst <= 7; io_out <= pc } # push / pop pc
                 # Format 3
                 entry("11cccsii") { branch <= cc; wr <= 0
@@ -182,7 +182,7 @@ system :mei8 do |prog_file = "./prog.obj"|
             [a,b,c,d,e,f,g,h,zf,cf,sf,vf,nbr,npc,s].each { |r| r <= 0 }
         end
         # Ensures a is 0 and enable interrupts when starting.
-        helsif(init) { a<= 0; s <= _00000011; } 
+        helsif(init) { a<= 0; s <= _b00000011; } 
         helsif(iq_calc) do
             s[7] <= 1
             hif(iq1) { s[1] <= 0 }
@@ -197,14 +197,14 @@ system :mei8 do |prog_file = "./prog.obj"|
                 zf <= alu.zf; cf <= alu.cf; sf <= alu.sf; vf <= alu.vf
             end
             # Specific cases
-            hif(ir == _11110111) { s <= a; a <= s } # xs
-            hif(ir == _11110110) { s[7] <= 1 }      # trap
+            hif(ir == _b11110111) { s <= a; a <= s } # xs
+            hif(ir == _b11110110) { s[7] <= 1 }      # trap
             hif(branch) { npc <= alu.z; nbr <= 1 }  # Branch
         end
         # Write memory read result to a register if any.
         helsif (io_r_done) do
             hif(branch) { npc <= data; nbr <= 1 }   # pop case  
-            helsif(ir[7..3] == _10001) do           # ld case
+            helsif(ir[7..3] == _b10001) do           # ld case
                 [a,b,c,d,e,f,g,h].hcase(dst) {|r| r <= data }
             end
             helse { a <= data }                     # ld++-- case
@@ -233,8 +233,8 @@ system :mei8 do |prog_file = "./prog.obj"|
                        goto(iq_chk,:iq_s)         # Interrupt / No interrupt
                        goto(branch,:br)           # Branch instruction
                        goto((ld|st) & ~io_done,:ld_st) # ld/st instruction
-                       goto(ir == _11111110,:ht)       # Halt instruction
-                       goto(ir == _11111111,:re) }     # Reset instruction
+                       goto(ir == _b11111110,:ht)       # Halt instruction
+                       goto(ir == _b11111111,:re) }     # Reset instruction
         # Branch state.
         state(:br)   { goto(iq_chk,:iq_s,:fe) }   # Interrupt / No interrupt
         sync(:br)    { hif(nbr) { pc <= npc-1 } } # Next pc is the branch target

data/lib/HDLRuby/hdr_samples/neg_arith_bench.rb

@@ -42,15 +42,15 @@ system :neg_arith_bench do
         z <= x * y
         cmp <= (x < y)
         !10.ns
-        x <= _000000011010
-        y <= _000011111010
+        x <= _b000000011010
+        y <= _b000011111010
         z <= 0
         !10.ns
         z <= x * y
         cmp <= (x < y)
         !10.ns
-        x <= _000000011010
-        y <= _111111111010
+        x <= _b000000011010
+        y <= _b111111111010
         z <= 0
         !10.ns
         z <= x * y

data/lib/HDLRuby/hdr_samples/rom_nest.rb

@@ -1,6 +1,6 @@
 # Rom access generator, def case.
 def rom_gen(addr,&func)
-    bit[8][-8].constant tbl? => 8.times.map {|i| func.(i).to_i }
+    bit[8][-8].constant tbl? => 8.times.map {|i| func.(i).to_value.as(bit[8]) }
     tbl![addr]
 end
 

data/lib/HDLRuby/hdr_samples/ruby_fir_hw.rb

@@ -50,13 +50,13 @@ system :work do
 
     # The input memory.
     mem_rom([8],8,clk,rst,
-            [_00000001,_00000010,_00000011,_00000100,
-             _00000101,_00000110,_00000111,_00001000]).(:iMem)
+            [_b00000001,_b00000010,_b00000011,_b00000100,
+             _b00000101,_b00000110,_b00000111,_b00001000]).(:iMem)
     # The output memory.
     mem_dual([8],8,clk,rst).(:oMem)
     # The coefficients.
-    coefs = [_11001100,_00110011,_10101010,_01010101,
-             _11110000,_00001111,_11100011,_00011100]
+    coefs = [_b11001100,_b00110011,_b10101010,_b01010101,
+             _b11110000,_b00001111,_b11100011,_b00011100]
 
     # The filter
     fir([8],iMem.branch(:rinc),oMem.branch(:winc),coefs).(:my_fir).(clk,rst,req,ack)