yowasp-yosys 0.56.0.141.post974.dev0__py3-none-any.whl → 0.58.0.0.post1010__py3-none-any.whl

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (35) hide show
  1. yowasp_yosys/share/gowin/cells_sim.v +0 -8
  2. yowasp_yosys/share/gowin/cells_xtra_gw1n.v +7 -0
  3. yowasp_yosys/share/gowin/cells_xtra_gw2a.v +12 -0
  4. yowasp_yosys/share/gowin/cells_xtra_gw5a.v +84 -0
  5. yowasp_yosys/share/include/backends/rtlil/rtlil_backend.h +1 -0
  6. yowasp_yosys/share/include/frontends/ast/ast.h +6 -1
  7. yowasp_yosys/share/include/kernel/bitpattern.h +50 -1
  8. yowasp_yosys/share/include/kernel/celltypes.h +19 -9
  9. yowasp_yosys/share/include/kernel/consteval.h +2 -2
  10. yowasp_yosys/share/include/kernel/constids.inc +859 -137
  11. yowasp_yosys/share/include/kernel/drivertools.h +6 -5
  12. yowasp_yosys/share/include/kernel/ffinit.h +5 -5
  13. yowasp_yosys/share/include/kernel/hashlib.h +88 -38
  14. yowasp_yosys/share/include/kernel/io.h +17 -2
  15. yowasp_yosys/share/include/kernel/log.h +102 -31
  16. yowasp_yosys/share/include/kernel/macc.h +1 -1
  17. yowasp_yosys/share/include/kernel/mem.h +4 -2
  18. yowasp_yosys/share/include/kernel/rtlil.h +268 -61
  19. yowasp_yosys/share/include/kernel/satgen.h +1 -1
  20. yowasp_yosys/share/include/kernel/threading.h +186 -0
  21. yowasp_yosys/share/include/kernel/utils.h +11 -0
  22. yowasp_yosys/share/include/kernel/yosys_common.h +9 -13
  23. yowasp_yosys/share/include/passes/fsm/fsmdata.h +18 -33
  24. yowasp_yosys/share/include/passes/techmap/libparse.h +1 -1
  25. yowasp_yosys/share/lattice/cells_bb_ecp5.v +4 -0
  26. yowasp_yosys/share/python3/sby_engine_abc.py +5 -2
  27. yowasp_yosys/share/simlib.v +34 -0
  28. yowasp_yosys/share/techmap.v +34 -2
  29. yowasp_yosys/smtbmc.py +5 -0
  30. yowasp_yosys/yosys.wasm +0 -0
  31. {yowasp_yosys-0.56.0.141.post974.dev0.dist-info → yowasp_yosys-0.58.0.0.post1010.dist-info}/METADATA +1 -1
  32. {yowasp_yosys-0.56.0.141.post974.dev0.dist-info → yowasp_yosys-0.58.0.0.post1010.dist-info}/RECORD +35 -34
  33. {yowasp_yosys-0.56.0.141.post974.dev0.dist-info → yowasp_yosys-0.58.0.0.post1010.dist-info}/WHEEL +0 -0
  34. {yowasp_yosys-0.56.0.141.post974.dev0.dist-info → yowasp_yosys-0.58.0.0.post1010.dist-info}/entry_points.txt +0 -0
  35. {yowasp_yosys-0.56.0.141.post974.dev0.dist-info → yowasp_yosys-0.58.0.0.post1010.dist-info}/top_level.txt +0 -0
@@ -1,164 +1,684 @@
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+ // These must be in perfect ASCII order!!!
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+
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+ // Workaround for macos's math.h defining an OVERFLOW macro
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+ #ifdef OVERFLOW
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+ #undef OVERFLOW
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+ #endif
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+
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+ // Workaround for windows defining IN and OUT macros in minwindef.h which ends
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+ // up getting included for visual studio builds
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+ #ifdef IN
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+ #undef IN
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+ #endif
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+ #ifdef OUT
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+ #undef OUT
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+ #endif
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+
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+ X($_ALDFFE_NNN_)
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+ X($_ALDFFE_NNP_)
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+ X($_ALDFFE_NPN_)
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+ X($_ALDFFE_NPP_)
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+ X($_ALDFFE_PNN_)
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+ X($_ALDFFE_PNP_)
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+ X($_ALDFFE_PPN_)
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+ X($_ALDFFE_PPP_)
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+ X($_ALDFF_NN_)
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+ X($_ALDFF_NP_)
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+ X($_ALDFF_PN_)
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+ X($_ALDFF_PP_)
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+ X($_ANDNOT_)
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+ X($_AND_)
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+ X($_AOI3_)
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+ X($_AOI4_)
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+ X($_BUF_)
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+ X($_DFFE_NN0N_)
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+ X($_DFFE_NN0P_)
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+ X($_DFFE_NN1N_)
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+ X($_DFFE_NN1P_)
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+ X($_DFFE_NN_)
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+ X($_DFFE_NP0N_)
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+ X($_DFFE_NP0P_)
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+ X($_DFFE_NP1N_)
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+ X($_DFFE_NP1P_)
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+ X($_DFFE_NP_)
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+ X($_DFFE_PN0N_)
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+ X($_DFFE_PN0P_)
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+ X($_DFFE_PN1N_)
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+ X($_DFFE_PN1P_)
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+ X($_DFFE_PN_)
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+ X($_DFFE_PP0N_)
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+ X($_DFFE_PP0P_)
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+ X($_DFFE_PP1N_)
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+ X($_DFFE_PP1P_)
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+ X($_DFFE_PP_)
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+ X($_DFFSRE_NNNN_)
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+ X($_DFFSRE_NNNP_)
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+ X($_DFFSRE_NNPN_)
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+ X($_DFFSRE_NNPP_)
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+ X($_DFFSRE_NPNN_)
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+ X($_DFFSRE_NPNP_)
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+ X($_DFFSRE_NPPN_)
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+ X($_DFFSRE_NPPP_)
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+ X($_DFFSRE_PNNN_)
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+ X($_DFFSRE_PNNP_)
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+ X($_DFFSRE_PNPN_)
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+ X($_DFFSRE_PNPP_)
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+ X($_DFFSRE_PPNN_)
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+ X($_DFFSRE_PPNP_)
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+ X($_DFFSRE_PPPN_)
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+ X($_DFFSRE_PPPP_)
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+ X($_DFFSR_NNN_)
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+ X($_DFFSR_NNP_)
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+ X($_DFFSR_NPN_)
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+ X($_DFFSR_NPP_)
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+ X($_DFFSR_PNN_)
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+ X($_DFFSR_PNP_)
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+ X($_DFFSR_PPN_)
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+ X($_DFFSR_PPP_)
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+ X($_DFF_N)
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+ X($_DFF_NN0_)
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+ X($_DFF_NN1_)
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+ X($_DFF_NP0_)
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+ X($_DFF_NP1_)
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+ X($_DFF_N_)
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+ X($_DFF_PN0_)
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+ X($_DFF_PN1_)
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+ X($_DFF_PP0_)
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+ X($_DFF_PP1_)
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+ X($_DFF_P_)
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+ X($_DLATCHSR_NNN_)
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+ X($_DLATCHSR_NNP_)
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+ X($_DLATCHSR_NPN_)
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+ X($_DLATCHSR_NPP_)
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+ X($_DLATCHSR_PNN_)
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+ X($_DLATCHSR_PNP_)
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+ X($_DLATCHSR_PPN_)
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+ X($_DLATCHSR_PPP_)
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+ X($_DLATCH_NN0_)
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+ X($_DLATCH_NN1_)
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+ X($_DLATCH_NP0_)
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+ X($_DLATCH_NP1_)
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+ X($_DLATCH_N_)
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+ X($_DLATCH_PN0_)
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+ X($_DLATCH_PN1_)
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+ X($_DLATCH_PP0_)
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+ X($_DLATCH_PP1_)
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+ X($_DLATCH_P_)
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+ X($_FF_)
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+ X($_MUX16_)
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+ X($_MUX4_)
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+ X($_MUX8_)
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+ X($_MUX_)
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+ X($_NAND_)
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+ X($_NMUX_)
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+ X($_NOR_)
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+ X($_NOT_)
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+ X($_OAI3_)
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+ X($_OAI4_)
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+ X($_ORNOT_)
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+ X($_OR_)
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+ X($_SDFFCE_NN0N_)
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+ X($_SDFFCE_NN0P_)
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+ X($_SDFFCE_NN1N_)
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+ X($_SDFFCE_NN1P_)
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+ X($_SDFFCE_NP0N_)
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+ X($_SDFFCE_NP0P_)
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+ X($_SDFFCE_NP1N_)
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+ X($_SDFFCE_NP1P_)
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+ X($_SDFFCE_PN0N_)
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+ X($_SDFFCE_PN0P_)
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+ X($_SDFFCE_PN1N_)
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+ X($_SDFFCE_PN1P_)
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+ X($_SDFFCE_PP0N_)
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+ X($_SDFFCE_PP0P_)
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+ X($_SDFFCE_PP1N_)
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+ X($_SDFFCE_PP1P_)
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+ X($_SDFFE_NN0N_)
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+ X($_SDFFE_NN0P_)
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+ X($_SDFFE_NN1N_)
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+ X($_SDFFE_NN1P_)
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+ X($_SDFFE_NP0N_)
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+ X($_SDFFE_NP0P_)
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+ X($_SDFFE_NP1N_)
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+ X($_SDFFE_NP1P_)
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+ X($_SDFFE_PN0N_)
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+ X($_SDFFE_PN0P_)
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+ X($_SDFFE_PN1N_)
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+ X($_SDFFE_PN1P_)
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+ X($_SDFFE_PP0N_)
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+ X($_SDFFE_PP0P_)
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+ X($_SDFFE_PP1N_)
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+ X($_SDFFE_PP1P_)
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+ X($_SDFF_NN0_)
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+ X($_SDFF_NN1_)
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+ X($_SDFF_NP0_)
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+ X($_SDFF_NP1_)
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+ X($_SDFF_PN0_)
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+ X($_SDFF_PN1_)
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+ X($_SDFF_PP0_)
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+ X($_SDFF_PP1_)
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+ X($_SR_NN_)
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+ X($_SR_NP_)
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+ X($_SR_PN_)
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+ X($_SR_PP_)
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+ X($_TBUF_)
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+ X($_XNOR_)
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+ X($_XOR_)
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+ X($__ABC9_DELAY)
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+ X($__ABC9_SCC_BREAKER)
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+ X($__CC_NOT)
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+ X($__COUNT_)
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+ X($__ICE40_CARRY_WRAPPER)
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+ X($__QLF_TDP36K)
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+ X($__QLF_TDP36K_MERGED)
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+ X($__XILINX_SHREG_)
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+ X($abc9_flops)
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+ X($add)
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+ X($adff)
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+ X($adffe)
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+ X($adlatch)
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+ X($aldff)
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+ X($aldffe)
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+ X($allconst)
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+ X($allseq)
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+ X($alu)
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+ X($and)
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+ X($anyconst)
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+ X($anyinit)
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+ X($anyseq)
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+ X($assert)
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+ X($assume)
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+ X($bmux)
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+ X($buf)
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+ X($bugpoint)
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+ X($bweq)
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+ X($bweqx)
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+ X($bwmux)
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+ X($check)
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+ X($concat)
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+ X($cover)
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+ X($demux)
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+ X($dff)
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+ X($dffe)
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+ X($dffsr)
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+ X($dffsre)
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+ X($div)
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+ X($divfloor)
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+ X($dlatch)
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+ X($dlatchsr)
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+ X($eq)
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+ X($equiv)
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+ X($eqx)
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+ X($fa)
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+ X($fair)
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+ X($false)
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+ X($ff)
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+ X($flowmap_level)
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+ X($fsm)
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+ X($fullskew)
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+ X($future_ff)
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+ X($ge)
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+ X($get_tag)
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+ X($gt)
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+ X($initstate)
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+ X($input)
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+ X($lcu)
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+ X($le)
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+ X($live)
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+ X($logic_and)
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+ X($logic_not)
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+ X($logic_or)
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+ X($lt)
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+ X($lut)
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+ X($macc)
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+ X($macc_v2)
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+ X($mem)
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+ X($mem_v2)
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+ X($meminit)
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+ X($meminit_v2)
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+ X($memrd)
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+ X($memrd_v2)
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+ X($memwr)
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+ X($memwr_v2)
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+ X($mod)
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+ X($modfloor)
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+ X($mul)
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+ X($mux)
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+ X($ne)
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+ X($neg)
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+ X($nex)
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+ X($not)
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+ X($or)
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+ X($original_tag)
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+ X($output)
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+ X($overwrite_tag)
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+ X($pending)
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+ X($pmux)
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+ X($pos)
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+ X($pow)
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+ X($print)
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+ X($recrem)
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+ X($reduce_and)
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+ X($reduce_bool)
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+ X($reduce_nand)
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+ X($reduce_or)
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+ X($reduce_xnor)
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+ X($reduce_xor)
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+ X($scopeinfo)
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+ X($sdff)
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+ X($sdffce)
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+ X($sdffe)
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+ X($set_tag)
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+ X($setup)
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+ X($setuphold)
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+ X($shift)
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+ X($shiftx)
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+ X($shl)
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+ X($shr)
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+ X($slice)
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+ X($sop)
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+ X($specify2)
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+ X($specify3)
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+ X($specrule)
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+ X($sr)
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+ X($sshl)
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+ X($sshr)
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+ X($state)
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+ X($sub)
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+ X($tribuf)
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+ X($true)
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+ X($undef)
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+ X($xnor)
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+ X($xor)
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  X(A)
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- X(abc9_box)
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- X(abc9_box_id)
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- X(abc9_box_seq)
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- X(abc9_bypass)
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- X(abc9_carry)
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- X(abc9_flop)
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- X(abc9_keep)
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- X(abc9_lut)
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- X(abc9_mergeability)
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- X(abc9_scc_id)
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- X(abcgroup)
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+ X(A0REG)
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+ X(A1)
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+ X(A1REG)
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+ X(A2)
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+ X(A3)
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+ X(A4)
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  X(ABITS)
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+ X(ACASCREG)
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+ X(ACCUMCI)
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+ X(ACCUMCO)
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+ X(ACIN)
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  X(AD)
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+ X(ADDEND_NEGATED)
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  X(ADDR)
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- X(allconst)
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- X(allseq)
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+ X(ADDSUBBOT)
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+ X(ADDSUBTOP)
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+ X(ADREG)
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+ X(AHOLD)
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  X(ALOAD)
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  X(ALOAD_POLARITY)
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- X(always_comb)
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- X(always_ff)
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- X(always_latch)
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- X(anyconst)
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- X(anyseq)
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+ X(ALUMODE)
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+ X(ALUMODEREG)
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+ X(ALUTYPE)
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+ X(AL_MAP_ADDER)
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+ X(AL_MAP_LUT1)
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+ X(AL_MAP_LUT2)
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+ X(AL_MAP_LUT3)
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+ X(AL_MAP_LUT4)
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+ X(AL_MAP_LUT5)
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+ X(AL_MAP_LUT6)
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+ X(ALn)
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+ X(AND)
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+ X(ANDNOT)
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+ X(ANDTERM)
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+ X(AOI3)
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+ X(AOI4)
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+ X(AREG)
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  X(ARGS)
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  X(ARGS_WIDTH)
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  X(ARST)
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  X(ARST_POLARITY)
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  X(ARST_VALUE)
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+ X(A_BYPASS)
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+ X(A_EN)
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+ X(A_INPUT)
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+ X(A_REG)
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  X(A_SIGNED)
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+ X(A_SRST_N)
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  X(A_WIDTH)
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+ X(A_WIDTHS)
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  X(B)
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+ X(B0REG)
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+ X(B1)
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+ X(B1REG)
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+ X(B2)
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+ X(B3)
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+ X(B4)
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+ X(BCASCREG)
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+ X(BCIN)
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+ X(BHOLD)
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  X(BI)
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  X(BITS_USED)
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- X(blackbox)
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+ X(BOTADDSUB_CARRYSELECT)
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+ X(BOTADDSUB_LOWERINPUT)
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+ X(BOTADDSUB_UPPERINPUT)
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+ X(BOTOUTPUT_SELECT)
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+ X(BOT_8x8_MULT_REG)
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+ X(BREG)
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+ X(BUF)
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+ X(BUFG)
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+ X(BUFGSR)
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+ X(BUFGTS)
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+ X(B_BYPASS)
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+ X(B_EN)
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+ X(B_INPUT)
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+ X(B_REG)
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  X(B_SIGNED)
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- X(bugpoint_keep)
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+ X(B_SRST_N)
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  X(B_WIDTH)
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- X(BYTE)
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+ X(B_WIDTHS)
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  X(C)
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- X(cells_not_processed)
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+ X(CARRYIN)
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+ X(CARRYINREG)
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+ X(CARRYINSEL)
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+ X(CARRYINSELREG)
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+ X(CARRYOUT)
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+ X(CC_L2T4)
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+ X(CC_L2T5)
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+ X(CC_LUT2)
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+ X(CDIN_FDBK_SEL)
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+ X(CE)
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+ X(CEA)
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+ X(CEA1)
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+ X(CEA2)
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+ X(CEAD)
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+ X(CEB)
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+ X(CEB1)
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+ X(CEB2)
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+ X(CEC)
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+ X(CED)
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+ X(CEM)
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+ X(CEP)
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  X(CE_OVER_SRST)
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+ X(CFG1)
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+ X(CFG2)
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+ X(CFG3)
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+ X(CFG4)
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  X(CFG_ABITS)
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  X(CFG_DBITS)
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  X(CFG_INIT)
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- X(chain)
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+ X(CHOLD)
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  X(CI)
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  X(CLK)
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- X(clkbuf_driver)
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- X(clkbuf_inhibit)
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- X(clkbuf_inv)
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- X(clkbuf_sink)
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+ X(CLKIN_DIVIDE)
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+ X(CLKPOL)
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  X(CLK_ENABLE)
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  X(CLK_POLARITY)
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  X(CLR)
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  X(CLR_POLARITY)
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  X(CO)
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  X(COLLISION_X_MASK)
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+ X(COMP_INP)
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  X(CONFIG)
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  X(CONFIG_WIDTH)
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+ X(COUNT_EXTRACT)
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+ X(COUNT_TO)
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+ X(CREG)
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  X(CTRL_IN)
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  X(CTRL_IN_WIDTH)
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  X(CTRL_OUT)
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  X(CTRL_OUT_WIDTH)
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+ X(C_ARST_N)
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+ X(C_BYPASS)
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+ X(C_EN)
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+ X(C_REG)
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+ X(C_SIGNED)
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+ X(C_SRST_N)
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+ X(C_WIDTHS)
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  X(D)
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  X(DAT)
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  X(DATA)
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  X(DAT_DST_PEN)
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  X(DAT_DST_POL)
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- X(defaultvalue)
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  X(DELAY)
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  X(DEPTH)
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+ X(DFF)
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+ X(DHOLD)
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+ X(DIRECTION)
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+ X(DREG)
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+ X(DSP48E1)
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  X(DST)
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  X(DST_EN)
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  X(DST_PEN)
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  X(DST_POL)
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  X(DST_WIDTH)
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- X(dynports)
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+ X(D_ARST_N)
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+ X(D_BYPASS)
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+ X(D_EN)
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+ X(D_REG)
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+ X(D_SRST_N)
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  X(E)
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  X(EDGE_EN)
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  X(EDGE_POL)
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+ X(EFX_ADD)
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  X(EN)
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+ X(ENPOL)
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  X(EN_DST)
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  X(EN_POLARITY)
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  X(EN_SRC)
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- X(enum_base_type)
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- X(enum_type)
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- X(equiv_merged)
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- X(equiv_region)
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- X(extract_order)
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+ X(EQN)
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  X(F)
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+ X(FDCE)
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+ X(FDCE_1)
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+ X(FDCP)
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+ X(FDCPE)
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+ X(FDCPE_1)
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+ X(FDCPE_N)
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+ X(FDCP_N)
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+ X(FDDCP)
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+ X(FDDCPE)
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+ X(FDPE)
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+ X(FDPE_1)
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+ X(FDRE)
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+ X(FDRE_1)
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+ X(FDRSE)
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+ X(FDRSE_1)
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+ X(FDSE)
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+ X(FDSE_1)
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482
  X(FLAVOR)
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  X(FORMAT)
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- X(force_downto)
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- X(force_upto)
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- X(fsm_encoding)
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- X(fsm_export)
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+ X(FTCP)
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+ X(FTCP_N)
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+ X(FTDCP)
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  X(FULL)
99
- X(full_case)
100
488
  X(G)
101
- X(gclk)
102
- X(gentb_clock)
103
- X(gentb_constant)
104
- X(gentb_skip)
489
+ X(GP_DFF)
490
+ X(GP_DFFI)
491
+ X(GP_DFFR)
492
+ X(GP_DFFRI)
493
+ X(GP_DFFS)
494
+ X(GP_DFFSI)
495
+ X(GP_DFFSR)
496
+ X(GP_DFFSRI)
497
+ X(GP_DLATCH)
498
+ X(GP_DLATCHI)
499
+ X(GP_DLATCHR)
500
+ X(GP_DLATCHRI)
501
+ X(GP_DLATCHS)
502
+ X(GP_DLATCHSI)
503
+ X(GP_DLATCHSR)
504
+ X(GP_DLATCHSRI)
505
+ X(GP_INV)
506
+ X(GP_SHREG)
507
+ X(GSR)
105
508
  X(H)
106
- X(hdlname)
107
- X(hierconn)
509
+ X(HAS_CE)
510
+ X(HAS_POUT)
108
511
  X(I)
512
+ X(I0)
513
+ X(I0_POLARITY)
514
+ X(I1)
515
+ X(I1_POLARITY)
516
+ X(I2)
517
+ X(I3)
518
+ X(I3_IS_CI)
519
+ X(I4)
520
+ X(I5)
521
+ X(IBUF)
522
+ X(IN)
109
523
  X(INIT)
524
+ X(INIT1)
525
+ X(INIT2)
526
+ X(INIT_FILE)
527
+ X(INIT_L00)
528
+ X(INIT_L01)
529
+ X(INIT_L02)
530
+ X(INIT_L03)
531
+ X(INIT_L10)
532
+ X(INIT_L20)
110
533
  X(INIT_VALUE)
111
- X(init)
112
- X(initial_top)
113
- X(interface_modport)
114
- X(interfaces_replaced_in_module)
115
- X(interface_type)
116
- X(invertible_pin)
117
- X(iopad_external_pin)
118
- X(is_interface)
534
+ X(INMODE)
535
+ X(INMODEREG)
536
+ X(INV)
537
+ X(INVERT_OUT)
538
+ X(IN_B)
539
+ X(IN_ORTERM)
540
+ X(IN_PTC)
541
+ X(IOBUFE)
542
+ X(IRSTBOT)
543
+ X(IRSTTOP)
544
+ X(IS_C_INVERTED)
545
+ X(IS_D_INVERTED)
546
+ X(IS_R_INVERTED)
547
+ X(IS_S_INVERTED)
119
548
  X(J)
120
549
  X(K)
121
- X(keep)
122
- X(keep_hierarchy)
123
550
  X(L)
124
- X(lib_whitebox)
125
- X(localparam)
126
- X(logic_block)
127
- X(lram)
551
+ X(LAT)
552
+ X(LDCP)
553
+ X(LDCP_N)
554
+ X(LSR)
128
555
  X(LUT)
129
- X(lut_keep)
556
+ X(LUT1)
557
+ X(LUT2)
558
+ X(LUT3)
559
+ X(LUT4)
560
+ X(LUT5)
561
+ X(LUT6)
562
+ X(LUT_INIT)
130
563
  X(M)
131
- X(maximize)
132
- X(mem2reg)
564
+ X(MACROCELL_XOR)
565
+ X(MASK)
133
566
  X(MEMID)
134
- X(minimize)
135
- X(module_not_derived)
567
+ X(MODE_8x8)
568
+ X(MODE_BITS)
569
+ X(MREG)
570
+ X(MUX)
571
+ X(MUX16)
572
+ X(MUX4)
573
+ X(MUX8)
136
574
  X(N)
575
+ X(NADDENDS)
137
576
  X(NAME)
138
- X(noblackbox)
139
- X(nolatches)
140
- X(nomem2init)
141
- X(nomem2reg)
142
- X(nomeminit)
143
- X(nosync)
144
- X(nowrshmsk)
145
- X(no_ram)
146
- X(no_rw_check)
577
+ X(NAND)
578
+ X(NEG_TRIGGER)
579
+ X(NMUX)
580
+ X(NOR)
581
+ X(NOT)
582
+ X(NPRODUCTS)
583
+ X(NX_CY)
584
+ X(NX_CY_1BIT)
147
585
  X(O)
586
+ X(OAI3)
587
+ X(OAI4)
148
588
  X(OFFSET)
149
- X(onehot)
589
+ X(OHOLDBOT)
590
+ X(OHOLDTOP)
591
+ X(OLOADBOT)
592
+ X(OLOADTOP)
593
+ X(ONE)
594
+ X(OPMODE)
595
+ X(OPMODEREG)
596
+ X(OPTION_SPLIT)
597
+ X(OR)
598
+ X(ORNOT)
599
+ X(ORSTBOT)
600
+ X(ORSTTOP)
601
+ X(ORTERM)
602
+ X(OUT)
603
+ X(OUTA)
604
+ X(OUTA_INVERT)
605
+ X(OUTA_TAP)
606
+ X(OUTB)
607
+ X(OUTB_TAP)
608
+ X(OVERFLOW)
150
609
  X(P)
151
- X(parallel_case)
152
- X(parameter)
610
+ X(PASUB)
611
+ X(PATTERN)
612
+ X(PCIN)
613
+ X(PIPELINE_16x16_MULT_REG1)
614
+ X(PIPELINE_16x16_MULT_REG2)
153
615
  X(PORTID)
616
+ X(PORT_A1_ADDR)
617
+ X(PORT_A1_CLK)
618
+ X(PORT_A1_CLK_EN)
619
+ X(PORT_A1_RD_DATA)
620
+ X(PORT_A1_WIDTH)
621
+ X(PORT_A1_WR_BE)
622
+ X(PORT_A1_WR_BE_WIDTH)
623
+ X(PORT_A1_WR_DATA)
624
+ X(PORT_A1_WR_EN)
625
+ X(PORT_A2_ADDR)
626
+ X(PORT_A2_CLK)
627
+ X(PORT_A2_CLK_EN)
628
+ X(PORT_A2_RD_DATA)
629
+ X(PORT_A2_WIDTH)
630
+ X(PORT_A2_WR_BE)
631
+ X(PORT_A2_WR_BE_WIDTH)
632
+ X(PORT_A2_WR_DATA)
633
+ X(PORT_A2_WR_EN)
634
+ X(PORT_A_ADDR)
635
+ X(PORT_A_CLK)
636
+ X(PORT_A_CLK_EN)
637
+ X(PORT_A_RD_DATA)
638
+ X(PORT_A_WIDTH)
639
+ X(PORT_A_WR_BE)
640
+ X(PORT_A_WR_BE_WIDTH)
641
+ X(PORT_A_WR_DATA)
642
+ X(PORT_A_WR_EN)
643
+ X(PORT_B1_ADDR)
644
+ X(PORT_B1_CLK)
645
+ X(PORT_B1_CLK_EN)
646
+ X(PORT_B1_RD_DATA)
647
+ X(PORT_B1_WIDTH)
648
+ X(PORT_B1_WR_BE)
649
+ X(PORT_B1_WR_BE_WIDTH)
650
+ X(PORT_B1_WR_DATA)
651
+ X(PORT_B1_WR_EN)
652
+ X(PORT_B2_ADDR)
653
+ X(PORT_B2_CLK)
654
+ X(PORT_B2_CLK_EN)
655
+ X(PORT_B2_RD_DATA)
656
+ X(PORT_B2_WIDTH)
657
+ X(PORT_B2_WR_BE)
658
+ X(PORT_B2_WR_BE_WIDTH)
659
+ X(PORT_B2_WR_DATA)
660
+ X(PORT_B2_WR_EN)
661
+ X(PORT_B_ADDR)
662
+ X(PORT_B_CLK)
663
+ X(PORT_B_CLK_EN)
664
+ X(PORT_B_RD_DATA)
665
+ X(PORT_B_WIDTH)
666
+ X(PORT_B_WR_BE)
667
+ X(PORT_B_WR_BE_WIDTH)
668
+ X(PORT_B_WR_DATA)
669
+ X(PORT_B_WR_EN)
670
+ X(POUT)
671
+ X(PRE)
672
+ X(PREG)
154
673
  X(PRIORITY)
155
674
  X(PRIORITY_MASK)
156
- X(promoted_if)
675
+ X(PRODUCT_NEGATED)
676
+ X(P_BYPASS)
677
+ X(P_EN)
678
+ X(P_SRST_N)
157
679
  X(Q)
680
+ X(QL_DSP2)
158
681
  X(R)
159
- X(ram_block)
160
- X(ram_style)
161
- X(ramstyle)
162
682
  X(RD_ADDR)
163
683
  X(RD_ARST)
164
684
  X(RD_ARST_VALUE)
@@ -176,92 +696,97 @@ X(RD_SRST_VALUE)
176
696
  X(RD_TRANSPARENCY_MASK)
177
697
  X(RD_TRANSPARENT)
178
698
  X(RD_WIDE_CONTINUATION)
179
- X(reg)
180
- X(replaced_by_gclk)
181
- X(reprocess_after)
182
- X(rom_block)
183
- X(rom_style)
184
- X(romstyle)
699
+ X(RESET_MODE)
700
+ X(RESET_TO_MAX)
701
+ X(RST)
702
+ X(RSTA)
703
+ X(RSTB)
704
+ X(RSTC)
705
+ X(RSTD)
706
+ X(RSTM)
707
+ X(RSTP)
185
708
  X(S)
709
+ X(S1)
710
+ X(S2)
711
+ X(S3)
712
+ X(S4)
713
+ X(SB_CARRY)
714
+ X(SB_LUT4)
715
+ X(SB_MAC16)
716
+ X(SB_RAM40_4K)
717
+ X(SB_RAM40_4KNR)
718
+ X(SB_RAM40_4KNRNW)
719
+ X(SB_RAM40_4KNW)
720
+ X(SD)
721
+ X(SEL_MASK)
722
+ X(SEL_PATTERN)
186
723
  X(SET)
187
724
  X(SET_POLARITY)
188
- X(single_bit_vector)
725
+ X(SGSR)
726
+ X(SIGNEXTIN)
727
+ X(SIGNEXTOUT)
189
728
  X(SIZE)
729
+ X(SLE)
730
+ X(SLn)
190
731
  X(SRC)
191
- X(src)
192
732
  X(SRC_DST_PEN)
193
733
  X(SRC_DST_POL)
194
734
  X(SRC_EN)
195
735
  X(SRC_PEN)
196
736
  X(SRC_POL)
197
737
  X(SRC_WIDTH)
738
+ X(SRMODE)
198
739
  X(SRST)
199
740
  X(SRST_POLARITY)
200
741
  X(SRST_VALUE)
201
- X(sta_arrival)
202
742
  X(STATE_BITS)
203
743
  X(STATE_NUM)
204
744
  X(STATE_NUM_LOG2)
205
745
  X(STATE_RST)
206
746
  X(STATE_TABLE)
207
- X(smtlib2_module)
208
- X(smtlib2_comb_expr)
209
- X(submod)
210
- X(syn_ramstyle)
211
- X(syn_romstyle)
747
+ X(SUB)
212
748
  X(S_WIDTH)
213
749
  X(T)
214
750
  X(TABLE)
215
751
  X(TAG)
216
- X(techmap_autopurge)
217
- X(_TECHMAP_BITS_CONNMAP_)
218
- X(_TECHMAP_CELLNAME_)
219
- X(_TECHMAP_CELLTYPE_)
220
- X(techmap_celltype)
221
- X(_TECHMAP_FAIL_)
222
- X(techmap_maccmap)
223
- X(_TECHMAP_REPLACE_)
224
- X(techmap_simplemap)
225
- X(_techmap_special_)
226
- X(techmap_wrap)
227
- X(_TECHMAP_PLACEHOLDER_)
228
- X(techmap_chtype)
752
+ X(TDP36K)
753
+ X(TOPADDSUB_CARRYSELECT)
754
+ X(TOPADDSUB_LOWERINPUT)
755
+ X(TOPADDSUB_UPPERINPUT)
756
+ X(TOPOUTPUT_SELECT)
757
+ X(TOP_8x8_MULT_REG)
758
+ X(TRANSPARENCY_MASK)
759
+ X(TRANSPARENT)
760
+ X(TRANS_NUM)
761
+ X(TRANS_TABLE)
762
+ X(TRELLIS_FF)
763
+ X(TRG)
764
+ X(TRG_ENABLE)
765
+ X(TRG_POLARITY)
766
+ X(TRG_WIDTH)
767
+ X(TRUE_INP)
768
+ X(TYPE)
229
769
  X(T_FALL_MAX)
230
770
  X(T_FALL_MIN)
231
771
  X(T_FALL_TYP)
232
- X(T_LIMIT)
233
- X(T_LIMIT2)
234
772
  X(T_LIMIT2_MAX)
235
773
  X(T_LIMIT2_MIN)
236
774
  X(T_LIMIT2_TYP)
237
775
  X(T_LIMIT_MAX)
238
776
  X(T_LIMIT_MIN)
239
777
  X(T_LIMIT_TYP)
240
- X(to_delete)
241
- X(top)
242
- X(TRANS_NUM)
243
- X(TRANSPARENCY_MASK)
244
- X(TRANSPARENT)
245
- X(TRANS_TABLE)
246
- X(TRG)
247
- X(TRG_ENABLE)
248
- X(TRG_POLARITY)
249
- X(TRG_WIDTH)
250
778
  X(T_RISE_MAX)
251
779
  X(T_RISE_MIN)
252
780
  X(T_RISE_TYP)
253
- X(TYPE)
254
781
  X(U)
255
- X(unique)
256
- X(unused_bits)
782
+ X(UP)
783
+ X(USE_DPORT)
784
+ X(USE_MULT)
785
+ X(USE_PATTERN_DETECT)
786
+ X(USE_SIMD)
787
+ X(UUT)
257
788
  X(V)
258
- X(via_celltype)
259
- X(wand)
260
- X(whitebox)
261
789
  X(WIDTH)
262
- X(wildcard_port_conns)
263
- X(wiretype)
264
- X(wor)
265
790
  X(WORDS)
266
791
  X(WR_ADDR)
267
792
  X(WR_CLK)
@@ -273,17 +798,214 @@ X(WR_PORTS)
273
798
  X(WR_PRIORITY_MASK)
274
799
  X(WR_WIDE_CONTINUATION)
275
800
  X(X)
276
- X(xprop_decoder)
801
+ X(XNOR)
802
+ X(XOR)
277
803
  X(Y)
278
804
  X(Y_WIDTH)
805
+ X(Z)
806
+ X(ZERO)
807
+ X(_TECHMAP_BITS_CONNMAP_)
808
+ X(_TECHMAP_CELLNAME_)
809
+ X(_TECHMAP_CELLTYPE_)
810
+ X(_TECHMAP_PLACEHOLDER_)
811
+ X(_TECHMAP_REPLACE_)
812
+ X(__glift_weight)
813
+ X(_const0_)
814
+ X(_const1_)
815
+ X(_dff_)
816
+ X(_id)
817
+ X(_techmap_special_)
818
+ X(a)
819
+ X(a_i)
820
+ X(abc9_box)
821
+ X(abc9_box_id)
822
+ X(abc9_box_seq)
823
+ X(abc9_bypass)
824
+ X(abc9_carry)
825
+ X(abc9_deferred_box)
826
+ X(abc9_flop)
827
+ X(abc9_keep)
828
+ X(abc9_lut)
829
+ X(abc9_mergeability)
830
+ X(abc9_scc_id)
831
+ X(abc9_script)
832
+ X(abcgroup)
833
+ X(acc_fir)
834
+ X(acc_fir_i)
835
+ X(add_carry)
836
+ X(allconst)
837
+ X(allseq)
838
+ X(always_comb)
839
+ X(always_ff)
840
+ X(always_latch)
841
+ X(anyconst)
842
+ X(anyseq)
843
+ X(architecture)
279
844
  X(area)
845
+ X(b)
846
+ X(b_i)
847
+ X(blackbox)
848
+ X(bottom_bound)
849
+ X(bugpoint_keep)
850
+ X(c)
280
851
  X(capacitance)
281
- X(NPRODUCTS)
282
- X(NADDENDS)
283
- X(PRODUCT_NEGATED)
284
- X(ADDEND_NEGATED)
285
- X(A_WIDTHS)
286
- X(B_WIDTHS)
287
- X(C_WIDTHS)
288
- X(C_SIGNED)
852
+ X(cells_not_processed)
853
+ X(chain)
854
+ X(clk)
855
+ X(clk2fflogic)
856
+ X(clkbuf_driver)
857
+ X(clkbuf_inhibit)
858
+ X(clkbuf_inv)
859
+ X(clkbuf_sink)
860
+ X(clock_i)
861
+ X(cxxrtl_blackbox)
862
+ X(cxxrtl_comb)
863
+ X(cxxrtl_edge)
864
+ X(cxxrtl_sync)
865
+ X(cxxrtl_template)
866
+ X(cxxrtl_width)
867
+ X(defaultvalue)
868
+ X(dff)
869
+ X(dffsre)
870
+ X(dft_tag)
871
+ X(dly_b)
872
+ X(dly_b_o)
873
+ X(dsp_t1_10x9x32)
874
+ X(dynports)
875
+ X(enum_base_type)
876
+ X(enum_type)
877
+ X(equiv_merged)
878
+ X(equiv_region)
879
+ X(extract_order)
880
+ X(f_mode)
881
+ X(feedback)
882
+ X(feedback_i)
883
+ X(first)
884
+ X(force_downto)
885
+ X(force_upto)
886
+ X(fsm_encoding)
887
+ X(fsm_export)
888
+ X(full_case)
889
+ X(gate)
890
+ X(gate_cost_equivalent)
891
+ X(gclk)
892
+ X(gentb_clock)
893
+ X(gentb_constant)
894
+ X(gentb_skip)
895
+ X(glift)
896
+ X(gold)
897
+ X(hdlname)
898
+ X(hierconn)
899
+ X(i)
900
+ X(init)
901
+ X(initial_top)
902
+ X(interface_modport)
903
+ X(interface_type)
904
+ X(interfaces_replaced_in_module)
905
+ X(invertible_pin)
906
+ X(iopad_external_pin)
907
+ X(is_inferred)
908
+ X(is_interface)
909
+ X(it)
910
+ X(keep)
911
+ X(keep_hierarchy)
912
+ X(lib_whitebox)
913
+ X(library)
914
+ X(load_acc)
915
+ X(load_acc_i)
916
+ X(localparam)
917
+ X(logic_block)
918
+ X(lram)
919
+ X(lut)
920
+ X(lut_keep)
921
+ X(maximize)
922
+ X(mem2reg)
923
+ X(minimize)
924
+ X(module)
925
+ X(module_not_derived)
926
+ X(nQ)
927
+ X(nRST)
928
+ X(nSET)
929
+ X(netlist)
930
+ X(no_ram)
931
+ X(no_rw_check)
932
+ X(noblackbox)
933
+ X(nogsr)
934
+ X(nolatches)
935
+ X(nomem2reg)
936
+ X(nomeminit)
937
+ X(nosync)
938
+ X(nowrshmsk)
939
+ X(o)
940
+ X(offset)
941
+ X(onehot)
942
+ X(output_select)
943
+ X(output_select_i)
944
+ X(p_class)
945
+ X(parallel_case)
946
+ X(parameter)
947
+ X(promoted_if)
289
948
  X(raise_error)
949
+ X(ram_block)
950
+ X(ram_style)
951
+ X(ramstyle)
952
+ X(reg)
953
+ X(register_inputs)
954
+ X(register_inputs_i)
955
+ X(replaced_by_gclk)
956
+ X(reprocess_after)
957
+ X(reset)
958
+ X(reset_i)
959
+ X(rom_block)
960
+ X(rom_style)
961
+ X(romstyle)
962
+ X(round)
963
+ X(round_i)
964
+ X(rtlil)
965
+ X(saturate_enable)
966
+ X(saturate_enable_i)
967
+ X(scopename)
968
+ X(sdffsre)
969
+ X(shift_right)
970
+ X(shift_right_i)
971
+ X(single_bit_vector)
972
+ X(smtlib2_comb_expr)
973
+ X(smtlib2_module)
974
+ X(src)
975
+ X(sta_arrival)
976
+ X(submod)
977
+ X(subtract)
978
+ X(subtract_i)
979
+ X(syn_ramstyle)
980
+ X(syn_romstyle)
981
+ X(techmap_autopurge)
982
+ X(techmap_celltype)
983
+ X(techmap_chtype)
984
+ X(techmap_maccmap)
985
+ X(techmap_simplemap)
986
+ X(techmap_wrap)
987
+ X(test)
988
+ X(to_delete)
989
+ X(top)
990
+ X(top_bound)
991
+ X(trg_on_gclk)
992
+ X(trigger)
993
+ X(unique)
994
+ X(unsigned_a)
995
+ X(unsigned_a_i)
996
+ X(unsigned_b)
997
+ X(unsigned_b_i)
998
+ X(unused_bits)
999
+ X(use_dsp)
1000
+ X(value)
1001
+ X(via_celltype)
1002
+ X(wand)
1003
+ X(whitebox)
1004
+ X(width)
1005
+ X(wildcard_port_conns)
1006
+ X(wiretype)
1007
+ X(wor)
1008
+ X(xprop_decoder)
1009
+ X(y)
1010
+ X(z)
1011
+ X(z_o)