siliconcompiler 0.36.0__py3-none-any.whl → 0.36.2__py3-none-any.whl

siliconcompiler/_metadata.py

@@ -1,5 +1,5 @@
 # Version number following semver standard.
-version = '0.36.0'
+version = '0.36.2'
 
 # Default server address for remote runs, if unspecified.
 default_server = 'https://server.siliconcompiler.com'

siliconcompiler/asic.py

@@ -244,7 +244,7 @@ class ASIC(Project):
             if pdk not in self.getkeys("library"):
                 error = True
                 self.logger.error(f"{pdk} library has not been loaded")
-            elif not isinstance(self.get("library", pdk, field="schema"), PDK):
+            elif not isinstance(self.get_library(pdk), PDK):
                 error = True
                 self.logger.error(f"{pdk} must be a PDK")
 
@@ -432,7 +432,7 @@ class ASIC(Project):
         if not self.get("asic", "pdk") and self.get("asic", "mainlib"):
             mainlib = None
             if self._has_library(self.get("asic", "mainlib")):
-                mainlib = self.get("library", self.get("asic", "mainlib"), field="schema")
+                mainlib = self.get_library(self.get("asic", "mainlib"))
             if mainlib:
                 mainlib_pdk = mainlib.get("asic", "pdk")
                 if mainlib_pdk:
@@ -530,7 +530,7 @@ class ASICTask(Task):
             raise ValueError("mainlib has not been defined in [asic,mainlib]")
         if mainlib not in self.project.getkeys("library"):
             raise LookupError(f"{mainlib} has not been loaded")
-        return self.project.get("library", mainlib, field="schema")
+        return self.project.get_library(mainlib)
 
     @property
     def pdk(self) -> PDK:
@@ -540,7 +540,7 @@ class ASICTask(Task):
             raise ValueError("pdk has not been defined in [asic,pdk]")
         if pdk not in self.project.getkeys("library"):
             raise LookupError(f"{pdk} has not been loaded")
-        return self.project.get("library", pdk, field="schema")
+        return self.project.get_library(pdk)
 
     def set_asic_var(self,
                      key: str,

siliconcompiler/design.py

@@ -694,7 +694,12 @@ class Design(DependencySchema, LibrarySchema):
         if dataroot is ...:
             dataroot = None
         else:
-            dataroot = self._get_active_dataroot(dataroot)
+            if option in ['idir', 'libdir']:
+                try:
+                    dataroot = self._get_active_dataroot(dataroot)
+                except ValueError as e:
+                    if any(not os.path.isabs(v) for v in value):
+                        raise e
 
         with self.active_dataroot(dataroot):
             if list in typelist and not clobber:

siliconcompiler/package/__init__.py

@@ -72,9 +72,10 @@ class Resolver:
         self.__cacheid = None
 
         if self.__root and hasattr(self.__root, "logger"):
-            self.__logger = self.__root.logger.getChild(f"resolver-{self.name}")
+            rootlogger = self.__root.logger
         else:
-            self.__logger = logging.getLogger(f"resolver-{self.name}")
+            rootlogger = MPManager.logger()
+        self.__logger = rootlogger.getChild(f"resolver-{self.name}")
 
     @staticmethod
     def populate_resolvers() -> None:

siliconcompiler/project.py

@@ -1,6 +1,5 @@
 import logging
 import os
-import sys
 import uuid
 
 import os.path
@@ -28,7 +27,7 @@ from siliconcompiler.schema_support.pathschema import PathSchemaBase
 
 from siliconcompiler.report.dashboard.cli import CliDashboard
 from siliconcompiler.scheduler import Scheduler, SCRuntimeError
-from siliconcompiler.utils.logging import SCColorLoggerFormatter, SCLoggerFormatter
+from siliconcompiler.utils.logging import get_stream_handler
 from siliconcompiler.utils import get_file_ext
 from siliconcompiler.utils.multiprocessing import MPManager
 from siliconcompiler.utils.paths import jobdir, workdir
@@ -143,12 +142,7 @@ class Project(PathSchemaBase, CommandLineSchema, BaseSchema):
         self.__logger = MPManager.logger().getChild(f"project_{uuid.uuid4().hex}")
         self.__logger.setLevel(logging.INFO)
 
-        self._logger_console = logging.StreamHandler(stream=sys.stdout)
-        if SCColorLoggerFormatter.supports_color(sys.stdout):
-            self._logger_console.setFormatter(SCColorLoggerFormatter(SCLoggerFormatter()))
-        else:
-            self._logger_console.setFormatter(SCLoggerFormatter())
-
+        self._logger_console = get_stream_handler(self, in_run=False, step=None, index=None)
         self.__logger.addHandler(self._logger_console)
 
     def __init_dashboard(self):
@@ -225,7 +219,7 @@ class Project(PathSchemaBase, CommandLineSchema, BaseSchema):
         if not self.valid("library", design_name):
             raise KeyError(f"{design_name} design has not been loaded")
 
-        return self.get("library", design_name, field="schema")
+        return self.get_library(design_name)
 
     @property
     def option(self) -> OptionSchema:
@@ -482,7 +476,7 @@ class Project(PathSchemaBase, CommandLineSchema, BaseSchema):
             if not self._has_library(src_lib):
                 continue
 
-            if not self.get("library", src_lib, field="schema").has_fileset(src_fileset):
+            if not self.get_library(src_lib).has_fileset(src_fileset):
                 self.logger.error(f"{src_fileset} is not a valid fileset in {src_lib}")
                 error = True
                 continue
@@ -496,7 +490,7 @@ class Project(PathSchemaBase, CommandLineSchema, BaseSchema):
                 continue
 
             if dst_fileset and \
-                    not self.get("library", dst_lib, field="schema").has_fileset(dst_fileset):
+                    not self.get_library(dst_lib).has_fileset(dst_fileset):
                 self.logger.error(f"{dst_fileset} is not a valid fileset in {dst_lib}")
                 error = True
                 continue
@@ -715,7 +709,7 @@ class Project(PathSchemaBase, CommandLineSchema, BaseSchema):
             if dst_lib:
                 if not self._has_library(dst_lib):
                     raise KeyError(f"{dst_lib} is not a loaded library")
-                dst_obj = self.get("library", dst_lib, field="schema")
+                dst_obj = self.get_library(dst_lib)
             else:
                 dst_obj = None
             if not dst_fileset:
@@ -844,7 +838,7 @@ class Project(PathSchemaBase, CommandLineSchema, BaseSchema):
 
         if isinstance(src_dep, str):
             if self._has_library(src_dep):
-                src_dep = self.get("library", src_dep, field="schema")
+                src_dep = self.get_library(src_dep)
             else:
                 src_dep_name = src_dep
                 src_dep = None
@@ -875,7 +869,7 @@ class Project(PathSchemaBase, CommandLineSchema, BaseSchema):
                 if not self._has_library(alias_dep):
                     raise KeyError(f"{alias_dep} has not been loaded")
 
-                alias_dep = self.get("library", alias_dep, field="schema")
+                alias_dep = self.get_library(alias_dep)
 
         if alias_dep is not None:
             if isinstance(alias_dep, Design):
@@ -894,6 +888,28 @@ class Project(PathSchemaBase, CommandLineSchema, BaseSchema):
         else:
             return self.add("option", "alias", alias)
 
+    def get_library(self, library: str) -> NamedSchema:
+        """
+        Retrieves a library by name from the project.
+
+        Args:
+            library (str): The name of the library to retrieve.
+
+        Returns:
+            NamedSchema: The `NamedSchema` object representing the library.
+
+        Raises:
+            KeyError: If the specified library is not found in the project.
+            TypeError: If the provided `library` is not a string.
+        """
+        if not isinstance(library, str):
+            raise TypeError("library must be a string")
+
+        if not self._has_library(library):
+            raise KeyError(f"{library} is not a valid library")
+
+        return self.get("library", library, field="schema")
+
     def _has_library(self, library: Union[str, NamedSchema]) -> bool:
         """
         Checks if a library with the given name exists and is loaded in the project.

siliconcompiler/schema_support/filesetschema.py

@@ -1,5 +1,7 @@
 import contextlib
 
+import os.path
+
 from pathlib import Path
 
 from typing import List, Tuple, Optional, Union, Iterable, Set
@@ -118,8 +120,14 @@ class FileSetSchema(PathSchema):
             ext = utils.get_file_ext(filename)
             filetype = utils.get_default_iomap().get(ext, ext)
 
+        try:
+            dataroot = self._get_active_dataroot(dataroot)
+        except ValueError as e:
+            if not os.path.isabs(filename):
+                raise e
+
         # adding files to dictionary
-        with self.active_dataroot(self._get_active_dataroot(dataroot)):
+        with self.active_dataroot(dataroot):
             if clobber:
                 return self.set('fileset', fileset, 'file', filetype, filename)
             else:

siliconcompiler/schema_support/pathschema.py

@@ -11,7 +11,9 @@ from siliconcompiler.schema.parameter import Parameter, Scope
 from siliconcompiler.schema.utils import trim
 
 from siliconcompiler.package import Resolver
+from siliconcompiler.utils.logging import get_stream_handler
 from siliconcompiler.utils.paths import collectiondir, cwdirsafe
+from siliconcompiler.utils.multiprocessing import MPManager
 
 
 class PathSchemaBase(BaseSchema):
@@ -19,6 +21,15 @@ class PathSchemaBase(BaseSchema):
     Schema extension to add simpler find_files and check_filepaths
     '''
 
+    def __getlogger(self, logger_name: str) -> logging.Logger:
+        schema_root = self._parent(root=True)
+        root_logger = getattr(schema_root, "logger", MPManager.logger())
+        logger = root_logger.getChild(logger_name)
+        if not logger.handlers:
+            logger.addHandler(get_stream_handler(schema_root, in_run=False, step=None, index=None))
+            logger.setLevel(logging.INFO)
+        return logger
+
     def find_files(self, *keypath: str,
                    missing_ok: bool = False,
                    step: Optional[str] = None, index: Optional[Union[int, str]] = None) \
@@ -69,13 +80,10 @@ class PathSchemaBase(BaseSchema):
             True if all file paths are valid, otherwise False.
         '''
         schema_root = self._parent(root=True)
-        logger = getattr(schema_root,
-                         "logger",
-                         logging.getLogger("siliconcompiler.check_filepaths"))
 
         return super()._check_filepaths(
             ignore_keys=ignore_keys,
-            logger=logger,
+            logger=self.__getlogger("check_filepaths"),
             collection_dir=collectiondir(schema_root),
             cwd=cwdirsafe(schema_root))
 
@@ -121,13 +129,11 @@ class PathSchemaBase(BaseSchema):
             >>> hashlist = hash_files('input', 'rtl', 'verilog')
             Computes, stores, and returns hashes of files in :keypath:`input, rtl, verilog`.
         '''
-        schema_root = self._parent(root=True)
-        logger = getattr(schema_root,
-                         "logger",
-                         logging.getLogger("siliconcompiler.hash_files"))
-
         if verbose:
-            logger.info(f"Computing hash value for [{','.join([*self._keypath, *keypath])}]")
+            self.__getlogger("hash_files").info(
+                f"Computing hash value for [{','.join([*self._keypath, *keypath])}]")
+
+        schema_root = self._parent(root=True)
 
         hashes = super()._hash_files(*keypath,
                                      missing_ok=missing_ok,

siliconcompiler/tool.py

@@ -997,7 +997,7 @@ class Task(NamedSchema, PathSchema, DocsSchema):
                      open(stderr_file, 'w') as stderr_writer:
                     if stderr_file == stdout_file:
                         stderr_writer.close()
-                        stderr_writer = sys.stdout
+                        stderr_writer = stdout_writer
 
                     with contextlib.redirect_stderr(stderr_writer), \
                          contextlib.redirect_stdout(stdout_writer):
@@ -1009,6 +1009,8 @@ class Task(NamedSchema, PathSchema, DocsSchema):
             finally:
                 with sc_open(stdout_file) as stdout_reader, \
                      sc_open(stderr_file) as stderr_reader:
+                    if stdout_file == stderr_file:
+                        stderr_reader = None
                     read_stdio(stdout_reader, stderr_reader)
 
                 if resource:

siliconcompiler/tools/chisel/convert.py

@@ -4,6 +4,8 @@ import glob
 
 import os.path
 
+from typing import Optional, List, Union
+
 from siliconcompiler import sc_open
 
 from siliconcompiler import Task
@@ -18,6 +20,48 @@ class ConvertTask(Task):
         self.add_parameter("targetdir", "str", "Output target directory name",
                            defvalue="chisel-output")
 
+    def set_chisel_application(self, application: str,
+                               step: Optional[str] = None, index: Optional[str] = None) -> None:
+        """
+        Sets the application name of the chisel program.
+
+        Args:
+            application (str): The application name.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "application", application, step=step, index=index)
+
+    def add_chisel_argument(self, argument: Union[str, List[str]],
+                            step: Optional[str] = None, index: Optional[str] = None,
+                            clobber: bool = False) -> None:
+        """
+        Adds arguments for the chisel build.
+
+        Args:
+            argument (Union[str, List[str]]): The argument(s) to add.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+            clobber (bool, optional): If True, overwrites the existing list. Defaults to False.
+        """
+        if clobber:
+            self.set("var", "argument", argument, step=step, index=index)
+        else:
+            self.add("var", "argument", argument, step=step, index=index)
+
+    def set_chisel_targetdir(self, targetdir: str,
+                             step: Optional[str] = None,
+                             index: Optional[str] = None) -> None:
+        """
+        Sets the output target directory name.
+
+        Args:
+            targetdir (str): The target directory name.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "targetdir", targetdir, step=step, index=index)
+
     def tool(self):
         return "chisel"
 

siliconcompiler/tools/ghdl/convert.py

@@ -1,3 +1,4 @@
+from typing import Optional
 from siliconcompiler import Task
 
 
@@ -12,10 +13,44 @@ class ConvertTask(Task):
         self.add_parameter("use_latches", "bool", "add the --latches flag", defvalue=False)
 
     def set_usefsynopsys(self, value: bool):
-        self.set("var", "use_fsynopsys", value)
+        """Deprecated: use set_ghdl_usefsynopsys instead."""
+        import warnings
+        warnings.warn("set_usefsynopsys is deprecated, use set_ghdl_usefsynopsys instead.",
+                      DeprecationWarning, stacklevel=2)
+        self.set_ghdl_usefsynopsys(value)
+
+    def set_ghdl_usefsynopsys(self, value: bool,
+                              step: Optional[str] = None,
+                              index: Optional[str] = None):
+        """
+        Adds the -fsynopsys flag to the GHDL command.
+
+        Args:
+            value (bool): Whether to add the flag.
+            step (str, optional): The step to associate with this setting.
+            index (str, optional): The index to associate with this setting.
+        """
+        self.set("var", "use_fsynopsys", value, step=step, index=index)
 
     def set_uselatches(self, value: bool):
-        self.set("var", "use_latches", value)
+        """Deprecated: use set_ghdl_uselatches instead."""
+        import warnings
+        warnings.warn("set_uselatches is deprecated, use set_ghdl_uselatches instead.",
+                      DeprecationWarning, stacklevel=2)
+        self.set_ghdl_uselatches(value)
+
+    def set_ghdl_uselatches(self, value: bool,
+                            step: Optional[str] = None,
+                            index: Optional[str] = None):
+        """
+        Adds the --latches flag to the GHDL command.
+
+        Args:
+            value (bool): Whether to add the flag.
+            step (str, optional): The step to associate with this setting.
+            index (str, optional): The index to associate with this setting.
+        """
+        self.set("var", "use_latches", value, step=step, index=index)
 
     def tool(self):
         return "ghdl"

siliconcompiler/tools/icarus/compile.py

@@ -1,3 +1,4 @@
+from typing import Optional
 from siliconcompiler import Task
 
 
@@ -14,6 +15,19 @@ class CompileTask(Task):
                            'See the corresponding "-g" flags in the Icarus manual for more "'
                            '"information.')
 
+    def set_icarus_veriloggeneration(self, gen: str,
+                                     step: Optional[str] = None,
+                                     index: Optional[str] = None):
+        """
+        Sets the Verilog language generation for Icarus.
+
+        Args:
+            gen (str): The Verilog generation to use.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "verilog_generation", gen, step=step, index=index)
+
     def tool(self):
         return "icarus"
 

siliconcompiler/tools/keplerformal/lec.py

@@ -37,7 +37,7 @@ class LECTask(Task):
         libcorners = scenario.get_libcorner(self.step, self.index)
         delay_model = self.project.get("asic", "delaymodel")
         for asiclib in self.project.get("asic", "asiclib"):
-            lib = self.project.get("library", asiclib, field="schema")
+            lib = self.project.get_library(asiclib)
             for corner in libcorners:
                 if not lib.valid("asic", "libcornerfileset", corner, delay_model):
                     continue
@@ -64,7 +64,7 @@ class LECTask(Task):
             libcorners = scenario.get_libcorner(self.step, self.index)
             delay_model = self.project.get("asic", "delaymodel")
             for asiclib in self.project.get("asic", "asiclib"):
-                lib = self.project.get("library", asiclib, field="schema")
+                lib = self.project.get_library(asiclib)
                 for corner in libcorners:
                     if not lib.valid("asic", "libcornerfileset", corner, delay_model):
                         continue

siliconcompiler/tools/klayout/drc.py

@@ -2,6 +2,7 @@ import shlex
 
 import os.path
 
+from typing import Optional
 from xml.etree import ElementTree
 
 from siliconcompiler.tools.klayout import KLayoutTask
@@ -14,6 +15,19 @@ class DRCTask(KLayoutTask):
 
         self.add_parameter("drc_name", "str", "name of the DRC deck to run")
 
+    def set_klayout_drcname(self, name: str,
+                            step: Optional[str] = None,
+                            index: Optional[str] = None):
+        """
+        Sets the name of the DRC deck to run.
+
+        Args:
+            name (str): The name of the DRC deck.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "drc_name", name, step=step, index=index)
+
     def task(self):
         return "drc"
 

siliconcompiler/tools/klayout/export.py

@@ -1,3 +1,4 @@
+from typing import Optional
 from siliconcompiler.tools.klayout import KLayoutTask
 from siliconcompiler.tools.klayout.screenshot import ScreenshotParams
 
@@ -13,6 +14,45 @@ class ExportTask(KLayoutTask, ScreenshotParams):
                            "true/false: true will cause KLayout to generate a screenshot of "
                            "the layout", defvalue=True)
 
+    def set_klayout_stream(self, stream: str,
+                           step: Optional[str] = None,
+                           index: Optional[str] = None):
+        """
+        Sets the stream format for generation.
+
+        Args:
+            stream (str): The stream format to use.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "stream", stream, step=step, index=index)
+
+    def set_klayout_timestamps(self, enable: bool,
+                               step: Optional[str] = None,
+                               index: Optional[str] = None):
+        """
+        Enables or disables exporting GDSII with timestamps.
+
+        Args:
+            enable (bool): Whether to enable timestamps.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "timestamps", enable, step=step, index=index)
+
+    def set_klayout_screenshot(self, enable: bool,
+                               step: Optional[str] = None,
+                               index: Optional[str] = None):
+        """
+        Enables or disables generating a screenshot of the layout.
+
+        Args:
+            enable (bool): Whether to generate a screenshot.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "screenshot", enable, step=step, index=index)
+
     def task(self):
         return "export"
 
@@ -58,7 +98,7 @@ class ExportTask(KLayoutTask, ScreenshotParams):
                 lib_requires_stream = False
 
             req_set = False
-            libobj = self.project.get("library", lib, field="schema")
+            libobj = self.project.get_library(lib)
             for s in sc_stream_order:
                 for fileset in libobj.get("asic", "aprfileset"):
                     if libobj.valid("fileset", fileset, "file", s):

siliconcompiler/tools/klayout/operations.py

@@ -1,3 +1,4 @@
+from typing import Optional, List, Tuple
 from siliconcompiler.tools.klayout import KLayoutTask
 
 
@@ -15,6 +16,45 @@ class OperationsTask(KLayoutTask):
         self.add_parameter("timestamps", "bool",
                            "Export GDSII with timestamps", defvalue=True)
 
+    def set_klayout_operations(self, operations: List[Tuple[str, str]],
+                               step: Optional[str] = None,
+                               index: Optional[str] = None):
+        """
+        Sets the list of operations to perform.
+
+        Args:
+            operations (List[Tuple[str, str]]): The list of operations.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "operations", operations, step=step, index=index)
+
+    def set_klayout_stream(self, stream: str,
+                           step: Optional[str] = None,
+                           index: Optional[str] = None):
+        """
+        Sets the stream format for generation.
+
+        Args:
+            stream (str): The stream format to use.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "stream", stream, step=step, index=index)
+
+    def set_klayout_timestamps(self, enable: bool,
+                               step: Optional[str] = None,
+                               index: Optional[str] = None):
+        """
+        Enables or disables exporting GDSII with timestamps.
+
+        Args:
+            enable (bool): Whether to enable timestamps.
+            step (str, optional): The specific step to apply this configuration to.
+            index (str, optional): The specific index to apply this configuration to.
+        """
+        self.set("var", "timestamps", enable, step=step, index=index)
+
     def task(self):
         return "operations"
 

siliconcompiler/tools/openroad/__init__.py

@@ -51,6 +51,8 @@ class OpenROADPDK(PDK):
                                    "router and only uses the specified tech vias")
         self.define_tool_parameter("openroad", "drt_repair_pdn_vias", "str",
                                    "Via layer to repair after detailed routing")
+        self.define_tool_parameter("openroad", "drt_via_in_pin_layers", "(str,str)",
+                                   "Tuple of layers for vias in pin layers")
 
     def set_openroad_rclayers(self, signal: str = None, clock: str = None):
         """
@@ -155,6 +157,15 @@ class OpenROADPDK(PDK):
         """
         self.set("tool", "openroad", "drt_repair_pdn_vias", layer)
 
+    def set_openroad_detailedrouteviainpinlayers(self, layer1: str, layer2: str):
+        """Sets the via layers used in pin layers during detailed routing.
+
+        Args:
+            layer1 (str): The first layer for vias in pin layers.
+            layer2 (str): The second layer for vias in pin layers.
+        """
+        self.set("tool", "openroad", "drt_via_in_pin_layers", (layer1, layer2))
+
 
 class OpenROADStdCellLibrary(StdCellLibrary):
     """