siliconcompiler 0.32.3__py3-none-any.whl → 0.33.0__py3-none-any.whl
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- siliconcompiler/__init__.py +19 -2
- siliconcompiler/_metadata.py +1 -1
- siliconcompiler/apps/sc.py +2 -2
- siliconcompiler/apps/sc_install.py +3 -3
- siliconcompiler/apps/sc_issue.py +1 -1
- siliconcompiler/apps/sc_remote.py +4 -4
- siliconcompiler/apps/sc_show.py +2 -2
- siliconcompiler/apps/utils/replay.py +5 -3
- siliconcompiler/asic.py +120 -0
- siliconcompiler/checklist.py +150 -0
- siliconcompiler/core.py +267 -289
- siliconcompiler/flowgraph.py +803 -515
- siliconcompiler/fpga.py +84 -0
- siliconcompiler/metric.py +420 -0
- siliconcompiler/optimizer/vizier.py +2 -3
- siliconcompiler/package/__init__.py +29 -6
- siliconcompiler/pdk.py +415 -0
- siliconcompiler/record.py +449 -0
- siliconcompiler/remote/client.py +6 -3
- siliconcompiler/remote/schema.py +116 -112
- siliconcompiler/remote/server.py +3 -5
- siliconcompiler/report/dashboard/cli/__init__.py +13 -722
- siliconcompiler/report/dashboard/cli/board.py +895 -0
- siliconcompiler/report/dashboard/web/__init__.py +10 -10
- siliconcompiler/report/dashboard/web/components/__init__.py +5 -4
- siliconcompiler/report/dashboard/web/components/flowgraph.py +3 -3
- siliconcompiler/report/dashboard/web/components/graph.py +6 -3
- siliconcompiler/report/dashboard/web/state.py +1 -1
- siliconcompiler/report/dashboard/web/utils/__init__.py +4 -3
- siliconcompiler/report/html_report.py +2 -3
- siliconcompiler/report/report.py +13 -7
- siliconcompiler/report/summary_image.py +1 -1
- siliconcompiler/report/summary_table.py +3 -3
- siliconcompiler/report/utils.py +11 -10
- siliconcompiler/scheduler/__init__.py +145 -280
- siliconcompiler/scheduler/run_node.py +2 -1
- siliconcompiler/scheduler/send_messages.py +4 -4
- siliconcompiler/scheduler/slurm.py +2 -2
- siliconcompiler/schema/__init__.py +19 -2
- siliconcompiler/schema/baseschema.py +493 -0
- siliconcompiler/schema/cmdlineschema.py +250 -0
- siliconcompiler/{sphinx_ext → schema/docs}/__init__.py +3 -1
- siliconcompiler/{sphinx_ext → schema/docs}/dynamicgen.py +63 -81
- siliconcompiler/{sphinx_ext → schema/docs}/schemagen.py +73 -85
- siliconcompiler/{sphinx_ext → schema/docs}/utils.py +12 -13
- siliconcompiler/schema/editableschema.py +136 -0
- siliconcompiler/schema/journalingschema.py +238 -0
- siliconcompiler/schema/namedschema.py +41 -0
- siliconcompiler/schema/packageschema.py +101 -0
- siliconcompiler/schema/parameter.py +791 -0
- siliconcompiler/schema/parametertype.py +323 -0
- siliconcompiler/schema/parametervalue.py +736 -0
- siliconcompiler/schema/safeschema.py +37 -0
- siliconcompiler/schema/schema_cfg.py +109 -1789
- siliconcompiler/schema/utils.py +5 -68
- siliconcompiler/schema_obj.py +119 -0
- siliconcompiler/tool.py +1308 -0
- siliconcompiler/tools/_common/__init__.py +6 -10
- siliconcompiler/tools/_common/sdc/sc_constraints.sdc +1 -1
- siliconcompiler/tools/bluespec/convert.py +7 -7
- siliconcompiler/tools/builtin/_common.py +1 -1
- siliconcompiler/tools/builtin/concatenate.py +2 -2
- siliconcompiler/tools/builtin/minimum.py +1 -1
- siliconcompiler/tools/builtin/mux.py +2 -1
- siliconcompiler/tools/builtin/nop.py +1 -1
- siliconcompiler/tools/builtin/verify.py +6 -4
- siliconcompiler/tools/chisel/convert.py +4 -4
- siliconcompiler/tools/genfasm/bitstream.py +3 -3
- siliconcompiler/tools/ghdl/convert.py +1 -1
- siliconcompiler/tools/icarus/compile.py +4 -4
- siliconcompiler/tools/icepack/bitstream.py +6 -1
- siliconcompiler/tools/klayout/convert_drc_db.py +5 -0
- siliconcompiler/tools/klayout/klayout_export.py +0 -1
- siliconcompiler/tools/klayout/klayout_utils.py +3 -10
- siliconcompiler/tools/nextpnr/apr.py +6 -1
- siliconcompiler/tools/nextpnr/nextpnr.py +4 -4
- siliconcompiler/tools/openroad/_apr.py +13 -0
- siliconcompiler/tools/openroad/rdlroute.py +3 -3
- siliconcompiler/tools/openroad/scripts/apr/postamble.tcl +1 -1
- siliconcompiler/tools/openroad/scripts/apr/preamble.tcl +5 -5
- siliconcompiler/tools/openroad/scripts/apr/sc_antenna_repair.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_clock_tree_synthesis.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_detailed_placement.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_detailed_route.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_endcap_tapcell_insertion.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_fillercell_insertion.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_fillmetal_insertion.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_global_placement.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_global_route.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_init_floorplan.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_macro_placement.tcl +3 -3
- siliconcompiler/tools/openroad/scripts/apr/sc_metrics.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_pin_placement.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_power_grid.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_repair_design.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_repair_timing.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/apr/sc_write_data.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/common/procs.tcl +57 -1
- siliconcompiler/tools/openroad/scripts/common/screenshot.tcl +2 -2
- siliconcompiler/tools/openroad/scripts/common/write_images.tcl +28 -3
- siliconcompiler/tools/openroad/scripts/sc_rcx.tcl +1 -1
- siliconcompiler/tools/openroad/scripts/sc_rdlroute.tcl +3 -3
- siliconcompiler/tools/openroad/scripts/sc_show.tcl +6 -6
- siliconcompiler/tools/slang/__init__.py +10 -10
- siliconcompiler/tools/surelog/parse.py +4 -4
- siliconcompiler/tools/sv2v/convert.py +20 -3
- siliconcompiler/tools/verilator/compile.py +2 -2
- siliconcompiler/tools/verilator/verilator.py +3 -3
- siliconcompiler/tools/vpr/place.py +1 -1
- siliconcompiler/tools/vpr/route.py +4 -4
- siliconcompiler/tools/vpr/screenshot.py +1 -1
- siliconcompiler/tools/vpr/show.py +5 -5
- siliconcompiler/tools/vpr/vpr.py +24 -24
- siliconcompiler/tools/xdm/convert.py +2 -2
- siliconcompiler/tools/xyce/simulate.py +1 -1
- siliconcompiler/tools/yosys/sc_synth_asic.tcl +74 -68
- siliconcompiler/tools/yosys/syn_asic.py +2 -2
- siliconcompiler/toolscripts/_tools.json +7 -7
- siliconcompiler/toolscripts/ubuntu22/install-vpr.sh +0 -2
- siliconcompiler/toolscripts/ubuntu24/install-vpr.sh +0 -2
- siliconcompiler/utils/__init__.py +8 -112
- siliconcompiler/utils/flowgraph.py +339 -0
- siliconcompiler/{issue.py → utils/issue.py} +4 -3
- siliconcompiler/utils/logging.py +1 -2
- {siliconcompiler-0.32.3.dist-info → siliconcompiler-0.33.0.dist-info}/METADATA +9 -8
- {siliconcompiler-0.32.3.dist-info → siliconcompiler-0.33.0.dist-info}/RECORD +151 -134
- {siliconcompiler-0.32.3.dist-info → siliconcompiler-0.33.0.dist-info}/WHEEL +1 -1
- {siliconcompiler-0.32.3.dist-info → siliconcompiler-0.33.0.dist-info}/entry_points.txt +8 -8
- siliconcompiler/schema/schema_obj.py +0 -1936
- siliconcompiler/toolscripts/ubuntu20/install-vpr.sh +0 -29
- siliconcompiler/toolscripts/ubuntu20/install-yosys-parmys.sh +0 -61
- /siliconcompiler/{templates → data/templates}/__init__.py +0 -0
- /siliconcompiler/{templates → data/templates}/email/__init__.py +0 -0
- /siliconcompiler/{templates → data/templates}/email/general.j2 +0 -0
- /siliconcompiler/{templates → data/templates}/email/summary.j2 +0 -0
- /siliconcompiler/{templates → data/templates}/issue/README.txt +0 -0
- /siliconcompiler/{templates → data/templates}/issue/__init__.py +0 -0
- /siliconcompiler/{templates → data/templates}/issue/run.sh +0 -0
- /siliconcompiler/{templates → data/templates}/replay/replay.py.j2 +0 -0
- /siliconcompiler/{templates → data/templates}/replay/replay.sh.j2 +0 -0
- /siliconcompiler/{templates → data/templates}/replay/requirements.txt +0 -0
- /siliconcompiler/{templates → data/templates}/replay/setup.sh +0 -0
- /siliconcompiler/{templates → data/templates}/report/__init__.py +0 -0
- /siliconcompiler/{templates → data/templates}/report/bootstrap.min.css +0 -0
- /siliconcompiler/{templates → data/templates}/report/bootstrap.min.js +0 -0
- /siliconcompiler/{templates → data/templates}/report/bootstrap_LICENSE.md +0 -0
- /siliconcompiler/{templates → data/templates}/report/sc_report.j2 +0 -0
- /siliconcompiler/{templates → data/templates}/slurm/__init__.py +0 -0
- /siliconcompiler/{templates → data/templates}/slurm/run.sh +0 -0
- /siliconcompiler/{templates → data/templates}/tcl/__init__.py +0 -0
- /siliconcompiler/{templates → data/templates}/tcl/manifest.tcl.j2 +0 -0
- /siliconcompiler/{units.py → utils/units.py} +0 -0
- {siliconcompiler-0.32.3.dist-info → siliconcompiler-0.33.0.dist-info}/licenses/LICENSE +0 -0
- {siliconcompiler-0.32.3.dist-info → siliconcompiler-0.33.0.dist-info}/top_level.txt +0 -0
siliconcompiler/__init__.py
CHANGED
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@@ -1,9 +1,18 @@
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from siliconcompiler._common import NodeStatus, SiliconCompilerError
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from siliconcompiler.utils import sc_open
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from siliconcompiler.schema_obj import SchemaTmp as Schema
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from siliconcompiler.record import RecordSchema
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from siliconcompiler.metric import MetricSchema
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from siliconcompiler.pdk import PDKSchema
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from siliconcompiler.flowgraph import FlowgraphSchema
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from siliconcompiler.tool import ToolSchema
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from siliconcompiler.checklist import ChecklistSchema
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from siliconcompiler.asic import ASICSchema
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from siliconcompiler.fpga import FPGASchema
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from siliconcompiler.core import Chip
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from siliconcompiler.schema import Schema
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from siliconcompiler._metadata import version as __version__
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@@ -20,5 +29,13 @@ __all__ = [
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"Flow",
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"Checklist",
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"Schema",
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"sc_open"
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"sc_open",
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"RecordSchema",
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"MetricSchema",
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"PDKSchema",
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"FlowgraphSchema",
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"ToolSchema",
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"ChecklistSchema",
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"ASICSchema",
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"FPGASchema"
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]
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siliconcompiler/_metadata.py
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siliconcompiler/apps/sc.py
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def _infer_designname(chip):
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topfile = None
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sourcesets = chip.getkeys('input')
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sourcesets = list(chip.getkeys('input'))
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for sourceset in reversed(('rtl', 'hll')):
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if sourceset in sourcesets:
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sourcesets.remove(sourceset)
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sourcesets.insert(0, sourceset)
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for sourceset in sourcesets:
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for filetype in chip.getkeys('input', sourceset):
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all_vals = chip.schema.
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all_vals = chip.schema.get('input', sourceset, filetype, field=None).getvalues()
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if all_vals:
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# just look at first value
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sources, _, _ = all_vals[0]
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from collections.abc import Container
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from pathlib import Path
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import siliconcompiler
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from siliconcompiler
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from siliconcompiler import RecordSchema
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class ChoiceOptional(Container):
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machine_info =
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machine_info = RecordSchema.get_machine_information()
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system = machine_info.get('system', "").lower()
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distro = machine_info.get('distro', "").lower()
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machine_info =
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machine_info = RecordSchema.get_machine_information()
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mapped_os = _get_os_name()
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print("System: ", machine_info.get('system', None))
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siliconcompiler/apps/sc_issue.py
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import tarfile
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import json
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from siliconcompiler.scheduler import _runtask, _executenode
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from siliconcompiler.issue import generate_testcase
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from siliconcompiler.utils.issue import generate_testcase
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from siliconcompiler.tools._common import get_tool_task
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from siliconcompiler import SiliconCompilerError
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from siliconcompiler.remote.client import Client, ConfigureClient
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from siliconcompiler.scheduler import _finalize_run
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from siliconcompiler.flowgraph import
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nodes_to_execute
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from siliconcompiler.utils.flowgraph import nodes_to_execute
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def main():
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elif args['reconnect']:
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# Start from successors of entry nodes, so entry nodes are not fetched from remote.
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flow = chip.get('option', 'flow')
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entry_nodes =
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entry_nodes = chip.schema.get("flowgraph", flow, field="schema").get_entry_nodes()
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for entry_node in entry_nodes:
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outputs =
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outputs = chip.schema.get("flowgraph", flow,
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field='schema').get_node_outputs(*entry_node)
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chip.set('option', 'from', list(map(lambda node: node[0], outputs)))
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# Enter the remote run loop.
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try:
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siliconcompiler/apps/sc_show.py
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for fileset in chip.getkeys('input'):
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for mode in chip.getkeys('input', fileset):
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if chip.schema.
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if chip.schema.get('input', fileset, mode, field=None).getvalues():
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input_mode = [('input', fileset, mode)]
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filename = None
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def get_file_from_keys():
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for files, _, _ in chip.schema.
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for files, _, _ in chip.schema.get(*key, field=None).getvalues():
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return file
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pythonversion = set()
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nodes = set()
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for version, step, index in chip.schema.
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for version, step, index in chip.schema.get('history', jobname, 'record', 'pythonversion',
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field=None).getvalues():
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pythonversion.add(version)
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os.makedirs(os.path.dirname(path), exist_ok=True)
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starttimes = set()
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for starttime, step, index in chip.schema.
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for starttime, step, index in chip.schema.get('history', jobname, 'record', 'starttime',
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field=None).getvalues():
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starttimes.add(datetime.strptime(starttime, '%Y-%m-%d %H:%M:%S'))
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starttime = min(starttimes).strftime('%Y-%m-%d %H:%M:%S')
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fd.flush()
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script = convert_base64(compress(fd.getvalue()))
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manifest = convert_base64(compress(json.dumps(chip.schema.
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manifest = convert_base64(compress(json.dumps(chip.schema.getdict(), indent=2)))
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tool_info = []
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for tool, version in tools.items():
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siliconcompiler/asic.py
ADDED
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from siliconcompiler.schema import BaseSchema
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from siliconcompiler.schema import EditableSchema, Parameter, PerNode, Scope
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from siliconcompiler.schema.utils import trim
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class ASICSchema(BaseSchema):
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def __init__(self):
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super().__init__()
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schema_asic(self)
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###############################################################################
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# ASIC
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###############################################################################
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def schema_asic(schema):
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schema = EditableSchema(schema)
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schema.insert(
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'logiclib',
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Parameter(
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'[str]',
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scope=Scope.JOB,
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pernode=PerNode.OPTIONAL,
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shorthelp="ASIC: logic libraries",
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switch="-asic_logiclib <str>",
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example=["cli: -asic_logiclib nangate45",
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"api: chip.set('asic', 'logiclib', 'nangate45')"],
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help=trim("""List of all selected logic libraries libraries
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to use for optimization for a given library architecture
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(9T, 11T, etc).""")))
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schema.insert(
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'macrolib',
|
|
35
|
+
Parameter(
|
|
36
|
+
'[str]',
|
|
37
|
+
scope=Scope.JOB,
|
|
38
|
+
pernode=PerNode.OPTIONAL,
|
|
39
|
+
shorthelp="ASIC: macro libraries",
|
|
40
|
+
switch="-asic_macrolib <str>",
|
|
41
|
+
example=["cli: -asic_macrolib sram64x1024",
|
|
42
|
+
"api: chip.set('asic', 'macrolib', 'sram64x1024')"],
|
|
43
|
+
help=trim("""
|
|
44
|
+
List of macro libraries to be linked in during synthesis and place
|
|
45
|
+
and route. Macro libraries are used for resolving instances but are
|
|
46
|
+
not used as targets for logic synthesis.""")))
|
|
47
|
+
|
|
48
|
+
schema.insert(
|
|
49
|
+
'delaymodel',
|
|
50
|
+
Parameter(
|
|
51
|
+
'str',
|
|
52
|
+
scope=Scope.JOB,
|
|
53
|
+
pernode=PerNode.OPTIONAL,
|
|
54
|
+
shorthelp="ASIC: delay model",
|
|
55
|
+
switch="-asic_delaymodel <str>",
|
|
56
|
+
example=["cli: -asic_delaymodel ccs",
|
|
57
|
+
"api: chip.set('asic', 'delaymodel', 'ccs')"],
|
|
58
|
+
help=trim("""
|
|
59
|
+
Delay model to use for the target libs. Commonly supported values
|
|
60
|
+
are nldm and ccs.""")))
|
|
61
|
+
|
|
62
|
+
# TODO: Expand on the exact definitions of these types of cells.
|
|
63
|
+
# minimize typing
|
|
64
|
+
names = ['decap',
|
|
65
|
+
'tie',
|
|
66
|
+
'hold',
|
|
67
|
+
'clkbuf',
|
|
68
|
+
'clkgate',
|
|
69
|
+
'clklogic',
|
|
70
|
+
'dontuse',
|
|
71
|
+
'filler',
|
|
72
|
+
'tap',
|
|
73
|
+
'endcap',
|
|
74
|
+
'antenna']
|
|
75
|
+
|
|
76
|
+
for item in names:
|
|
77
|
+
schema.insert(
|
|
78
|
+
'cells', item,
|
|
79
|
+
Parameter(
|
|
80
|
+
'[str]',
|
|
81
|
+
pernode=PerNode.OPTIONAL,
|
|
82
|
+
shorthelp=f"ASIC: {item} cell list",
|
|
83
|
+
switch=f"-asic_cells_{item} '<str>'",
|
|
84
|
+
example=[
|
|
85
|
+
f"cli: -asic_cells_{item} '*eco*'",
|
|
86
|
+
f"api: chip.set('asic', 'cells', '{item}', '*eco*')"],
|
|
87
|
+
help=trim("""
|
|
88
|
+
List of cells grouped by a property that can be accessed
|
|
89
|
+
directly by the designer and tools. The example below shows how
|
|
90
|
+
all cells containing the string 'eco' could be marked as dont use
|
|
91
|
+
for the tool.""")))
|
|
92
|
+
|
|
93
|
+
schema.insert(
|
|
94
|
+
'libarch',
|
|
95
|
+
Parameter(
|
|
96
|
+
'str',
|
|
97
|
+
pernode=PerNode.OPTIONAL,
|
|
98
|
+
shorthelp="ASIC: library architecture",
|
|
99
|
+
switch="-asic_libarch '<str>'",
|
|
100
|
+
example=[
|
|
101
|
+
"cli: -asic_libarch '12track'",
|
|
102
|
+
"api: chip.set('asic', 'libarch', '12track')"],
|
|
103
|
+
help=trim("""
|
|
104
|
+
The library architecture (e.g. library height) used to build the
|
|
105
|
+
design. For example a PDK with support for 9 and 12 track libraries
|
|
106
|
+
might have 'libarchs' called 9t and 12t.""")))
|
|
107
|
+
|
|
108
|
+
libarch = 'default'
|
|
109
|
+
schema.insert(
|
|
110
|
+
'site', libarch,
|
|
111
|
+
Parameter(
|
|
112
|
+
'[str]',
|
|
113
|
+
pernode=PerNode.OPTIONAL,
|
|
114
|
+
shorthelp="ASIC: library sites",
|
|
115
|
+
switch="-asic_site 'libarch <str>'",
|
|
116
|
+
example=[
|
|
117
|
+
"cli: -asic_site '12track Site_12T'",
|
|
118
|
+
"api: chip.set('asic', 'site', '12track', 'Site_12T')"],
|
|
119
|
+
help=trim("""
|
|
120
|
+
Site names for a given library architecture.""")))
|
|
@@ -0,0 +1,150 @@
|
|
|
1
|
+
from siliconcompiler.schema import NamedSchema
|
|
2
|
+
from siliconcompiler.schema import EditableSchema, Parameter, Scope
|
|
3
|
+
from siliconcompiler.schema.utils import trim
|
|
4
|
+
|
|
5
|
+
|
|
6
|
+
class ChecklistSchema(NamedSchema):
|
|
7
|
+
def __init__(self, name=None):
|
|
8
|
+
super().__init__(name=name)
|
|
9
|
+
|
|
10
|
+
schema_checklist(self)
|
|
11
|
+
|
|
12
|
+
|
|
13
|
+
############################################
|
|
14
|
+
# Design Checklist
|
|
15
|
+
############################################
|
|
16
|
+
def schema_checklist(schema):
|
|
17
|
+
schema = EditableSchema(schema)
|
|
18
|
+
|
|
19
|
+
item = 'default'
|
|
20
|
+
metric = 'default'
|
|
21
|
+
|
|
22
|
+
schema.insert(
|
|
23
|
+
item, 'description',
|
|
24
|
+
Parameter(
|
|
25
|
+
'str',
|
|
26
|
+
scope=Scope.GLOBAL,
|
|
27
|
+
shorthelp="Checklist: item description",
|
|
28
|
+
switch="-checklist_description 'standard item <str>'",
|
|
29
|
+
example=[
|
|
30
|
+
"cli: -checklist_description 'ISO D000 A-DESCRIPTION'",
|
|
31
|
+
"api: chip.set('checklist', 'ISO', 'D000', 'description', 'A-DESCRIPTION')"],
|
|
32
|
+
help=trim("""
|
|
33
|
+
A short one line description of the checklist item.""")))
|
|
34
|
+
|
|
35
|
+
schema.insert(
|
|
36
|
+
item, 'requirement',
|
|
37
|
+
Parameter(
|
|
38
|
+
'str',
|
|
39
|
+
scope=Scope.GLOBAL,
|
|
40
|
+
shorthelp="Checklist: item requirement",
|
|
41
|
+
switch="-checklist_requirement 'standard item <str>'",
|
|
42
|
+
example=[
|
|
43
|
+
"cli: -checklist_requirement 'ISO D000 DOCSTRING'",
|
|
44
|
+
"api: chip.set('checklist', 'ISO', 'D000', 'requirement', 'DOCSTRING')"],
|
|
45
|
+
help=trim("""
|
|
46
|
+
A complete requirement description of the checklist item
|
|
47
|
+
entered as a multi-line string.""")))
|
|
48
|
+
|
|
49
|
+
schema.insert(
|
|
50
|
+
item, 'dataformat',
|
|
51
|
+
Parameter(
|
|
52
|
+
'str',
|
|
53
|
+
scope=Scope.GLOBAL,
|
|
54
|
+
shorthelp="Checklist: item data format",
|
|
55
|
+
switch="-checklist_dataformat 'standard item <str>'",
|
|
56
|
+
example=[
|
|
57
|
+
"cli: -checklist_dataformat 'ISO D000 README'",
|
|
58
|
+
"api: chip.set('checklist', 'ISO', 'D000', 'dataformat', 'README')"],
|
|
59
|
+
help=trim("""
|
|
60
|
+
Free text description of the type of data files acceptable as
|
|
61
|
+
checklist signoff validation.""")))
|
|
62
|
+
|
|
63
|
+
schema.insert(
|
|
64
|
+
item, 'rationale',
|
|
65
|
+
Parameter(
|
|
66
|
+
'[str]',
|
|
67
|
+
scope=Scope.GLOBAL,
|
|
68
|
+
shorthelp="Checklist: item rational",
|
|
69
|
+
switch="-checklist_rationale 'standard item <str>'",
|
|
70
|
+
example=[
|
|
71
|
+
"cli: -checklist_rationale 'ISO D000 reliability'",
|
|
72
|
+
"api: chip.set('checklist', 'ISO', 'D000', 'rationale', 'reliability')"],
|
|
73
|
+
help=trim("""
|
|
74
|
+
Rationale for the the checklist item. Rationale should be a
|
|
75
|
+
unique alphanumeric code used by the standard or a short one line
|
|
76
|
+
or single word description.""")))
|
|
77
|
+
|
|
78
|
+
schema.insert(
|
|
79
|
+
item, 'criteria',
|
|
80
|
+
Parameter(
|
|
81
|
+
'[str]',
|
|
82
|
+
scope=Scope.GLOBAL,
|
|
83
|
+
shorthelp="Checklist: item criteria",
|
|
84
|
+
switch="-checklist_criteria 'standard item <str>'",
|
|
85
|
+
example=[
|
|
86
|
+
"cli: -checklist_criteria 'ISO D000 errors==0'",
|
|
87
|
+
"api: chip.set('checklist', 'ISO', 'D000', 'criteria', 'errors==0')"],
|
|
88
|
+
help=trim("""
|
|
89
|
+
Simple list of signoff criteria for checklist item which
|
|
90
|
+
must all be met for signoff. Each signoff criteria consists of
|
|
91
|
+
a metric, a relational operator, and a value in the form.
|
|
92
|
+
'metric op value'.""")))
|
|
93
|
+
|
|
94
|
+
schema.insert(
|
|
95
|
+
item, 'task',
|
|
96
|
+
Parameter(
|
|
97
|
+
'[(str,str,str)]',
|
|
98
|
+
scope=Scope.GLOBAL,
|
|
99
|
+
shorthelp="Checklist: item task",
|
|
100
|
+
switch="-checklist_task 'standard item <(str,str,str)>'",
|
|
101
|
+
example=[
|
|
102
|
+
"cli: -checklist_task 'ISO D000 (job0,place,0)'",
|
|
103
|
+
"api: chip.set('checklist', 'ISO', 'D000', 'task', ('job0', 'place', '0'))"],
|
|
104
|
+
help=trim("""
|
|
105
|
+
Flowgraph job and task used to verify the checklist item.
|
|
106
|
+
The parameter should be left empty for manual and for tool
|
|
107
|
+
flows that bypass the SC infrastructure.""")))
|
|
108
|
+
|
|
109
|
+
schema.insert(
|
|
110
|
+
item, 'report',
|
|
111
|
+
Parameter(
|
|
112
|
+
'[file]',
|
|
113
|
+
scope=Scope.GLOBAL,
|
|
114
|
+
shorthelp="Checklist: item report",
|
|
115
|
+
switch="-checklist_report 'standard item <file>'",
|
|
116
|
+
example=[
|
|
117
|
+
"cli: -checklist_report 'ISO D000 my.rpt'",
|
|
118
|
+
"api: chip.set('checklist', 'ISO', 'D000', 'report', 'my.rpt')"],
|
|
119
|
+
help=trim("""
|
|
120
|
+
Filepath to report(s) of specified type documenting the successful
|
|
121
|
+
validation of the checklist item.""")))
|
|
122
|
+
|
|
123
|
+
schema.insert(
|
|
124
|
+
item, 'waiver', metric,
|
|
125
|
+
Parameter(
|
|
126
|
+
'[file]',
|
|
127
|
+
scope=Scope.GLOBAL,
|
|
128
|
+
shorthelp="Checklist: item metric waivers",
|
|
129
|
+
switch="-checklist_waiver 'standard item metric <file>'",
|
|
130
|
+
example=[
|
|
131
|
+
"cli: -checklist_waiver 'ISO D000 bold my.txt'",
|
|
132
|
+
"api: chip.set('checklist', 'ISO', 'D000', 'waiver', 'hold', 'my.txt')"],
|
|
133
|
+
help=trim("""
|
|
134
|
+
Filepath to report(s) documenting waivers for the checklist
|
|
135
|
+
item specified on a per metric basis.""")))
|
|
136
|
+
|
|
137
|
+
schema.insert(
|
|
138
|
+
item, 'ok',
|
|
139
|
+
Parameter(
|
|
140
|
+
'bool',
|
|
141
|
+
scope=Scope.GLOBAL,
|
|
142
|
+
shorthelp="Checklist: item ok",
|
|
143
|
+
switch="-checklist_ok 'standard item <bool>'",
|
|
144
|
+
example=[
|
|
145
|
+
"cli: -checklist_ok 'ISO D000 true'",
|
|
146
|
+
"api: chip.set('checklist', 'ISO', 'D000', 'ok', True)"],
|
|
147
|
+
help=trim("""
|
|
148
|
+
Boolean check mark for the checklist item. A value of
|
|
149
|
+
True indicates a human has inspected the all item dictionary
|
|
150
|
+
parameters check out.""")))
|