sglang 0.4.2.post3__py3-none-any.whl → 0.4.3__py3-none-any.whl

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Files changed (88) hide show
  1. sglang/check_env.py +1 -0
  2. sglang/global_config.py +2 -0
  3. sglang/srt/constrained/outlines_backend.py +4 -1
  4. sglang/srt/entrypoints/engine.py +2 -2
  5. sglang/srt/layers/attention/flashinfer_backend.py +265 -147
  6. sglang/srt/layers/attention/triton_backend.py +358 -72
  7. sglang/srt/layers/attention/triton_ops/extend_attention.py +4 -4
  8. sglang/srt/layers/linear.py +12 -5
  9. sglang/srt/layers/moe/fused_moe_triton/configs/E=256,N=256,device_name=AMD_Instinct_MI300X,dtype=fp8_w8a8,block_shape=[128, 128].json +2 -2
  10. sglang/srt/layers/moe/fused_moe_triton/configs/E=256,N=256,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  11. sglang/srt/layers/moe/fused_moe_triton/configs/E=256,N=256,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +2 -2
  12. sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=14336,device_name=AMD_Instinct_MI325X.json +200 -0
  13. sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=1792,device_name=AMD_Instinct_MI325X.json +200 -0
  14. sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=3584,device_name=AMD_Instinct_MI325X.json +200 -0
  15. sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=4096,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8.json +178 -0
  16. sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=7168,device_name=AMD_Instinct_MI325X.json +200 -0
  17. sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=8192,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8.json +175 -0
  18. sglang/srt/layers/moe/fused_moe_triton/fused_moe.py +27 -5
  19. sglang/srt/layers/moe/fused_moe_triton/layer.py +2 -0
  20. sglang/srt/layers/moe/topk.py +1 -1
  21. sglang/srt/layers/quantization/__init__.py +51 -5
  22. sglang/srt/layers/quantization/configs/N=1536,K=1536,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  23. sglang/srt/layers/quantization/configs/N=1536,K=7168,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  24. sglang/srt/layers/quantization/configs/N=1536,K=7168,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +30 -30
  25. sglang/srt/layers/quantization/configs/N=1536,K=7168,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  26. sglang/srt/layers/quantization/configs/N=2048,K=512,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  27. sglang/srt/layers/quantization/configs/N=2304,K=7168,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  28. sglang/srt/layers/quantization/configs/N=24576,K=7168,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  29. sglang/srt/layers/quantization/configs/N=256,K=7168,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  30. sglang/srt/layers/quantization/configs/N=3072,K=1536,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  31. sglang/srt/layers/quantization/configs/N=3072,K=1536,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +29 -29
  32. sglang/srt/layers/quantization/configs/N=32768,K=512,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  33. sglang/srt/layers/quantization/configs/N=4096,K=512,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  34. sglang/srt/layers/quantization/configs/N=4096,K=512,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +33 -33
  35. sglang/srt/layers/quantization/configs/N=4608,K=7168,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  36. sglang/srt/layers/quantization/configs/N=4608,K=7168,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +31 -31
  37. sglang/srt/layers/quantization/configs/N=512,K=7168,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  38. sglang/srt/layers/quantization/configs/N=512,K=7168,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +27 -27
  39. sglang/srt/layers/quantization/configs/N=576,K=7168,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  40. sglang/srt/layers/quantization/configs/N=576,K=7168,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +31 -31
  41. sglang/srt/layers/quantization/configs/N=576,K=7168,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  42. sglang/srt/layers/quantization/configs/N=7168,K=1024,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  43. sglang/srt/layers/quantization/configs/N=7168,K=1152,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  44. sglang/srt/layers/quantization/configs/N=7168,K=128,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  45. sglang/srt/layers/quantization/configs/N=7168,K=16384,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  46. sglang/srt/layers/quantization/configs/N=7168,K=18432,device_name=NVIDIA_H20,dtype=fp8_w8a8,block_shape=[128, 128].json +146 -0
  47. sglang/srt/layers/quantization/configs/N=7168,K=2048,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  48. sglang/srt/layers/quantization/configs/N=7168,K=2048,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +24 -24
  49. sglang/srt/layers/quantization/configs/N=7168,K=2304,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  50. sglang/srt/layers/quantization/configs/N=7168,K=2304,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +30 -30
  51. sglang/srt/layers/quantization/configs/N=7168,K=256,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128, 128].json +164 -0
  52. sglang/srt/layers/quantization/configs/N=7168,K=256,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json +42 -42
  53. sglang/srt/layers/quantization/fp8_kernel.py +123 -17
  54. sglang/srt/layers/quantization/fp8_utils.py +33 -4
  55. sglang/srt/lora/backend/__init__.py +25 -5
  56. sglang/srt/lora/backend/base_backend.py +31 -9
  57. sglang/srt/lora/backend/flashinfer_backend.py +41 -4
  58. sglang/srt/lora/backend/triton_backend.py +34 -4
  59. sglang/srt/lora/layers.py +293 -0
  60. sglang/srt/lora/lora.py +101 -326
  61. sglang/srt/lora/lora_manager.py +101 -269
  62. sglang/srt/lora/mem_pool.py +174 -0
  63. sglang/srt/lora/triton_ops/__init__.py +7 -1
  64. sglang/srt/lora/triton_ops/gate_up_lora_b.py +170 -0
  65. sglang/srt/lora/triton_ops/qkv_lora_b.py +5 -5
  66. sglang/srt/lora/triton_ops/sgemm_lora_a.py +2 -2
  67. sglang/srt/lora/triton_ops/sgemm_lora_b.py +2 -2
  68. sglang/srt/lora/utils.py +141 -0
  69. sglang/srt/managers/detokenizer_manager.py +1 -0
  70. sglang/srt/managers/io_struct.py +4 -0
  71. sglang/srt/managers/schedule_batch.py +16 -3
  72. sglang/srt/managers/scheduler.py +29 -0
  73. sglang/srt/managers/tokenizer_manager.py +6 -0
  74. sglang/srt/managers/tp_worker_overlap_thread.py +4 -0
  75. sglang/srt/model_executor/cuda_graph_runner.py +16 -1
  76. sglang/srt/model_executor/model_runner.py +12 -2
  77. sglang/srt/models/deepseek_v2.py +17 -7
  78. sglang/srt/server_args.py +20 -1
  79. sglang/srt/speculative/eagle_draft_cuda_graph_runner.py +1 -0
  80. sglang/srt/speculative/eagle_utils.py +64 -21
  81. sglang/srt/speculative/eagle_worker.py +29 -8
  82. sglang/srt/utils.py +7 -0
  83. sglang/version.py +1 -1
  84. {sglang-0.4.2.post3.dist-info → sglang-0.4.3.dist-info}/METADATA +6 -5
  85. {sglang-0.4.2.post3.dist-info → sglang-0.4.3.dist-info}/RECORD +88 -55
  86. {sglang-0.4.2.post3.dist-info → sglang-0.4.3.dist-info}/LICENSE +0 -0
  87. {sglang-0.4.2.post3.dist-info → sglang-0.4.3.dist-info}/WHEEL +0 -0
  88. {sglang-0.4.2.post3.dist-info → sglang-0.4.3.dist-info}/top_level.txt +0 -0
sglang/srt/layers/moe/fused_moe_triton/configs/E=256,N=256,device_name=AMD_Instinct_MI325X,dtype=fp8_w8a8,block_shape=[128, 128].json ADDED
@@ -0,0 +1,164 @@
1
+ {
2
+ "1": {
3
+ "BLOCK_SIZE_M": 32,
4
+ "BLOCK_SIZE_N": 32,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 16,
7
+ "num_warps": 4,
8
+ "num_stages": 2,
9
+ "waves_per_eu": 0
10
+ },
11
+ "2": {
12
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
16
+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "4": {
21
+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 16,
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+ "num_warps": 4,
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+ "num_stages": 2,
27
+ "waves_per_eu": 0
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+ },
29
+ "8": {
30
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 32,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
38
+ "16": {
39
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
47
+ "24": {
48
+ "BLOCK_SIZE_M": 32,
49
+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 4,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "32": {
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+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 8,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "48": {
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+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 4,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "64": {
75
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 4,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
83
+ "96": {
84
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 8,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "128": {
93
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 16,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 4,
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+ "num_warps": 4,
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+ "num_stages": 2,
99
+ "waves_per_eu": 0
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+ },
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+ "256": {
102
+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 16,
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+ "BLOCK_SIZE_K": 128,
105
+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 2,
108
+ "waves_per_eu": 0
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+ },
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+ "512": {
111
+ "BLOCK_SIZE_M": 64,
112
+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
114
+ "GROUP_SIZE_M": 32,
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+ "num_warps": 4,
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+ "num_stages": 2,
117
+ "waves_per_eu": 0
118
+ },
119
+ "1024": {
120
+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 4,
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+ "num_warps": 8,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "1536": {
129
+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 8,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "2048": {
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+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "3072": {
147
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ },
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+ "4096": {
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+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 64,
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+ "GROUP_SIZE_M": 4,
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+ "num_warps": 4,
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+ "num_stages": 2,
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+ "waves_per_eu": 0
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+ }
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+ }
sglang/srt/layers/moe/fused_moe_triton/configs/E=256,N=256,device_name=AMD_Radeon_Graphics,dtype=fp8_w8a8,block_shape=[128, 128].json CHANGED
@@ -72,10 +72,10 @@
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  "waves_per_eu": 0
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  },
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  "64": {
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- "BLOCK_SIZE_M": 256,
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+ "BLOCK_SIZE_M": 32,
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  "BLOCK_SIZE_N": 128,
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  "BLOCK_SIZE_K": 128,
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- "GROUP_SIZE_M": 1,
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+ "GROUP_SIZE_M": 4,
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  "num_warps": 4,
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  "num_stages": 2,
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  "waves_per_eu": 0
sglang/srt/layers/moe/fused_moe_triton/configs/E=8,N=14336,device_name=AMD_Instinct_MI325X.json ADDED
@@ -0,0 +1,200 @@
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+ {
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+ "1": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 32,
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+ "BLOCK_SIZE_K": 256,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 2,
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+ "num_stages": 0,
9
+ "waves_per_eu": 0,
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+ "matrix_instr_nonkdim": 16,
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+ "kpack": 1
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+ },
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+ "2": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 16,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 2,
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+ "num_stages": 0,
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+ "waves_per_eu": 0,
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+ "matrix_instr_nonkdim": 16,
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+ "kpack": 2
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+ },
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+ "4": {
25
+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 32,
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+ "BLOCK_SIZE_K": 256,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 2,
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+ "num_stages": 0,
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+ "waves_per_eu": 0,
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+ "matrix_instr_nonkdim": 16,
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+ "kpack": 2
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+ },
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+ "8": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 16,
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+ "BLOCK_SIZE_K": 256,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 1,
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+ "num_stages": 0,
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+ "waves_per_eu": 0,
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+ "matrix_instr_nonkdim": 16,
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+ "kpack": 2
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+ },
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+ "16": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 16,
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+ "BLOCK_SIZE_K": 256,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 0,
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+ "waves_per_eu": 0,
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+ "matrix_instr_nonkdim": 16,
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+ "kpack": 2
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+ },
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+ "24": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 32,
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+ "BLOCK_SIZE_K": 64,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 1,
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+ "num_stages": 0,
64
+ "waves_per_eu": 0,
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+ "matrix_instr_nonkdim": 16,
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+ "kpack": 2
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+ },
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+ "32": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 16,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 4,
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+ "num_warps": 2,
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+ "num_stages": 0,
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+ "waves_per_eu": 0,
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+ "matrix_instr_nonkdim": 16,
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+ "kpack": 1
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+ },
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+ "48": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 16,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 4,
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+ "num_warps": 2,
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+ "num_stages": 0,
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+ "waves_per_eu": 0,
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+ "matrix_instr_nonkdim": 16,
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+ "kpack": 2
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+ },
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+ "64": {
91
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 4,
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+ "num_warps": 8,
96
+ "num_stages": 0,
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+ "waves_per_eu": 0,
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+ "matrix_instr_nonkdim": 16,
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+ "kpack": 2
100
+ },
101
+ "96": {
102
+ "BLOCK_SIZE_M": 32,
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+ "BLOCK_SIZE_N": 32,
104
+ "BLOCK_SIZE_K": 128,
105
+ "GROUP_SIZE_M": 4,
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+ "num_warps": 4,
107
+ "num_stages": 0,
108
+ "waves_per_eu": 0,
109
+ "matrix_instr_nonkdim": 16,
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+ "kpack": 2
111
+ },
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+ "128": {
113
+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 64,
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+ "GROUP_SIZE_M": 4,
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+ "num_warps": 8,
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